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Commit | Line | Data |
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550a7375 FB |
1 | /* |
2 | * Copyright (C) 2005-2007 by Texas Instruments | |
3 | * Some code has been taken from tusb6010.c | |
4 | * Copyrights for that are attributable to: | |
5 | * Copyright (C) 2006 Nokia Corporation | |
550a7375 FB |
6 | * Tony Lindgren <tony@atomide.com> |
7 | * | |
8 | * This file is part of the Inventra Controller Driver for Linux. | |
9 | * | |
10 | * The Inventra Controller Driver for Linux is free software; you | |
11 | * can redistribute it and/or modify it under the terms of the GNU | |
12 | * General Public License version 2 as published by the Free Software | |
13 | * Foundation. | |
14 | * | |
15 | * The Inventra Controller Driver for Linux is distributed in | |
16 | * the hope that it will be useful, but WITHOUT ANY WARRANTY; | |
17 | * without even the implied warranty of MERCHANTABILITY or | |
18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
19 | * License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with The Inventra Controller Driver for Linux ; if not, | |
23 | * write to the Free Software Foundation, Inc., 59 Temple Place, | |
24 | * Suite 330, Boston, MA 02111-1307 USA | |
25 | * | |
26 | */ | |
27 | #include <linux/module.h> | |
28 | #include <linux/kernel.h> | |
29 | #include <linux/sched.h> | |
550a7375 FB |
30 | #include <linux/init.h> |
31 | #include <linux/list.h> | |
32 | #include <linux/clk.h> | |
33 | #include <linux/io.h> | |
dc09886b FB |
34 | #include <linux/platform_device.h> |
35 | #include <linux/dma-mapping.h> | |
550a7375 | 36 | |
550a7375 FB |
37 | #include "musb_core.h" |
38 | #include "omap2430.h" | |
39 | ||
a3cee12a FB |
40 | struct omap2430_glue { |
41 | struct device *dev; | |
42 | struct platform_device *musb; | |
43 | }; | |
44 | ||
550a7375 FB |
45 | static struct timer_list musb_idle_timer; |
46 | ||
47 | static void musb_do_idle(unsigned long _musb) | |
48 | { | |
49 | struct musb *musb = (void *)_musb; | |
50 | unsigned long flags; | |
eef767b7 | 51 | #ifdef CONFIG_USB_MUSB_HDRC_HCD |
550a7375 | 52 | u8 power; |
eef767b7 | 53 | #endif |
550a7375 FB |
54 | u8 devctl; |
55 | ||
550a7375 FB |
56 | spin_lock_irqsave(&musb->lock, flags); |
57 | ||
71783e0d DB |
58 | devctl = musb_readb(musb->mregs, MUSB_DEVCTL); |
59 | ||
84e250ff | 60 | switch (musb->xceiv->state) { |
550a7375 FB |
61 | case OTG_STATE_A_WAIT_BCON: |
62 | devctl &= ~MUSB_DEVCTL_SESSION; | |
63 | musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); | |
64 | ||
65 | devctl = musb_readb(musb->mregs, MUSB_DEVCTL); | |
66 | if (devctl & MUSB_DEVCTL_BDEVICE) { | |
84e250ff | 67 | musb->xceiv->state = OTG_STATE_B_IDLE; |
550a7375 FB |
68 | MUSB_DEV_MODE(musb); |
69 | } else { | |
84e250ff | 70 | musb->xceiv->state = OTG_STATE_A_IDLE; |
550a7375 FB |
71 | MUSB_HST_MODE(musb); |
72 | } | |
73 | break; | |
74 | #ifdef CONFIG_USB_MUSB_HDRC_HCD | |
75 | case OTG_STATE_A_SUSPEND: | |
76 | /* finish RESUME signaling? */ | |
77 | if (musb->port1_status & MUSB_PORT_STAT_RESUME) { | |
78 | power = musb_readb(musb->mregs, MUSB_POWER); | |
79 | power &= ~MUSB_POWER_RESUME; | |
80 | DBG(1, "root port resume stopped, power %02x\n", power); | |
81 | musb_writeb(musb->mregs, MUSB_POWER, power); | |
82 | musb->is_active = 1; | |
83 | musb->port1_status &= ~(USB_PORT_STAT_SUSPEND | |
84 | | MUSB_PORT_STAT_RESUME); | |
85 | musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16; | |
86 | usb_hcd_poll_rh_status(musb_to_hcd(musb)); | |
87 | /* NOTE: it might really be A_WAIT_BCON ... */ | |
84e250ff | 88 | musb->xceiv->state = OTG_STATE_A_HOST; |
550a7375 FB |
89 | } |
90 | break; | |
91 | #endif | |
92 | #ifdef CONFIG_USB_MUSB_HDRC_HCD | |
93 | case OTG_STATE_A_HOST: | |
94 | devctl = musb_readb(musb->mregs, MUSB_DEVCTL); | |
95 | if (devctl & MUSB_DEVCTL_BDEVICE) | |
84e250ff | 96 | musb->xceiv->state = OTG_STATE_B_IDLE; |
550a7375 | 97 | else |
84e250ff | 98 | musb->xceiv->state = OTG_STATE_A_WAIT_BCON; |
550a7375 FB |
99 | #endif |
100 | default: | |
101 | break; | |
102 | } | |
103 | spin_unlock_irqrestore(&musb->lock, flags); | |
104 | } | |
105 | ||
106 | ||
743411b3 | 107 | static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout) |
550a7375 FB |
108 | { |
109 | unsigned long default_timeout = jiffies + msecs_to_jiffies(3); | |
110 | static unsigned long last_timer; | |
111 | ||
112 | if (timeout == 0) | |
113 | timeout = default_timeout; | |
114 | ||
115 | /* Never idle if active, or when VBUS timeout is not set as host */ | |
116 | if (musb->is_active || ((musb->a_wait_bcon == 0) | |
84e250ff | 117 | && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) { |
550a7375 FB |
118 | DBG(4, "%s active, deleting timer\n", otg_state_string(musb)); |
119 | del_timer(&musb_idle_timer); | |
120 | last_timer = jiffies; | |
121 | return; | |
122 | } | |
123 | ||
124 | if (time_after(last_timer, timeout)) { | |
125 | if (!timer_pending(&musb_idle_timer)) | |
126 | last_timer = timeout; | |
127 | else { | |
128 | DBG(4, "Longer idle timer already pending, ignoring\n"); | |
129 | return; | |
130 | } | |
131 | } | |
132 | last_timer = timeout; | |
133 | ||
134 | DBG(4, "%s inactive, for idle timer for %lu ms\n", | |
135 | otg_state_string(musb), | |
136 | (unsigned long)jiffies_to_msecs(timeout - jiffies)); | |
137 | mod_timer(&musb_idle_timer, timeout); | |
138 | } | |
139 | ||
743411b3 | 140 | static void omap2430_musb_enable(struct musb *musb) |
550a7375 FB |
141 | { |
142 | } | |
743411b3 FB |
143 | |
144 | static void omap2430_musb_disable(struct musb *musb) | |
550a7375 FB |
145 | { |
146 | } | |
743411b3 FB |
147 | |
148 | static void omap2430_musb_set_vbus(struct musb *musb, int is_on) | |
550a7375 FB |
149 | { |
150 | u8 devctl; | |
151 | /* HDRC controls CPEN, but beware current surges during device | |
152 | * connect. They can trigger transient overcurrent conditions | |
153 | * that must be ignored. | |
154 | */ | |
155 | ||
156 | devctl = musb_readb(musb->mregs, MUSB_DEVCTL); | |
157 | ||
158 | if (is_on) { | |
159 | musb->is_active = 1; | |
84e250ff DB |
160 | musb->xceiv->default_a = 1; |
161 | musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; | |
550a7375 FB |
162 | devctl |= MUSB_DEVCTL_SESSION; |
163 | ||
164 | MUSB_HST_MODE(musb); | |
165 | } else { | |
166 | musb->is_active = 0; | |
167 | ||
168 | /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and | |
169 | * jumping right to B_IDLE... | |
170 | */ | |
171 | ||
84e250ff DB |
172 | musb->xceiv->default_a = 0; |
173 | musb->xceiv->state = OTG_STATE_B_IDLE; | |
550a7375 FB |
174 | devctl &= ~MUSB_DEVCTL_SESSION; |
175 | ||
176 | MUSB_DEV_MODE(musb); | |
177 | } | |
178 | musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); | |
179 | ||
180 | DBG(1, "VBUS %s, devctl %02x " | |
181 | /* otg %3x conf %08x prcm %08x */ "\n", | |
182 | otg_state_string(musb), | |
183 | musb_readb(musb->mregs, MUSB_DEVCTL)); | |
184 | } | |
550a7375 | 185 | |
743411b3 | 186 | static int omap2430_musb_resume(struct musb *musb); |
550a7375 | 187 | |
743411b3 | 188 | static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode) |
550a7375 FB |
189 | { |
190 | u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); | |
191 | ||
192 | devctl |= MUSB_DEVCTL_SESSION; | |
193 | musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); | |
194 | ||
96a274d1 | 195 | return 0; |
550a7375 FB |
196 | } |
197 | ||
743411b3 | 198 | static int omap2430_musb_init(struct musb *musb) |
550a7375 FB |
199 | { |
200 | u32 l; | |
ea65df57 HK |
201 | struct device *dev = musb->controller; |
202 | struct musb_hdrc_platform_data *plat = dev->platform_data; | |
203 | struct omap_musb_board_data *data = plat->board_data; | |
550a7375 | 204 | |
84e250ff DB |
205 | /* We require some kind of external transceiver, hooked |
206 | * up through ULPI. TWL4030-family PMICs include one, | |
207 | * which needs a driver, drivers aren't always needed. | |
208 | */ | |
209 | musb->xceiv = otg_get_transceiver(); | |
210 | if (!musb->xceiv) { | |
211 | pr_err("HS USB OTG: no transceiver configured\n"); | |
212 | return -ENODEV; | |
213 | } | |
214 | ||
743411b3 | 215 | omap2430_musb_resume(musb); |
550a7375 | 216 | |
8573e6a6 | 217 | l = musb_readl(musb->mregs, OTG_SYSCONFIG); |
550a7375 FB |
218 | l &= ~ENABLEWAKEUP; /* disable wakeup */ |
219 | l &= ~NOSTDBY; /* remove possible nostdby */ | |
220 | l |= SMARTSTDBY; /* enable smart standby */ | |
221 | l &= ~AUTOIDLE; /* disable auto idle */ | |
222 | l &= ~NOIDLE; /* remove possible noidle */ | |
223 | l |= SMARTIDLE; /* enable smart idle */ | |
9a4b5e36 NM |
224 | /* |
225 | * MUSB AUTOIDLE don't work in 3430. | |
226 | * Workaround by Richard Woodruff/TI | |
227 | */ | |
228 | if (!cpu_is_omap3430()) | |
229 | l |= AUTOIDLE; /* enable auto idle */ | |
8573e6a6 | 230 | musb_writel(musb->mregs, OTG_SYSCONFIG, l); |
550a7375 | 231 | |
8573e6a6 | 232 | l = musb_readl(musb->mregs, OTG_INTERFSEL); |
de2e1b0c MM |
233 | |
234 | if (data->interface_type == MUSB_INTERFACE_UTMI) { | |
235 | /* OMAP4 uses Internal PHY GS70 which uses UTMI interface */ | |
236 | l &= ~ULPI_12PIN; /* Disable ULPI */ | |
237 | l |= UTMI_8BIT; /* Enable UTMI */ | |
238 | } else { | |
239 | l |= ULPI_12PIN; | |
240 | } | |
241 | ||
8573e6a6 | 242 | musb_writel(musb->mregs, OTG_INTERFSEL, l); |
550a7375 FB |
243 | |
244 | pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, " | |
245 | "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n", | |
8573e6a6 FB |
246 | musb_readl(musb->mregs, OTG_REVISION), |
247 | musb_readl(musb->mregs, OTG_SYSCONFIG), | |
248 | musb_readl(musb->mregs, OTG_SYSSTATUS), | |
249 | musb_readl(musb->mregs, OTG_INTERFSEL), | |
250 | musb_readl(musb->mregs, OTG_SIMENABLE)); | |
550a7375 | 251 | |
550a7375 | 252 | if (is_host_enabled(musb)) |
743411b3 | 253 | musb->board_set_vbus = omap2430_musb_set_vbus; |
550a7375 FB |
254 | |
255 | setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb); | |
256 | ||
257 | return 0; | |
258 | } | |
259 | ||
4f712e01 | 260 | #ifdef CONFIG_PM |
8573e6a6 FB |
261 | void musb_platform_save_context(struct musb *musb, |
262 | struct musb_context_registers *musb_context) | |
4f712e01 | 263 | { |
8573e6a6 FB |
264 | musb_context->otg_sysconfig = musb_readl(musb->mregs, OTG_SYSCONFIG); |
265 | musb_context->otg_forcestandby = musb_readl(musb->mregs, OTG_FORCESTDBY); | |
4f712e01 AKG |
266 | } |
267 | ||
8573e6a6 FB |
268 | void musb_platform_restore_context(struct musb *musb, |
269 | struct musb_context_registers *musb_context) | |
4f712e01 | 270 | { |
8573e6a6 FB |
271 | musb_writel(musb->mregs, OTG_SYSCONFIG, musb_context->otg_sysconfig); |
272 | musb_writel(musb->mregs, OTG_FORCESTDBY, musb_context->otg_forcestandby); | |
4f712e01 AKG |
273 | } |
274 | #endif | |
275 | ||
743411b3 | 276 | static int omap2430_musb_suspend(struct musb *musb) |
550a7375 FB |
277 | { |
278 | u32 l; | |
279 | ||
280 | if (!musb->clock) | |
281 | return 0; | |
282 | ||
283 | /* in any role */ | |
8573e6a6 | 284 | l = musb_readl(musb->mregs, OTG_FORCESTDBY); |
550a7375 | 285 | l |= ENABLEFORCE; /* enable MSTANDBY */ |
8573e6a6 | 286 | musb_writel(musb->mregs, OTG_FORCESTDBY, l); |
550a7375 | 287 | |
8573e6a6 | 288 | l = musb_readl(musb->mregs, OTG_SYSCONFIG); |
550a7375 | 289 | l |= ENABLEWAKEUP; /* enable wakeup */ |
8573e6a6 | 290 | musb_writel(musb->mregs, OTG_SYSCONFIG, l); |
550a7375 | 291 | |
84e250ff | 292 | otg_set_suspend(musb->xceiv, 1); |
550a7375 FB |
293 | |
294 | if (musb->set_clock) | |
295 | musb->set_clock(musb->clock, 0); | |
296 | else | |
297 | clk_disable(musb->clock); | |
298 | ||
299 | return 0; | |
300 | } | |
301 | ||
743411b3 | 302 | static int omap2430_musb_resume(struct musb *musb) |
550a7375 FB |
303 | { |
304 | u32 l; | |
305 | ||
306 | if (!musb->clock) | |
307 | return 0; | |
308 | ||
84e250ff | 309 | otg_set_suspend(musb->xceiv, 0); |
550a7375 FB |
310 | |
311 | if (musb->set_clock) | |
312 | musb->set_clock(musb->clock, 1); | |
313 | else | |
314 | clk_enable(musb->clock); | |
315 | ||
8573e6a6 | 316 | l = musb_readl(musb->mregs, OTG_SYSCONFIG); |
550a7375 | 317 | l &= ~ENABLEWAKEUP; /* disable wakeup */ |
8573e6a6 | 318 | musb_writel(musb->mregs, OTG_SYSCONFIG, l); |
550a7375 | 319 | |
8573e6a6 | 320 | l = musb_readl(musb->mregs, OTG_FORCESTDBY); |
550a7375 | 321 | l &= ~ENABLEFORCE; /* disable MSTANDBY */ |
8573e6a6 | 322 | musb_writel(musb->mregs, OTG_FORCESTDBY, l); |
550a7375 FB |
323 | |
324 | return 0; | |
325 | } | |
326 | ||
743411b3 | 327 | static int omap2430_musb_exit(struct musb *musb) |
550a7375 FB |
328 | { |
329 | ||
743411b3 | 330 | omap2430_musb_suspend(musb); |
550a7375 | 331 | |
f4053874 | 332 | otg_put_transceiver(musb->xceiv); |
550a7375 FB |
333 | return 0; |
334 | } | |
743411b3 FB |
335 | |
336 | const struct musb_platform_ops musb_ops = { | |
337 | .init = omap2430_musb_init, | |
338 | .exit = omap2430_musb_exit, | |
339 | ||
340 | .suspend = omap2430_musb_suspend, | |
341 | .resume = omap2430_musb_resume, | |
342 | ||
343 | .enable = omap2430_musb_enable, | |
344 | .disable = omap2430_musb_disable, | |
345 | ||
346 | .set_mode = omap2430_musb_set_mode, | |
347 | .try_idle = omap2430_musb_try_idle, | |
348 | ||
349 | .set_vbus = omap2430_musb_set_vbus, | |
350 | }; | |
dc09886b FB |
351 | |
352 | static u64 omap2430_dmamask = DMA_BIT_MASK(32); | |
353 | ||
354 | static int __init omap2430_probe(struct platform_device *pdev) | |
355 | { | |
356 | struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data; | |
357 | struct platform_device *musb; | |
a3cee12a | 358 | struct omap2430_glue *glue; |
dc09886b FB |
359 | |
360 | int ret = -ENOMEM; | |
361 | ||
a3cee12a FB |
362 | glue = kzalloc(sizeof(*glue), GFP_KERNEL); |
363 | if (!glue) { | |
364 | dev_err(&pdev->dev, "failed to allocate glue context\n"); | |
365 | goto err0; | |
366 | } | |
367 | ||
dc09886b FB |
368 | musb = platform_device_alloc("musb-hdrc", -1); |
369 | if (!musb) { | |
370 | dev_err(&pdev->dev, "failed to allocate musb device\n"); | |
a3cee12a | 371 | goto err1; |
dc09886b FB |
372 | } |
373 | ||
374 | musb->dev.parent = &pdev->dev; | |
375 | musb->dev.dma_mask = &omap2430_dmamask; | |
376 | musb->dev.coherent_dma_mask = omap2430_dmamask; | |
377 | ||
a3cee12a FB |
378 | glue->dev = &pdev->dev; |
379 | glue->musb = musb; | |
380 | ||
381 | platform_set_drvdata(pdev, glue); | |
dc09886b FB |
382 | |
383 | ret = platform_device_add_resources(musb, pdev->resource, | |
384 | pdev->num_resources); | |
385 | if (ret) { | |
386 | dev_err(&pdev->dev, "failed to add resources\n"); | |
a3cee12a | 387 | goto err2; |
dc09886b FB |
388 | } |
389 | ||
390 | ret = platform_device_add_data(musb, pdata, sizeof(*pdata)); | |
391 | if (ret) { | |
392 | dev_err(&pdev->dev, "failed to add platform_data\n"); | |
a3cee12a | 393 | goto err2; |
dc09886b FB |
394 | } |
395 | ||
396 | ret = platform_device_add(musb); | |
397 | if (ret) { | |
398 | dev_err(&pdev->dev, "failed to register musb device\n"); | |
a3cee12a | 399 | goto err2; |
dc09886b FB |
400 | } |
401 | ||
402 | return 0; | |
403 | ||
a3cee12a | 404 | err2: |
dc09886b FB |
405 | platform_device_put(musb); |
406 | ||
a3cee12a FB |
407 | err1: |
408 | kfree(glue); | |
409 | ||
dc09886b FB |
410 | err0: |
411 | return ret; | |
412 | } | |
413 | ||
414 | static int __exit omap2430_remove(struct platform_device *pdev) | |
415 | { | |
a3cee12a | 416 | struct omap2430_glue *glue = platform_get_drvdata(pdev); |
dc09886b | 417 | |
a3cee12a FB |
418 | platform_device_del(glue->musb); |
419 | platform_device_put(glue->musb); | |
420 | kfree(glue); | |
dc09886b FB |
421 | |
422 | return 0; | |
423 | } | |
424 | ||
425 | static struct platform_driver omap2430_driver = { | |
426 | .remove = __exit_p(omap2430_remove), | |
427 | .driver = { | |
428 | .name = "musb-omap2430", | |
429 | }, | |
430 | }; | |
431 | ||
432 | MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer"); | |
433 | MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>"); | |
434 | MODULE_LICENSE("GPL v2"); | |
435 | ||
436 | static int __init omap2430_init(void) | |
437 | { | |
438 | return platform_driver_probe(&omap2430_driver, omap2430_probe); | |
439 | } | |
440 | subsys_initcall(omap2430_init); | |
441 | ||
442 | static void __exit omap2430_exit(void) | |
443 | { | |
444 | platform_driver_unregister(&omap2430_driver); | |
445 | } | |
446 | module_exit(omap2430_exit); |