[mirror_ubuntu-bionic-kernel.git] / drivers / usb / musb / omap2430.c

/*
 * Copyright (C) 2005-2007 by Texas Instruments
 * Some code has been taken from tusb6010.c
 * Copyrights for that are attributable to:
 * Copyright (C) 2006 Nokia Corporation
 * Tony Lindgren <tony@atomide.com>
 *
 * This file is part of the Inventra Controller Driver for Linux.
 *
 * The Inventra Controller Driver for Linux is free software; you
 * can redistribute it and/or modify it under the terms of the GNU
 * General Public License version 2 as published by the Free Software
 * Foundation.
 *
 * The Inventra Controller Driver for Linux is distributed in
 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
 * without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
 * License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with The Inventra Controller Driver for Linux ; if not,
 * write to the Free Software Foundation, Inc., 59 Temple Place,
 * Suite 330, Boston, MA  02111-1307  USA
 *
 */
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/init.h>
#include <linux/list.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/pm_runtime.h>
#include <linux/err.h>

#include "musb_core.h"
#include "omap2430.h"

struct omap2430_glue {
	struct device		*dev;
	struct platform_device	*musb;
};
#define glue_to_musb(g)		platform_get_drvdata(g->musb)

static struct timer_list musb_idle_timer;

static void musb_do_idle(unsigned long _musb)
{
	struct musb	*musb = (void *)_musb;
	unsigned long	flags;
#ifdef CONFIG_USB_MUSB_HDRC_HCD
	u8	power;
#endif
	u8	devctl;

	spin_lock_irqsave(&musb->lock, flags);

	switch (musb->xceiv->state) {
	case OTG_STATE_A_WAIT_BCON:

		devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
		if (devctl & MUSB_DEVCTL_BDEVICE) {
			musb->xceiv->state = OTG_STATE_B_IDLE;
			MUSB_DEV_MODE(musb);
		} else {
			musb->xceiv->state = OTG_STATE_A_IDLE;
			MUSB_HST_MODE(musb);
		}
		break;
#ifdef CONFIG_USB_MUSB_HDRC_HCD
	case OTG_STATE_A_SUSPEND:
		/* finish RESUME signaling? */
		if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
			power = musb_readb(musb->mregs, MUSB_POWER);
			power &= ~MUSB_POWER_RESUME;
			DBG(1, "root port resume stopped, power %02x\n", power);
			musb_writeb(musb->mregs, MUSB_POWER, power);
			musb->is_active = 1;
			musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
						| MUSB_PORT_STAT_RESUME);
			musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
			usb_hcd_poll_rh_status(musb_to_hcd(musb));
			/* NOTE: it might really be A_WAIT_BCON ... */
			musb->xceiv->state = OTG_STATE_A_HOST;
		}
		break;
#endif
#ifdef CONFIG_USB_MUSB_HDRC_HCD
	case OTG_STATE_A_HOST:
		devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
		if (devctl &  MUSB_DEVCTL_BDEVICE)
			musb->xceiv->state = OTG_STATE_B_IDLE;
		else
			musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
#endif
	default:
		break;
	}
	spin_unlock_irqrestore(&musb->lock, flags);
}


static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
{
	unsigned long		default_timeout = jiffies + msecs_to_jiffies(3);
	static unsigned long	last_timer;

	if (timeout == 0)
		timeout = default_timeout;

	/* Never idle if active, or when VBUS timeout is not set as host */
	if (musb->is_active || ((musb->a_wait_bcon == 0)
			&& (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
		DBG(4, "%s active, deleting timer\n", otg_state_string(musb));
		del_timer(&musb_idle_timer);
		last_timer = jiffies;
		return;
	}

	if (time_after(last_timer, timeout)) {
		if (!timer_pending(&musb_idle_timer))
			last_timer = timeout;
		else {
			DBG(4, "Longer idle timer already pending, ignoring\n");
			return;
		}
	}
	last_timer = timeout;

	DBG(4, "%s inactive, for idle timer for %lu ms\n",
		otg_state_string(musb),
		(unsigned long)jiffies_to_msecs(timeout - jiffies));
	mod_timer(&musb_idle_timer, timeout);
}

static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
{
	u8		devctl;
	unsigned long timeout = jiffies + msecs_to_jiffies(1000);
	int ret = 1;
	/* HDRC controls CPEN, but beware current surges during device
	 * connect.  They can trigger transient overcurrent conditions
	 * that must be ignored.
	 */

	devctl = musb_readb(musb->mregs, MUSB_DEVCTL);

	if (is_on) {
		if (musb->xceiv->state == OTG_STATE_A_IDLE) {
			/* start the session */
			devctl |= MUSB_DEVCTL_SESSION;
			musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
			/*
			 * Wait for the musb to set as A device to enable the
			 * VBUS
			 */
			while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) {

				cpu_relax();

				if (time_after(jiffies, timeout)) {
					dev_err(musb->controller,
					"configured as A device timeout");
					ret = -EINVAL;
					break;
				}
			}

			if (ret && musb->xceiv->set_vbus)
				otg_set_vbus(musb->xceiv, 1);
		} else {
			musb->is_active = 1;
			musb->xceiv->default_a = 1;
			musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
			devctl |= MUSB_DEVCTL_SESSION;
			MUSB_HST_MODE(musb);
		}
	} else {
		musb->is_active = 0;

		/* NOTE:  we're skipping A_WAIT_VFALL -> A_IDLE and
		 * jumping right to B_IDLE...
		 */

		musb->xceiv->default_a = 0;
		musb->xceiv->state = OTG_STATE_B_IDLE;
		devctl &= ~MUSB_DEVCTL_SESSION;

		MUSB_DEV_MODE(musb);
	}
	musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);

	DBG(1, "VBUS %s, devctl %02x "
		/* otg %3x conf %08x prcm %08x */ "\n",
		otg_state_string(musb),
		musb_readb(musb->mregs, MUSB_DEVCTL));
}

static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
{
	u8	devctl = musb_readb(musb->mregs, MUSB_DEVCTL);

	devctl |= MUSB_DEVCTL_SESSION;
	musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);

	return 0;
}

static inline void omap2430_low_level_exit(struct musb *musb)
{
	u32 l;

	/* in any role */
	l = musb_readl(musb->mregs, OTG_FORCESTDBY);
	l |= ENABLEFORCE;	/* enable MSTANDBY */
	musb_writel(musb->mregs, OTG_FORCESTDBY, l);
}

static inline void omap2430_low_level_init(struct musb *musb)
{
	u32 l;

	l = musb_readl(musb->mregs, OTG_FORCESTDBY);
	l &= ~ENABLEFORCE;	/* disable MSTANDBY */
	musb_writel(musb->mregs, OTG_FORCESTDBY, l);
}

/* blocking notifier support */
static int musb_otg_notifications(struct notifier_block *nb,
		unsigned long event, void *unused)
{
	struct musb	*musb = container_of(nb, struct musb, nb);
	struct device *dev = musb->controller;
	struct musb_hdrc_platform_data *pdata = dev->platform_data;
	struct omap_musb_board_data *data = pdata->board_data;

	switch (event) {
	case USB_EVENT_ID:
		DBG(4, "ID GND\n");

		if (is_otg_enabled(musb)) {
#ifdef CONFIG_USB_GADGET_MUSB_HDRC
			if (musb->gadget_driver) {
				otg_init(musb->xceiv);

				if (data->interface_type ==
						MUSB_INTERFACE_UTMI)
					omap2430_musb_set_vbus(musb, 1);

			}
#endif
		} else {
			otg_init(musb->xceiv);
			if (data->interface_type ==
					MUSB_INTERFACE_UTMI)
				omap2430_musb_set_vbus(musb, 1);
		}
		break;

	case USB_EVENT_VBUS:
		DBG(4, "VBUS Connect\n");

		otg_init(musb->xceiv);
		break;

	case USB_EVENT_NONE:
		DBG(4, "VBUS Disconnect\n");

		if (data->interface_type == MUSB_INTERFACE_UTMI) {
			if (musb->xceiv->set_vbus)
				otg_set_vbus(musb->xceiv, 0);
		}
		otg_shutdown(musb->xceiv);
		break;
	default:
		DBG(4, "ID float\n");
		return NOTIFY_DONE;
	}

	return NOTIFY_OK;
}

static int omap2430_musb_init(struct musb *musb)
{
	u32 l, status = 0;
	struct device *dev = musb->controller;
	struct musb_hdrc_platform_data *plat = dev->platform_data;
	struct omap_musb_board_data *data = plat->board_data;

	/* We require some kind of external transceiver, hooked
	 * up through ULPI.  TWL4030-family PMICs include one,
	 * which needs a driver, drivers aren't always needed.
	 */
	musb->xceiv = otg_get_transceiver();
	if (!musb->xceiv) {
		pr_err("HS USB OTG: no transceiver configured\n");
		return -ENODEV;
	}

	omap2430_low_level_init(musb);

	l = musb_readl(musb->mregs, OTG_INTERFSEL);

	if (data->interface_type == MUSB_INTERFACE_UTMI) {
		/* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
		l &= ~ULPI_12PIN;       /* Disable ULPI */
		l |= UTMI_8BIT;         /* Enable UTMI  */
	} else {
		l |= ULPI_12PIN;
	}

	musb_writel(musb->mregs, OTG_INTERFSEL, l);

	pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
			"sysstatus 0x%x, intrfsel 0x%x, simenable  0x%x\n",
			musb_readl(musb->mregs, OTG_REVISION),
			musb_readl(musb->mregs, OTG_SYSCONFIG),
			musb_readl(musb->mregs, OTG_SYSSTATUS),
			musb_readl(musb->mregs, OTG_INTERFSEL),
			musb_readl(musb->mregs, OTG_SIMENABLE));

	musb->nb.notifier_call = musb_otg_notifications;
	status = otg_register_notifier(musb->xceiv, &musb->nb);

	if (status)
		DBG(1, "notification register failed\n");

	setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);

	return 0;
}

static void omap2430_musb_enable(struct musb *musb)
{
	u8		devctl;
	unsigned long timeout = jiffies + msecs_to_jiffies(1000);
	struct device *dev = musb->controller;
	struct musb_hdrc_platform_data *pdata = dev->platform_data;
	struct omap_musb_board_data *data = pdata->board_data;

	switch (musb->xceiv->last_event) {

	case USB_EVENT_ID:
		otg_init(musb->xceiv);
		if (data->interface_type == MUSB_INTERFACE_UTMI) {
			devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
			/* start the session */
			devctl |= MUSB_DEVCTL_SESSION;
			musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
			while (musb_readb(musb->mregs, MUSB_DEVCTL) &
						MUSB_DEVCTL_BDEVICE) {
				cpu_relax();

				if (time_after(jiffies, timeout)) {
					dev_err(musb->controller,
					"configured as A device timeout");
					break;
				}
			}
		}
		break;

	case USB_EVENT_VBUS:
		otg_init(musb->xceiv);
		break;

	default:
		break;
	}
}

static void omap2430_musb_disable(struct musb *musb)
{
	if (musb->xceiv->last_event)
		otg_shutdown(musb->xceiv);
}

static int omap2430_musb_exit(struct musb *musb)
{

	omap2430_low_level_exit(musb);
	otg_put_transceiver(musb->xceiv);

	return 0;
}

static const struct musb_platform_ops omap2430_ops = {
	.init		= omap2430_musb_init,
	.exit		= omap2430_musb_exit,

	.set_mode	= omap2430_musb_set_mode,
	.try_idle	= omap2430_musb_try_idle,

	.set_vbus	= omap2430_musb_set_vbus,

	.enable		= omap2430_musb_enable,
	.disable	= omap2430_musb_disable,
};

static u64 omap2430_dmamask = DMA_BIT_MASK(32);

static int __init omap2430_probe(struct platform_device *pdev)
{
	struct musb_hdrc_platform_data	*pdata = pdev->dev.platform_data;
	struct platform_device		*musb;
	struct omap2430_glue		*glue;
	int				status = 0;

	int				ret = -ENOMEM;

	glue = kzalloc(sizeof(*glue), GFP_KERNEL);
	if (!glue) {
		dev_err(&pdev->dev, "failed to allocate glue context\n");
		goto err0;
	}

	musb = platform_device_alloc("musb-hdrc", -1);
	if (!musb) {
		dev_err(&pdev->dev, "failed to allocate musb device\n");
		goto err1;
	}

	musb->dev.parent		= &pdev->dev;
	musb->dev.dma_mask		= &omap2430_dmamask;
	musb->dev.coherent_dma_mask	= omap2430_dmamask;

	glue->dev			= &pdev->dev;
	glue->musb			= musb;

	pdata->platform_ops		= &omap2430_ops;

	platform_set_drvdata(pdev, glue);

	ret = platform_device_add_resources(musb, pdev->resource,
			pdev->num_resources);
	if (ret) {
		dev_err(&pdev->dev, "failed to add resources\n");
		goto err2;
	}

	ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
	if (ret) {
		dev_err(&pdev->dev, "failed to add platform_data\n");
		goto err2;
	}

	ret = platform_device_add(musb);
	if (ret) {
		dev_err(&pdev->dev, "failed to register musb device\n");
		goto err2;
	}

	pm_runtime_enable(&pdev->dev);
	status = pm_runtime_get_sync(&pdev->dev);
	if (status < 0) {
		dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
		goto err3;
	}

	return 0;

err3:
	pm_runtime_disable(&pdev->dev);
err2:
	platform_device_put(musb);

err1:
	kfree(glue);

err0:
	return ret;
}

static int __exit omap2430_remove(struct platform_device *pdev)
{
	struct omap2430_glue		*glue = platform_get_drvdata(pdev);

	platform_device_del(glue->musb);
	platform_device_put(glue->musb);
	pm_runtime_put(&pdev->dev);
	pm_runtime_disable(&pdev->dev);
	kfree(glue);

	return 0;
}

#ifdef CONFIG_PM

static int omap2430_suspend(struct device *dev)
{
	struct omap2430_glue		*glue = dev_get_drvdata(dev);
	struct musb			*musb = glue_to_musb(glue);

	omap2430_low_level_exit(musb);
	otg_set_suspend(musb->xceiv, 1);

	if (!pm_runtime_suspended(dev) && dev->bus && dev->bus->pm &&
			dev->bus->pm->runtime_suspend)
		dev->bus->pm->runtime_suspend(dev);

	return 0;
}

static int omap2430_resume(struct device *dev)
{
	struct omap2430_glue		*glue = dev_get_drvdata(dev);
	struct musb			*musb = glue_to_musb(glue);

	if (!pm_runtime_suspended(dev) && dev->bus && dev->bus->pm &&
			dev->bus->pm->runtime_resume)
		dev->bus->pm->runtime_resume(dev);

	omap2430_low_level_init(musb);
	otg_set_suspend(musb->xceiv, 0);

	return 0;
}

static struct dev_pm_ops omap2430_pm_ops = {
	.suspend	= omap2430_suspend,
	.resume		= omap2430_resume,
};

#define DEV_PM_OPS	(&omap2430_pm_ops)
#else
#define DEV_PM_OPS	NULL
#endif

static struct platform_driver omap2430_driver = {
	.remove		= __exit_p(omap2430_remove),
	.driver		= {
		.name	= "musb-omap2430",
		.pm	= DEV_PM_OPS,
	},
};

MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
MODULE_LICENSE("GPL v2");

static int __init omap2430_init(void)
{
	return platform_driver_probe(&omap2430_driver, omap2430_probe);
}
subsys_initcall(omap2430_init);

static void __exit omap2430_exit(void)
{
	platform_driver_unregister(&omap2430_driver);
}
module_exit(omap2430_exit);
Commit	Line	Data
550a7375 FB	1	/*
	2	* Copyright (C) 2005-2007 by Texas Instruments
	3	* Some code has been taken from tusb6010.c
	4	* Copyrights for that are attributable to:
	5	* Copyright (C) 2006 Nokia Corporation
550a7375 FB	6	* Tony Lindgren <tony@atomide.com>
	7	*
	8	* This file is part of the Inventra Controller Driver for Linux.
	9	*
	10	* The Inventra Controller Driver for Linux is free software; you
	11	* can redistribute it and/or modify it under the terms of the GNU
	12	* General Public License version 2 as published by the Free Software
	13	* Foundation.
	14	*
	15	* The Inventra Controller Driver for Linux is distributed in
	16	* the hope that it will be useful, but WITHOUT ANY WARRANTY;
	17	* without even the implied warranty of MERCHANTABILITY or
	18	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
	19	* License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with The Inventra Controller Driver for Linux ; if not,
	23	* write to the Free Software Foundation, Inc., 59 Temple Place,
	24	* Suite 330, Boston, MA 02111-1307 USA
	25	*
	26	*/
	27	#include <linux/module.h>
	28	#include <linux/kernel.h>
	29	#include <linux/sched.h>
550a7375 FB	30	#include <linux/init.h>
	31	#include <linux/list.h>
	32	#include <linux/clk.h>
	33	#include <linux/io.h>
dc09886b FB	34	#include <linux/platform_device.h>
dc09886b FB	35	#include <linux/dma-mapping.h>
207b0e1f HH	36	#include <linux/pm_runtime.h>
207b0e1f HH	37	#include <linux/err.h>
550a7375	38
550a7375 FB	39	#include "musb_core.h"
	40	#include "omap2430.h"
	41
a3cee12a FB	42	struct omap2430_glue {
	43	struct device *dev;
	44	struct platform_device *musb;
	45	};
c20aebb9	46	#define glue_to_musb(g) platform_get_drvdata(g->musb)
a3cee12a	47
550a7375 FB	48	static struct timer_list musb_idle_timer;
	49
	50	static void musb_do_idle(unsigned long _musb)
	51	{
	52	struct musb musb = (void )_musb;
	53	unsigned long flags;
eef767b7	54	#ifdef CONFIG_USB_MUSB_HDRC_HCD
550a7375	55	u8 power;
eef767b7	56	#endif
550a7375 FB	57	u8 devctl;
550a7375 FB	58
550a7375 FB	59	spin_lock_irqsave(&musb->lock, flags);
550a7375 FB	60
84e250ff	61	switch (musb->xceiv->state) {
550a7375	62	case OTG_STATE_A_WAIT_BCON:
550a7375 FB	63
	64	devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
	65	if (devctl & MUSB_DEVCTL_BDEVICE) {
84e250ff	66	musb->xceiv->state = OTG_STATE_B_IDLE;
550a7375 FB	67	MUSB_DEV_MODE(musb);
550a7375 FB	68	} else {
84e250ff	69	musb->xceiv->state = OTG_STATE_A_IDLE;
550a7375 FB	70	MUSB_HST_MODE(musb);
	71	}
	72	break;
	73	#ifdef CONFIG_USB_MUSB_HDRC_HCD
	74	case OTG_STATE_A_SUSPEND:
	75	/* finish RESUME signaling? */
	76	if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
	77	power = musb_readb(musb->mregs, MUSB_POWER);
	78	power &= ~MUSB_POWER_RESUME;
	79	DBG(1, "root port resume stopped, power %02x\n", power);
	80	musb_writeb(musb->mregs, MUSB_POWER, power);
	81	musb->is_active = 1;
	82	musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
	83	\| MUSB_PORT_STAT_RESUME);
	84	musb->port1_status \|= USB_PORT_STAT_C_SUSPEND << 16;
	85	usb_hcd_poll_rh_status(musb_to_hcd(musb));
	86	/* NOTE: it might really be A_WAIT_BCON ... */
84e250ff	87	musb->xceiv->state = OTG_STATE_A_HOST;
550a7375 FB	88	}
	89	break;
	90	#endif
	91	#ifdef CONFIG_USB_MUSB_HDRC_HCD
	92	case OTG_STATE_A_HOST:
	93	devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
	94	if (devctl & MUSB_DEVCTL_BDEVICE)
84e250ff	95	musb->xceiv->state = OTG_STATE_B_IDLE;
550a7375	96	else
84e250ff	97	musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
550a7375 FB	98	#endif
	99	default:
	100	break;
	101	}
	102	spin_unlock_irqrestore(&musb->lock, flags);
	103	}
	104
	105
743411b3	106	static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
550a7375 FB	107	{
	108	unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
	109	static unsigned long last_timer;
	110
	111	if (timeout == 0)
	112	timeout = default_timeout;
	113
	114	/* Never idle if active, or when VBUS timeout is not set as host */
	115	if (musb->is_active \|\| ((musb->a_wait_bcon == 0)
84e250ff	116	&& (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
550a7375 FB	117	DBG(4, "%s active, deleting timer\n", otg_state_string(musb));
	118	del_timer(&musb_idle_timer);
	119	last_timer = jiffies;
	120	return;
	121	}
	122
	123	if (time_after(last_timer, timeout)) {
	124	if (!timer_pending(&musb_idle_timer))
	125	last_timer = timeout;
	126	else {
	127	DBG(4, "Longer idle timer already pending, ignoring\n");
	128	return;
	129	}
	130	}
	131	last_timer = timeout;
	132
	133	DBG(4, "%s inactive, for idle timer for %lu ms\n",
	134	otg_state_string(musb),
	135	(unsigned long)jiffies_to_msecs(timeout - jiffies));
	136	mod_timer(&musb_idle_timer, timeout);
	137	}
	138
743411b3	139	static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
550a7375 FB	140	{
550a7375 FB	141	u8 devctl;
594632ef HH	142	unsigned long timeout = jiffies + msecs_to_jiffies(1000);
594632ef HH	143	int ret = 1;
550a7375 FB	144	/* HDRC controls CPEN, but beware current surges during device
	145	* connect. They can trigger transient overcurrent conditions
	146	* that must be ignored.
	147	*/
	148
	149	devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
	150
	151	if (is_on) {
594632ef HH	152	if (musb->xceiv->state == OTG_STATE_A_IDLE) {
	153	/* start the session */
	154	devctl \|= MUSB_DEVCTL_SESSION;
	155	musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
	156	/*
	157	* Wait for the musb to set as A device to enable the
	158	* VBUS
	159	*/
	160	while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) {
	161
	162	cpu_relax();
	163
	164	if (time_after(jiffies, timeout)) {
	165	dev_err(musb->controller,
	166	"configured as A device timeout");
	167	ret = -EINVAL;
	168	break;
	169	}
	170	}
	171
	172	if (ret && musb->xceiv->set_vbus)
	173	otg_set_vbus(musb->xceiv, 1);
	174	} else {
	175	musb->is_active = 1;
	176	musb->xceiv->default_a = 1;
	177	musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
	178	devctl \|= MUSB_DEVCTL_SESSION;
	179	MUSB_HST_MODE(musb);
	180	}
550a7375 FB	181	} else {
	182	musb->is_active = 0;
	183
	184	/* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
	185	* jumping right to B_IDLE...
	186	*/
	187
84e250ff DB	188	musb->xceiv->default_a = 0;
84e250ff DB	189	musb->xceiv->state = OTG_STATE_B_IDLE;
550a7375 FB	190	devctl &= ~MUSB_DEVCTL_SESSION;
	191
	192	MUSB_DEV_MODE(musb);
	193	}
	194	musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
	195
	196	DBG(1, "VBUS %s, devctl %02x "
	197	/* otg %3x conf %08x prcm %08x */ "\n",
	198	otg_state_string(musb),
	199	musb_readb(musb->mregs, MUSB_DEVCTL));
	200	}
550a7375	201
743411b3	202	static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
550a7375 FB	203	{
	204	u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
	205
	206	devctl \|= MUSB_DEVCTL_SESSION;
	207	musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
	208
96a274d1	209	return 0;
550a7375 FB	210	}
550a7375 FB	211
c20aebb9 FB	212	static inline void omap2430_low_level_exit(struct musb *musb)
	213	{
	214	u32 l;
	215
	216	/* in any role */
	217	l = musb_readl(musb->mregs, OTG_FORCESTDBY);
	218	l \|= ENABLEFORCE; /* enable MSTANDBY */
	219	musb_writel(musb->mregs, OTG_FORCESTDBY, l);
c20aebb9 FB	220	}
	221
	222	static inline void omap2430_low_level_init(struct musb *musb)
	223	{
	224	u32 l;
	225
c20aebb9 FB	226	l = musb_readl(musb->mregs, OTG_FORCESTDBY);
	227	l &= ~ENABLEFORCE; /* disable MSTANDBY */
	228	musb_writel(musb->mregs, OTG_FORCESTDBY, l);
	229	}
	230
594632ef HH	231	/* blocking notifier support */
	232	static int musb_otg_notifications(struct notifier_block *nb,
	233	unsigned long event, void *unused)
	234	{
	235	struct musb *musb = container_of(nb, struct musb, nb);
	236	struct device *dev = musb->controller;
	237	struct musb_hdrc_platform_data *pdata = dev->platform_data;
	238	struct omap_musb_board_data *data = pdata->board_data;
	239
	240	switch (event) {
	241	case USB_EVENT_ID:
	242	DBG(4, "ID GND\n");
	243
	244	if (is_otg_enabled(musb)) {
	245	#ifdef CONFIG_USB_GADGET_MUSB_HDRC
	246	if (musb->gadget_driver) {
	247	otg_init(musb->xceiv);
	248
	249	if (data->interface_type ==
	250	MUSB_INTERFACE_UTMI)
	251	omap2430_musb_set_vbus(musb, 1);
	252
	253	}
	254	#endif
	255	} else {
	256	otg_init(musb->xceiv);
	257	if (data->interface_type ==
	258	MUSB_INTERFACE_UTMI)
	259	omap2430_musb_set_vbus(musb, 1);
	260	}
	261	break;
	262
	263	case USB_EVENT_VBUS:
	264	DBG(4, "VBUS Connect\n");
	265
	266	otg_init(musb->xceiv);
	267	break;
	268
	269	case USB_EVENT_NONE:
	270	DBG(4, "VBUS Disconnect\n");
	271
	272	if (data->interface_type == MUSB_INTERFACE_UTMI) {
	273	if (musb->xceiv->set_vbus)
	274	otg_set_vbus(musb->xceiv, 0);
	275	}
	276	otg_shutdown(musb->xceiv);
	277	break;
	278	default:
	279	DBG(4, "ID float\n");
	280	return NOTIFY_DONE;
	281	}
	282
	283	return NOTIFY_OK;
	284	}
	285
743411b3	286	static int omap2430_musb_init(struct musb *musb)
550a7375	287	{
594632ef	288	u32 l, status = 0;
ea65df57 HK	289	struct device *dev = musb->controller;
	290	struct musb_hdrc_platform_data *plat = dev->platform_data;
	291	struct omap_musb_board_data *data = plat->board_data;
550a7375	292
84e250ff DB	293	/* We require some kind of external transceiver, hooked
	294	* up through ULPI. TWL4030-family PMICs include one,
	295	* which needs a driver, drivers aren't always needed.
	296	*/
	297	musb->xceiv = otg_get_transceiver();
	298	if (!musb->xceiv) {
	299	pr_err("HS USB OTG: no transceiver configured\n");
	300	return -ENODEV;
	301	}
	302
c20aebb9	303	omap2430_low_level_init(musb);
550a7375	304
8573e6a6	305	l = musb_readl(musb->mregs, OTG_INTERFSEL);
de2e1b0c MM	306
	307	if (data->interface_type == MUSB_INTERFACE_UTMI) {
	308	/* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
	309	l &= ~ULPI_12PIN; /* Disable ULPI */
	310	l \|= UTMI_8BIT; /* Enable UTMI */
	311	} else {
	312	l \|= ULPI_12PIN;
	313	}
	314
8573e6a6	315	musb_writel(musb->mregs, OTG_INTERFSEL, l);
550a7375 FB	316
	317	pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
	318	"sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
8573e6a6 FB	319	musb_readl(musb->mregs, OTG_REVISION),
	320	musb_readl(musb->mregs, OTG_SYSCONFIG),
	321	musb_readl(musb->mregs, OTG_SYSSTATUS),
	322	musb_readl(musb->mregs, OTG_INTERFSEL),
	323	musb_readl(musb->mregs, OTG_SIMENABLE));
550a7375	324
594632ef HH	325	musb->nb.notifier_call = musb_otg_notifications;
	326	status = otg_register_notifier(musb->xceiv, &musb->nb);
	327
	328	if (status)
	329	DBG(1, "notification register failed\n");
	330
550a7375 FB	331	setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
	332
	333	return 0;
	334	}
	335
002eda13 HH	336	static void omap2430_musb_enable(struct musb *musb)
	337	{
	338	u8 devctl;
	339	unsigned long timeout = jiffies + msecs_to_jiffies(1000);
	340	struct device *dev = musb->controller;
	341	struct musb_hdrc_platform_data *pdata = dev->platform_data;
	342	struct omap_musb_board_data *data = pdata->board_data;
	343
	344	switch (musb->xceiv->last_event) {
	345
	346	case USB_EVENT_ID:
	347	otg_init(musb->xceiv);
	348	if (data->interface_type == MUSB_INTERFACE_UTMI) {
	349	devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
	350	/* start the session */
	351	devctl \|= MUSB_DEVCTL_SESSION;
	352	musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
	353	while (musb_readb(musb->mregs, MUSB_DEVCTL) &
	354	MUSB_DEVCTL_BDEVICE) {
	355	cpu_relax();
	356
	357	if (time_after(jiffies, timeout)) {
	358	dev_err(musb->controller,
	359	"configured as A device timeout");
	360	break;
	361	}
	362	}
	363	}
	364	break;
	365
	366	case USB_EVENT_VBUS:
	367	otg_init(musb->xceiv);
	368	break;
	369
	370	default:
	371	break;
	372	}
	373	}
	374
	375	static void omap2430_musb_disable(struct musb *musb)
	376	{
	377	if (musb->xceiv->last_event)
	378	otg_shutdown(musb->xceiv);
	379	}
	380
743411b3	381	static int omap2430_musb_exit(struct musb *musb)
550a7375 FB	382	{
550a7375 FB	383
c20aebb9	384	omap2430_low_level_exit(musb);
f4053874	385	otg_put_transceiver(musb->xceiv);
c20aebb9	386
550a7375 FB	387	return 0;
550a7375 FB	388	}
743411b3	389
f7ec9437	390	static const struct musb_platform_ops omap2430_ops = {
743411b3 FB	391	.init = omap2430_musb_init,
	392	.exit = omap2430_musb_exit,
	393
743411b3 FB	394	.set_mode = omap2430_musb_set_mode,
	395	.try_idle = omap2430_musb_try_idle,
	396
	397	.set_vbus = omap2430_musb_set_vbus,
002eda13 HH	398
	399	.enable = omap2430_musb_enable,
	400	.disable = omap2430_musb_disable,
743411b3	401	};
dc09886b FB	402
	403	static u64 omap2430_dmamask = DMA_BIT_MASK(32);
	404
	405	static int __init omap2430_probe(struct platform_device *pdev)
	406	{
	407	struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data;
	408	struct platform_device *musb;
a3cee12a	409	struct omap2430_glue *glue;
207b0e1f	410	int status = 0;
dc09886b FB	411
	412	int ret = -ENOMEM;
	413
a3cee12a FB	414	glue = kzalloc(sizeof(*glue), GFP_KERNEL);
	415	if (!glue) {
	416	dev_err(&pdev->dev, "failed to allocate glue context\n");
	417	goto err0;
	418	}
	419
dc09886b FB	420	musb = platform_device_alloc("musb-hdrc", -1);
	421	if (!musb) {
	422	dev_err(&pdev->dev, "failed to allocate musb device\n");
a3cee12a	423	goto err1;
dc09886b FB	424	}
	425
	426	musb->dev.parent = &pdev->dev;
	427	musb->dev.dma_mask = &omap2430_dmamask;
	428	musb->dev.coherent_dma_mask = omap2430_dmamask;
	429
a3cee12a FB	430	glue->dev = &pdev->dev;
	431	glue->musb = musb;
	432
f7ec9437 FB	433	pdata->platform_ops = &omap2430_ops;
f7ec9437 FB	434
a3cee12a	435	platform_set_drvdata(pdev, glue);
dc09886b FB	436
	437	ret = platform_device_add_resources(musb, pdev->resource,
	438	pdev->num_resources);
	439	if (ret) {
	440	dev_err(&pdev->dev, "failed to add resources\n");
207b0e1f	441	goto err2;
dc09886b FB	442	}
	443
	444	ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
	445	if (ret) {
	446	dev_err(&pdev->dev, "failed to add platform_data\n");
207b0e1f	447	goto err2;
dc09886b FB	448	}
	449
	450	ret = platform_device_add(musb);
	451	if (ret) {
	452	dev_err(&pdev->dev, "failed to register musb device\n");
207b0e1f	453	goto err2;
dc09886b FB	454	}
dc09886b FB	455
207b0e1f HH	456	pm_runtime_enable(&pdev->dev);
	457	status = pm_runtime_get_sync(&pdev->dev);
	458	if (status < 0) {
	459	dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
	460	goto err3;
	461	}
dc09886b	462
207b0e1f	463	return 0;
03491761 FB	464
03491761 FB	465	err3:
207b0e1f	466	pm_runtime_disable(&pdev->dev);
a3cee12a	467	err2:
dc09886b FB	468	platform_device_put(musb);
dc09886b FB	469
a3cee12a FB	470	err1:
	471	kfree(glue);
	472
dc09886b FB	473	err0:
	474	return ret;
	475	}
	476
	477	static int __exit omap2430_remove(struct platform_device *pdev)
	478	{
a3cee12a	479	struct omap2430_glue *glue = platform_get_drvdata(pdev);
dc09886b	480
a3cee12a FB	481	platform_device_del(glue->musb);
a3cee12a FB	482	platform_device_put(glue->musb);
207b0e1f HH	483	pm_runtime_put(&pdev->dev);
207b0e1f HH	484	pm_runtime_disable(&pdev->dev);
a3cee12a	485	kfree(glue);
dc09886b FB	486
	487	return 0;
	488	}
	489
c20aebb9	490	#ifdef CONFIG_PM
c20aebb9 FB	491
	492	static int omap2430_suspend(struct device *dev)
	493	{
	494	struct omap2430_glue *glue = dev_get_drvdata(dev);
	495	struct musb *musb = glue_to_musb(glue);
	496
	497	omap2430_low_level_exit(musb);
	498	otg_set_suspend(musb->xceiv, 1);
207b0e1f HH	499
	500	if (!pm_runtime_suspended(dev) && dev->bus && dev->bus->pm &&
	501	dev->bus->pm->runtime_suspend)
	502	dev->bus->pm->runtime_suspend(dev);
c20aebb9 FB	503
	504	return 0;
	505	}
	506
	507	static int omap2430_resume(struct device *dev)
	508	{
	509	struct omap2430_glue *glue = dev_get_drvdata(dev);
	510	struct musb *musb = glue_to_musb(glue);
c20aebb9	511
207b0e1f HH	512	if (!pm_runtime_suspended(dev) && dev->bus && dev->bus->pm &&
	513	dev->bus->pm->runtime_resume)
	514	dev->bus->pm->runtime_resume(dev);
c20aebb9 FB	515
c20aebb9 FB	516	omap2430_low_level_init(musb);
c20aebb9 FB	517	otg_set_suspend(musb->xceiv, 0);
	518
	519	return 0;
	520	}
	521
	522	static struct dev_pm_ops omap2430_pm_ops = {
	523	.suspend = omap2430_suspend,
	524	.resume = omap2430_resume,
	525	};
	526
	527	#define DEV_PM_OPS (&omap2430_pm_ops)
	528	#else
	529	#define DEV_PM_OPS NULL
	530	#endif
	531
dc09886b FB	532	static struct platform_driver omap2430_driver = {
	533	.remove = __exit_p(omap2430_remove),
	534	.driver = {
	535	.name = "musb-omap2430",
c20aebb9	536	.pm = DEV_PM_OPS,
dc09886b FB	537	},
	538	};
	539
	540	MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
	541	MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
	542	MODULE_LICENSE("GPL v2");
	543
	544	static int __init omap2430_init(void)
	545	{
	546	return platform_driver_probe(&omap2430_driver, omap2430_probe);
	547	}
	548	subsys_initcall(omap2430_init);
	549
	550	static void __exit omap2430_exit(void)
	551	{
	552	platform_driver_unregister(&omap2430_driver);
	553	}
	554	module_exit(omap2430_exit);