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5fd54ace | 1 | // SPDX-License-Identifier: GPL-2.0+ |
0807c500 LY |
2 | /* |
3 | * Copyright (C) 2007,2008 Freescale semiconductor, Inc. | |
4 | * | |
5 | * Author: Li Yang <LeoLi@freescale.com> | |
6 | * Jerry Huang <Chang-Ming.Huang@freescale.com> | |
7 | * | |
8 | * Initialization based on code from Shlomi Gridish. | |
0807c500 LY |
9 | */ |
10 | ||
11 | #include <linux/module.h> | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/delay.h> | |
14 | #include <linux/slab.h> | |
15 | #include <linux/proc_fs.h> | |
16 | #include <linux/errno.h> | |
0807c500 LY |
17 | #include <linux/interrupt.h> |
18 | #include <linux/io.h> | |
19 | #include <linux/timer.h> | |
20 | #include <linux/usb.h> | |
21 | #include <linux/device.h> | |
22 | #include <linux/usb/ch9.h> | |
23 | #include <linux/usb/gadget.h> | |
24 | #include <linux/workqueue.h> | |
25 | #include <linux/time.h> | |
26 | #include <linux/fsl_devices.h> | |
27 | #include <linux/platform_device.h> | |
28 | #include <linux/uaccess.h> | |
29 | ||
30 | #include <asm/unaligned.h> | |
31 | ||
94ae9843 | 32 | #include "phy-fsl-usb.h" |
0807c500 | 33 | |
e92634cd RQ |
34 | #ifdef VERBOSE |
35 | #define VDBG(fmt, args...) pr_debug("[%s] " fmt, \ | |
36 | __func__, ## args) | |
37 | #else | |
38 | #define VDBG(stuff...) do {} while (0) | |
39 | #endif | |
40 | ||
0807c500 LY |
41 | #define DRIVER_VERSION "Rev. 1.55" |
42 | #define DRIVER_AUTHOR "Jerry Huang/Li Yang" | |
43 | #define DRIVER_DESC "Freescale USB OTG Transceiver Driver" | |
44 | #define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION | |
45 | ||
46 | static const char driver_name[] = "fsl-usb2-otg"; | |
47 | ||
48 | const pm_message_t otg_suspend_state = { | |
49 | .event = 1, | |
50 | }; | |
51 | ||
52 | #define HA_DATA_PULSE | |
53 | ||
54 | static struct usb_dr_mmap *usb_dr_regs; | |
55 | static struct fsl_otg *fsl_otg_dev; | |
56 | static int srp_wait_done; | |
57 | ||
58 | /* FSM timers */ | |
59 | struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr, | |
60 | *b_ase0_brst_tmr, *b_se0_srp_tmr; | |
61 | ||
62 | /* Driver specific timers */ | |
63 | struct fsl_otg_timer *b_data_pulse_tmr, *b_vbus_pulse_tmr, *b_srp_fail_tmr, | |
64 | *b_srp_wait_tmr, *a_wait_enum_tmr; | |
65 | ||
66 | static struct list_head active_timers; | |
67 | ||
68 | static struct fsl_otg_config fsl_otg_initdata = { | |
69 | .otg_port = 1, | |
70 | }; | |
71 | ||
72 | #ifdef CONFIG_PPC32 | |
73 | static u32 _fsl_readl_be(const unsigned __iomem *p) | |
74 | { | |
75 | return in_be32(p); | |
76 | } | |
77 | ||
78 | static u32 _fsl_readl_le(const unsigned __iomem *p) | |
79 | { | |
80 | return in_le32(p); | |
81 | } | |
82 | ||
83 | static void _fsl_writel_be(u32 v, unsigned __iomem *p) | |
84 | { | |
85 | out_be32(p, v); | |
86 | } | |
87 | ||
88 | static void _fsl_writel_le(u32 v, unsigned __iomem *p) | |
89 | { | |
90 | out_le32(p, v); | |
91 | } | |
92 | ||
93 | static u32 (*_fsl_readl)(const unsigned __iomem *p); | |
94 | static void (*_fsl_writel)(u32 v, unsigned __iomem *p); | |
95 | ||
96 | #define fsl_readl(p) (*_fsl_readl)((p)) | |
97 | #define fsl_writel(v, p) (*_fsl_writel)((v), (p)) | |
98 | ||
99 | #else | |
100 | #define fsl_readl(addr) readl(addr) | |
101 | #define fsl_writel(val, addr) writel(val, addr) | |
102 | #endif /* CONFIG_PPC32 */ | |
103 | ||
0807c500 LY |
104 | int write_ulpi(u8 addr, u8 data) |
105 | { | |
106 | u32 temp; | |
107 | ||
108 | temp = 0x60000000 | (addr << 16) | data; | |
109 | fsl_writel(temp, &usb_dr_regs->ulpiview); | |
110 | return 0; | |
111 | } | |
112 | ||
113 | /* -------------------------------------------------------------*/ | |
114 | /* Operations that will be called from OTG Finite State Machine */ | |
115 | ||
116 | /* Charge vbus for vbus pulsing in SRP */ | |
da8cc167 | 117 | void fsl_otg_chrg_vbus(struct otg_fsm *fsm, int on) |
0807c500 LY |
118 | { |
119 | u32 tmp; | |
120 | ||
121 | tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK; | |
122 | ||
123 | if (on) | |
124 | /* stop discharging, start charging */ | |
125 | tmp = (tmp & ~OTGSC_CTRL_VBUS_DISCHARGE) | | |
126 | OTGSC_CTRL_VBUS_CHARGE; | |
127 | else | |
128 | /* stop charging */ | |
129 | tmp &= ~OTGSC_CTRL_VBUS_CHARGE; | |
130 | ||
131 | fsl_writel(tmp, &usb_dr_regs->otgsc); | |
132 | } | |
133 | ||
134 | /* Discharge vbus through a resistor to ground */ | |
135 | void fsl_otg_dischrg_vbus(int on) | |
136 | { | |
137 | u32 tmp; | |
138 | ||
139 | tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK; | |
140 | ||
141 | if (on) | |
142 | /* stop charging, start discharging */ | |
143 | tmp = (tmp & ~OTGSC_CTRL_VBUS_CHARGE) | | |
144 | OTGSC_CTRL_VBUS_DISCHARGE; | |
145 | else | |
146 | /* stop discharging */ | |
147 | tmp &= ~OTGSC_CTRL_VBUS_DISCHARGE; | |
148 | ||
149 | fsl_writel(tmp, &usb_dr_regs->otgsc); | |
150 | } | |
151 | ||
152 | /* A-device driver vbus, controlled through PP bit in PORTSC */ | |
da8cc167 | 153 | void fsl_otg_drv_vbus(struct otg_fsm *fsm, int on) |
0807c500 LY |
154 | { |
155 | u32 tmp; | |
156 | ||
157 | if (on) { | |
158 | tmp = fsl_readl(&usb_dr_regs->portsc) & ~PORTSC_W1C_BITS; | |
159 | fsl_writel(tmp | PORTSC_PORT_POWER, &usb_dr_regs->portsc); | |
160 | } else { | |
161 | tmp = fsl_readl(&usb_dr_regs->portsc) & | |
162 | ~PORTSC_W1C_BITS & ~PORTSC_PORT_POWER; | |
163 | fsl_writel(tmp, &usb_dr_regs->portsc); | |
164 | } | |
165 | } | |
166 | ||
167 | /* | |
168 | * Pull-up D+, signalling connect by periperal. Also used in | |
169 | * data-line pulsing in SRP | |
170 | */ | |
da8cc167 | 171 | void fsl_otg_loc_conn(struct otg_fsm *fsm, int on) |
0807c500 LY |
172 | { |
173 | u32 tmp; | |
174 | ||
175 | tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK; | |
176 | ||
177 | if (on) | |
178 | tmp |= OTGSC_CTRL_DATA_PULSING; | |
179 | else | |
180 | tmp &= ~OTGSC_CTRL_DATA_PULSING; | |
181 | ||
182 | fsl_writel(tmp, &usb_dr_regs->otgsc); | |
183 | } | |
184 | ||
185 | /* | |
186 | * Generate SOF by host. This is controlled through suspend/resume the | |
187 | * port. In host mode, controller will automatically send SOF. | |
188 | * Suspend will block the data on the port. | |
189 | */ | |
da8cc167 | 190 | void fsl_otg_loc_sof(struct otg_fsm *fsm, int on) |
0807c500 LY |
191 | { |
192 | u32 tmp; | |
193 | ||
194 | tmp = fsl_readl(&fsl_otg_dev->dr_mem_map->portsc) & ~PORTSC_W1C_BITS; | |
195 | if (on) | |
196 | tmp |= PORTSC_PORT_FORCE_RESUME; | |
197 | else | |
198 | tmp |= PORTSC_PORT_SUSPEND; | |
199 | ||
200 | fsl_writel(tmp, &fsl_otg_dev->dr_mem_map->portsc); | |
201 | ||
202 | } | |
203 | ||
204 | /* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */ | |
da8cc167 | 205 | void fsl_otg_start_pulse(struct otg_fsm *fsm) |
0807c500 LY |
206 | { |
207 | u32 tmp; | |
208 | ||
209 | srp_wait_done = 0; | |
210 | #ifdef HA_DATA_PULSE | |
211 | tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK; | |
212 | tmp |= OTGSC_HA_DATA_PULSE; | |
213 | fsl_writel(tmp, &usb_dr_regs->otgsc); | |
214 | #else | |
215 | fsl_otg_loc_conn(1); | |
216 | #endif | |
217 | ||
da8cc167 | 218 | fsl_otg_add_timer(fsm, b_data_pulse_tmr); |
0807c500 LY |
219 | } |
220 | ||
221 | void b_data_pulse_end(unsigned long foo) | |
222 | { | |
223 | #ifdef HA_DATA_PULSE | |
224 | #else | |
225 | fsl_otg_loc_conn(0); | |
226 | #endif | |
227 | ||
228 | /* Do VBUS pulse after data pulse */ | |
229 | fsl_otg_pulse_vbus(); | |
230 | } | |
231 | ||
232 | void fsl_otg_pulse_vbus(void) | |
233 | { | |
234 | srp_wait_done = 0; | |
da8cc167 | 235 | fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 1); |
0807c500 | 236 | /* start the timer to end vbus charge */ |
da8cc167 | 237 | fsl_otg_add_timer(&fsl_otg_dev->fsm, b_vbus_pulse_tmr); |
0807c500 LY |
238 | } |
239 | ||
240 | void b_vbus_pulse_end(unsigned long foo) | |
241 | { | |
da8cc167 | 242 | fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 0); |
0807c500 LY |
243 | |
244 | /* | |
245 | * As USB3300 using the same a_sess_vld and b_sess_vld voltage | |
246 | * we need to discharge the bus for a while to distinguish | |
247 | * residual voltage of vbus pulsing and A device pull up | |
248 | */ | |
249 | fsl_otg_dischrg_vbus(1); | |
da8cc167 | 250 | fsl_otg_add_timer(&fsl_otg_dev->fsm, b_srp_wait_tmr); |
0807c500 LY |
251 | } |
252 | ||
253 | void b_srp_end(unsigned long foo) | |
254 | { | |
255 | fsl_otg_dischrg_vbus(0); | |
256 | srp_wait_done = 1; | |
257 | ||
e5ba1c02 | 258 | if ((fsl_otg_dev->phy.otg->state == OTG_STATE_B_SRP_INIT) && |
0807c500 LY |
259 | fsl_otg_dev->fsm.b_sess_vld) |
260 | fsl_otg_dev->fsm.b_srp_done = 1; | |
261 | } | |
262 | ||
263 | /* | |
264 | * Workaround for a_host suspending too fast. When a_bus_req=0, | |
265 | * a_host will start by SRP. It needs to set b_hnp_enable before | |
266 | * actually suspending to start HNP | |
267 | */ | |
268 | void a_wait_enum(unsigned long foo) | |
269 | { | |
270 | VDBG("a_wait_enum timeout\n"); | |
7e062c0f | 271 | if (!fsl_otg_dev->phy.otg->host->b_hnp_enable) |
da8cc167 | 272 | fsl_otg_add_timer(&fsl_otg_dev->fsm, a_wait_enum_tmr); |
0807c500 LY |
273 | else |
274 | otg_statemachine(&fsl_otg_dev->fsm); | |
275 | } | |
276 | ||
277 | /* The timeout callback function to set time out bit */ | |
278 | void set_tmout(unsigned long indicator) | |
279 | { | |
280 | *(int *)indicator = 1; | |
281 | } | |
282 | ||
283 | /* Initialize timers */ | |
284 | int fsl_otg_init_timers(struct otg_fsm *fsm) | |
285 | { | |
286 | /* FSM used timers */ | |
287 | a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE, | |
288 | (unsigned long)&fsm->a_wait_vrise_tmout); | |
289 | if (!a_wait_vrise_tmr) | |
290 | return -ENOMEM; | |
291 | ||
292 | a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON, | |
293 | (unsigned long)&fsm->a_wait_bcon_tmout); | |
294 | if (!a_wait_bcon_tmr) | |
295 | return -ENOMEM; | |
296 | ||
297 | a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS, | |
298 | (unsigned long)&fsm->a_aidl_bdis_tmout); | |
299 | if (!a_aidl_bdis_tmr) | |
300 | return -ENOMEM; | |
301 | ||
302 | b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST, | |
303 | (unsigned long)&fsm->b_ase0_brst_tmout); | |
304 | if (!b_ase0_brst_tmr) | |
305 | return -ENOMEM; | |
306 | ||
307 | b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP, | |
308 | (unsigned long)&fsm->b_se0_srp); | |
309 | if (!b_se0_srp_tmr) | |
310 | return -ENOMEM; | |
311 | ||
312 | b_srp_fail_tmr = otg_timer_initializer(&set_tmout, TB_SRP_FAIL, | |
313 | (unsigned long)&fsm->b_srp_done); | |
314 | if (!b_srp_fail_tmr) | |
315 | return -ENOMEM; | |
316 | ||
317 | a_wait_enum_tmr = otg_timer_initializer(&a_wait_enum, 10, | |
318 | (unsigned long)&fsm); | |
319 | if (!a_wait_enum_tmr) | |
320 | return -ENOMEM; | |
321 | ||
322 | /* device driver used timers */ | |
323 | b_srp_wait_tmr = otg_timer_initializer(&b_srp_end, TB_SRP_WAIT, 0); | |
324 | if (!b_srp_wait_tmr) | |
325 | return -ENOMEM; | |
326 | ||
327 | b_data_pulse_tmr = otg_timer_initializer(&b_data_pulse_end, | |
328 | TB_DATA_PLS, 0); | |
329 | if (!b_data_pulse_tmr) | |
330 | return -ENOMEM; | |
331 | ||
332 | b_vbus_pulse_tmr = otg_timer_initializer(&b_vbus_pulse_end, | |
333 | TB_VBUS_PLS, 0); | |
334 | if (!b_vbus_pulse_tmr) | |
335 | return -ENOMEM; | |
336 | ||
337 | return 0; | |
338 | } | |
339 | ||
340 | /* Uninitialize timers */ | |
341 | void fsl_otg_uninit_timers(void) | |
342 | { | |
343 | /* FSM used timers */ | |
5f717919 SS |
344 | kfree(a_wait_vrise_tmr); |
345 | kfree(a_wait_bcon_tmr); | |
346 | kfree(a_aidl_bdis_tmr); | |
347 | kfree(b_ase0_brst_tmr); | |
348 | kfree(b_se0_srp_tmr); | |
349 | kfree(b_srp_fail_tmr); | |
350 | kfree(a_wait_enum_tmr); | |
0807c500 LY |
351 | |
352 | /* device driver used timers */ | |
5f717919 SS |
353 | kfree(b_srp_wait_tmr); |
354 | kfree(b_data_pulse_tmr); | |
355 | kfree(b_vbus_pulse_tmr); | |
0807c500 LY |
356 | } |
357 | ||
f6de27ee AT |
358 | static struct fsl_otg_timer *fsl_otg_get_timer(enum otg_fsm_timer t) |
359 | { | |
360 | struct fsl_otg_timer *timer; | |
361 | ||
362 | /* REVISIT: use array of pointers to timers instead */ | |
363 | switch (t) { | |
364 | case A_WAIT_VRISE: | |
365 | timer = a_wait_vrise_tmr; | |
366 | break; | |
367 | case A_WAIT_BCON: | |
368 | timer = a_wait_vrise_tmr; | |
369 | break; | |
370 | case A_AIDL_BDIS: | |
371 | timer = a_wait_vrise_tmr; | |
372 | break; | |
373 | case B_ASE0_BRST: | |
374 | timer = a_wait_vrise_tmr; | |
375 | break; | |
376 | case B_SE0_SRP: | |
377 | timer = a_wait_vrise_tmr; | |
378 | break; | |
379 | case B_SRP_FAIL: | |
380 | timer = a_wait_vrise_tmr; | |
381 | break; | |
382 | case A_WAIT_ENUM: | |
383 | timer = a_wait_vrise_tmr; | |
384 | break; | |
385 | default: | |
386 | timer = NULL; | |
387 | } | |
388 | ||
389 | return timer; | |
390 | } | |
391 | ||
0807c500 | 392 | /* Add timer to timer list */ |
da8cc167 | 393 | void fsl_otg_add_timer(struct otg_fsm *fsm, void *gtimer) |
0807c500 LY |
394 | { |
395 | struct fsl_otg_timer *timer = gtimer; | |
396 | struct fsl_otg_timer *tmp_timer; | |
397 | ||
398 | /* | |
399 | * Check if the timer is already in the active list, | |
400 | * if so update timer count | |
401 | */ | |
402 | list_for_each_entry(tmp_timer, &active_timers, list) | |
403 | if (tmp_timer == timer) { | |
404 | timer->count = timer->expires; | |
405 | return; | |
406 | } | |
407 | timer->count = timer->expires; | |
408 | list_add_tail(&timer->list, &active_timers); | |
409 | } | |
410 | ||
f6de27ee AT |
411 | static void fsl_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t) |
412 | { | |
413 | struct fsl_otg_timer *timer; | |
414 | ||
415 | timer = fsl_otg_get_timer(t); | |
416 | if (!timer) | |
417 | return; | |
418 | ||
419 | fsl_otg_add_timer(fsm, timer); | |
420 | } | |
421 | ||
0807c500 | 422 | /* Remove timer from the timer list; clear timeout status */ |
da8cc167 | 423 | void fsl_otg_del_timer(struct otg_fsm *fsm, void *gtimer) |
0807c500 LY |
424 | { |
425 | struct fsl_otg_timer *timer = gtimer; | |
426 | struct fsl_otg_timer *tmp_timer, *del_tmp; | |
427 | ||
428 | list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) | |
429 | if (tmp_timer == timer) | |
430 | list_del(&timer->list); | |
431 | } | |
432 | ||
f6de27ee AT |
433 | static void fsl_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t) |
434 | { | |
435 | struct fsl_otg_timer *timer; | |
436 | ||
437 | timer = fsl_otg_get_timer(t); | |
438 | if (!timer) | |
439 | return; | |
440 | ||
441 | fsl_otg_del_timer(fsm, timer); | |
442 | } | |
443 | ||
0807c500 LY |
444 | /* Reset controller, not reset the bus */ |
445 | void otg_reset_controller(void) | |
446 | { | |
447 | u32 command; | |
448 | ||
449 | command = fsl_readl(&usb_dr_regs->usbcmd); | |
450 | command |= (1 << 1); | |
451 | fsl_writel(command, &usb_dr_regs->usbcmd); | |
452 | while (fsl_readl(&usb_dr_regs->usbcmd) & (1 << 1)) | |
453 | ; | |
454 | } | |
455 | ||
456 | /* Call suspend/resume routines in host driver */ | |
457 | int fsl_otg_start_host(struct otg_fsm *fsm, int on) | |
458 | { | |
7e062c0f | 459 | struct usb_otg *otg = fsm->otg; |
0807c500 | 460 | struct device *dev; |
19c1eac2 AT |
461 | struct fsl_otg *otg_dev = |
462 | container_of(otg->usb_phy, struct fsl_otg, phy); | |
0807c500 LY |
463 | u32 retval = 0; |
464 | ||
7e062c0f | 465 | if (!otg->host) |
0807c500 | 466 | return -ENODEV; |
7e062c0f | 467 | dev = otg->host->controller; |
0807c500 LY |
468 | |
469 | /* | |
470 | * Update a_vbus_vld state as a_vbus_vld int is disabled | |
471 | * in device mode | |
472 | */ | |
473 | fsm->a_vbus_vld = | |
474 | !!(fsl_readl(&usb_dr_regs->otgsc) & OTGSC_STS_A_VBUS_VALID); | |
475 | if (on) { | |
476 | /* start fsl usb host controller */ | |
477 | if (otg_dev->host_working) | |
478 | goto end; | |
479 | else { | |
480 | otg_reset_controller(); | |
481 | VDBG("host on......\n"); | |
482 | if (dev->driver->pm && dev->driver->pm->resume) { | |
483 | retval = dev->driver->pm->resume(dev); | |
484 | if (fsm->id) { | |
485 | /* default-b */ | |
da8cc167 | 486 | fsl_otg_drv_vbus(fsm, 1); |
0807c500 LY |
487 | /* |
488 | * Workaround: b_host can't driver | |
489 | * vbus, but PP in PORTSC needs to | |
490 | * be 1 for host to work. | |
491 | * So we set drv_vbus bit in | |
492 | * transceiver to 0 thru ULPI. | |
493 | */ | |
494 | write_ulpi(0x0c, 0x20); | |
495 | } | |
496 | } | |
497 | ||
498 | otg_dev->host_working = 1; | |
499 | } | |
500 | } else { | |
501 | /* stop fsl usb host controller */ | |
502 | if (!otg_dev->host_working) | |
503 | goto end; | |
504 | else { | |
505 | VDBG("host off......\n"); | |
506 | if (dev && dev->driver) { | |
507 | if (dev->driver->pm && dev->driver->pm->suspend) | |
508 | retval = dev->driver->pm->suspend(dev); | |
509 | if (fsm->id) | |
510 | /* default-b */ | |
da8cc167 | 511 | fsl_otg_drv_vbus(fsm, 0); |
0807c500 LY |
512 | } |
513 | otg_dev->host_working = 0; | |
514 | } | |
515 | } | |
516 | end: | |
517 | return retval; | |
518 | } | |
519 | ||
520 | /* | |
521 | * Call suspend and resume function in udc driver | |
522 | * to stop and start udc driver. | |
523 | */ | |
524 | int fsl_otg_start_gadget(struct otg_fsm *fsm, int on) | |
525 | { | |
7e062c0f | 526 | struct usb_otg *otg = fsm->otg; |
0807c500 LY |
527 | struct device *dev; |
528 | ||
7e062c0f | 529 | if (!otg->gadget || !otg->gadget->dev.parent) |
0807c500 LY |
530 | return -ENODEV; |
531 | ||
532 | VDBG("gadget %s\n", on ? "on" : "off"); | |
7e062c0f | 533 | dev = otg->gadget->dev.parent; |
0807c500 LY |
534 | |
535 | if (on) { | |
536 | if (dev->driver->resume) | |
537 | dev->driver->resume(dev); | |
538 | } else { | |
539 | if (dev->driver->suspend) | |
540 | dev->driver->suspend(dev, otg_suspend_state); | |
541 | } | |
542 | ||
543 | return 0; | |
544 | } | |
545 | ||
546 | /* | |
547 | * Called by initialization code of host driver. Register host controller | |
548 | * to the OTG. Suspend host for OTG role detection. | |
549 | */ | |
7e062c0f | 550 | static int fsl_otg_set_host(struct usb_otg *otg, struct usb_bus *host) |
0807c500 | 551 | { |
58add6ca WY |
552 | struct fsl_otg *otg_dev; |
553 | ||
554 | if (!otg) | |
555 | return -ENODEV; | |
0807c500 | 556 | |
19c1eac2 | 557 | otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); |
58add6ca | 558 | if (otg_dev != fsl_otg_dev) |
0807c500 LY |
559 | return -ENODEV; |
560 | ||
7e062c0f | 561 | otg->host = host; |
0807c500 LY |
562 | |
563 | otg_dev->fsm.a_bus_drop = 0; | |
564 | otg_dev->fsm.a_bus_req = 1; | |
565 | ||
566 | if (host) { | |
567 | VDBG("host off......\n"); | |
568 | ||
7e062c0f HK |
569 | otg->host->otg_port = fsl_otg_initdata.otg_port; |
570 | otg->host->is_b_host = otg_dev->fsm.id; | |
0807c500 | 571 | /* |
37ebb549 | 572 | * must leave time for hub_wq to finish its thing |
0807c500 LY |
573 | * before yanking the host driver out from under it, |
574 | * so suspend the host after a short delay. | |
575 | */ | |
576 | otg_dev->host_working = 1; | |
577 | schedule_delayed_work(&otg_dev->otg_event, 100); | |
578 | return 0; | |
579 | } else { | |
580 | /* host driver going away */ | |
581 | if (!(fsl_readl(&otg_dev->dr_mem_map->otgsc) & | |
582 | OTGSC_STS_USB_ID)) { | |
583 | /* Mini-A cable connected */ | |
584 | struct otg_fsm *fsm = &otg_dev->fsm; | |
585 | ||
e5ba1c02 | 586 | otg->state = OTG_STATE_UNDEFINED; |
0807c500 LY |
587 | fsm->protocol = PROTO_UNDEF; |
588 | } | |
589 | } | |
590 | ||
591 | otg_dev->host_working = 0; | |
592 | ||
593 | otg_statemachine(&otg_dev->fsm); | |
594 | ||
595 | return 0; | |
596 | } | |
597 | ||
598 | /* Called by initialization code of udc. Register udc to OTG. */ | |
7e062c0f HK |
599 | static int fsl_otg_set_peripheral(struct usb_otg *otg, |
600 | struct usb_gadget *gadget) | |
0807c500 | 601 | { |
58add6ca | 602 | struct fsl_otg *otg_dev; |
0807c500 | 603 | |
58add6ca WY |
604 | if (!otg) |
605 | return -ENODEV; | |
606 | ||
19c1eac2 | 607 | otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); |
0807c500 LY |
608 | VDBG("otg_dev 0x%x\n", (int)otg_dev); |
609 | VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev); | |
58add6ca | 610 | if (otg_dev != fsl_otg_dev) |
0807c500 LY |
611 | return -ENODEV; |
612 | ||
613 | if (!gadget) { | |
7e062c0f HK |
614 | if (!otg->default_a) |
615 | otg->gadget->ops->vbus_draw(otg->gadget, 0); | |
616 | usb_gadget_vbus_disconnect(otg->gadget); | |
617 | otg->gadget = 0; | |
0807c500 LY |
618 | otg_dev->fsm.b_bus_req = 0; |
619 | otg_statemachine(&otg_dev->fsm); | |
620 | return 0; | |
621 | } | |
622 | ||
7e062c0f HK |
623 | otg->gadget = gadget; |
624 | otg->gadget->is_a_peripheral = !otg_dev->fsm.id; | |
0807c500 LY |
625 | |
626 | otg_dev->fsm.b_bus_req = 1; | |
627 | ||
628 | /* start the gadget right away if the ID pin says Mini-B */ | |
523e531e | 629 | pr_debug("ID pin=%d\n", otg_dev->fsm.id); |
0807c500 LY |
630 | if (otg_dev->fsm.id == 1) { |
631 | fsl_otg_start_host(&otg_dev->fsm, 0); | |
632 | otg_drv_vbus(&otg_dev->fsm, 0); | |
633 | fsl_otg_start_gadget(&otg_dev->fsm, 1); | |
634 | } | |
635 | ||
636 | return 0; | |
637 | } | |
638 | ||
0807c500 LY |
639 | /* |
640 | * Delayed pin detect interrupt processing. | |
641 | * | |
642 | * When the Mini-A cable is disconnected from the board, | |
42b2aa86 | 643 | * the pin-detect interrupt happens before the disconnect |
0807c500 LY |
644 | * interrupts for the connected device(s). In order to |
645 | * process the disconnect interrupt(s) prior to switching | |
646 | * roles, the pin-detect interrupts are delayed, and handled | |
647 | * by this routine. | |
648 | */ | |
649 | static void fsl_otg_event(struct work_struct *work) | |
650 | { | |
651 | struct fsl_otg *og = container_of(work, struct fsl_otg, otg_event.work); | |
652 | struct otg_fsm *fsm = &og->fsm; | |
653 | ||
654 | if (fsm->id) { /* switch to gadget */ | |
655 | fsl_otg_start_host(fsm, 0); | |
656 | otg_drv_vbus(fsm, 0); | |
657 | fsl_otg_start_gadget(fsm, 1); | |
658 | } | |
659 | } | |
660 | ||
661 | /* B-device start SRP */ | |
7e062c0f | 662 | static int fsl_otg_start_srp(struct usb_otg *otg) |
0807c500 | 663 | { |
58add6ca WY |
664 | struct fsl_otg *otg_dev; |
665 | ||
e5ba1c02 | 666 | if (!otg || otg->state != OTG_STATE_B_IDLE) |
58add6ca | 667 | return -ENODEV; |
0807c500 | 668 | |
19c1eac2 | 669 | otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); |
58add6ca | 670 | if (otg_dev != fsl_otg_dev) |
0807c500 LY |
671 | return -ENODEV; |
672 | ||
673 | otg_dev->fsm.b_bus_req = 1; | |
674 | otg_statemachine(&otg_dev->fsm); | |
675 | ||
676 | return 0; | |
677 | } | |
678 | ||
679 | /* A_host suspend will call this function to start hnp */ | |
7e062c0f | 680 | static int fsl_otg_start_hnp(struct usb_otg *otg) |
0807c500 | 681 | { |
58add6ca WY |
682 | struct fsl_otg *otg_dev; |
683 | ||
684 | if (!otg) | |
685 | return -ENODEV; | |
0807c500 | 686 | |
19c1eac2 | 687 | otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); |
58add6ca | 688 | if (otg_dev != fsl_otg_dev) |
0807c500 LY |
689 | return -ENODEV; |
690 | ||
523e531e | 691 | pr_debug("start_hnp...\n"); |
0807c500 LY |
692 | |
693 | /* clear a_bus_req to enter a_suspend state */ | |
694 | otg_dev->fsm.a_bus_req = 0; | |
695 | otg_statemachine(&otg_dev->fsm); | |
696 | ||
697 | return 0; | |
698 | } | |
699 | ||
700 | /* | |
701 | * Interrupt handler. OTG/host/peripheral share the same int line. | |
702 | * OTG driver clears OTGSC interrupts and leaves USB interrupts | |
703 | * intact. It needs to have knowledge of some USB interrupts | |
704 | * such as port change. | |
705 | */ | |
706 | irqreturn_t fsl_otg_isr(int irq, void *dev_id) | |
707 | { | |
708 | struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm; | |
7e062c0f | 709 | struct usb_otg *otg = ((struct fsl_otg *)dev_id)->phy.otg; |
0807c500 LY |
710 | u32 otg_int_src, otg_sc; |
711 | ||
712 | otg_sc = fsl_readl(&usb_dr_regs->otgsc); | |
713 | otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8); | |
714 | ||
715 | /* Only clear otg interrupts */ | |
716 | fsl_writel(otg_sc, &usb_dr_regs->otgsc); | |
717 | ||
718 | /*FIXME: ID change not generate when init to 0 */ | |
719 | fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0; | |
720 | otg->default_a = (fsm->id == 0); | |
721 | ||
722 | /* process OTG interrupts */ | |
723 | if (otg_int_src) { | |
724 | if (otg_int_src & OTGSC_INTSTS_USB_ID) { | |
725 | fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0; | |
726 | otg->default_a = (fsm->id == 0); | |
727 | /* clear conn information */ | |
728 | if (fsm->id) | |
729 | fsm->b_conn = 0; | |
730 | else | |
731 | fsm->a_conn = 0; | |
732 | ||
733 | if (otg->host) | |
734 | otg->host->is_b_host = fsm->id; | |
735 | if (otg->gadget) | |
736 | otg->gadget->is_a_peripheral = !fsm->id; | |
737 | VDBG("ID int (ID is %d)\n", fsm->id); | |
738 | ||
739 | if (fsm->id) { /* switch to gadget */ | |
740 | schedule_delayed_work( | |
741 | &((struct fsl_otg *)dev_id)->otg_event, | |
742 | 100); | |
743 | } else { /* switch to host */ | |
744 | cancel_delayed_work(& | |
745 | ((struct fsl_otg *)dev_id)-> | |
746 | otg_event); | |
747 | fsl_otg_start_gadget(fsm, 0); | |
748 | otg_drv_vbus(fsm, 1); | |
749 | fsl_otg_start_host(fsm, 1); | |
750 | } | |
751 | return IRQ_HANDLED; | |
752 | } | |
753 | } | |
754 | return IRQ_NONE; | |
755 | } | |
756 | ||
757 | static struct otg_fsm_ops fsl_otg_ops = { | |
758 | .chrg_vbus = fsl_otg_chrg_vbus, | |
759 | .drv_vbus = fsl_otg_drv_vbus, | |
760 | .loc_conn = fsl_otg_loc_conn, | |
761 | .loc_sof = fsl_otg_loc_sof, | |
762 | .start_pulse = fsl_otg_start_pulse, | |
763 | ||
f6de27ee AT |
764 | .add_timer = fsl_otg_fsm_add_timer, |
765 | .del_timer = fsl_otg_fsm_del_timer, | |
0807c500 LY |
766 | |
767 | .start_host = fsl_otg_start_host, | |
768 | .start_gadget = fsl_otg_start_gadget, | |
769 | }; | |
770 | ||
771 | /* Initialize the global variable fsl_otg_dev and request IRQ for OTG */ | |
772 | static int fsl_otg_conf(struct platform_device *pdev) | |
773 | { | |
774 | struct fsl_otg *fsl_otg_tc; | |
775 | int status; | |
776 | ||
777 | if (fsl_otg_dev) | |
778 | return 0; | |
779 | ||
780 | /* allocate space to fsl otg device */ | |
781 | fsl_otg_tc = kzalloc(sizeof(struct fsl_otg), GFP_KERNEL); | |
782 | if (!fsl_otg_tc) | |
783 | return -ENOMEM; | |
784 | ||
7e062c0f HK |
785 | fsl_otg_tc->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL); |
786 | if (!fsl_otg_tc->phy.otg) { | |
787 | kfree(fsl_otg_tc); | |
788 | return -ENOMEM; | |
789 | } | |
790 | ||
0807c500 LY |
791 | INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event); |
792 | ||
793 | INIT_LIST_HEAD(&active_timers); | |
794 | status = fsl_otg_init_timers(&fsl_otg_tc->fsm); | |
795 | if (status) { | |
796 | pr_info("Couldn't init OTG timers\n"); | |
797 | goto err; | |
798 | } | |
16e569e9 | 799 | mutex_init(&fsl_otg_tc->fsm.lock); |
0807c500 LY |
800 | |
801 | /* Set OTG state machine operations */ | |
802 | fsl_otg_tc->fsm.ops = &fsl_otg_ops; | |
803 | ||
804 | /* initialize the otg structure */ | |
7e062c0f | 805 | fsl_otg_tc->phy.label = DRIVER_DESC; |
1abd8b31 | 806 | fsl_otg_tc->phy.dev = &pdev->dev; |
7e062c0f | 807 | |
19c1eac2 | 808 | fsl_otg_tc->phy.otg->usb_phy = &fsl_otg_tc->phy; |
7e062c0f HK |
809 | fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host; |
810 | fsl_otg_tc->phy.otg->set_peripheral = fsl_otg_set_peripheral; | |
811 | fsl_otg_tc->phy.otg->start_hnp = fsl_otg_start_hnp; | |
812 | fsl_otg_tc->phy.otg->start_srp = fsl_otg_start_srp; | |
0807c500 LY |
813 | |
814 | fsl_otg_dev = fsl_otg_tc; | |
815 | ||
816 | /* Store the otg transceiver */ | |
662dca54 | 817 | status = usb_add_phy(&fsl_otg_tc->phy, USB_PHY_TYPE_USB2); |
0807c500 LY |
818 | if (status) { |
819 | pr_warn(FSL_OTG_NAME ": unable to register OTG transceiver.\n"); | |
820 | goto err; | |
821 | } | |
822 | ||
823 | return 0; | |
824 | err: | |
825 | fsl_otg_uninit_timers(); | |
7e062c0f | 826 | kfree(fsl_otg_tc->phy.otg); |
0807c500 LY |
827 | kfree(fsl_otg_tc); |
828 | return status; | |
829 | } | |
830 | ||
831 | /* OTG Initialization */ | |
832 | int usb_otg_start(struct platform_device *pdev) | |
833 | { | |
834 | struct fsl_otg *p_otg; | |
662dca54 | 835 | struct usb_phy *otg_trans = usb_get_phy(USB_PHY_TYPE_USB2); |
0807c500 LY |
836 | struct otg_fsm *fsm; |
837 | int status; | |
838 | struct resource *res; | |
839 | u32 temp; | |
19f9e188 | 840 | struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev); |
0807c500 | 841 | |
7e062c0f | 842 | p_otg = container_of(otg_trans, struct fsl_otg, phy); |
0807c500 LY |
843 | fsm = &p_otg->fsm; |
844 | ||
845 | /* Initialize the state machine structure with default values */ | |
846 | SET_OTG_STATE(otg_trans, OTG_STATE_UNDEFINED); | |
7e062c0f | 847 | fsm->otg = p_otg->phy.otg; |
0807c500 LY |
848 | |
849 | /* We don't require predefined MEM/IRQ resource index */ | |
850 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
851 | if (!res) | |
852 | return -ENXIO; | |
853 | ||
854 | /* We don't request_mem_region here to enable resource sharing | |
855 | * with host/device */ | |
856 | ||
857 | usb_dr_regs = ioremap(res->start, sizeof(struct usb_dr_mmap)); | |
858 | p_otg->dr_mem_map = (struct usb_dr_mmap *)usb_dr_regs; | |
859 | pdata->regs = (void *)usb_dr_regs; | |
860 | ||
861 | if (pdata->init && pdata->init(pdev) != 0) | |
862 | return -EINVAL; | |
863 | ||
04b453c8 | 864 | #ifdef CONFIG_PPC32 |
0807c500 LY |
865 | if (pdata->big_endian_mmio) { |
866 | _fsl_readl = _fsl_readl_be; | |
867 | _fsl_writel = _fsl_writel_be; | |
868 | } else { | |
869 | _fsl_readl = _fsl_readl_le; | |
870 | _fsl_writel = _fsl_writel_le; | |
871 | } | |
04b453c8 | 872 | #endif |
0807c500 LY |
873 | |
874 | /* request irq */ | |
875 | p_otg->irq = platform_get_irq(pdev, 0); | |
876 | status = request_irq(p_otg->irq, fsl_otg_isr, | |
877 | IRQF_SHARED, driver_name, p_otg); | |
878 | if (status) { | |
7e062c0f | 879 | dev_dbg(p_otg->phy.dev, "can't get IRQ %d, error %d\n", |
0807c500 LY |
880 | p_otg->irq, status); |
881 | iounmap(p_otg->dr_mem_map); | |
7e062c0f | 882 | kfree(p_otg->phy.otg); |
0807c500 LY |
883 | kfree(p_otg); |
884 | return status; | |
885 | } | |
886 | ||
887 | /* stop the controller */ | |
888 | temp = fsl_readl(&p_otg->dr_mem_map->usbcmd); | |
889 | temp &= ~USB_CMD_RUN_STOP; | |
890 | fsl_writel(temp, &p_otg->dr_mem_map->usbcmd); | |
891 | ||
892 | /* reset the controller */ | |
893 | temp = fsl_readl(&p_otg->dr_mem_map->usbcmd); | |
894 | temp |= USB_CMD_CTRL_RESET; | |
895 | fsl_writel(temp, &p_otg->dr_mem_map->usbcmd); | |
896 | ||
897 | /* wait reset completed */ | |
898 | while (fsl_readl(&p_otg->dr_mem_map->usbcmd) & USB_CMD_CTRL_RESET) | |
899 | ; | |
900 | ||
901 | /* configure the VBUSHS as IDLE(both host and device) */ | |
902 | temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USB_MODE_ES : 0); | |
903 | fsl_writel(temp, &p_otg->dr_mem_map->usbmode); | |
904 | ||
905 | /* configure PHY interface */ | |
906 | temp = fsl_readl(&p_otg->dr_mem_map->portsc); | |
907 | temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW); | |
908 | switch (pdata->phy_mode) { | |
909 | case FSL_USB2_PHY_ULPI: | |
910 | temp |= PORTSC_PTS_ULPI; | |
911 | break; | |
912 | case FSL_USB2_PHY_UTMI_WIDE: | |
913 | temp |= PORTSC_PTW_16BIT; | |
914 | /* fall through */ | |
915 | case FSL_USB2_PHY_UTMI: | |
916 | temp |= PORTSC_PTS_UTMI; | |
917 | /* fall through */ | |
918 | default: | |
919 | break; | |
920 | } | |
921 | fsl_writel(temp, &p_otg->dr_mem_map->portsc); | |
922 | ||
923 | if (pdata->have_sysif_regs) { | |
924 | /* configure control enable IO output, big endian register */ | |
925 | temp = __raw_readl(&p_otg->dr_mem_map->control); | |
926 | temp |= USB_CTRL_IOENB; | |
927 | __raw_writel(temp, &p_otg->dr_mem_map->control); | |
928 | } | |
929 | ||
930 | /* disable all interrupt and clear all OTGSC status */ | |
931 | temp = fsl_readl(&p_otg->dr_mem_map->otgsc); | |
932 | temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK; | |
933 | temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE; | |
934 | fsl_writel(temp, &p_otg->dr_mem_map->otgsc); | |
935 | ||
936 | /* | |
937 | * The identification (id) input is FALSE when a Mini-A plug is inserted | |
938 | * in the devices Mini-AB receptacle. Otherwise, this input is TRUE. | |
939 | * Also: record initial state of ID pin | |
940 | */ | |
941 | if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) { | |
e5ba1c02 | 942 | p_otg->phy.otg->state = OTG_STATE_UNDEFINED; |
0807c500 LY |
943 | p_otg->fsm.id = 1; |
944 | } else { | |
e5ba1c02 | 945 | p_otg->phy.otg->state = OTG_STATE_A_IDLE; |
0807c500 LY |
946 | p_otg->fsm.id = 0; |
947 | } | |
948 | ||
523e531e | 949 | pr_debug("initial ID pin=%d\n", p_otg->fsm.id); |
0807c500 LY |
950 | |
951 | /* enable OTG ID pin interrupt */ | |
952 | temp = fsl_readl(&p_otg->dr_mem_map->otgsc); | |
953 | temp |= OTGSC_INTR_USB_ID_EN; | |
954 | temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_INTR_1MS_TIMER_EN); | |
955 | fsl_writel(temp, &p_otg->dr_mem_map->otgsc); | |
956 | ||
957 | return 0; | |
958 | } | |
959 | ||
960 | /* | |
961 | * state file in sysfs | |
962 | */ | |
04b453c8 | 963 | static ssize_t show_fsl_usb2_otg_state(struct device *dev, |
0807c500 LY |
964 | struct device_attribute *attr, char *buf) |
965 | { | |
966 | struct otg_fsm *fsm = &fsl_otg_dev->fsm; | |
967 | char *next = buf; | |
968 | unsigned size = PAGE_SIZE; | |
0807c500 LY |
969 | int t; |
970 | ||
16e569e9 | 971 | mutex_lock(&fsm->lock); |
0807c500 LY |
972 | |
973 | /* basic driver infomation */ | |
974 | t = scnprintf(next, size, | |
975 | DRIVER_DESC "\n" "fsl_usb2_otg version: %s\n\n", | |
976 | DRIVER_VERSION); | |
977 | size -= t; | |
978 | next += t; | |
979 | ||
980 | /* Registers */ | |
981 | t = scnprintf(next, size, | |
982 | "OTGSC: 0x%08x\n" | |
983 | "PORTSC: 0x%08x\n" | |
984 | "USBMODE: 0x%08x\n" | |
985 | "USBCMD: 0x%08x\n" | |
986 | "USBSTS: 0x%08x\n" | |
987 | "USBINTR: 0x%08x\n", | |
988 | fsl_readl(&usb_dr_regs->otgsc), | |
989 | fsl_readl(&usb_dr_regs->portsc), | |
990 | fsl_readl(&usb_dr_regs->usbmode), | |
991 | fsl_readl(&usb_dr_regs->usbcmd), | |
992 | fsl_readl(&usb_dr_regs->usbsts), | |
993 | fsl_readl(&usb_dr_regs->usbintr)); | |
994 | size -= t; | |
995 | next += t; | |
996 | ||
997 | /* State */ | |
998 | t = scnprintf(next, size, | |
999 | "OTG state: %s\n\n", | |
e5ba1c02 | 1000 | usb_otg_state_string(fsl_otg_dev->phy.otg->state)); |
0807c500 LY |
1001 | size -= t; |
1002 | next += t; | |
1003 | ||
1004 | /* State Machine Variables */ | |
1005 | t = scnprintf(next, size, | |
1006 | "a_bus_req: %d\n" | |
1007 | "b_bus_req: %d\n" | |
1008 | "a_bus_resume: %d\n" | |
1009 | "a_bus_suspend: %d\n" | |
1010 | "a_conn: %d\n" | |
1011 | "a_sess_vld: %d\n" | |
1012 | "a_srp_det: %d\n" | |
1013 | "a_vbus_vld: %d\n" | |
1014 | "b_bus_resume: %d\n" | |
1015 | "b_bus_suspend: %d\n" | |
1016 | "b_conn: %d\n" | |
1017 | "b_se0_srp: %d\n" | |
68041785 | 1018 | "b_ssend_srp: %d\n" |
0807c500 LY |
1019 | "b_sess_vld: %d\n" |
1020 | "id: %d\n", | |
1021 | fsm->a_bus_req, | |
1022 | fsm->b_bus_req, | |
1023 | fsm->a_bus_resume, | |
1024 | fsm->a_bus_suspend, | |
1025 | fsm->a_conn, | |
1026 | fsm->a_sess_vld, | |
1027 | fsm->a_srp_det, | |
1028 | fsm->a_vbus_vld, | |
1029 | fsm->b_bus_resume, | |
1030 | fsm->b_bus_suspend, | |
1031 | fsm->b_conn, | |
1032 | fsm->b_se0_srp, | |
68041785 | 1033 | fsm->b_ssend_srp, |
0807c500 LY |
1034 | fsm->b_sess_vld, |
1035 | fsm->id); | |
1036 | size -= t; | |
1037 | next += t; | |
1038 | ||
16e569e9 | 1039 | mutex_unlock(&fsm->lock); |
0807c500 LY |
1040 | |
1041 | return PAGE_SIZE - size; | |
1042 | } | |
1043 | ||
1044 | static DEVICE_ATTR(fsl_usb2_otg_state, S_IRUGO, show_fsl_usb2_otg_state, NULL); | |
1045 | ||
1046 | ||
1047 | /* Char driver interface to control some OTG input */ | |
1048 | ||
1049 | /* | |
1050 | * Handle some ioctl command, such as get otg | |
1051 | * status and set host suspend | |
1052 | */ | |
1053 | static long fsl_otg_ioctl(struct file *file, unsigned int cmd, | |
1054 | unsigned long arg) | |
1055 | { | |
1056 | u32 retval = 0; | |
1057 | ||
1058 | switch (cmd) { | |
1059 | case GET_OTG_STATUS: | |
1060 | retval = fsl_otg_dev->host_working; | |
1061 | break; | |
1062 | ||
1063 | case SET_A_SUSPEND_REQ: | |
cff4dab4 | 1064 | fsl_otg_dev->fsm.a_suspend_req_inf = arg; |
0807c500 LY |
1065 | break; |
1066 | ||
1067 | case SET_A_BUS_DROP: | |
1068 | fsl_otg_dev->fsm.a_bus_drop = arg; | |
1069 | break; | |
1070 | ||
1071 | case SET_A_BUS_REQ: | |
1072 | fsl_otg_dev->fsm.a_bus_req = arg; | |
1073 | break; | |
1074 | ||
1075 | case SET_B_BUS_REQ: | |
1076 | fsl_otg_dev->fsm.b_bus_req = arg; | |
1077 | break; | |
1078 | ||
1079 | default: | |
1080 | break; | |
1081 | } | |
1082 | ||
1083 | otg_statemachine(&fsl_otg_dev->fsm); | |
1084 | ||
1085 | return retval; | |
1086 | } | |
1087 | ||
1088 | static int fsl_otg_open(struct inode *inode, struct file *file) | |
1089 | { | |
1090 | return 0; | |
1091 | } | |
1092 | ||
1093 | static int fsl_otg_release(struct inode *inode, struct file *file) | |
1094 | { | |
1095 | return 0; | |
1096 | } | |
1097 | ||
1098 | static const struct file_operations otg_fops = { | |
1099 | .owner = THIS_MODULE, | |
1100 | .llseek = NULL, | |
1101 | .read = NULL, | |
1102 | .write = NULL, | |
1103 | .unlocked_ioctl = fsl_otg_ioctl, | |
1104 | .open = fsl_otg_open, | |
1105 | .release = fsl_otg_release, | |
1106 | }; | |
1107 | ||
41ac7b3a | 1108 | static int fsl_otg_probe(struct platform_device *pdev) |
0807c500 LY |
1109 | { |
1110 | int ret; | |
1111 | ||
19f9e188 | 1112 | if (!dev_get_platdata(&pdev->dev)) |
0807c500 LY |
1113 | return -ENODEV; |
1114 | ||
1115 | /* configure the OTG */ | |
1116 | ret = fsl_otg_conf(pdev); | |
1117 | if (ret) { | |
1118 | dev_err(&pdev->dev, "Couldn't configure OTG module\n"); | |
1119 | return ret; | |
1120 | } | |
1121 | ||
1122 | /* start OTG */ | |
1123 | ret = usb_otg_start(pdev); | |
1124 | if (ret) { | |
1125 | dev_err(&pdev->dev, "Can't init FSL OTG device\n"); | |
1126 | return ret; | |
1127 | } | |
1128 | ||
1129 | ret = register_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME, &otg_fops); | |
1130 | if (ret) { | |
1131 | dev_err(&pdev->dev, "unable to register FSL OTG device\n"); | |
1132 | return ret; | |
1133 | } | |
1134 | ||
1135 | ret = device_create_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state); | |
1136 | if (ret) | |
1137 | dev_warn(&pdev->dev, "Can't register sysfs attribute\n"); | |
1138 | ||
1139 | return ret; | |
1140 | } | |
1141 | ||
fb4e98ab | 1142 | static int fsl_otg_remove(struct platform_device *pdev) |
0807c500 | 1143 | { |
19f9e188 | 1144 | struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev); |
0807c500 | 1145 | |
662dca54 | 1146 | usb_remove_phy(&fsl_otg_dev->phy); |
0807c500 LY |
1147 | free_irq(fsl_otg_dev->irq, fsl_otg_dev); |
1148 | ||
1149 | iounmap((void *)usb_dr_regs); | |
1150 | ||
1151 | fsl_otg_uninit_timers(); | |
7e062c0f | 1152 | kfree(fsl_otg_dev->phy.otg); |
0807c500 LY |
1153 | kfree(fsl_otg_dev); |
1154 | ||
1155 | device_remove_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state); | |
1156 | ||
1157 | unregister_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME); | |
1158 | ||
1159 | if (pdata->exit) | |
1160 | pdata->exit(pdev); | |
1161 | ||
1162 | return 0; | |
1163 | } | |
1164 | ||
1165 | struct platform_driver fsl_otg_driver = { | |
1166 | .probe = fsl_otg_probe, | |
7690417d | 1167 | .remove = fsl_otg_remove, |
0807c500 LY |
1168 | .driver = { |
1169 | .name = driver_name, | |
1170 | .owner = THIS_MODULE, | |
1171 | }, | |
1172 | }; | |
1173 | ||
cc27c96c | 1174 | module_platform_driver(fsl_otg_driver); |
0807c500 LY |
1175 | |
1176 | MODULE_DESCRIPTION(DRIVER_INFO); | |
1177 | MODULE_AUTHOR(DRIVER_AUTHOR); | |
1178 | MODULE_LICENSE("GPL"); |