[mirror_ubuntu-artful-kernel.git] / drivers / usb / renesas_usbhs / rcar3.c

/*
 * Renesas USB driver R-Car Gen. 3 initialization and power control
 *
 * Copyright (C) 2016 Renesas Electronics Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */

#include <linux/delay.h>
#include <linux/io.h>
#include "common.h"
#include "rcar3.h"

#define LPSTS		0x102
#define UGCTRL2		0x184	/* 32-bit register */

/* Low Power Status register (LPSTS) */
#define LPSTS_SUSPM	0x4000

/*
 * USB General control register 2 (UGCTRL2)
 * Remarks: bit[31:11] and bit[9:6] should be 0
 */
#define UGCTRL2_RESERVED_3	0x00000001	/* bit[3:0] should be B'0001 */
#define UGCTRL2_USB0SEL_OTG	0x00000030
#define UGCTRL2_VBUSSEL		0x00000400

static void usbhs_write32(struct usbhs_priv *priv, u32 reg, u32 data)
{
	iowrite32(data, priv->base + reg);
}

static int usbhs_rcar3_power_ctrl(struct platform_device *pdev,
				void __iomem *base, int enable)
{
	struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);

	usbhs_write32(priv, UGCTRL2, UGCTRL2_RESERVED_3 | UGCTRL2_USB0SEL_OTG |
		      UGCTRL2_VBUSSEL);

	if (enable) {
		usbhs_bset(priv, LPSTS, LPSTS_SUSPM, LPSTS_SUSPM);
		/* The controller on R-Car Gen3 needs to wait up to 45 usec */
		udelay(45);
	} else {
		usbhs_bset(priv, LPSTS, LPSTS_SUSPM, 0);
	}

	return 0;
}

static int usbhs_rcar3_get_id(struct platform_device *pdev)
{
	return USBHS_GADGET;
}

const struct renesas_usbhs_platform_callback usbhs_rcar3_ops = {
	.power_ctrl = usbhs_rcar3_power_ctrl,
	.get_id = usbhs_rcar3_get_id,
};
Commit	Line	Data
de18757e YS	1	/*
	2	* Renesas USB driver R-Car Gen. 3 initialization and power control
	3	*
	4	* Copyright (C) 2016 Renesas Electronics Corporation
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*
	10	*/
	11
b7603239	12	#include <linux/delay.h>
de18757e YS	13	#include <linux/io.h>
	14	#include "common.h"
	15	#include "rcar3.h"
	16
	17	#define LPSTS 0x102
	18	#define UGCTRL2 0x184 /* 32-bit register */
	19
	20	/* Low Power Status register (LPSTS) */
	21	#define LPSTS_SUSPM 0x4000
	22
2acecd58 YS	23	/*
	24	* USB General control register 2 (UGCTRL2)
	25	* Remarks: bit[31:11] and bit[9:6] should be 0
	26	*/
de18757e YS	27	#define UGCTRL2_RESERVED_3 0x00000001 /* bit[3:0] should be B'0001 */
de18757e YS	28	#define UGCTRL2_USB0SEL_OTG 0x00000030
2acecd58	29	#define UGCTRL2_VBUSSEL 0x00000400
de18757e	30
107a4b53	31	static void usbhs_write32(struct usbhs_priv *priv, u32 reg, u32 data)
de18757e YS	32	{
	33	iowrite32(data, priv->base + reg);
	34	}
	35
	36	static int usbhs_rcar3_power_ctrl(struct platform_device *pdev,
	37	void __iomem *base, int enable)
	38	{
	39	struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
	40
2acecd58 YS	41	usbhs_write32(priv, UGCTRL2, UGCTRL2_RESERVED_3 \| UGCTRL2_USB0SEL_OTG \|
2acecd58 YS	42	UGCTRL2_VBUSSEL);
de18757e	43
b7603239	44	if (enable) {
de18757e	45	usbhs_bset(priv, LPSTS, LPSTS_SUSPM, LPSTS_SUSPM);
b7603239 YS	46	/* The controller on R-Car Gen3 needs to wait up to 45 usec */
	47	udelay(45);
	48	} else {
de18757e	49	usbhs_bset(priv, LPSTS, LPSTS_SUSPM, 0);
b7603239	50	}
de18757e YS	51
	52	return 0;
	53	}
	54
	55	static int usbhs_rcar3_get_id(struct platform_device *pdev)
	56	{
	57	return USBHS_GADGET;
	58	}
	59
	60	const struct renesas_usbhs_platform_callback usbhs_rcar3_ops = {
	61	.power_ctrl = usbhs_rcar3_power_ctrl,
	62	.get_id = usbhs_rcar3_get_id,
	63	};