projects / mirror_ubuntu-jammy-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 5fd54ace | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 60a8fc01 AD |
2 | /* |
| 3 | * Infinity Unlimited USB Phoenix driver | |
| 4 | * | |
| 5 | * Copyright (C) 2007 Alain Degreffe (eczema@ecze.com) | |
| 6 | * | |
| 7 | * | |
| 8 | * Original code taken from iuutool ( Copyright (C) 2006 Juan Carlos Borrás ) | |
| 9 | * | |
| 10 | * This program is free software; you can redistribute it and/or modify | |
| 11 | * it under the terms of the GNU General Public License as published by | |
| 12 | * the Free Software Foundation; either version 2 of the License, or | |
| 13 | * (at your option) any later version. | |
| 14 | * | |
| 15 | * And tested with help of WB Electronics | |
| 16 | * | |
| 17 | */ | |
| 18 | ||
| 19 | #define IUU_USB_VENDOR_ID 0x104f | |
| 20 | #define IUU_USB_PRODUCT_ID 0x0004 | |
| 21 | #define IUU_USB_OP_TIMEOUT 0x0200 | |
| 22 | ||
| 23 | /* Programmer commands */ | |
| 24 | ||
| 25 | #define IUU_NO_OPERATION 0x00 | |
| 26 | #define IUU_GET_FIRMWARE_VERSION 0x01 | |
| 27 | #define IUU_GET_PRODUCT_NAME 0x02 | |
| 28 | #define IUU_GET_STATE_REGISTER 0x03 | |
| 29 | #define IUU_SET_LED 0x04 | |
| 30 | #define IUU_WAIT_MUS 0x05 | |
| 31 | #define IUU_WAIT_MS 0x06 | |
| 32 | #define IUU_GET_LOADER_VERSION 0x50 | |
| 33 | #define IUU_RST_SET 0x52 | |
| 34 | #define IUU_RST_CLEAR 0x53 | |
| 35 | #define IUU_SET_VCC 0x59 | |
| 36 | #define IUU_UART_ENABLE 0x49 | |
| 37 | #define IUU_UART_DISABLE 0x4A | |
| 38 | #define IUU_UART_WRITE_I2C 0x4C | |
| 39 | #define IUU_UART_ESC 0x5E | |
| 40 | #define IUU_UART_TRAP 0x54 | |
| 41 | #define IUU_UART_TRAP_BREAK 0x5B | |
| 42 | #define IUU_UART_RX 0x56 | |
| 43 | #define IUU_AVR_ON 0x21 | |
| 44 | #define IUU_AVR_OFF 0x22 | |
| 45 | #define IUU_AVR_1CLK 0x23 | |
| 46 | #define IUU_AVR_RESET 0x24 | |
| 47 | #define IUU_AVR_RESET_PC 0x25 | |
| 48 | #define IUU_AVR_INC_PC 0x26 | |
| 49 | #define IUU_AVR_INCN_PC 0x27 | |
| 50 | #define IUU_AVR_PREAD 0x29 | |
| 51 | #define IUU_AVR_PREADN 0x2A | |
| 52 | #define IUU_AVR_PWRITE 0x28 | |
| 53 | #define IUU_AVR_DREAD 0x2C | |
| 54 | #define IUU_AVR_DREADN 0x2D | |
| 55 | #define IUU_AVR_DWRITE 0x2B | |
| 56 | #define IUU_AVR_PWRITEN 0x2E | |
| 57 | #define IUU_EEPROM_ON 0x37 | |
| 58 | #define IUU_EEPROM_OFF 0x38 | |
| 59 | #define IUU_EEPROM_WRITE 0x39 | |
| 60 | #define IUU_EEPROM_WRITEX 0x3A | |
| 61 | #define IUU_EEPROM_WRITE8 0x3B | |
| 62 | #define IUU_EEPROM_WRITE16 0x3C | |
| 63 | #define IUU_EEPROM_WRITEX32 0x3D | |
| 64 | #define IUU_EEPROM_WRITEX64 0x3E | |
| 65 | #define IUU_EEPROM_READ 0x3F | |
| 66 | #define IUU_EEPROM_READX 0x40 | |
| 67 | #define IUU_EEPROM_BREAD 0x41 | |
| 68 | #define IUU_EEPROM_BREADX 0x42 | |
| 69 | #define IUU_PIC_CMD 0x0A | |
| 70 | #define IUU_PIC_CMD_LOAD 0x0B | |
| 71 | #define IUU_PIC_CMD_READ 0x0C | |
| 72 | #define IUU_PIC_ON 0x0D | |
| 73 | #define IUU_PIC_OFF 0x0E | |
| 74 | #define IUU_PIC_RESET 0x16 | |
| 75 | #define IUU_PIC_INC_PC 0x0F | |
| 76 | #define IUU_PIC_INCN_PC 0x10 | |
| 77 | #define IUU_PIC_PWRITE 0x11 | |
| 78 | #define IUU_PIC_PREAD 0x12 | |
| 79 | #define IUU_PIC_PREADN 0x13 | |
| 80 | #define IUU_PIC_DWRITE 0x14 | |
| 81 | #define IUU_PIC_DREAD 0x15 | |
| 82 | #define IUU_UART_NOP 0x00 | |
| 83 | #define IUU_UART_CHANGE 0x02 | |
| 84 | #define IUU_UART_TX 0x04 | |
| 85 | #define IUU_DELAY_MS 0x06 | |
| 86 | ||
| 87 | #define IUU_OPERATION_OK 0x00 | |
| 88 | #define IUU_DEVICE_NOT_FOUND 0x01 | |
| 89 | #define IUU_INVALID_HANDLE 0x02 | |
| 90 | #define IUU_INVALID_PARAMETER 0x03 | |
| 91 | #define IUU_INVALID_voidERFACE 0x04 | |
| 92 | #define IUU_INVALID_REQUEST_LENGTH 0x05 | |
| 93 | #define IUU_UART_NOT_ENABLED 0x06 | |
| 94 | #define IUU_WRITE_ERROR 0x07 | |
| 95 | #define IUU_READ_ERROR 0x08 | |
| 96 | #define IUU_TX_ERROR 0x09 | |
| 97 | #define IUU_RX_ERROR 0x0A | |
| 98 | ||
| 99 | #define IUU_PARITY_NONE 0x00 | |
| 100 | #define IUU_PARITY_EVEN 0x01 | |
| 101 | #define IUU_PARITY_ODD 0x02 | |
| 102 | #define IUU_PARITY_MARK 0x03 | |
| 103 | #define IUU_PARITY_SPACE 0x04 | |
| 104 | #define IUU_SC_INSERTED 0x01 | |
| 105 | #define IUU_VERIFY_ERROR 0x02 | |
| 106 | #define IUU_SIM_INSERTED 0x04 | |
| 107 | #define IUU_TWO_STOP_BITS 0x00 | |
| 108 | #define IUU_ONE_STOP_BIT 0x20 | |
| 109 | #define IUU_BAUD_2400 0x0398 | |
| 110 | #define IUU_BAUD_9600 0x0298 | |
| 111 | #define IUU_BAUD_19200 0x0164 | |
| 112 | #define IUU_BAUD_28800 0x0198 | |
| 113 | #define IUU_BAUD_38400 0x01B2 | |
| 114 | #define IUU_BAUD_57600 0x0030 | |
| 115 | #define IUU_BAUD_115200 0x0098 | |
| 116 | #define IUU_CLK_3579000 3579000 | |
| 117 | #define IUU_CLK_3680000 3680000 | |
| 118 | #define IUU_CLK_6000000 6000000 | |
| 119 | #define IUU_FULLCARD_IN 0x01 | |
| 120 | #define IUU_DEV_ERROR 0x02 | |
| 121 | #define IUU_MINICARD_IN 0x04 | |
| 122 | #define IUU_VCC_5V 0x00 | |
| 123 | #define IUU_VCC_3V 0x01 |