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956c36c2 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
c034a43e YZ |
2 | /* |
3 | * Copyright 2016-2017 Google, Inc | |
4 | * | |
c034a43e YZ |
5 | * Fairchild FUSB302 Type-C Chip Driver |
6 | */ | |
7 | ||
8 | #include <linux/debugfs.h> | |
9 | #include <linux/delay.h> | |
10 | #include <linux/errno.h> | |
382099d6 | 11 | #include <linux/extcon.h> |
c034a43e YZ |
12 | #include <linux/gpio.h> |
13 | #include <linux/i2c.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/mutex.h> | |
18 | #include <linux/of_device.h> | |
c034a43e YZ |
19 | #include <linux/of_gpio.h> |
20 | #include <linux/pinctrl/consumer.h> | |
4046c06f | 21 | #include <linux/power_supply.h> |
c034a43e YZ |
22 | #include <linux/proc_fs.h> |
23 | #include <linux/regulator/consumer.h> | |
24 | #include <linux/sched/clock.h> | |
25 | #include <linux/seq_file.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/string.h> | |
28 | #include <linux/types.h> | |
29 | #include <linux/usb/typec.h> | |
4b4e02c8 GR |
30 | #include <linux/usb/tcpm.h> |
31 | #include <linux/usb/pd.h> | |
c034a43e YZ |
32 | #include <linux/workqueue.h> |
33 | ||
34 | #include "fusb302_reg.h" | |
c034a43e YZ |
35 | |
36 | /* | |
37 | * When the device is SNK, BC_LVL interrupt is used to monitor cc pins | |
38 | * for the current capability offered by the SRC. As FUSB302 chip fires | |
39 | * the BC_LVL interrupt on PD signalings, cc lvl should be handled after | |
40 | * a delay to avoid measuring on PD activities. The delay is slightly | |
41 | * longer than PD_T_PD_DEBPUNCE (10-20ms). | |
42 | */ | |
43 | #define T_BC_LVL_DEBOUNCE_DELAY_MS 30 | |
44 | ||
45 | enum toggling_mode { | |
46 | TOGGLINE_MODE_OFF, | |
47 | TOGGLING_MODE_DRP, | |
48 | TOGGLING_MODE_SNK, | |
49 | TOGGLING_MODE_SRC, | |
50 | }; | |
51 | ||
52 | static const char * const toggling_mode_name[] = { | |
53 | [TOGGLINE_MODE_OFF] = "toggling_OFF", | |
54 | [TOGGLING_MODE_DRP] = "toggling_DRP", | |
55 | [TOGGLING_MODE_SNK] = "toggling_SNK", | |
56 | [TOGGLING_MODE_SRC] = "toggling_SRC", | |
57 | }; | |
58 | ||
59 | enum src_current_status { | |
60 | SRC_CURRENT_DEFAULT, | |
61 | SRC_CURRENT_MEDIUM, | |
62 | SRC_CURRENT_HIGH, | |
63 | }; | |
64 | ||
65 | static const u8 ra_mda_value[] = { | |
66 | [SRC_CURRENT_DEFAULT] = 4, /* 210mV */ | |
67 | [SRC_CURRENT_MEDIUM] = 9, /* 420mV */ | |
68 | [SRC_CURRENT_HIGH] = 18, /* 798mV */ | |
69 | }; | |
70 | ||
71 | static const u8 rd_mda_value[] = { | |
72 | [SRC_CURRENT_DEFAULT] = 38, /* 1638mV */ | |
73 | [SRC_CURRENT_MEDIUM] = 38, /* 1638mV */ | |
74 | [SRC_CURRENT_HIGH] = 61, /* 2604mV */ | |
75 | }; | |
76 | ||
77 | #define LOG_BUFFER_ENTRIES 1024 | |
78 | #define LOG_BUFFER_ENTRY_SIZE 128 | |
79 | ||
80 | struct fusb302_chip { | |
81 | struct device *dev; | |
82 | struct i2c_client *i2c_client; | |
83 | struct tcpm_port *tcpm_port; | |
84 | struct tcpc_dev tcpc_dev; | |
097578ec | 85 | struct tcpc_config tcpc_config; |
c034a43e YZ |
86 | |
87 | struct regulator *vbus; | |
88 | ||
89 | int gpio_int_n; | |
90 | int gpio_int_n_irq; | |
382099d6 | 91 | struct extcon_dev *extcon; |
c034a43e YZ |
92 | |
93 | struct workqueue_struct *wq; | |
94 | struct delayed_work bc_lvl_handler; | |
95 | ||
96 | atomic_t pm_suspend; | |
97 | atomic_t i2c_busy; | |
98 | ||
99 | /* lock for sharing chip states */ | |
100 | struct mutex lock; | |
101 | ||
4046c06f HG |
102 | /* psy + psy status */ |
103 | struct power_supply *psy; | |
104 | u32 current_limit; | |
105 | u32 supply_voltage; | |
106 | ||
c034a43e YZ |
107 | /* chip status */ |
108 | enum toggling_mode toggling_mode; | |
109 | enum src_current_status src_current_status; | |
110 | bool intr_togdone; | |
111 | bool intr_bc_lvl; | |
112 | bool intr_comp_chng; | |
113 | ||
114 | /* port status */ | |
115 | bool pull_up; | |
116 | bool vconn_on; | |
117 | bool vbus_on; | |
118 | bool charge_on; | |
119 | bool vbus_present; | |
120 | enum typec_cc_polarity cc_polarity; | |
121 | enum typec_cc_status cc1; | |
122 | enum typec_cc_status cc2; | |
123 | ||
124 | #ifdef CONFIG_DEBUG_FS | |
125 | struct dentry *dentry; | |
126 | /* lock for log buffer access */ | |
127 | struct mutex logbuffer_lock; | |
128 | int logbuffer_head; | |
129 | int logbuffer_tail; | |
130 | u8 *logbuffer[LOG_BUFFER_ENTRIES]; | |
131 | #endif | |
132 | }; | |
133 | ||
134 | /* | |
135 | * Logging | |
136 | */ | |
137 | ||
138 | #ifdef CONFIG_DEBUG_FS | |
139 | ||
140 | static bool fusb302_log_full(struct fusb302_chip *chip) | |
141 | { | |
142 | return chip->logbuffer_tail == | |
143 | (chip->logbuffer_head + 1) % LOG_BUFFER_ENTRIES; | |
144 | } | |
145 | ||
146 | static void _fusb302_log(struct fusb302_chip *chip, const char *fmt, | |
147 | va_list args) | |
148 | { | |
149 | char tmpbuffer[LOG_BUFFER_ENTRY_SIZE]; | |
150 | u64 ts_nsec = local_clock(); | |
151 | unsigned long rem_nsec; | |
152 | ||
153 | if (!chip->logbuffer[chip->logbuffer_head]) { | |
154 | chip->logbuffer[chip->logbuffer_head] = | |
155 | kzalloc(LOG_BUFFER_ENTRY_SIZE, GFP_KERNEL); | |
156 | if (!chip->logbuffer[chip->logbuffer_head]) | |
157 | return; | |
158 | } | |
159 | ||
160 | vsnprintf(tmpbuffer, sizeof(tmpbuffer), fmt, args); | |
161 | ||
162 | mutex_lock(&chip->logbuffer_lock); | |
163 | ||
164 | if (fusb302_log_full(chip)) { | |
165 | chip->logbuffer_head = max(chip->logbuffer_head - 1, 0); | |
166 | strlcpy(tmpbuffer, "overflow", sizeof(tmpbuffer)); | |
167 | } | |
168 | ||
169 | if (chip->logbuffer_head < 0 || | |
170 | chip->logbuffer_head >= LOG_BUFFER_ENTRIES) { | |
171 | dev_warn(chip->dev, | |
172 | "Bad log buffer index %d\n", chip->logbuffer_head); | |
173 | goto abort; | |
174 | } | |
175 | ||
176 | if (!chip->logbuffer[chip->logbuffer_head]) { | |
177 | dev_warn(chip->dev, | |
178 | "Log buffer index %d is NULL\n", chip->logbuffer_head); | |
179 | goto abort; | |
180 | } | |
181 | ||
182 | rem_nsec = do_div(ts_nsec, 1000000000); | |
183 | scnprintf(chip->logbuffer[chip->logbuffer_head], | |
184 | LOG_BUFFER_ENTRY_SIZE, "[%5lu.%06lu] %s", | |
185 | (unsigned long)ts_nsec, rem_nsec / 1000, | |
186 | tmpbuffer); | |
187 | chip->logbuffer_head = (chip->logbuffer_head + 1) % LOG_BUFFER_ENTRIES; | |
188 | ||
189 | abort: | |
190 | mutex_unlock(&chip->logbuffer_lock); | |
191 | } | |
192 | ||
193 | static void fusb302_log(struct fusb302_chip *chip, const char *fmt, ...) | |
194 | { | |
195 | va_list args; | |
196 | ||
197 | va_start(args, fmt); | |
198 | _fusb302_log(chip, fmt, args); | |
199 | va_end(args); | |
200 | } | |
201 | ||
202 | static int fusb302_seq_show(struct seq_file *s, void *v) | |
203 | { | |
204 | struct fusb302_chip *chip = (struct fusb302_chip *)s->private; | |
205 | int tail; | |
206 | ||
207 | mutex_lock(&chip->logbuffer_lock); | |
208 | tail = chip->logbuffer_tail; | |
209 | while (tail != chip->logbuffer_head) { | |
210 | seq_printf(s, "%s\n", chip->logbuffer[tail]); | |
211 | tail = (tail + 1) % LOG_BUFFER_ENTRIES; | |
212 | } | |
213 | if (!seq_has_overflowed(s)) | |
214 | chip->logbuffer_tail = tail; | |
215 | mutex_unlock(&chip->logbuffer_lock); | |
216 | ||
217 | return 0; | |
218 | } | |
219 | ||
220 | static int fusb302_debug_open(struct inode *inode, struct file *file) | |
221 | { | |
222 | return single_open(file, fusb302_seq_show, inode->i_private); | |
223 | } | |
224 | ||
225 | static const struct file_operations fusb302_debug_operations = { | |
226 | .open = fusb302_debug_open, | |
227 | .llseek = seq_lseek, | |
228 | .read = seq_read, | |
229 | .release = single_release, | |
230 | }; | |
231 | ||
232 | static struct dentry *rootdir; | |
233 | ||
234 | static int fusb302_debugfs_init(struct fusb302_chip *chip) | |
235 | { | |
236 | mutex_init(&chip->logbuffer_lock); | |
237 | if (!rootdir) { | |
238 | rootdir = debugfs_create_dir("fusb302", NULL); | |
239 | if (!rootdir) | |
240 | return -ENOMEM; | |
241 | } | |
242 | ||
243 | chip->dentry = debugfs_create_file(dev_name(chip->dev), | |
244 | S_IFREG | 0444, rootdir, | |
245 | chip, &fusb302_debug_operations); | |
246 | ||
247 | return 0; | |
248 | } | |
249 | ||
250 | static void fusb302_debugfs_exit(struct fusb302_chip *chip) | |
251 | { | |
252 | debugfs_remove(chip->dentry); | |
253 | } | |
254 | ||
255 | #else | |
256 | ||
257 | static void fusb302_log(const struct fusb302_chip *chip, | |
258 | const char *fmt, ...) { } | |
259 | static int fusb302_debugfs_init(const struct fusb302_chip *chip) { return 0; } | |
260 | static void fusb302_debugfs_exit(const struct fusb302_chip *chip) { } | |
261 | ||
262 | #endif | |
263 | ||
264 | #define FUSB302_RESUME_RETRY 10 | |
265 | #define FUSB302_RESUME_RETRY_SLEEP 50 | |
50b7c322 RMS |
266 | |
267 | static bool fusb302_is_suspended(struct fusb302_chip *chip) | |
c034a43e YZ |
268 | { |
269 | int retry_cnt; | |
c034a43e | 270 | |
c034a43e YZ |
271 | for (retry_cnt = 0; retry_cnt < FUSB302_RESUME_RETRY; retry_cnt++) { |
272 | if (atomic_read(&chip->pm_suspend)) { | |
50b7c322 RMS |
273 | dev_err(chip->dev, "i2c: pm suspend, retry %d/%d\n", |
274 | retry_cnt + 1, FUSB302_RESUME_RETRY); | |
c034a43e YZ |
275 | msleep(FUSB302_RESUME_RETRY_SLEEP); |
276 | } else { | |
50b7c322 | 277 | return false; |
c034a43e YZ |
278 | } |
279 | } | |
50b7c322 RMS |
280 | |
281 | return true; | |
282 | } | |
283 | ||
284 | static int fusb302_i2c_write(struct fusb302_chip *chip, | |
285 | u8 address, u8 data) | |
286 | { | |
287 | int ret = 0; | |
288 | ||
289 | atomic_set(&chip->i2c_busy, 1); | |
290 | ||
291 | if (fusb302_is_suspended(chip)) { | |
292 | atomic_set(&chip->i2c_busy, 0); | |
293 | return -ETIMEDOUT; | |
294 | } | |
295 | ||
c034a43e YZ |
296 | ret = i2c_smbus_write_byte_data(chip->i2c_client, address, data); |
297 | if (ret < 0) | |
298 | fusb302_log(chip, "cannot write 0x%02x to 0x%02x, ret=%d", | |
299 | data, address, ret); | |
300 | atomic_set(&chip->i2c_busy, 0); | |
301 | ||
302 | return ret; | |
303 | } | |
304 | ||
305 | static int fusb302_i2c_block_write(struct fusb302_chip *chip, u8 address, | |
306 | u8 length, const u8 *data) | |
307 | { | |
c034a43e YZ |
308 | int ret = 0; |
309 | ||
310 | if (length <= 0) | |
311 | return ret; | |
312 | atomic_set(&chip->i2c_busy, 1); | |
50b7c322 RMS |
313 | |
314 | if (fusb302_is_suspended(chip)) { | |
315 | atomic_set(&chip->i2c_busy, 0); | |
316 | return -ETIMEDOUT; | |
c034a43e | 317 | } |
50b7c322 | 318 | |
c034a43e YZ |
319 | ret = i2c_smbus_write_i2c_block_data(chip->i2c_client, address, |
320 | length, data); | |
321 | if (ret < 0) | |
322 | fusb302_log(chip, "cannot block write 0x%02x, len=%d, ret=%d", | |
323 | address, length, ret); | |
324 | atomic_set(&chip->i2c_busy, 0); | |
325 | ||
326 | return ret; | |
327 | } | |
328 | ||
329 | static int fusb302_i2c_read(struct fusb302_chip *chip, | |
330 | u8 address, u8 *data) | |
331 | { | |
c034a43e YZ |
332 | int ret = 0; |
333 | ||
334 | atomic_set(&chip->i2c_busy, 1); | |
50b7c322 RMS |
335 | |
336 | if (fusb302_is_suspended(chip)) { | |
337 | atomic_set(&chip->i2c_busy, 0); | |
338 | return -ETIMEDOUT; | |
c034a43e | 339 | } |
50b7c322 | 340 | |
c034a43e YZ |
341 | ret = i2c_smbus_read_byte_data(chip->i2c_client, address); |
342 | *data = (u8)ret; | |
343 | if (ret < 0) | |
344 | fusb302_log(chip, "cannot read %02x, ret=%d", address, ret); | |
345 | atomic_set(&chip->i2c_busy, 0); | |
346 | ||
347 | return ret; | |
348 | } | |
349 | ||
350 | static int fusb302_i2c_block_read(struct fusb302_chip *chip, u8 address, | |
351 | u8 length, u8 *data) | |
352 | { | |
c034a43e YZ |
353 | int ret = 0; |
354 | ||
355 | if (length <= 0) | |
356 | return ret; | |
357 | atomic_set(&chip->i2c_busy, 1); | |
50b7c322 RMS |
358 | |
359 | if (fusb302_is_suspended(chip)) { | |
360 | atomic_set(&chip->i2c_busy, 0); | |
361 | return -ETIMEDOUT; | |
c034a43e | 362 | } |
50b7c322 | 363 | |
c034a43e YZ |
364 | ret = i2c_smbus_read_i2c_block_data(chip->i2c_client, address, |
365 | length, data); | |
366 | if (ret < 0) { | |
367 | fusb302_log(chip, "cannot block read 0x%02x, len=%d, ret=%d", | |
368 | address, length, ret); | |
f0d39a17 | 369 | goto done; |
c034a43e YZ |
370 | } |
371 | if (ret != length) { | |
372 | fusb302_log(chip, "only read %d/%d bytes from 0x%02x", | |
373 | ret, length, address); | |
f0d39a17 | 374 | ret = -EIO; |
c034a43e | 375 | } |
f0d39a17 RMS |
376 | |
377 | done: | |
c034a43e YZ |
378 | atomic_set(&chip->i2c_busy, 0); |
379 | ||
380 | return ret; | |
381 | } | |
382 | ||
383 | static int fusb302_i2c_mask_write(struct fusb302_chip *chip, u8 address, | |
384 | u8 mask, u8 value) | |
385 | { | |
386 | int ret = 0; | |
387 | u8 data; | |
388 | ||
389 | ret = fusb302_i2c_read(chip, address, &data); | |
390 | if (ret < 0) | |
391 | return ret; | |
392 | data &= ~mask; | |
393 | data |= value; | |
394 | ret = fusb302_i2c_write(chip, address, data); | |
395 | if (ret < 0) | |
396 | return ret; | |
397 | ||
398 | return ret; | |
399 | } | |
400 | ||
401 | static int fusb302_i2c_set_bits(struct fusb302_chip *chip, u8 address, | |
402 | u8 set_bits) | |
403 | { | |
404 | return fusb302_i2c_mask_write(chip, address, 0x00, set_bits); | |
405 | } | |
406 | ||
407 | static int fusb302_i2c_clear_bits(struct fusb302_chip *chip, u8 address, | |
408 | u8 clear_bits) | |
409 | { | |
410 | return fusb302_i2c_mask_write(chip, address, clear_bits, 0x00); | |
411 | } | |
412 | ||
413 | static int fusb302_sw_reset(struct fusb302_chip *chip) | |
414 | { | |
415 | int ret = 0; | |
416 | ||
417 | ret = fusb302_i2c_write(chip, FUSB_REG_RESET, | |
418 | FUSB_REG_RESET_SW_RESET); | |
419 | if (ret < 0) | |
420 | fusb302_log(chip, "cannot sw reset the chip, ret=%d", ret); | |
421 | else | |
422 | fusb302_log(chip, "sw reset"); | |
423 | ||
424 | return ret; | |
425 | } | |
426 | ||
427 | static int fusb302_enable_tx_auto_retries(struct fusb302_chip *chip) | |
428 | { | |
429 | int ret = 0; | |
430 | ||
431 | ret = fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL3, | |
432 | FUSB_REG_CONTROL3_N_RETRIES_3 | | |
433 | FUSB_REG_CONTROL3_AUTO_RETRY); | |
434 | ||
435 | return ret; | |
436 | } | |
437 | ||
438 | /* | |
439 | * initialize interrupt on the chip | |
440 | * - unmasked interrupt: VBUS_OK | |
441 | */ | |
442 | static int fusb302_init_interrupt(struct fusb302_chip *chip) | |
443 | { | |
444 | int ret = 0; | |
445 | ||
446 | ret = fusb302_i2c_write(chip, FUSB_REG_MASK, | |
447 | 0xFF & ~FUSB_REG_MASK_VBUSOK); | |
448 | if (ret < 0) | |
449 | return ret; | |
450 | ret = fusb302_i2c_write(chip, FUSB_REG_MASKA, 0xFF); | |
451 | if (ret < 0) | |
452 | return ret; | |
453 | ret = fusb302_i2c_write(chip, FUSB_REG_MASKB, 0xFF); | |
454 | if (ret < 0) | |
455 | return ret; | |
456 | ret = fusb302_i2c_clear_bits(chip, FUSB_REG_CONTROL0, | |
457 | FUSB_REG_CONTROL0_INT_MASK); | |
458 | if (ret < 0) | |
459 | return ret; | |
460 | ||
461 | return ret; | |
462 | } | |
463 | ||
464 | static int fusb302_set_power_mode(struct fusb302_chip *chip, u8 power_mode) | |
465 | { | |
466 | int ret = 0; | |
467 | ||
468 | ret = fusb302_i2c_write(chip, FUSB_REG_POWER, power_mode); | |
469 | ||
470 | return ret; | |
471 | } | |
472 | ||
473 | static int tcpm_init(struct tcpc_dev *dev) | |
474 | { | |
475 | struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, | |
476 | tcpc_dev); | |
477 | int ret = 0; | |
478 | u8 data; | |
479 | ||
480 | ret = fusb302_sw_reset(chip); | |
481 | if (ret < 0) | |
482 | return ret; | |
483 | ret = fusb302_enable_tx_auto_retries(chip); | |
484 | if (ret < 0) | |
485 | return ret; | |
486 | ret = fusb302_init_interrupt(chip); | |
487 | if (ret < 0) | |
488 | return ret; | |
489 | ret = fusb302_set_power_mode(chip, FUSB_REG_POWER_PWR_ALL); | |
490 | if (ret < 0) | |
491 | return ret; | |
492 | ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &data); | |
493 | if (ret < 0) | |
494 | return ret; | |
aac53ee4 | 495 | chip->vbus_present = !!(data & FUSB_REG_STATUS0_VBUSOK); |
c034a43e YZ |
496 | ret = fusb302_i2c_read(chip, FUSB_REG_DEVICE_ID, &data); |
497 | if (ret < 0) | |
498 | return ret; | |
499 | fusb302_log(chip, "fusb302 device ID: 0x%02x", data); | |
500 | ||
501 | return ret; | |
502 | } | |
503 | ||
504 | static int tcpm_get_vbus(struct tcpc_dev *dev) | |
505 | { | |
506 | struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, | |
507 | tcpc_dev); | |
508 | int ret = 0; | |
509 | ||
510 | mutex_lock(&chip->lock); | |
511 | ret = chip->vbus_present ? 1 : 0; | |
512 | mutex_unlock(&chip->lock); | |
513 | ||
514 | return ret; | |
515 | } | |
516 | ||
382099d6 HG |
517 | static int tcpm_get_current_limit(struct tcpc_dev *dev) |
518 | { | |
519 | struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, | |
520 | tcpc_dev); | |
521 | int current_limit = 0; | |
522 | unsigned long timeout; | |
523 | ||
524 | if (!chip->extcon) | |
525 | return 0; | |
526 | ||
527 | /* | |
528 | * USB2 Charger detection may still be in progress when we get here, | |
529 | * this can take upto 600ms, wait 800ms max. | |
530 | */ | |
531 | timeout = jiffies + msecs_to_jiffies(800); | |
532 | do { | |
533 | if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_SDP) == 1) | |
534 | current_limit = 500; | |
535 | ||
536 | if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_CDP) == 1 || | |
537 | extcon_get_state(chip->extcon, EXTCON_CHG_USB_ACA) == 1) | |
538 | current_limit = 1500; | |
539 | ||
540 | if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_DCP) == 1) | |
541 | current_limit = 2000; | |
542 | ||
543 | msleep(50); | |
544 | } while (current_limit == 0 && time_before(jiffies, timeout)); | |
545 | ||
546 | return current_limit; | |
547 | } | |
548 | ||
c034a43e YZ |
549 | static int fusb302_set_cc_pull(struct fusb302_chip *chip, |
550 | bool pull_up, bool pull_down) | |
551 | { | |
552 | int ret = 0; | |
553 | u8 data = 0x00; | |
554 | u8 mask = FUSB_REG_SWITCHES0_CC1_PU_EN | | |
555 | FUSB_REG_SWITCHES0_CC2_PU_EN | | |
556 | FUSB_REG_SWITCHES0_CC1_PD_EN | | |
557 | FUSB_REG_SWITCHES0_CC2_PD_EN; | |
558 | ||
559 | if (pull_up) | |
560 | data |= (chip->cc_polarity == TYPEC_POLARITY_CC1) ? | |
561 | FUSB_REG_SWITCHES0_CC1_PU_EN : | |
562 | FUSB_REG_SWITCHES0_CC2_PU_EN; | |
563 | if (pull_down) | |
564 | data |= FUSB_REG_SWITCHES0_CC1_PD_EN | | |
565 | FUSB_REG_SWITCHES0_CC2_PD_EN; | |
566 | ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES0, | |
567 | mask, data); | |
568 | if (ret < 0) | |
569 | return ret; | |
570 | chip->pull_up = pull_up; | |
571 | ||
572 | return ret; | |
573 | } | |
574 | ||
575 | static int fusb302_set_src_current(struct fusb302_chip *chip, | |
576 | enum src_current_status status) | |
577 | { | |
578 | int ret = 0; | |
579 | ||
580 | chip->src_current_status = status; | |
581 | switch (status) { | |
582 | case SRC_CURRENT_DEFAULT: | |
583 | ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0, | |
584 | FUSB_REG_CONTROL0_HOST_CUR_MASK, | |
585 | FUSB_REG_CONTROL0_HOST_CUR_DEF); | |
586 | break; | |
587 | case SRC_CURRENT_MEDIUM: | |
588 | ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0, | |
589 | FUSB_REG_CONTROL0_HOST_CUR_MASK, | |
590 | FUSB_REG_CONTROL0_HOST_CUR_MED); | |
591 | break; | |
592 | case SRC_CURRENT_HIGH: | |
593 | ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0, | |
594 | FUSB_REG_CONTROL0_HOST_CUR_MASK, | |
595 | FUSB_REG_CONTROL0_HOST_CUR_HIGH); | |
596 | break; | |
597 | default: | |
598 | break; | |
599 | } | |
600 | ||
601 | return ret; | |
602 | } | |
603 | ||
604 | static int fusb302_set_toggling(struct fusb302_chip *chip, | |
605 | enum toggling_mode mode) | |
606 | { | |
607 | int ret = 0; | |
608 | ||
609 | /* first disable toggling */ | |
610 | ret = fusb302_i2c_clear_bits(chip, FUSB_REG_CONTROL2, | |
611 | FUSB_REG_CONTROL2_TOGGLE); | |
612 | if (ret < 0) | |
613 | return ret; | |
614 | /* mask interrupts for SRC or SNK */ | |
615 | ret = fusb302_i2c_set_bits(chip, FUSB_REG_MASK, | |
616 | FUSB_REG_MASK_BC_LVL | | |
617 | FUSB_REG_MASK_COMP_CHNG); | |
618 | if (ret < 0) | |
619 | return ret; | |
620 | chip->intr_bc_lvl = false; | |
621 | chip->intr_comp_chng = false; | |
622 | /* configure toggling mode: none/snk/src/drp */ | |
623 | switch (mode) { | |
624 | case TOGGLINE_MODE_OFF: | |
625 | ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2, | |
626 | FUSB_REG_CONTROL2_MODE_MASK, | |
627 | FUSB_REG_CONTROL2_MODE_NONE); | |
628 | if (ret < 0) | |
629 | return ret; | |
630 | break; | |
631 | case TOGGLING_MODE_SNK: | |
632 | ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2, | |
633 | FUSB_REG_CONTROL2_MODE_MASK, | |
634 | FUSB_REG_CONTROL2_MODE_UFP); | |
635 | if (ret < 0) | |
636 | return ret; | |
637 | break; | |
638 | case TOGGLING_MODE_SRC: | |
639 | ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2, | |
640 | FUSB_REG_CONTROL2_MODE_MASK, | |
641 | FUSB_REG_CONTROL2_MODE_DFP); | |
642 | if (ret < 0) | |
643 | return ret; | |
644 | break; | |
645 | case TOGGLING_MODE_DRP: | |
646 | ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2, | |
647 | FUSB_REG_CONTROL2_MODE_MASK, | |
648 | FUSB_REG_CONTROL2_MODE_DRP); | |
649 | if (ret < 0) | |
650 | return ret; | |
651 | break; | |
652 | default: | |
653 | break; | |
654 | } | |
655 | ||
656 | if (mode == TOGGLINE_MODE_OFF) { | |
657 | /* mask TOGDONE interrupt */ | |
658 | ret = fusb302_i2c_set_bits(chip, FUSB_REG_MASKA, | |
659 | FUSB_REG_MASKA_TOGDONE); | |
660 | if (ret < 0) | |
661 | return ret; | |
662 | chip->intr_togdone = false; | |
663 | } else { | |
664 | /* unmask TOGDONE interrupt */ | |
665 | ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASKA, | |
666 | FUSB_REG_MASKA_TOGDONE); | |
667 | if (ret < 0) | |
668 | return ret; | |
669 | chip->intr_togdone = true; | |
670 | /* start toggling */ | |
671 | ret = fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL2, | |
672 | FUSB_REG_CONTROL2_TOGGLE); | |
673 | if (ret < 0) | |
674 | return ret; | |
675 | /* during toggling, consider cc as Open */ | |
676 | chip->cc1 = TYPEC_CC_OPEN; | |
677 | chip->cc2 = TYPEC_CC_OPEN; | |
678 | } | |
679 | chip->toggling_mode = mode; | |
680 | ||
681 | return ret; | |
682 | } | |
683 | ||
684 | static const char * const typec_cc_status_name[] = { | |
685 | [TYPEC_CC_OPEN] = "Open", | |
686 | [TYPEC_CC_RA] = "Ra", | |
687 | [TYPEC_CC_RD] = "Rd", | |
688 | [TYPEC_CC_RP_DEF] = "Rp-def", | |
689 | [TYPEC_CC_RP_1_5] = "Rp-1.5", | |
690 | [TYPEC_CC_RP_3_0] = "Rp-3.0", | |
691 | }; | |
692 | ||
693 | static const enum src_current_status cc_src_current[] = { | |
694 | [TYPEC_CC_OPEN] = SRC_CURRENT_DEFAULT, | |
695 | [TYPEC_CC_RA] = SRC_CURRENT_DEFAULT, | |
696 | [TYPEC_CC_RD] = SRC_CURRENT_DEFAULT, | |
697 | [TYPEC_CC_RP_DEF] = SRC_CURRENT_DEFAULT, | |
698 | [TYPEC_CC_RP_1_5] = SRC_CURRENT_MEDIUM, | |
699 | [TYPEC_CC_RP_3_0] = SRC_CURRENT_HIGH, | |
700 | }; | |
701 | ||
702 | static int tcpm_set_cc(struct tcpc_dev *dev, enum typec_cc_status cc) | |
703 | { | |
704 | struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, | |
705 | tcpc_dev); | |
706 | int ret = 0; | |
707 | bool pull_up, pull_down; | |
708 | u8 rd_mda; | |
709 | ||
710 | mutex_lock(&chip->lock); | |
711 | switch (cc) { | |
712 | case TYPEC_CC_OPEN: | |
713 | pull_up = false; | |
714 | pull_down = false; | |
715 | break; | |
716 | case TYPEC_CC_RD: | |
717 | pull_up = false; | |
718 | pull_down = true; | |
719 | break; | |
720 | case TYPEC_CC_RP_DEF: | |
721 | case TYPEC_CC_RP_1_5: | |
722 | case TYPEC_CC_RP_3_0: | |
723 | pull_up = true; | |
724 | pull_down = false; | |
725 | break; | |
726 | default: | |
727 | fusb302_log(chip, "unsupported cc value %s", | |
728 | typec_cc_status_name[cc]); | |
729 | ret = -EINVAL; | |
730 | goto done; | |
731 | } | |
732 | ret = fusb302_set_toggling(chip, TOGGLINE_MODE_OFF); | |
733 | if (ret < 0) { | |
734 | fusb302_log(chip, "cannot stop toggling, ret=%d", ret); | |
735 | goto done; | |
736 | } | |
737 | ret = fusb302_set_cc_pull(chip, pull_up, pull_down); | |
738 | if (ret < 0) { | |
739 | fusb302_log(chip, | |
740 | "cannot set cc pulling up %s, down %s, ret = %d", | |
741 | pull_up ? "True" : "False", | |
742 | pull_down ? "True" : "False", | |
743 | ret); | |
744 | goto done; | |
745 | } | |
746 | /* reset the cc status */ | |
747 | chip->cc1 = TYPEC_CC_OPEN; | |
748 | chip->cc2 = TYPEC_CC_OPEN; | |
749 | /* adjust current for SRC */ | |
750 | if (pull_up) { | |
751 | ret = fusb302_set_src_current(chip, cc_src_current[cc]); | |
752 | if (ret < 0) { | |
753 | fusb302_log(chip, "cannot set src current %s, ret=%d", | |
754 | typec_cc_status_name[cc], ret); | |
755 | goto done; | |
756 | } | |
757 | } | |
758 | /* enable/disable interrupts, BC_LVL for SNK and COMP_CHNG for SRC */ | |
759 | if (pull_up) { | |
760 | rd_mda = rd_mda_value[cc_src_current[cc]]; | |
761 | ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda); | |
762 | if (ret < 0) { | |
763 | fusb302_log(chip, | |
764 | "cannot set SRC measure value, ret=%d", | |
765 | ret); | |
766 | goto done; | |
767 | } | |
768 | ret = fusb302_i2c_mask_write(chip, FUSB_REG_MASK, | |
769 | FUSB_REG_MASK_BC_LVL | | |
770 | FUSB_REG_MASK_COMP_CHNG, | |
771 | FUSB_REG_MASK_COMP_CHNG); | |
772 | if (ret < 0) { | |
773 | fusb302_log(chip, "cannot set SRC interrupt, ret=%d", | |
774 | ret); | |
775 | goto done; | |
776 | } | |
777 | chip->intr_bc_lvl = false; | |
778 | chip->intr_comp_chng = true; | |
779 | } | |
780 | if (pull_down) { | |
781 | ret = fusb302_i2c_mask_write(chip, FUSB_REG_MASK, | |
782 | FUSB_REG_MASK_BC_LVL | | |
783 | FUSB_REG_MASK_COMP_CHNG, | |
784 | FUSB_REG_MASK_BC_LVL); | |
785 | if (ret < 0) { | |
786 | fusb302_log(chip, "cannot set SRC interrupt, ret=%d", | |
787 | ret); | |
788 | goto done; | |
789 | } | |
790 | chip->intr_bc_lvl = true; | |
791 | chip->intr_comp_chng = false; | |
792 | } | |
793 | fusb302_log(chip, "cc := %s", typec_cc_status_name[cc]); | |
794 | done: | |
795 | mutex_unlock(&chip->lock); | |
796 | ||
797 | return ret; | |
798 | } | |
799 | ||
800 | static int tcpm_get_cc(struct tcpc_dev *dev, enum typec_cc_status *cc1, | |
801 | enum typec_cc_status *cc2) | |
802 | { | |
803 | struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, | |
804 | tcpc_dev); | |
805 | ||
806 | mutex_lock(&chip->lock); | |
807 | *cc1 = chip->cc1; | |
808 | *cc2 = chip->cc2; | |
809 | fusb302_log(chip, "cc1=%s, cc2=%s", typec_cc_status_name[*cc1], | |
810 | typec_cc_status_name[*cc2]); | |
811 | mutex_unlock(&chip->lock); | |
812 | ||
813 | return 0; | |
814 | } | |
815 | ||
816 | static int tcpm_set_polarity(struct tcpc_dev *dev, | |
817 | enum typec_cc_polarity polarity) | |
818 | { | |
819 | return 0; | |
820 | } | |
821 | ||
822 | static int tcpm_set_vconn(struct tcpc_dev *dev, bool on) | |
823 | { | |
824 | struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, | |
825 | tcpc_dev); | |
826 | int ret = 0; | |
827 | u8 switches0_data = 0x00; | |
828 | u8 switches0_mask = FUSB_REG_SWITCHES0_VCONN_CC1 | | |
829 | FUSB_REG_SWITCHES0_VCONN_CC2; | |
830 | ||
831 | mutex_lock(&chip->lock); | |
832 | if (chip->vconn_on == on) { | |
833 | fusb302_log(chip, "vconn is already %s", on ? "On" : "Off"); | |
834 | goto done; | |
835 | } | |
836 | if (on) { | |
837 | switches0_data = (chip->cc_polarity == TYPEC_POLARITY_CC1) ? | |
838 | FUSB_REG_SWITCHES0_VCONN_CC2 : | |
839 | FUSB_REG_SWITCHES0_VCONN_CC1; | |
840 | } | |
841 | ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES0, | |
842 | switches0_mask, switches0_data); | |
843 | if (ret < 0) | |
844 | goto done; | |
845 | chip->vconn_on = on; | |
846 | fusb302_log(chip, "vconn := %s", on ? "On" : "Off"); | |
847 | done: | |
848 | mutex_unlock(&chip->lock); | |
849 | ||
850 | return ret; | |
851 | } | |
852 | ||
853 | static int tcpm_set_vbus(struct tcpc_dev *dev, bool on, bool charge) | |
854 | { | |
855 | struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, | |
856 | tcpc_dev); | |
857 | int ret = 0; | |
858 | ||
859 | mutex_lock(&chip->lock); | |
860 | if (chip->vbus_on == on) { | |
861 | fusb302_log(chip, "vbus is already %s", on ? "On" : "Off"); | |
862 | } else { | |
863 | if (on) | |
864 | ret = regulator_enable(chip->vbus); | |
865 | else | |
866 | ret = regulator_disable(chip->vbus); | |
867 | if (ret < 0) { | |
868 | fusb302_log(chip, "cannot %s vbus regulator, ret=%d", | |
869 | on ? "enable" : "disable", ret); | |
870 | goto done; | |
871 | } | |
872 | chip->vbus_on = on; | |
873 | fusb302_log(chip, "vbus := %s", on ? "On" : "Off"); | |
874 | } | |
4046c06f | 875 | if (chip->charge_on == charge) { |
c034a43e YZ |
876 | fusb302_log(chip, "charge is already %s", |
877 | charge ? "On" : "Off"); | |
4046c06f | 878 | } else { |
c034a43e | 879 | chip->charge_on = charge; |
4046c06f HG |
880 | power_supply_changed(chip->psy); |
881 | } | |
c034a43e YZ |
882 | |
883 | done: | |
884 | mutex_unlock(&chip->lock); | |
885 | ||
886 | return ret; | |
887 | } | |
888 | ||
889 | static int tcpm_set_current_limit(struct tcpc_dev *dev, u32 max_ma, u32 mv) | |
890 | { | |
891 | struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, | |
892 | tcpc_dev); | |
893 | ||
894 | fusb302_log(chip, "current limit: %d ma, %d mv (not implemented)", | |
895 | max_ma, mv); | |
896 | ||
4046c06f HG |
897 | chip->supply_voltage = mv; |
898 | chip->current_limit = max_ma; | |
899 | ||
900 | power_supply_changed(chip->psy); | |
901 | ||
c034a43e YZ |
902 | return 0; |
903 | } | |
904 | ||
905 | static int fusb302_pd_tx_flush(struct fusb302_chip *chip) | |
906 | { | |
907 | return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL0, | |
908 | FUSB_REG_CONTROL0_TX_FLUSH); | |
909 | } | |
910 | ||
911 | static int fusb302_pd_rx_flush(struct fusb302_chip *chip) | |
912 | { | |
913 | return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL1, | |
914 | FUSB_REG_CONTROL1_RX_FLUSH); | |
915 | } | |
916 | ||
917 | static int fusb302_pd_set_auto_goodcrc(struct fusb302_chip *chip, bool on) | |
918 | { | |
919 | if (on) | |
920 | return fusb302_i2c_set_bits(chip, FUSB_REG_SWITCHES1, | |
921 | FUSB_REG_SWITCHES1_AUTO_GCRC); | |
922 | return fusb302_i2c_clear_bits(chip, FUSB_REG_SWITCHES1, | |
923 | FUSB_REG_SWITCHES1_AUTO_GCRC); | |
924 | } | |
925 | ||
926 | static int fusb302_pd_set_interrupts(struct fusb302_chip *chip, bool on) | |
927 | { | |
928 | int ret = 0; | |
929 | u8 mask_interrupts = FUSB_REG_MASK_COLLISION; | |
930 | u8 maska_interrupts = FUSB_REG_MASKA_RETRYFAIL | | |
931 | FUSB_REG_MASKA_HARDSENT | | |
932 | FUSB_REG_MASKA_TX_SUCCESS | | |
933 | FUSB_REG_MASKA_HARDRESET; | |
934 | u8 maskb_interrupts = FUSB_REG_MASKB_GCRCSENT; | |
935 | ||
936 | ret = on ? | |
937 | fusb302_i2c_clear_bits(chip, FUSB_REG_MASK, mask_interrupts) : | |
938 | fusb302_i2c_set_bits(chip, FUSB_REG_MASK, mask_interrupts); | |
939 | if (ret < 0) | |
940 | return ret; | |
941 | ret = on ? | |
942 | fusb302_i2c_clear_bits(chip, FUSB_REG_MASKA, maska_interrupts) : | |
943 | fusb302_i2c_set_bits(chip, FUSB_REG_MASKA, maska_interrupts); | |
944 | if (ret < 0) | |
945 | return ret; | |
946 | ret = on ? | |
947 | fusb302_i2c_clear_bits(chip, FUSB_REG_MASKB, maskb_interrupts) : | |
948 | fusb302_i2c_set_bits(chip, FUSB_REG_MASKB, maskb_interrupts); | |
949 | return ret; | |
950 | } | |
951 | ||
952 | static int tcpm_set_pd_rx(struct tcpc_dev *dev, bool on) | |
953 | { | |
954 | struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, | |
955 | tcpc_dev); | |
956 | int ret = 0; | |
957 | ||
958 | mutex_lock(&chip->lock); | |
959 | ret = fusb302_pd_rx_flush(chip); | |
960 | if (ret < 0) { | |
961 | fusb302_log(chip, "cannot flush pd rx buffer, ret=%d", ret); | |
962 | goto done; | |
963 | } | |
964 | ret = fusb302_pd_tx_flush(chip); | |
965 | if (ret < 0) { | |
966 | fusb302_log(chip, "cannot flush pd tx buffer, ret=%d", ret); | |
967 | goto done; | |
968 | } | |
969 | ret = fusb302_pd_set_auto_goodcrc(chip, on); | |
970 | if (ret < 0) { | |
971 | fusb302_log(chip, "cannot turn %s auto GCRC, ret=%d", | |
972 | on ? "on" : "off", ret); | |
973 | goto done; | |
974 | } | |
975 | ret = fusb302_pd_set_interrupts(chip, on); | |
976 | if (ret < 0) { | |
977 | fusb302_log(chip, "cannot turn %s pd interrupts, ret=%d", | |
978 | on ? "on" : "off", ret); | |
979 | goto done; | |
980 | } | |
981 | fusb302_log(chip, "pd := %s", on ? "on" : "off"); | |
982 | done: | |
983 | mutex_unlock(&chip->lock); | |
984 | ||
985 | return ret; | |
986 | } | |
987 | ||
988 | static const char * const typec_role_name[] = { | |
989 | [TYPEC_SINK] = "Sink", | |
990 | [TYPEC_SOURCE] = "Source", | |
991 | }; | |
992 | ||
993 | static const char * const typec_data_role_name[] = { | |
994 | [TYPEC_DEVICE] = "Device", | |
995 | [TYPEC_HOST] = "Host", | |
996 | }; | |
997 | ||
998 | static int tcpm_set_roles(struct tcpc_dev *dev, bool attached, | |
999 | enum typec_role pwr, enum typec_data_role data) | |
1000 | { | |
1001 | struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, | |
1002 | tcpc_dev); | |
1003 | int ret = 0; | |
1004 | u8 switches1_mask = FUSB_REG_SWITCHES1_POWERROLE | | |
1005 | FUSB_REG_SWITCHES1_DATAROLE; | |
1006 | u8 switches1_data = 0x00; | |
1007 | ||
1008 | mutex_lock(&chip->lock); | |
1009 | if (pwr == TYPEC_SOURCE) | |
1010 | switches1_data |= FUSB_REG_SWITCHES1_POWERROLE; | |
1011 | if (data == TYPEC_HOST) | |
1012 | switches1_data |= FUSB_REG_SWITCHES1_DATAROLE; | |
1013 | ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES1, | |
1014 | switches1_mask, switches1_data); | |
1015 | if (ret < 0) { | |
1016 | fusb302_log(chip, "unable to set pd header %s, %s, ret=%d", | |
1017 | typec_role_name[pwr], typec_data_role_name[data], | |
1018 | ret); | |
1019 | goto done; | |
1020 | } | |
1021 | fusb302_log(chip, "pd header := %s, %s", typec_role_name[pwr], | |
1022 | typec_data_role_name[data]); | |
1023 | done: | |
1024 | mutex_unlock(&chip->lock); | |
1025 | ||
1026 | return ret; | |
1027 | } | |
1028 | ||
1029 | static int tcpm_start_drp_toggling(struct tcpc_dev *dev, | |
1030 | enum typec_cc_status cc) | |
1031 | { | |
1032 | struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, | |
1033 | tcpc_dev); | |
1034 | int ret = 0; | |
1035 | ||
1036 | mutex_lock(&chip->lock); | |
1037 | ret = fusb302_set_src_current(chip, cc_src_current[cc]); | |
1038 | if (ret < 0) { | |
1039 | fusb302_log(chip, "unable to set src current %s, ret=%d", | |
1040 | typec_cc_status_name[cc], ret); | |
1041 | goto done; | |
1042 | } | |
1043 | ret = fusb302_set_toggling(chip, TOGGLING_MODE_DRP); | |
1044 | if (ret < 0) { | |
1045 | fusb302_log(chip, | |
1046 | "unable to start drp toggling, ret=%d", ret); | |
1047 | goto done; | |
1048 | } | |
1049 | fusb302_log(chip, "start drp toggling"); | |
1050 | done: | |
1051 | mutex_unlock(&chip->lock); | |
1052 | ||
1053 | return ret; | |
1054 | } | |
1055 | ||
1056 | static int fusb302_pd_send_message(struct fusb302_chip *chip, | |
1057 | const struct pd_message *msg) | |
1058 | { | |
1059 | int ret = 0; | |
1060 | u8 buf[40]; | |
1061 | u8 pos = 0; | |
1062 | int len; | |
1063 | ||
1064 | /* SOP tokens */ | |
1065 | buf[pos++] = FUSB302_TKN_SYNC1; | |
1066 | buf[pos++] = FUSB302_TKN_SYNC1; | |
1067 | buf[pos++] = FUSB302_TKN_SYNC1; | |
1068 | buf[pos++] = FUSB302_TKN_SYNC2; | |
1069 | ||
f03d95f5 | 1070 | len = pd_header_cnt_le(msg->header) * 4; |
c034a43e YZ |
1071 | /* plug 2 for header */ |
1072 | len += 2; | |
1073 | if (len > 0x1F) { | |
1074 | fusb302_log(chip, | |
1075 | "PD message too long %d (incl. header)", len); | |
1076 | return -EINVAL; | |
1077 | } | |
1078 | /* packsym tells the FUSB302 chip that the next X bytes are payload */ | |
1079 | buf[pos++] = FUSB302_TKN_PACKSYM | (len & 0x1F); | |
b9e8caa7 FK |
1080 | memcpy(&buf[pos], &msg->header, sizeof(msg->header)); |
1081 | pos += sizeof(msg->header); | |
c034a43e YZ |
1082 | |
1083 | len -= 2; | |
1084 | memcpy(&buf[pos], msg->payload, len); | |
1085 | pos += len; | |
1086 | ||
1087 | /* CRC */ | |
1088 | buf[pos++] = FUSB302_TKN_JAMCRC; | |
1089 | /* EOP */ | |
1090 | buf[pos++] = FUSB302_TKN_EOP; | |
1091 | /* turn tx off after sending message */ | |
1092 | buf[pos++] = FUSB302_TKN_TXOFF; | |
1093 | /* start transmission */ | |
1094 | buf[pos++] = FUSB302_TKN_TXON; | |
1095 | ||
1096 | ret = fusb302_i2c_block_write(chip, FUSB_REG_FIFOS, pos, buf); | |
1097 | if (ret < 0) | |
1098 | return ret; | |
1099 | fusb302_log(chip, "sending PD message header: %x", msg->header); | |
1100 | fusb302_log(chip, "sending PD message len: %d", len); | |
1101 | ||
1102 | return ret; | |
1103 | } | |
1104 | ||
1105 | static int fusb302_pd_send_hardreset(struct fusb302_chip *chip) | |
1106 | { | |
1107 | return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL3, | |
1108 | FUSB_REG_CONTROL3_SEND_HARDRESET); | |
1109 | } | |
1110 | ||
1111 | static const char * const transmit_type_name[] = { | |
1112 | [TCPC_TX_SOP] = "SOP", | |
1113 | [TCPC_TX_SOP_PRIME] = "SOP'", | |
1114 | [TCPC_TX_SOP_PRIME_PRIME] = "SOP''", | |
1115 | [TCPC_TX_SOP_DEBUG_PRIME] = "DEBUG'", | |
1116 | [TCPC_TX_SOP_DEBUG_PRIME_PRIME] = "DEBUG''", | |
1117 | [TCPC_TX_HARD_RESET] = "HARD_RESET", | |
1118 | [TCPC_TX_CABLE_RESET] = "CABLE_RESET", | |
1119 | [TCPC_TX_BIST_MODE_2] = "BIST_MODE_2", | |
1120 | }; | |
1121 | ||
1122 | static int tcpm_pd_transmit(struct tcpc_dev *dev, enum tcpm_transmit_type type, | |
1123 | const struct pd_message *msg) | |
1124 | { | |
1125 | struct fusb302_chip *chip = container_of(dev, struct fusb302_chip, | |
1126 | tcpc_dev); | |
1127 | int ret = 0; | |
1128 | ||
1129 | mutex_lock(&chip->lock); | |
1130 | switch (type) { | |
1131 | case TCPC_TX_SOP: | |
1132 | ret = fusb302_pd_send_message(chip, msg); | |
1133 | if (ret < 0) | |
1134 | fusb302_log(chip, | |
1135 | "cannot send PD message, ret=%d", ret); | |
1136 | break; | |
1137 | case TCPC_TX_HARD_RESET: | |
1138 | ret = fusb302_pd_send_hardreset(chip); | |
1139 | if (ret < 0) | |
1140 | fusb302_log(chip, | |
1141 | "cannot send hardreset, ret=%d", ret); | |
1142 | break; | |
1143 | default: | |
1144 | fusb302_log(chip, "type %s not supported", | |
1145 | transmit_type_name[type]); | |
1146 | ret = -EINVAL; | |
1147 | } | |
1148 | mutex_unlock(&chip->lock); | |
1149 | ||
1150 | return ret; | |
1151 | } | |
1152 | ||
1153 | static enum typec_cc_status fusb302_bc_lvl_to_cc(u8 bc_lvl) | |
1154 | { | |
1155 | if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_1230_MAX) | |
1156 | return TYPEC_CC_RP_3_0; | |
1157 | if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_600_1230) | |
1158 | return TYPEC_CC_RP_1_5; | |
1159 | if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_200_600) | |
1160 | return TYPEC_CC_RP_DEF; | |
1161 | return TYPEC_CC_OPEN; | |
1162 | } | |
1163 | ||
1164 | static void fusb302_bc_lvl_handler_work(struct work_struct *work) | |
1165 | { | |
1166 | struct fusb302_chip *chip = container_of(work, struct fusb302_chip, | |
1167 | bc_lvl_handler.work); | |
1168 | int ret = 0; | |
1169 | u8 status0; | |
1170 | u8 bc_lvl; | |
1171 | enum typec_cc_status cc_status; | |
1172 | ||
1173 | mutex_lock(&chip->lock); | |
1174 | if (!chip->intr_bc_lvl) { | |
1175 | fusb302_log(chip, "BC_LVL interrupt is turned off, abort"); | |
1176 | goto done; | |
1177 | } | |
1178 | ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0); | |
1179 | if (ret < 0) | |
1180 | goto done; | |
1181 | fusb302_log(chip, "BC_LVL handler, status0=0x%02x", status0); | |
1182 | if (status0 & FUSB_REG_STATUS0_ACTIVITY) { | |
1183 | fusb302_log(chip, "CC activities detected, delay handling"); | |
1184 | mod_delayed_work(chip->wq, &chip->bc_lvl_handler, | |
1185 | msecs_to_jiffies(T_BC_LVL_DEBOUNCE_DELAY_MS)); | |
1186 | goto done; | |
1187 | } | |
1188 | bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK; | |
1189 | cc_status = fusb302_bc_lvl_to_cc(bc_lvl); | |
1190 | if (chip->cc_polarity == TYPEC_POLARITY_CC1) { | |
1191 | if (chip->cc1 != cc_status) { | |
1192 | fusb302_log(chip, "cc1: %s -> %s", | |
1193 | typec_cc_status_name[chip->cc1], | |
1194 | typec_cc_status_name[cc_status]); | |
1195 | chip->cc1 = cc_status; | |
1196 | tcpm_cc_change(chip->tcpm_port); | |
1197 | } | |
1198 | } else { | |
1199 | if (chip->cc2 != cc_status) { | |
1200 | fusb302_log(chip, "cc2: %s -> %s", | |
1201 | typec_cc_status_name[chip->cc2], | |
1202 | typec_cc_status_name[cc_status]); | |
1203 | chip->cc2 = cc_status; | |
1204 | tcpm_cc_change(chip->tcpm_port); | |
1205 | } | |
1206 | } | |
1207 | ||
1208 | done: | |
1209 | mutex_unlock(&chip->lock); | |
1210 | } | |
1211 | ||
1212 | #define PDO_FIXED_FLAGS \ | |
1213 | (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP | PDO_FIXED_USB_COMM) | |
1214 | ||
1215 | static const u32 src_pdo[] = { | |
1216 | PDO_FIXED(5000, 400, PDO_FIXED_FLAGS), | |
1217 | }; | |
1218 | ||
1219 | static const u32 snk_pdo[] = { | |
1220 | PDO_FIXED(5000, 400, PDO_FIXED_FLAGS), | |
1221 | }; | |
1222 | ||
1223 | static const struct tcpc_config fusb302_tcpc_config = { | |
1224 | .src_pdo = src_pdo, | |
1225 | .nr_src_pdo = ARRAY_SIZE(src_pdo), | |
1226 | .snk_pdo = snk_pdo, | |
1227 | .nr_snk_pdo = ARRAY_SIZE(snk_pdo), | |
9a8fc4dd | 1228 | .max_snk_mv = 5000, |
c034a43e | 1229 | .max_snk_ma = 3000, |
9a8fc4dd | 1230 | .max_snk_mw = 15000, |
c034a43e YZ |
1231 | .operating_snk_mw = 2500, |
1232 | .type = TYPEC_PORT_DRP, | |
1233 | .default_role = TYPEC_SINK, | |
1234 | .alt_modes = NULL, | |
1235 | }; | |
1236 | ||
1237 | static void init_tcpc_dev(struct tcpc_dev *fusb302_tcpc_dev) | |
1238 | { | |
c034a43e YZ |
1239 | fusb302_tcpc_dev->init = tcpm_init; |
1240 | fusb302_tcpc_dev->get_vbus = tcpm_get_vbus; | |
382099d6 | 1241 | fusb302_tcpc_dev->get_current_limit = tcpm_get_current_limit; |
c034a43e YZ |
1242 | fusb302_tcpc_dev->set_cc = tcpm_set_cc; |
1243 | fusb302_tcpc_dev->get_cc = tcpm_get_cc; | |
1244 | fusb302_tcpc_dev->set_polarity = tcpm_set_polarity; | |
1245 | fusb302_tcpc_dev->set_vconn = tcpm_set_vconn; | |
1246 | fusb302_tcpc_dev->set_vbus = tcpm_set_vbus; | |
1247 | fusb302_tcpc_dev->set_current_limit = tcpm_set_current_limit; | |
1248 | fusb302_tcpc_dev->set_pd_rx = tcpm_set_pd_rx; | |
1249 | fusb302_tcpc_dev->set_roles = tcpm_set_roles; | |
1250 | fusb302_tcpc_dev->start_drp_toggling = tcpm_start_drp_toggling; | |
1251 | fusb302_tcpc_dev->pd_transmit = tcpm_pd_transmit; | |
1252 | fusb302_tcpc_dev->mux = NULL; | |
1253 | } | |
1254 | ||
1255 | static const char * const cc_polarity_name[] = { | |
1256 | [TYPEC_POLARITY_CC1] = "Polarity_CC1", | |
1257 | [TYPEC_POLARITY_CC2] = "Polarity_CC2", | |
1258 | }; | |
1259 | ||
1260 | static int fusb302_set_cc_polarity(struct fusb302_chip *chip, | |
1261 | enum typec_cc_polarity cc_polarity) | |
1262 | { | |
1263 | int ret = 0; | |
1264 | u8 switches0_mask = FUSB_REG_SWITCHES0_CC1_PU_EN | | |
1265 | FUSB_REG_SWITCHES0_CC2_PU_EN | | |
1266 | FUSB_REG_SWITCHES0_VCONN_CC1 | | |
1267 | FUSB_REG_SWITCHES0_VCONN_CC2 | | |
1268 | FUSB_REG_SWITCHES0_MEAS_CC1 | | |
1269 | FUSB_REG_SWITCHES0_MEAS_CC2; | |
1270 | u8 switches0_data = 0x00; | |
1271 | u8 switches1_mask = FUSB_REG_SWITCHES1_TXCC1_EN | | |
1272 | FUSB_REG_SWITCHES1_TXCC2_EN; | |
1273 | u8 switches1_data = 0x00; | |
1274 | ||
1275 | if (cc_polarity == TYPEC_POLARITY_CC1) { | |
1276 | switches0_data = FUSB_REG_SWITCHES0_MEAS_CC1; | |
1277 | if (chip->vconn_on) | |
1278 | switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC2; | |
1279 | if (chip->pull_up) | |
1280 | switches0_data |= FUSB_REG_SWITCHES0_CC1_PU_EN; | |
1281 | switches1_data = FUSB_REG_SWITCHES1_TXCC1_EN; | |
1282 | } else { | |
1283 | switches0_data = FUSB_REG_SWITCHES0_MEAS_CC2; | |
1284 | if (chip->vconn_on) | |
1285 | switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC1; | |
1286 | if (chip->pull_up) | |
1287 | switches0_data |= FUSB_REG_SWITCHES0_CC2_PU_EN; | |
1288 | switches1_data = FUSB_REG_SWITCHES1_TXCC2_EN; | |
1289 | } | |
1290 | ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES0, | |
1291 | switches0_mask, switches0_data); | |
1292 | if (ret < 0) | |
1293 | return ret; | |
1294 | ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES1, | |
1295 | switches1_mask, switches1_data); | |
1296 | if (ret < 0) | |
1297 | return ret; | |
1298 | chip->cc_polarity = cc_polarity; | |
1299 | ||
1300 | return ret; | |
1301 | } | |
1302 | ||
1303 | static int fusb302_handle_togdone_snk(struct fusb302_chip *chip, | |
1304 | u8 togdone_result) | |
1305 | { | |
1306 | int ret = 0; | |
1307 | u8 status0; | |
1308 | u8 bc_lvl; | |
1309 | enum typec_cc_polarity cc_polarity; | |
1310 | enum typec_cc_status cc_status_active, cc1, cc2; | |
1311 | ||
1312 | /* set pull_up, pull_down */ | |
1313 | ret = fusb302_set_cc_pull(chip, false, true); | |
1314 | if (ret < 0) { | |
1315 | fusb302_log(chip, "cannot set cc to pull down, ret=%d", ret); | |
1316 | return ret; | |
1317 | } | |
1318 | /* set polarity */ | |
1319 | cc_polarity = (togdone_result == FUSB_REG_STATUS1A_TOGSS_SNK1) ? | |
1320 | TYPEC_POLARITY_CC1 : TYPEC_POLARITY_CC2; | |
1321 | ret = fusb302_set_cc_polarity(chip, cc_polarity); | |
1322 | if (ret < 0) { | |
1323 | fusb302_log(chip, "cannot set cc polarity %s, ret=%d", | |
1324 | cc_polarity_name[cc_polarity], ret); | |
1325 | return ret; | |
1326 | } | |
1327 | /* fusb302_set_cc_polarity() has set the correct measure block */ | |
1328 | ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0); | |
1329 | if (ret < 0) | |
1330 | return ret; | |
1331 | bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK; | |
1332 | cc_status_active = fusb302_bc_lvl_to_cc(bc_lvl); | |
1333 | /* restart toggling if the cc status on the active line is OPEN */ | |
1334 | if (cc_status_active == TYPEC_CC_OPEN) { | |
1335 | fusb302_log(chip, "restart toggling as CC_OPEN detected"); | |
1336 | ret = fusb302_set_toggling(chip, chip->toggling_mode); | |
1337 | return ret; | |
1338 | } | |
1339 | /* update tcpm with the new cc value */ | |
1340 | cc1 = (cc_polarity == TYPEC_POLARITY_CC1) ? | |
1341 | cc_status_active : TYPEC_CC_OPEN; | |
1342 | cc2 = (cc_polarity == TYPEC_POLARITY_CC2) ? | |
1343 | cc_status_active : TYPEC_CC_OPEN; | |
1344 | if ((chip->cc1 != cc1) || (chip->cc2 != cc2)) { | |
1345 | chip->cc1 = cc1; | |
1346 | chip->cc2 = cc2; | |
1347 | tcpm_cc_change(chip->tcpm_port); | |
1348 | } | |
1349 | /* turn off toggling */ | |
1350 | ret = fusb302_set_toggling(chip, TOGGLINE_MODE_OFF); | |
1351 | if (ret < 0) { | |
1352 | fusb302_log(chip, | |
1353 | "cannot set toggling mode off, ret=%d", ret); | |
1354 | return ret; | |
1355 | } | |
1356 | /* unmask bc_lvl interrupt */ | |
1357 | ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASK, FUSB_REG_MASK_BC_LVL); | |
1358 | if (ret < 0) { | |
1359 | fusb302_log(chip, | |
1360 | "cannot unmask bc_lcl interrupt, ret=%d", ret); | |
1361 | return ret; | |
1362 | } | |
1363 | chip->intr_bc_lvl = true; | |
1364 | fusb302_log(chip, "detected cc1=%s, cc2=%s", | |
1365 | typec_cc_status_name[cc1], | |
1366 | typec_cc_status_name[cc2]); | |
1367 | ||
1368 | return ret; | |
1369 | } | |
1370 | ||
1371 | static int fusb302_handle_togdone_src(struct fusb302_chip *chip, | |
1372 | u8 togdone_result) | |
1373 | { | |
1374 | /* | |
1375 | * - set polarity (measure cc, vconn, tx) | |
1376 | * - set pull_up, pull_down | |
1377 | * - set cc1, cc2, and update to tcpm_port | |
1378 | * - set I_COMP interrupt on | |
1379 | */ | |
1380 | int ret = 0; | |
1381 | u8 status0; | |
1382 | u8 ra_mda = ra_mda_value[chip->src_current_status]; | |
1383 | u8 rd_mda = rd_mda_value[chip->src_current_status]; | |
1384 | bool ra_comp, rd_comp; | |
1385 | enum typec_cc_polarity cc_polarity; | |
1386 | enum typec_cc_status cc_status_active, cc1, cc2; | |
1387 | ||
1388 | /* set pull_up, pull_down */ | |
1389 | ret = fusb302_set_cc_pull(chip, true, false); | |
1390 | if (ret < 0) { | |
1391 | fusb302_log(chip, "cannot set cc to pull up, ret=%d", ret); | |
1392 | return ret; | |
1393 | } | |
1394 | /* set polarity */ | |
1395 | cc_polarity = (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1) ? | |
1396 | TYPEC_POLARITY_CC1 : TYPEC_POLARITY_CC2; | |
1397 | ret = fusb302_set_cc_polarity(chip, cc_polarity); | |
1398 | if (ret < 0) { | |
1399 | fusb302_log(chip, "cannot set cc polarity %s, ret=%d", | |
1400 | cc_polarity_name[cc_polarity], ret); | |
1401 | return ret; | |
1402 | } | |
1403 | /* fusb302_set_cc_polarity() has set the correct measure block */ | |
1404 | ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda); | |
1405 | if (ret < 0) | |
1406 | return ret; | |
1407 | usleep_range(50, 100); | |
1408 | ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0); | |
1409 | if (ret < 0) | |
1410 | return ret; | |
1411 | rd_comp = !!(status0 & FUSB_REG_STATUS0_COMP); | |
1412 | if (!rd_comp) { | |
1413 | ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, ra_mda); | |
1414 | if (ret < 0) | |
1415 | return ret; | |
1416 | usleep_range(50, 100); | |
1417 | ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0); | |
1418 | if (ret < 0) | |
1419 | return ret; | |
1420 | ra_comp = !!(status0 & FUSB_REG_STATUS0_COMP); | |
1421 | } | |
1422 | if (rd_comp) | |
1423 | cc_status_active = TYPEC_CC_OPEN; | |
1424 | else if (ra_comp) | |
1425 | cc_status_active = TYPEC_CC_RD; | |
1426 | else | |
1427 | /* Ra is not supported, report as Open */ | |
1428 | cc_status_active = TYPEC_CC_OPEN; | |
1429 | /* restart toggling if the cc status on the active line is OPEN */ | |
1430 | if (cc_status_active == TYPEC_CC_OPEN) { | |
1431 | fusb302_log(chip, "restart toggling as CC_OPEN detected"); | |
1432 | ret = fusb302_set_toggling(chip, chip->toggling_mode); | |
1433 | return ret; | |
1434 | } | |
1435 | /* update tcpm with the new cc value */ | |
1436 | cc1 = (cc_polarity == TYPEC_POLARITY_CC1) ? | |
1437 | cc_status_active : TYPEC_CC_OPEN; | |
1438 | cc2 = (cc_polarity == TYPEC_POLARITY_CC2) ? | |
1439 | cc_status_active : TYPEC_CC_OPEN; | |
1440 | if ((chip->cc1 != cc1) || (chip->cc2 != cc2)) { | |
1441 | chip->cc1 = cc1; | |
1442 | chip->cc2 = cc2; | |
1443 | tcpm_cc_change(chip->tcpm_port); | |
1444 | } | |
1445 | /* turn off toggling */ | |
1446 | ret = fusb302_set_toggling(chip, TOGGLINE_MODE_OFF); | |
1447 | if (ret < 0) { | |
1448 | fusb302_log(chip, | |
1449 | "cannot set toggling mode off, ret=%d", ret); | |
1450 | return ret; | |
1451 | } | |
1452 | /* set MDAC to Rd threshold, and unmask I_COMP for unplug detection */ | |
1453 | ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda); | |
1454 | if (ret < 0) | |
1455 | return ret; | |
1456 | /* unmask comp_chng interrupt */ | |
1457 | ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASK, | |
1458 | FUSB_REG_MASK_COMP_CHNG); | |
1459 | if (ret < 0) { | |
1460 | fusb302_log(chip, | |
1461 | "cannot unmask bc_lcl interrupt, ret=%d", ret); | |
1462 | return ret; | |
1463 | } | |
1464 | chip->intr_comp_chng = true; | |
1465 | fusb302_log(chip, "detected cc1=%s, cc2=%s", | |
1466 | typec_cc_status_name[cc1], | |
1467 | typec_cc_status_name[cc2]); | |
1468 | ||
1469 | return ret; | |
1470 | } | |
1471 | ||
1472 | static int fusb302_handle_togdone(struct fusb302_chip *chip) | |
1473 | { | |
1474 | int ret = 0; | |
1475 | u8 status1a; | |
1476 | u8 togdone_result; | |
1477 | ||
1478 | ret = fusb302_i2c_read(chip, FUSB_REG_STATUS1A, &status1a); | |
1479 | if (ret < 0) | |
1480 | return ret; | |
1481 | togdone_result = (status1a >> FUSB_REG_STATUS1A_TOGSS_POS) & | |
1482 | FUSB_REG_STATUS1A_TOGSS_MASK; | |
1483 | switch (togdone_result) { | |
1484 | case FUSB_REG_STATUS1A_TOGSS_SNK1: | |
1485 | case FUSB_REG_STATUS1A_TOGSS_SNK2: | |
1486 | return fusb302_handle_togdone_snk(chip, togdone_result); | |
1487 | case FUSB_REG_STATUS1A_TOGSS_SRC1: | |
1488 | case FUSB_REG_STATUS1A_TOGSS_SRC2: | |
1489 | return fusb302_handle_togdone_src(chip, togdone_result); | |
1490 | case FUSB_REG_STATUS1A_TOGSS_AA: | |
1491 | /* doesn't support */ | |
1492 | fusb302_log(chip, "AudioAccessory not supported"); | |
1493 | fusb302_set_toggling(chip, chip->toggling_mode); | |
1494 | break; | |
1495 | default: | |
1496 | fusb302_log(chip, "TOGDONE with an invalid state: %d", | |
1497 | togdone_result); | |
1498 | fusb302_set_toggling(chip, chip->toggling_mode); | |
1499 | break; | |
1500 | } | |
1501 | return ret; | |
1502 | } | |
1503 | ||
1504 | static int fusb302_pd_reset(struct fusb302_chip *chip) | |
1505 | { | |
1506 | return fusb302_i2c_set_bits(chip, FUSB_REG_RESET, | |
1507 | FUSB_REG_RESET_PD_RESET); | |
1508 | } | |
1509 | ||
1510 | static int fusb302_pd_read_message(struct fusb302_chip *chip, | |
1511 | struct pd_message *msg) | |
1512 | { | |
1513 | int ret = 0; | |
1514 | u8 token; | |
1515 | u8 crc[4]; | |
1516 | int len; | |
1517 | ||
1518 | /* first SOP token */ | |
1519 | ret = fusb302_i2c_read(chip, FUSB_REG_FIFOS, &token); | |
1520 | if (ret < 0) | |
1521 | return ret; | |
1522 | ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, 2, | |
1523 | (u8 *)&msg->header); | |
1524 | if (ret < 0) | |
1525 | return ret; | |
f03d95f5 | 1526 | len = pd_header_cnt_le(msg->header) * 4; |
c034a43e YZ |
1527 | /* add 4 to length to include the CRC */ |
1528 | if (len > PD_MAX_PAYLOAD * 4) { | |
1529 | fusb302_log(chip, "PD message too long %d", len); | |
1530 | return -EINVAL; | |
1531 | } | |
1532 | if (len > 0) { | |
1533 | ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, len, | |
1534 | (u8 *)msg->payload); | |
1535 | if (ret < 0) | |
1536 | return ret; | |
1537 | } | |
1538 | /* another 4 bytes to read CRC out */ | |
1539 | ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, 4, crc); | |
1540 | if (ret < 0) | |
1541 | return ret; | |
1542 | fusb302_log(chip, "PD message header: %x", msg->header); | |
1543 | fusb302_log(chip, "PD message len: %d", len); | |
1544 | ||
ab69f613 AT |
1545 | /* |
1546 | * Check if we've read off a GoodCRC message. If so then indicate to | |
1547 | * TCPM that the previous transmission has completed. Otherwise we pass | |
1548 | * the received message over to TCPM for processing. | |
1549 | * | |
1550 | * We make this check here instead of basing the reporting decision on | |
1551 | * the IRQ event type, as it's possible for the chip to report the | |
1552 | * TX_SUCCESS and GCRCSENT events out of order on occasion, so we need | |
1553 | * to check the message type to ensure correct reporting to TCPM. | |
1554 | */ | |
1555 | if ((!len) && (pd_header_type_le(msg->header) == PD_CTRL_GOOD_CRC)) | |
1556 | tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_SUCCESS); | |
1557 | else | |
1558 | tcpm_pd_receive(chip->tcpm_port, msg); | |
1559 | ||
c034a43e YZ |
1560 | return ret; |
1561 | } | |
1562 | ||
1563 | static irqreturn_t fusb302_irq_intn(int irq, void *dev_id) | |
1564 | { | |
1565 | struct fusb302_chip *chip = dev_id; | |
1566 | int ret = 0; | |
1567 | u8 interrupt; | |
1568 | u8 interrupta; | |
1569 | u8 interruptb; | |
1570 | u8 status0; | |
1571 | bool vbus_present; | |
1572 | bool comp_result; | |
1573 | bool intr_togdone; | |
1574 | bool intr_bc_lvl; | |
1575 | bool intr_comp_chng; | |
1576 | struct pd_message pd_msg; | |
1577 | ||
1578 | mutex_lock(&chip->lock); | |
1579 | /* grab a snapshot of intr flags */ | |
1580 | intr_togdone = chip->intr_togdone; | |
1581 | intr_bc_lvl = chip->intr_bc_lvl; | |
1582 | intr_comp_chng = chip->intr_comp_chng; | |
1583 | ||
1584 | ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPT, &interrupt); | |
1585 | if (ret < 0) | |
1586 | goto done; | |
1587 | ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPTA, &interrupta); | |
1588 | if (ret < 0) | |
1589 | goto done; | |
1590 | ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPTB, &interruptb); | |
1591 | if (ret < 0) | |
1592 | goto done; | |
1593 | ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0); | |
1594 | if (ret < 0) | |
1595 | goto done; | |
1596 | fusb302_log(chip, | |
1597 | "IRQ: 0x%02x, a: 0x%02x, b: 0x%02x, status0: 0x%02x", | |
1598 | interrupt, interrupta, interruptb, status0); | |
1599 | ||
1600 | if (interrupt & FUSB_REG_INTERRUPT_VBUSOK) { | |
1601 | vbus_present = !!(status0 & FUSB_REG_STATUS0_VBUSOK); | |
1602 | fusb302_log(chip, "IRQ: VBUS_OK, vbus=%s", | |
1603 | vbus_present ? "On" : "Off"); | |
1604 | if (vbus_present != chip->vbus_present) { | |
1605 | chip->vbus_present = vbus_present; | |
1606 | tcpm_vbus_change(chip->tcpm_port); | |
1607 | } | |
1608 | } | |
1609 | ||
1610 | if ((interrupta & FUSB_REG_INTERRUPTA_TOGDONE) && intr_togdone) { | |
1611 | fusb302_log(chip, "IRQ: TOGDONE"); | |
1612 | ret = fusb302_handle_togdone(chip); | |
1613 | if (ret < 0) { | |
1614 | fusb302_log(chip, | |
1615 | "handle togdone error, ret=%d", ret); | |
1616 | goto done; | |
1617 | } | |
1618 | } | |
1619 | ||
1620 | if ((interrupt & FUSB_REG_INTERRUPT_BC_LVL) && intr_bc_lvl) { | |
1621 | fusb302_log(chip, "IRQ: BC_LVL, handler pending"); | |
1622 | /* | |
1623 | * as BC_LVL interrupt can be affected by PD activity, | |
1624 | * apply delay to for the handler to wait for the PD | |
1625 | * signaling to finish. | |
1626 | */ | |
1627 | mod_delayed_work(chip->wq, &chip->bc_lvl_handler, | |
1628 | msecs_to_jiffies(T_BC_LVL_DEBOUNCE_DELAY_MS)); | |
1629 | } | |
1630 | ||
1631 | if ((interrupt & FUSB_REG_INTERRUPT_COMP_CHNG) && intr_comp_chng) { | |
1632 | comp_result = !!(status0 & FUSB_REG_STATUS0_COMP); | |
1633 | fusb302_log(chip, "IRQ: COMP_CHNG, comp=%s", | |
1634 | comp_result ? "true" : "false"); | |
1635 | if (comp_result) { | |
1636 | /* cc level > Rd_threashold, detach */ | |
1637 | if (chip->cc_polarity == TYPEC_POLARITY_CC1) | |
1638 | chip->cc1 = TYPEC_CC_OPEN; | |
1639 | else | |
1640 | chip->cc2 = TYPEC_CC_OPEN; | |
1641 | tcpm_cc_change(chip->tcpm_port); | |
1642 | } | |
1643 | } | |
1644 | ||
1645 | if (interrupt & FUSB_REG_INTERRUPT_COLLISION) { | |
1646 | fusb302_log(chip, "IRQ: PD collision"); | |
1647 | tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_FAILED); | |
1648 | } | |
1649 | ||
1650 | if (interrupta & FUSB_REG_INTERRUPTA_RETRYFAIL) { | |
1651 | fusb302_log(chip, "IRQ: PD retry failed"); | |
1652 | tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_FAILED); | |
1653 | } | |
1654 | ||
1655 | if (interrupta & FUSB_REG_INTERRUPTA_HARDSENT) { | |
1656 | fusb302_log(chip, "IRQ: PD hardreset sent"); | |
1657 | ret = fusb302_pd_reset(chip); | |
1658 | if (ret < 0) { | |
1659 | fusb302_log(chip, "cannot PD reset, ret=%d", ret); | |
1660 | goto done; | |
1661 | } | |
1662 | tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_SUCCESS); | |
1663 | } | |
1664 | ||
1665 | if (interrupta & FUSB_REG_INTERRUPTA_TX_SUCCESS) { | |
1666 | fusb302_log(chip, "IRQ: PD tx success"); | |
c034a43e YZ |
1667 | ret = fusb302_pd_read_message(chip, &pd_msg); |
1668 | if (ret < 0) { | |
ab69f613 AT |
1669 | fusb302_log(chip, |
1670 | "cannot read in PD message, ret=%d", ret); | |
c034a43e YZ |
1671 | goto done; |
1672 | } | |
c034a43e YZ |
1673 | } |
1674 | ||
1675 | if (interrupta & FUSB_REG_INTERRUPTA_HARDRESET) { | |
1676 | fusb302_log(chip, "IRQ: PD received hardreset"); | |
1677 | ret = fusb302_pd_reset(chip); | |
1678 | if (ret < 0) { | |
1679 | fusb302_log(chip, "cannot PD reset, ret=%d", ret); | |
1680 | goto done; | |
1681 | } | |
1682 | tcpm_pd_hard_reset(chip->tcpm_port); | |
1683 | } | |
1684 | ||
1685 | if (interruptb & FUSB_REG_INTERRUPTB_GCRCSENT) { | |
1686 | fusb302_log(chip, "IRQ: PD sent good CRC"); | |
1687 | ret = fusb302_pd_read_message(chip, &pd_msg); | |
1688 | if (ret < 0) { | |
1689 | fusb302_log(chip, | |
1690 | "cannot read in PD message, ret=%d", ret); | |
1691 | goto done; | |
1692 | } | |
c034a43e YZ |
1693 | } |
1694 | done: | |
1695 | mutex_unlock(&chip->lock); | |
1696 | ||
1697 | return IRQ_HANDLED; | |
1698 | } | |
1699 | ||
4046c06f HG |
1700 | static int fusb302_psy_get_property(struct power_supply *psy, |
1701 | enum power_supply_property psp, | |
1702 | union power_supply_propval *val) | |
1703 | { | |
1704 | struct fusb302_chip *chip = power_supply_get_drvdata(psy); | |
1705 | ||
1706 | switch (psp) { | |
1707 | case POWER_SUPPLY_PROP_ONLINE: | |
1708 | val->intval = chip->charge_on; | |
1709 | break; | |
1710 | case POWER_SUPPLY_PROP_VOLTAGE_NOW: | |
1711 | val->intval = chip->supply_voltage * 1000; /* mV -> µV */ | |
1712 | break; | |
1713 | case POWER_SUPPLY_PROP_CURRENT_MAX: | |
1714 | val->intval = chip->current_limit * 1000; /* mA -> µA */ | |
1715 | break; | |
1716 | default: | |
1717 | return -ENODATA; | |
1718 | } | |
1719 | ||
1720 | return 0; | |
1721 | } | |
1722 | ||
1723 | static enum power_supply_property fusb302_psy_properties[] = { | |
1724 | POWER_SUPPLY_PROP_ONLINE, | |
1725 | POWER_SUPPLY_PROP_VOLTAGE_NOW, | |
1726 | POWER_SUPPLY_PROP_CURRENT_MAX, | |
1727 | }; | |
1728 | ||
9ea859b1 | 1729 | static const struct power_supply_desc fusb302_psy_desc = { |
4046c06f HG |
1730 | .name = "fusb302-typec-source", |
1731 | .type = POWER_SUPPLY_TYPE_USB_TYPE_C, | |
1732 | .properties = fusb302_psy_properties, | |
1733 | .num_properties = ARRAY_SIZE(fusb302_psy_properties), | |
1734 | .get_property = fusb302_psy_get_property, | |
1735 | }; | |
1736 | ||
c034a43e YZ |
1737 | static int init_gpio(struct fusb302_chip *chip) |
1738 | { | |
1739 | struct device_node *node; | |
1740 | int ret = 0; | |
1741 | ||
1742 | node = chip->dev->of_node; | |
1743 | chip->gpio_int_n = of_get_named_gpio(node, "fcs,int_n", 0); | |
1744 | if (!gpio_is_valid(chip->gpio_int_n)) { | |
1745 | ret = chip->gpio_int_n; | |
cf140a35 | 1746 | dev_err(chip->dev, "cannot get named GPIO Int_N, ret=%d", ret); |
c034a43e YZ |
1747 | return ret; |
1748 | } | |
1749 | ret = devm_gpio_request(chip->dev, chip->gpio_int_n, "fcs,int_n"); | |
1750 | if (ret < 0) { | |
cf140a35 | 1751 | dev_err(chip->dev, "cannot request GPIO Int_N, ret=%d", ret); |
c034a43e YZ |
1752 | return ret; |
1753 | } | |
1754 | ret = gpio_direction_input(chip->gpio_int_n); | |
1755 | if (ret < 0) { | |
cf140a35 MK |
1756 | dev_err(chip->dev, |
1757 | "cannot set GPIO Int_N to input, ret=%d", ret); | |
c034a43e YZ |
1758 | return ret; |
1759 | } | |
1760 | ret = gpio_to_irq(chip->gpio_int_n); | |
1761 | if (ret < 0) { | |
cf140a35 MK |
1762 | dev_err(chip->dev, |
1763 | "cannot request IRQ for GPIO Int_N, ret=%d", ret); | |
c034a43e YZ |
1764 | return ret; |
1765 | } | |
1766 | chip->gpio_int_n_irq = ret; | |
1767 | return 0; | |
1768 | } | |
1769 | ||
1770 | static int fusb302_probe(struct i2c_client *client, | |
1771 | const struct i2c_device_id *id) | |
1772 | { | |
1773 | struct fusb302_chip *chip; | |
1774 | struct i2c_adapter *adapter; | |
097578ec | 1775 | struct device *dev = &client->dev; |
4046c06f | 1776 | struct power_supply_config cfg = {}; |
382099d6 | 1777 | const char *name; |
c034a43e | 1778 | int ret = 0; |
097578ec | 1779 | u32 v; |
c034a43e YZ |
1780 | |
1781 | adapter = to_i2c_adapter(client->dev.parent); | |
1782 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { | |
1783 | dev_err(&client->dev, | |
1784 | "I2C/SMBus block functionality not supported!\n"); | |
1785 | return -ENODEV; | |
1786 | } | |
1787 | chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); | |
1788 | if (!chip) | |
1789 | return -ENOMEM; | |
1790 | ||
1791 | chip->i2c_client = client; | |
1792 | i2c_set_clientdata(client, chip); | |
1793 | chip->dev = &client->dev; | |
097578ec HG |
1794 | chip->tcpc_config = fusb302_tcpc_config; |
1795 | chip->tcpc_dev.config = &chip->tcpc_config; | |
c034a43e YZ |
1796 | mutex_init(&chip->lock); |
1797 | ||
097578ec HG |
1798 | if (!device_property_read_u32(dev, "fcs,max-sink-microvolt", &v)) |
1799 | chip->tcpc_config.max_snk_mv = v / 1000; | |
1800 | ||
1801 | if (!device_property_read_u32(dev, "fcs,max-sink-microamp", &v)) | |
1802 | chip->tcpc_config.max_snk_ma = v / 1000; | |
1803 | ||
1804 | if (!device_property_read_u32(dev, "fcs,max-sink-microwatt", &v)) | |
1805 | chip->tcpc_config.max_snk_mw = v / 1000; | |
1806 | ||
1807 | if (!device_property_read_u32(dev, "fcs,operating-sink-microwatt", &v)) | |
1808 | chip->tcpc_config.operating_snk_mw = v / 1000; | |
1809 | ||
382099d6 HG |
1810 | /* |
1811 | * Devicetree platforms should get extcon via phandle (not yet | |
1812 | * supported). On ACPI platforms, we get the name from a device prop. | |
1813 | * This device prop is for kernel internal use only and is expected | |
1814 | * to be set by the platform code which also registers the i2c client | |
1815 | * for the fusb302. | |
1816 | */ | |
1817 | if (device_property_read_string(dev, "fcs,extcon-name", &name) == 0) { | |
1818 | chip->extcon = extcon_get_extcon_dev(name); | |
1819 | if (!chip->extcon) | |
1820 | return -EPROBE_DEFER; | |
1821 | } | |
1822 | ||
4046c06f HG |
1823 | cfg.drv_data = chip; |
1824 | chip->psy = devm_power_supply_register(dev, &fusb302_psy_desc, &cfg); | |
1825 | if (IS_ERR(chip->psy)) { | |
1826 | ret = PTR_ERR(chip->psy); | |
1827 | dev_err(chip->dev, "Error registering power-supply: %d\n", ret); | |
1828 | return ret; | |
1829 | } | |
1830 | ||
c034a43e YZ |
1831 | ret = fusb302_debugfs_init(chip); |
1832 | if (ret < 0) | |
1833 | return ret; | |
1834 | ||
1835 | chip->wq = create_singlethread_workqueue(dev_name(chip->dev)); | |
1836 | if (!chip->wq) { | |
1837 | ret = -ENOMEM; | |
1838 | goto clear_client_data; | |
1839 | } | |
1840 | INIT_DELAYED_WORK(&chip->bc_lvl_handler, fusb302_bc_lvl_handler_work); | |
1841 | init_tcpc_dev(&chip->tcpc_dev); | |
1842 | ||
1843 | chip->vbus = devm_regulator_get(chip->dev, "vbus"); | |
1844 | if (IS_ERR(chip->vbus)) { | |
1845 | ret = PTR_ERR(chip->vbus); | |
1846 | goto destroy_workqueue; | |
1847 | } | |
1848 | ||
4660e4ae HG |
1849 | if (client->irq) { |
1850 | chip->gpio_int_n_irq = client->irq; | |
1851 | } else { | |
1852 | ret = init_gpio(chip); | |
1853 | if (ret < 0) | |
1854 | goto destroy_workqueue; | |
1855 | } | |
c034a43e YZ |
1856 | |
1857 | chip->tcpm_port = tcpm_register_port(&client->dev, &chip->tcpc_dev); | |
1858 | if (IS_ERR(chip->tcpm_port)) { | |
1859 | ret = PTR_ERR(chip->tcpm_port); | |
7832f6d1 HG |
1860 | if (ret != -EPROBE_DEFER) |
1861 | dev_err(dev, "cannot register tcpm port, ret=%d", ret); | |
c034a43e YZ |
1862 | goto destroy_workqueue; |
1863 | } | |
1864 | ||
1865 | ret = devm_request_threaded_irq(chip->dev, chip->gpio_int_n_irq, | |
1866 | NULL, fusb302_irq_intn, | |
1867 | IRQF_ONESHOT | IRQF_TRIGGER_LOW, | |
1868 | "fsc_interrupt_int_n", chip); | |
1869 | if (ret < 0) { | |
cf140a35 | 1870 | dev_err(dev, "cannot request IRQ for GPIO Int_N, ret=%d", ret); |
c034a43e YZ |
1871 | goto tcpm_unregister_port; |
1872 | } | |
1873 | enable_irq_wake(chip->gpio_int_n_irq); | |
1874 | return ret; | |
1875 | ||
1876 | tcpm_unregister_port: | |
1877 | tcpm_unregister_port(chip->tcpm_port); | |
1878 | destroy_workqueue: | |
1879 | destroy_workqueue(chip->wq); | |
1880 | clear_client_data: | |
1881 | i2c_set_clientdata(client, NULL); | |
1882 | fusb302_debugfs_exit(chip); | |
1883 | ||
1884 | return ret; | |
1885 | } | |
1886 | ||
1887 | static int fusb302_remove(struct i2c_client *client) | |
1888 | { | |
1889 | struct fusb302_chip *chip = i2c_get_clientdata(client); | |
1890 | ||
1891 | tcpm_unregister_port(chip->tcpm_port); | |
1892 | destroy_workqueue(chip->wq); | |
1893 | i2c_set_clientdata(client, NULL); | |
1894 | fusb302_debugfs_exit(chip); | |
1895 | ||
1896 | return 0; | |
1897 | } | |
1898 | ||
1899 | static int fusb302_pm_suspend(struct device *dev) | |
1900 | { | |
1901 | struct fusb302_chip *chip = dev->driver_data; | |
1902 | ||
1903 | if (atomic_read(&chip->i2c_busy)) | |
1904 | return -EBUSY; | |
1905 | atomic_set(&chip->pm_suspend, 1); | |
1906 | ||
1907 | return 0; | |
1908 | } | |
1909 | ||
1910 | static int fusb302_pm_resume(struct device *dev) | |
1911 | { | |
1912 | struct fusb302_chip *chip = dev->driver_data; | |
1913 | ||
1914 | atomic_set(&chip->pm_suspend, 0); | |
1915 | ||
1916 | return 0; | |
1917 | } | |
1918 | ||
1919 | static const struct of_device_id fusb302_dt_match[] = { | |
1920 | {.compatible = "fcs,fusb302"}, | |
1921 | {}, | |
1922 | }; | |
227383f8 | 1923 | MODULE_DEVICE_TABLE(of, fusb302_dt_match); |
c034a43e YZ |
1924 | |
1925 | static const struct i2c_device_id fusb302_i2c_device_id[] = { | |
1926 | {"typec_fusb302", 0}, | |
1927 | {}, | |
1928 | }; | |
227383f8 | 1929 | MODULE_DEVICE_TABLE(i2c, fusb302_i2c_device_id); |
c034a43e YZ |
1930 | |
1931 | static const struct dev_pm_ops fusb302_pm_ops = { | |
1932 | .suspend = fusb302_pm_suspend, | |
1933 | .resume = fusb302_pm_resume, | |
1934 | }; | |
1935 | ||
1936 | static struct i2c_driver fusb302_driver = { | |
1937 | .driver = { | |
1938 | .name = "typec_fusb302", | |
1939 | .pm = &fusb302_pm_ops, | |
1940 | .of_match_table = of_match_ptr(fusb302_dt_match), | |
1941 | }, | |
1942 | .probe = fusb302_probe, | |
1943 | .remove = fusb302_remove, | |
1944 | .id_table = fusb302_i2c_device_id, | |
1945 | }; | |
1946 | module_i2c_driver(fusb302_driver); | |
1947 | ||
1948 | MODULE_AUTHOR("Yueyao Zhu <yueyao.zhu@gmail.com>"); | |
1949 | MODULE_DESCRIPTION("Fairchild FUSB302 Type-C Chip Driver"); | |
1950 | MODULE_LICENSE("GPL"); |