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vfio/pci: Enable virtual register in PCI config space
[mirror_ubuntu-artful-kernel.git] / drivers / vfio / pci / vfio_pci.c
CommitLineData
89e1f7d4
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1/*
2 * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
3 * Author: Alex Williamson <alex.williamson@redhat.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Derived from original vfio:
10 * Copyright 2010 Cisco Systems, Inc. All rights reserved.
11 * Author: Tom Lyon, pugs@cisco.com
12 */
13
80c7e8cc
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14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
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16#include <linux/device.h>
17#include <linux/eventfd.h>
8b27ee60 18#include <linux/file.h>
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19#include <linux/interrupt.h>
20#include <linux/iommu.h>
21#include <linux/module.h>
22#include <linux/mutex.h>
23#include <linux/notifier.h>
24#include <linux/pci.h>
25#include <linux/pm_runtime.h>
26#include <linux/slab.h>
27#include <linux/types.h>
28#include <linux/uaccess.h>
29#include <linux/vfio.h>
ecaa1f6a 30#include <linux/vgaarb.h>
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31
32#include "vfio_pci_private.h"
33
34#define DRIVER_VERSION "0.2"
35#define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>"
36#define DRIVER_DESC "VFIO PCI - User Level meta-driver"
37
80c7e8cc
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38static char ids[1024] __initdata;
39module_param_string(ids, ids, sizeof(ids), 0);
40MODULE_PARM_DESC(ids, "Initial PCI IDs to add to the vfio driver, format is \"vendor:device[:subvendor[:subdevice[:class[:class_mask]]]]\" and multiple comma separated entries can be specified");
41
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42static bool nointxmask;
43module_param_named(nointxmask, nointxmask, bool, S_IRUGO | S_IWUSR);
44MODULE_PARM_DESC(nointxmask,
45 "Disable support for PCI 2.3 style INTx masking. If this resolves problems for specific devices, report lspci -vvvxxx to linux-pci@vger.kernel.org so the device can be fixed automatically via the broken_intx_masking flag.");
46
88c0dead
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47#ifdef CONFIG_VFIO_PCI_VGA
48static bool disable_vga;
49module_param(disable_vga, bool, S_IRUGO);
50MODULE_PARM_DESC(disable_vga, "Disable VGA resource access through vfio-pci");
51#endif
52
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53static bool disable_idle_d3;
54module_param(disable_idle_d3, bool, S_IRUGO | S_IWUSR);
55MODULE_PARM_DESC(disable_idle_d3,
56 "Disable using the PCI D3 low power state for idle, unused devices");
57
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58static DEFINE_MUTEX(driver_lock);
59
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60static inline bool vfio_vga_disabled(void)
61{
62#ifdef CONFIG_VFIO_PCI_VGA
63 return disable_vga;
64#else
65 return true;
66#endif
67}
68
ecaa1f6a
AW
69/*
70 * Our VGA arbiter participation is limited since we don't know anything
71 * about the device itself. However, if the device is the only VGA device
72 * downstream of a bridge and VFIO VGA support is disabled, then we can
73 * safely return legacy VGA IO and memory as not decoded since the user
74 * has no way to get to it and routing can be disabled externally at the
75 * bridge.
76 */
77static unsigned int vfio_pci_set_vga_decode(void *opaque, bool single_vga)
78{
79 struct vfio_pci_device *vdev = opaque;
80 struct pci_dev *tmp = NULL, *pdev = vdev->pdev;
81 unsigned char max_busnr;
82 unsigned int decodes;
83
84 if (single_vga || !vfio_vga_disabled() || pci_is_root_bus(pdev->bus))
85 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
86 VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
87
88 max_busnr = pci_bus_max_busnr(pdev->bus);
89 decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
90
91 while ((tmp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, tmp)) != NULL) {
92 if (tmp == pdev ||
93 pci_domain_nr(tmp->bus) != pci_domain_nr(pdev->bus) ||
94 pci_is_root_bus(tmp->bus))
95 continue;
96
97 if (tmp->bus->number >= pdev->bus->number &&
98 tmp->bus->number <= max_busnr) {
99 pci_dev_put(tmp);
100 decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
101 break;
102 }
103 }
104
105 return decodes;
106}
107
108static inline bool vfio_pci_is_vga(struct pci_dev *pdev)
109{
110 return (pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA;
111}
112
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113static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev);
114
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115static int vfio_pci_enable(struct vfio_pci_device *vdev)
116{
117 struct pci_dev *pdev = vdev->pdev;
118 int ret;
119 u16 cmd;
120 u8 msix_pos;
121
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122 pci_set_power_state(pdev, PCI_D0);
123
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124 /* Don't allow our initial saved state to include busmaster */
125 pci_clear_master(pdev);
126
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127 ret = pci_enable_device(pdev);
128 if (ret)
129 return ret;
130
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131 vdev->reset_works = (pci_reset_function(pdev) == 0);
132 pci_save_state(pdev);
133 vdev->pci_saved_state = pci_store_saved_state(pdev);
134 if (!vdev->pci_saved_state)
135 pr_debug("%s: Couldn't store %s saved state\n",
136 __func__, dev_name(&pdev->dev));
137
138 ret = vfio_config_init(vdev);
9a92c509 139 if (ret) {
eb5685f0
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140 kfree(vdev->pci_saved_state);
141 vdev->pci_saved_state = NULL;
9a92c509
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142 pci_disable_device(pdev);
143 return ret;
144 }
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145
146 if (likely(!nointxmask))
147 vdev->pci_2_3 = pci_intx_mask_supported(pdev);
148
149 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
150 if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) {
151 cmd &= ~PCI_COMMAND_INTX_DISABLE;
152 pci_write_config_word(pdev, PCI_COMMAND, cmd);
153 }
154
a9047f24 155 msix_pos = pdev->msix_cap;
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156 if (msix_pos) {
157 u16 flags;
158 u32 table;
159
160 pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags);
161 pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table);
162
508d1aa6
BH
163 vdev->msix_bar = table & PCI_MSIX_TABLE_BIR;
164 vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET;
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165 vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16;
166 } else
167 vdev->msix_bar = 0xFF;
168
ecaa1f6a 169 if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev))
84237a82 170 vdev->has_vga = true;
84237a82 171
9a92c509 172 return 0;
89e1f7d4
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173}
174
175static void vfio_pci_disable(struct vfio_pci_device *vdev)
176{
2007722a 177 struct pci_dev *pdev = vdev->pdev;
28541d41 178 int i, bar;
89e1f7d4 179
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180 /* Stop the device from further DMA */
181 pci_clear_master(pdev);
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182
183 vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE |
184 VFIO_IRQ_SET_ACTION_TRIGGER,
185 vdev->irq_type, 0, 0, NULL);
186
187 vdev->virq_disabled = false;
188
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189 for (i = 0; i < vdev->num_regions; i++)
190 vdev->region[i].ops->release(vdev, &vdev->region[i]);
191
192 vdev->num_regions = 0;
193 kfree(vdev->region);
194 vdev->region = NULL; /* don't krealloc a freed pointer */
195
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196 vfio_config_free(vdev);
197
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198 for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
199 if (!vdev->barmap[bar])
200 continue;
2007722a
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201 pci_iounmap(pdev, vdev->barmap[bar]);
202 pci_release_selected_regions(pdev, 1 << bar);
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203 vdev->barmap[bar] = NULL;
204 }
2007722a 205
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206 vdev->needs_reset = true;
207
2007722a
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208 /*
209 * If we have saved state, restore it. If we can reset the device,
210 * even better. Resetting with current state seems better than
211 * nothing, but saving and restoring current state without reset
212 * is just busy work.
213 */
214 if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) {
215 pr_info("%s: Couldn't reload %s saved state\n",
216 __func__, dev_name(&pdev->dev));
217
218 if (!vdev->reset_works)
9c22e660 219 goto out;
2007722a
AW
220
221 pci_save_state(pdev);
222 }
223
224 /*
225 * Disable INTx and MSI, presumably to avoid spurious interrupts
226 * during reset. Stolen from pci_reset_function()
227 */
228 pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
229
d24cdbfd 230 /*
890ed578
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231 * Try to reset the device. The success of this is dependent on
232 * being able to lock the device, which is not always possible.
d24cdbfd 233 */
561d72dd
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234 if (vdev->reset_works && !pci_try_reset_function(pdev))
235 vdev->needs_reset = false;
2007722a
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236
237 pci_restore_state(pdev);
9c22e660
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238out:
239 pci_disable_device(pdev);
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240
241 vfio_pci_try_bus_reset(vdev);
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242
243 if (!disable_idle_d3)
244 pci_set_power_state(pdev, PCI_D3hot);
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245}
246
247static void vfio_pci_release(void *device_data)
248{
249 struct vfio_pci_device *vdev = device_data;
250
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251 mutex_lock(&driver_lock);
252
253 if (!(--vdev->refcnt)) {
1b69be5e 254 vfio_spapr_pci_eeh_release(vdev->pdev);
89e1f7d4 255 vfio_pci_disable(vdev);
1b69be5e 256 }
89e1f7d4 257
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258 mutex_unlock(&driver_lock);
259
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260 module_put(THIS_MODULE);
261}
262
263static int vfio_pci_open(void *device_data)
264{
265 struct vfio_pci_device *vdev = device_data;
61d79256 266 int ret = 0;
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267
268 if (!try_module_get(THIS_MODULE))
269 return -ENODEV;
270
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271 mutex_lock(&driver_lock);
272
273 if (!vdev->refcnt) {
1b69be5e
GS
274 ret = vfio_pci_enable(vdev);
275 if (ret)
276 goto error;
277
9b936c96 278 vfio_spapr_pci_eeh_open(vdev->pdev);
89e1f7d4 279 }
61d79256 280 vdev->refcnt++;
1b69be5e 281error:
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282 mutex_unlock(&driver_lock);
283 if (ret)
284 module_put(THIS_MODULE);
1b69be5e 285 return ret;
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286}
287
288static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
289{
290 if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) {
291 u8 pin;
292 pci_read_config_byte(vdev->pdev, PCI_INTERRUPT_PIN, &pin);
1d53a3a7 293 if (IS_ENABLED(CONFIG_VFIO_PCI_INTX) && pin)
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294 return 1;
295
296 } else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) {
297 u8 pos;
298 u16 flags;
299
a9047f24 300 pos = vdev->pdev->msi_cap;
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AW
301 if (pos) {
302 pci_read_config_word(vdev->pdev,
303 pos + PCI_MSI_FLAGS, &flags);
fd49c81f 304 return 1 << ((flags & PCI_MSI_FLAGS_QMASK) >> 1);
89e1f7d4
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305 }
306 } else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) {
307 u8 pos;
308 u16 flags;
309
a9047f24 310 pos = vdev->pdev->msix_cap;
89e1f7d4
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311 if (pos) {
312 pci_read_config_word(vdev->pdev,
313 pos + PCI_MSIX_FLAGS, &flags);
314
315 return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
316 }
6140a8f5 317 } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) {
dad9f897
VMP
318 if (pci_is_pcie(vdev->pdev))
319 return 1;
6140a8f5
AW
320 } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) {
321 return 1;
322 }
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323
324 return 0;
325}
326
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327static int vfio_pci_count_devs(struct pci_dev *pdev, void *data)
328{
329 (*(int *)data)++;
330 return 0;
331}
332
333struct vfio_pci_fill_info {
334 int max;
335 int cur;
336 struct vfio_pci_dependent_device *devices;
337};
338
339static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data)
340{
341 struct vfio_pci_fill_info *fill = data;
342 struct iommu_group *iommu_group;
343
344 if (fill->cur == fill->max)
345 return -EAGAIN; /* Something changed, try again */
346
347 iommu_group = iommu_group_get(&pdev->dev);
348 if (!iommu_group)
349 return -EPERM; /* Cannot reset non-isolated devices */
350
351 fill->devices[fill->cur].group_id = iommu_group_id(iommu_group);
352 fill->devices[fill->cur].segment = pci_domain_nr(pdev->bus);
353 fill->devices[fill->cur].bus = pdev->bus->number;
354 fill->devices[fill->cur].devfn = pdev->devfn;
355 fill->cur++;
356 iommu_group_put(iommu_group);
357 return 0;
358}
359
360struct vfio_pci_group_entry {
361 struct vfio_group *group;
362 int id;
363};
364
365struct vfio_pci_group_info {
366 int count;
367 struct vfio_pci_group_entry *groups;
368};
369
370static int vfio_pci_validate_devs(struct pci_dev *pdev, void *data)
371{
372 struct vfio_pci_group_info *info = data;
373 struct iommu_group *group;
374 int id, i;
375
376 group = iommu_group_get(&pdev->dev);
377 if (!group)
378 return -EPERM;
379
380 id = iommu_group_id(group);
381
382 for (i = 0; i < info->count; i++)
383 if (info->groups[i].id == id)
384 break;
385
386 iommu_group_put(group);
387
388 return (i == info->count) ? -EINVAL : 0;
389}
390
391static bool vfio_pci_dev_below_slot(struct pci_dev *pdev, struct pci_slot *slot)
392{
393 for (; pdev; pdev = pdev->bus->self)
394 if (pdev->bus == slot->bus)
395 return (pdev->slot == slot);
396 return false;
397}
398
399struct vfio_pci_walk_info {
400 int (*fn)(struct pci_dev *, void *data);
401 void *data;
402 struct pci_dev *pdev;
403 bool slot;
404 int ret;
405};
406
407static int vfio_pci_walk_wrapper(struct pci_dev *pdev, void *data)
408{
409 struct vfio_pci_walk_info *walk = data;
410
411 if (!walk->slot || vfio_pci_dev_below_slot(pdev, walk->pdev->slot))
412 walk->ret = walk->fn(pdev, walk->data);
413
414 return walk->ret;
415}
416
417static int vfio_pci_for_each_slot_or_bus(struct pci_dev *pdev,
418 int (*fn)(struct pci_dev *,
419 void *data), void *data,
420 bool slot)
421{
422 struct vfio_pci_walk_info walk = {
423 .fn = fn, .data = data, .pdev = pdev, .slot = slot, .ret = 0,
424 };
425
426 pci_walk_bus(pdev->bus, vfio_pci_walk_wrapper, &walk);
427
428 return walk.ret;
429}
430
188ad9d6
AW
431static int msix_sparse_mmap_cap(struct vfio_pci_device *vdev,
432 struct vfio_info_cap *caps)
433{
434 struct vfio_info_cap_header *header;
435 struct vfio_region_info_cap_sparse_mmap *sparse;
436 size_t end, size;
437 int nr_areas = 2, i = 0;
438
439 end = pci_resource_len(vdev->pdev, vdev->msix_bar);
440
441 /* If MSI-X table is aligned to the start or end, only one area */
442 if (((vdev->msix_offset & PAGE_MASK) == 0) ||
443 (PAGE_ALIGN(vdev->msix_offset + vdev->msix_size) >= end))
444 nr_areas = 1;
445
446 size = sizeof(*sparse) + (nr_areas * sizeof(*sparse->areas));
447
448 header = vfio_info_cap_add(caps, size,
449 VFIO_REGION_INFO_CAP_SPARSE_MMAP, 1);
450 if (IS_ERR(header))
451 return PTR_ERR(header);
452
453 sparse = container_of(header,
454 struct vfio_region_info_cap_sparse_mmap, header);
455 sparse->nr_areas = nr_areas;
456
457 if (vdev->msix_offset & PAGE_MASK) {
458 sparse->areas[i].offset = 0;
459 sparse->areas[i].size = vdev->msix_offset & PAGE_MASK;
460 i++;
461 }
462
463 if (PAGE_ALIGN(vdev->msix_offset + vdev->msix_size) < end) {
464 sparse->areas[i].offset = PAGE_ALIGN(vdev->msix_offset +
465 vdev->msix_size);
466 sparse->areas[i].size = end - sparse->areas[i].offset;
467 i++;
468 }
469
470 return 0;
471}
472
28541d41
AW
473static int region_type_cap(struct vfio_pci_device *vdev,
474 struct vfio_info_cap *caps,
475 unsigned int type, unsigned int subtype)
476{
477 struct vfio_info_cap_header *header;
478 struct vfio_region_info_cap_type *cap;
479
480 header = vfio_info_cap_add(caps, sizeof(*cap),
481 VFIO_REGION_INFO_CAP_TYPE, 1);
482 if (IS_ERR(header))
483 return PTR_ERR(header);
484
485 cap = container_of(header, struct vfio_region_info_cap_type, header);
486 cap->type = type;
487 cap->subtype = subtype;
488
489 return 0;
490}
491
492int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
493 unsigned int type, unsigned int subtype,
494 const struct vfio_pci_regops *ops,
495 size_t size, u32 flags, void *data)
496{
497 struct vfio_pci_region *region;
498
499 region = krealloc(vdev->region,
500 (vdev->num_regions + 1) * sizeof(*region),
501 GFP_KERNEL);
502 if (!region)
503 return -ENOMEM;
504
505 vdev->region = region;
506 vdev->region[vdev->num_regions].type = type;
507 vdev->region[vdev->num_regions].subtype = subtype;
508 vdev->region[vdev->num_regions].ops = ops;
509 vdev->region[vdev->num_regions].size = size;
510 vdev->region[vdev->num_regions].flags = flags;
511 vdev->region[vdev->num_regions].data = data;
512
513 vdev->num_regions++;
514
515 return 0;
516}
517
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518static long vfio_pci_ioctl(void *device_data,
519 unsigned int cmd, unsigned long arg)
520{
521 struct vfio_pci_device *vdev = device_data;
522 unsigned long minsz;
523
524 if (cmd == VFIO_DEVICE_GET_INFO) {
525 struct vfio_device_info info;
526
527 minsz = offsetofend(struct vfio_device_info, num_irqs);
528
529 if (copy_from_user(&info, (void __user *)arg, minsz))
530 return -EFAULT;
531
532 if (info.argsz < minsz)
533 return -EINVAL;
534
535 info.flags = VFIO_DEVICE_FLAGS_PCI;
536
537 if (vdev->reset_works)
538 info.flags |= VFIO_DEVICE_FLAGS_RESET;
539
28541d41 540 info.num_regions = VFIO_PCI_NUM_REGIONS + vdev->num_regions;
89e1f7d4
AW
541 info.num_irqs = VFIO_PCI_NUM_IRQS;
542
543 return copy_to_user((void __user *)arg, &info, minsz);
544
545 } else if (cmd == VFIO_DEVICE_GET_REGION_INFO) {
546 struct pci_dev *pdev = vdev->pdev;
547 struct vfio_region_info info;
188ad9d6 548 struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
28541d41 549 int i, ret;
89e1f7d4
AW
550
551 minsz = offsetofend(struct vfio_region_info, offset);
552
553 if (copy_from_user(&info, (void __user *)arg, minsz))
554 return -EFAULT;
555
556 if (info.argsz < minsz)
557 return -EINVAL;
558
559 switch (info.index) {
560 case VFIO_PCI_CONFIG_REGION_INDEX:
561 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
562 info.size = pdev->cfg_size;
563 info.flags = VFIO_REGION_INFO_FLAG_READ |
564 VFIO_REGION_INFO_FLAG_WRITE;
565 break;
566 case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
567 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
568 info.size = pci_resource_len(pdev, info.index);
569 if (!info.size) {
570 info.flags = 0;
571 break;
572 }
573
574 info.flags = VFIO_REGION_INFO_FLAG_READ |
575 VFIO_REGION_INFO_FLAG_WRITE;
1d53a3a7
FB
576 if (IS_ENABLED(CONFIG_VFIO_PCI_MMAP) &&
577 pci_resource_flags(pdev, info.index) &
188ad9d6 578 IORESOURCE_MEM && info.size >= PAGE_SIZE) {
89e1f7d4 579 info.flags |= VFIO_REGION_INFO_FLAG_MMAP;
188ad9d6
AW
580 if (info.index == vdev->msix_bar) {
581 ret = msix_sparse_mmap_cap(vdev, &caps);
582 if (ret)
583 return ret;
584 }
585 }
586
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587 break;
588 case VFIO_PCI_ROM_REGION_INDEX:
589 {
590 void __iomem *io;
591 size_t size;
592
593 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
594 info.flags = 0;
595
596 /* Report the BAR size, not the ROM size */
597 info.size = pci_resource_len(pdev, info.index);
598 if (!info.size)
599 break;
600
601 /* Is it really there? */
602 io = pci_map_rom(pdev, &size);
603 if (!io || !size) {
604 info.size = 0;
605 break;
606 }
607 pci_unmap_rom(pdev, io);
608
609 info.flags = VFIO_REGION_INFO_FLAG_READ;
610 break;
611 }
84237a82
AW
612 case VFIO_PCI_VGA_REGION_INDEX:
613 if (!vdev->has_vga)
614 return -EINVAL;
615
616 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
617 info.size = 0xc0000;
618 info.flags = VFIO_REGION_INFO_FLAG_READ |
619 VFIO_REGION_INFO_FLAG_WRITE;
620
621 break;
89e1f7d4 622 default:
28541d41
AW
623 if (info.index >=
624 VFIO_PCI_NUM_REGIONS + vdev->num_regions)
625 return -EINVAL;
626
627 i = info.index - VFIO_PCI_NUM_REGIONS;
628
629 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
630 info.size = vdev->region[i].size;
631 info.flags = vdev->region[i].flags;
632
633 ret = region_type_cap(vdev, &caps,
634 vdev->region[i].type,
635 vdev->region[i].subtype);
636 if (ret)
637 return ret;
89e1f7d4
AW
638 }
639
188ad9d6
AW
640 if (caps.size) {
641 info.flags |= VFIO_REGION_INFO_FLAG_CAPS;
642 if (info.argsz < sizeof(info) + caps.size) {
643 info.argsz = sizeof(info) + caps.size;
644 info.cap_offset = 0;
645 } else {
646 vfio_info_cap_shift(&caps, sizeof(info));
647 ret = copy_to_user((void __user *)arg +
648 sizeof(info), caps.buf,
649 caps.size);
650 if (ret) {
651 kfree(caps.buf);
652 return ret;
653 }
654 info.cap_offset = sizeof(info);
655 }
656
657 kfree(caps.buf);
658 }
659
89e1f7d4
AW
660 return copy_to_user((void __user *)arg, &info, minsz);
661
662 } else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) {
663 struct vfio_irq_info info;
664
665 minsz = offsetofend(struct vfio_irq_info, count);
666
667 if (copy_from_user(&info, (void __user *)arg, minsz))
668 return -EFAULT;
669
670 if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
671 return -EINVAL;
672
dad9f897
VMP
673 switch (info.index) {
674 case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
6140a8f5 675 case VFIO_PCI_REQ_IRQ_INDEX:
dad9f897
VMP
676 break;
677 case VFIO_PCI_ERR_IRQ_INDEX:
678 if (pci_is_pcie(vdev->pdev))
679 break;
680 /* pass thru to return error */
681 default:
682 return -EINVAL;
683 }
684
89e1f7d4
AW
685 info.flags = VFIO_IRQ_INFO_EVENTFD;
686
687 info.count = vfio_pci_get_irq_count(vdev, info.index);
688
689 if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
690 info.flags |= (VFIO_IRQ_INFO_MASKABLE |
691 VFIO_IRQ_INFO_AUTOMASKED);
692 else
693 info.flags |= VFIO_IRQ_INFO_NORESIZE;
694
695 return copy_to_user((void __user *)arg, &info, minsz);
696
697 } else if (cmd == VFIO_DEVICE_SET_IRQS) {
698 struct vfio_irq_set hdr;
699 u8 *data = NULL;
700 int ret = 0;
701
702 minsz = offsetofend(struct vfio_irq_set, count);
703
704 if (copy_from_user(&hdr, (void __user *)arg, minsz))
705 return -EFAULT;
706
707 if (hdr.argsz < minsz || hdr.index >= VFIO_PCI_NUM_IRQS ||
708 hdr.flags & ~(VFIO_IRQ_SET_DATA_TYPE_MASK |
709 VFIO_IRQ_SET_ACTION_TYPE_MASK))
710 return -EINVAL;
711
712 if (!(hdr.flags & VFIO_IRQ_SET_DATA_NONE)) {
713 size_t size;
904c680c 714 int max = vfio_pci_get_irq_count(vdev, hdr.index);
89e1f7d4
AW
715
716 if (hdr.flags & VFIO_IRQ_SET_DATA_BOOL)
717 size = sizeof(uint8_t);
718 else if (hdr.flags & VFIO_IRQ_SET_DATA_EVENTFD)
719 size = sizeof(int32_t);
720 else
721 return -EINVAL;
722
723 if (hdr.argsz - minsz < hdr.count * size ||
904c680c 724 hdr.start >= max || hdr.start + hdr.count > max)
89e1f7d4
AW
725 return -EINVAL;
726
3a1f7041
FW
727 data = memdup_user((void __user *)(arg + minsz),
728 hdr.count * size);
729 if (IS_ERR(data))
730 return PTR_ERR(data);
89e1f7d4
AW
731 }
732
733 mutex_lock(&vdev->igate);
734
735 ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index,
736 hdr.start, hdr.count, data);
737
738 mutex_unlock(&vdev->igate);
739 kfree(data);
740
741 return ret;
742
8b27ee60 743 } else if (cmd == VFIO_DEVICE_RESET) {
89e1f7d4 744 return vdev->reset_works ?
890ed578 745 pci_try_reset_function(vdev->pdev) : -EINVAL;
89e1f7d4 746
8b27ee60
AW
747 } else if (cmd == VFIO_DEVICE_GET_PCI_HOT_RESET_INFO) {
748 struct vfio_pci_hot_reset_info hdr;
749 struct vfio_pci_fill_info fill = { 0 };
750 struct vfio_pci_dependent_device *devices = NULL;
751 bool slot = false;
752 int ret = 0;
753
754 minsz = offsetofend(struct vfio_pci_hot_reset_info, count);
755
756 if (copy_from_user(&hdr, (void __user *)arg, minsz))
757 return -EFAULT;
758
759 if (hdr.argsz < minsz)
760 return -EINVAL;
761
762 hdr.flags = 0;
763
764 /* Can we do a slot or bus reset or neither? */
765 if (!pci_probe_reset_slot(vdev->pdev->slot))
766 slot = true;
767 else if (pci_probe_reset_bus(vdev->pdev->bus))
768 return -ENODEV;
769
770 /* How many devices are affected? */
771 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
772 vfio_pci_count_devs,
773 &fill.max, slot);
774 if (ret)
775 return ret;
776
777 WARN_ON(!fill.max); /* Should always be at least one */
778
779 /*
780 * If there's enough space, fill it now, otherwise return
781 * -ENOSPC and the number of devices affected.
782 */
783 if (hdr.argsz < sizeof(hdr) + (fill.max * sizeof(*devices))) {
784 ret = -ENOSPC;
785 hdr.count = fill.max;
786 goto reset_info_exit;
787 }
788
789 devices = kcalloc(fill.max, sizeof(*devices), GFP_KERNEL);
790 if (!devices)
791 return -ENOMEM;
792
793 fill.devices = devices;
794
795 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
796 vfio_pci_fill_devs,
797 &fill, slot);
798
799 /*
800 * If a device was removed between counting and filling,
801 * we may come up short of fill.max. If a device was
802 * added, we'll have a return of -EAGAIN above.
803 */
804 if (!ret)
805 hdr.count = fill.cur;
806
807reset_info_exit:
808 if (copy_to_user((void __user *)arg, &hdr, minsz))
809 ret = -EFAULT;
810
811 if (!ret) {
812 if (copy_to_user((void __user *)(arg + minsz), devices,
813 hdr.count * sizeof(*devices)))
814 ret = -EFAULT;
815 }
816
817 kfree(devices);
818 return ret;
819
820 } else if (cmd == VFIO_DEVICE_PCI_HOT_RESET) {
821 struct vfio_pci_hot_reset hdr;
822 int32_t *group_fds;
823 struct vfio_pci_group_entry *groups;
824 struct vfio_pci_group_info info;
825 bool slot = false;
826 int i, count = 0, ret = 0;
827
828 minsz = offsetofend(struct vfio_pci_hot_reset, count);
829
830 if (copy_from_user(&hdr, (void __user *)arg, minsz))
831 return -EFAULT;
832
833 if (hdr.argsz < minsz || hdr.flags)
834 return -EINVAL;
835
836 /* Can we do a slot or bus reset or neither? */
837 if (!pci_probe_reset_slot(vdev->pdev->slot))
838 slot = true;
839 else if (pci_probe_reset_bus(vdev->pdev->bus))
840 return -ENODEV;
841
842 /*
843 * We can't let userspace give us an arbitrarily large
844 * buffer to copy, so verify how many we think there
845 * could be. Note groups can have multiple devices so
846 * one group per device is the max.
847 */
848 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
849 vfio_pci_count_devs,
850 &count, slot);
851 if (ret)
852 return ret;
853
854 /* Somewhere between 1 and count is OK */
855 if (!hdr.count || hdr.count > count)
856 return -EINVAL;
857
858 group_fds = kcalloc(hdr.count, sizeof(*group_fds), GFP_KERNEL);
859 groups = kcalloc(hdr.count, sizeof(*groups), GFP_KERNEL);
860 if (!group_fds || !groups) {
861 kfree(group_fds);
862 kfree(groups);
863 return -ENOMEM;
864 }
865
866 if (copy_from_user(group_fds, (void __user *)(arg + minsz),
867 hdr.count * sizeof(*group_fds))) {
868 kfree(group_fds);
869 kfree(groups);
870 return -EFAULT;
871 }
872
873 /*
874 * For each group_fd, get the group through the vfio external
875 * user interface and store the group and iommu ID. This
876 * ensures the group is held across the reset.
877 */
878 for (i = 0; i < hdr.count; i++) {
879 struct vfio_group *group;
880 struct fd f = fdget(group_fds[i]);
881 if (!f.file) {
882 ret = -EBADF;
883 break;
884 }
885
886 group = vfio_group_get_external_user(f.file);
887 fdput(f);
888 if (IS_ERR(group)) {
889 ret = PTR_ERR(group);
890 break;
891 }
892
893 groups[i].group = group;
894 groups[i].id = vfio_external_user_iommu_id(group);
895 }
896
897 kfree(group_fds);
898
899 /* release reference to groups on error */
900 if (ret)
901 goto hot_reset_release;
902
903 info.count = hdr.count;
904 info.groups = groups;
905
906 /*
907 * Test whether all the affected devices are contained
908 * by the set of groups provided by the user.
909 */
910 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
911 vfio_pci_validate_devs,
912 &info, slot);
913 if (!ret)
914 /* User has access, do the reset */
890ed578
AW
915 ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
916 pci_try_reset_bus(vdev->pdev->bus);
8b27ee60
AW
917
918hot_reset_release:
919 for (i--; i >= 0; i--)
920 vfio_group_put_external_user(groups[i].group);
921
922 kfree(groups);
923 return ret;
924 }
925
89e1f7d4
AW
926 return -ENOTTY;
927}
928
5b279a11
AW
929static ssize_t vfio_pci_rw(void *device_data, char __user *buf,
930 size_t count, loff_t *ppos, bool iswrite)
89e1f7d4
AW
931{
932 unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
933 struct vfio_pci_device *vdev = device_data;
89e1f7d4 934
28541d41 935 if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
89e1f7d4
AW
936 return -EINVAL;
937
5b279a11
AW
938 switch (index) {
939 case VFIO_PCI_CONFIG_REGION_INDEX:
906ee99d
AW
940 return vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);
941
5b279a11
AW
942 case VFIO_PCI_ROM_REGION_INDEX:
943 if (iswrite)
944 return -EINVAL;
906ee99d 945 return vfio_pci_bar_rw(vdev, buf, count, ppos, false);
89e1f7d4 946
5b279a11 947 case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
906ee99d 948 return vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);
84237a82
AW
949
950 case VFIO_PCI_VGA_REGION_INDEX:
951 return vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite);
28541d41
AW
952 default:
953 index -= VFIO_PCI_NUM_REGIONS;
954 return vdev->region[index].ops->rw(vdev, buf,
955 count, ppos, iswrite);
5b279a11
AW
956 }
957
89e1f7d4
AW
958 return -EINVAL;
959}
960
5b279a11
AW
961static ssize_t vfio_pci_read(void *device_data, char __user *buf,
962 size_t count, loff_t *ppos)
963{
906ee99d
AW
964 if (!count)
965 return 0;
966
5b279a11
AW
967 return vfio_pci_rw(device_data, buf, count, ppos, false);
968}
969
89e1f7d4
AW
970static ssize_t vfio_pci_write(void *device_data, const char __user *buf,
971 size_t count, loff_t *ppos)
972{
906ee99d
AW
973 if (!count)
974 return 0;
975
976 return vfio_pci_rw(device_data, (char __user *)buf, count, ppos, true);
89e1f7d4
AW
977}
978
979static int vfio_pci_mmap(void *device_data, struct vm_area_struct *vma)
980{
981 struct vfio_pci_device *vdev = device_data;
982 struct pci_dev *pdev = vdev->pdev;
983 unsigned int index;
34002f54 984 u64 phys_len, req_len, pgoff, req_start;
89e1f7d4
AW
985 int ret;
986
987 index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
988
989 if (vma->vm_end < vma->vm_start)
990 return -EINVAL;
991 if ((vma->vm_flags & VM_SHARED) == 0)
992 return -EINVAL;
993 if (index >= VFIO_PCI_ROM_REGION_INDEX)
994 return -EINVAL;
995 if (!(pci_resource_flags(pdev, index) & IORESOURCE_MEM))
996 return -EINVAL;
997
998 phys_len = pci_resource_len(pdev, index);
999 req_len = vma->vm_end - vma->vm_start;
1000 pgoff = vma->vm_pgoff &
1001 ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
1002 req_start = pgoff << PAGE_SHIFT;
1003
1004 if (phys_len < PAGE_SIZE || req_start + req_len > phys_len)
1005 return -EINVAL;
1006
1007 if (index == vdev->msix_bar) {
1008 /*
1009 * Disallow mmaps overlapping the MSI-X table; users don't
1010 * get to touch this directly. We could find somewhere
1011 * else to map the overlap, but page granularity is only
1012 * a recommendation, not a requirement, so the user needs
1013 * to know which bits are real. Requiring them to mmap
1014 * around the table makes that clear.
1015 */
1016
1017 /* If neither entirely above nor below, then it overlaps */
1018 if (!(req_start >= vdev->msix_offset + vdev->msix_size ||
1019 req_start + req_len <= vdev->msix_offset))
1020 return -EINVAL;
1021 }
1022
1023 /*
1024 * Even though we don't make use of the barmap for the mmap,
1025 * we need to request the region and the barmap tracks that.
1026 */
1027 if (!vdev->barmap[index]) {
1028 ret = pci_request_selected_regions(pdev,
1029 1 << index, "vfio-pci");
1030 if (ret)
1031 return ret;
1032
1033 vdev->barmap[index] = pci_iomap(pdev, index, 0);
1034 }
1035
1036 vma->vm_private_data = vdev;
89e1f7d4 1037 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
34002f54 1038 vma->vm_pgoff = (pci_resource_start(pdev, index) >> PAGE_SHIFT) + pgoff;
89e1f7d4 1039
34002f54 1040 return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
89e1f7d4
AW
1041 req_len, vma->vm_page_prot);
1042}
1043
6140a8f5
AW
1044static void vfio_pci_request(void *device_data, unsigned int count)
1045{
1046 struct vfio_pci_device *vdev = device_data;
1047
1048 mutex_lock(&vdev->igate);
1049
1050 if (vdev->req_trigger) {
5f55d2ae
AW
1051 if (!(count % 10))
1052 dev_notice_ratelimited(&vdev->pdev->dev,
1053 "Relaying device request to user (#%u)\n",
1054 count);
6140a8f5 1055 eventfd_signal(vdev->req_trigger, 1);
5f55d2ae
AW
1056 } else if (count == 0) {
1057 dev_warn(&vdev->pdev->dev,
1058 "No device request channel registered, blocked until released by user\n");
6140a8f5
AW
1059 }
1060
1061 mutex_unlock(&vdev->igate);
1062}
1063
89e1f7d4
AW
1064static const struct vfio_device_ops vfio_pci_ops = {
1065 .name = "vfio-pci",
1066 .open = vfio_pci_open,
1067 .release = vfio_pci_release,
1068 .ioctl = vfio_pci_ioctl,
1069 .read = vfio_pci_read,
1070 .write = vfio_pci_write,
1071 .mmap = vfio_pci_mmap,
6140a8f5 1072 .request = vfio_pci_request,
89e1f7d4
AW
1073};
1074
1075static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1076{
89e1f7d4
AW
1077 struct vfio_pci_device *vdev;
1078 struct iommu_group *group;
1079 int ret;
1080
7c2e211f 1081 if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL)
89e1f7d4
AW
1082 return -EINVAL;
1083
03a76b60 1084 group = vfio_iommu_group_get(&pdev->dev);
89e1f7d4
AW
1085 if (!group)
1086 return -EINVAL;
1087
1088 vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
1089 if (!vdev) {
03a76b60 1090 vfio_iommu_group_put(group, &pdev->dev);
89e1f7d4
AW
1091 return -ENOMEM;
1092 }
1093
1094 vdev->pdev = pdev;
1095 vdev->irq_type = VFIO_PCI_NUM_IRQS;
1096 mutex_init(&vdev->igate);
1097 spin_lock_init(&vdev->irqlock);
89e1f7d4
AW
1098
1099 ret = vfio_add_group_dev(&pdev->dev, &vfio_pci_ops, vdev);
1100 if (ret) {
03a76b60 1101 vfio_iommu_group_put(group, &pdev->dev);
89e1f7d4 1102 kfree(vdev);
5a0ff177 1103 return ret;
89e1f7d4
AW
1104 }
1105
ecaa1f6a
AW
1106 if (vfio_pci_is_vga(pdev)) {
1107 vga_client_register(pdev, vdev, NULL, vfio_pci_set_vga_decode);
1108 vga_set_legacy_decoding(pdev,
1109 vfio_pci_set_vga_decode(vdev, false));
1110 }
1111
6eb70187
AW
1112 if (!disable_idle_d3) {
1113 /*
1114 * pci-core sets the device power state to an unknown value at
1115 * bootup and after being removed from a driver. The only
1116 * transition it allows from this unknown state is to D0, which
1117 * typically happens when a driver calls pci_enable_device().
1118 * We're not ready to enable the device yet, but we do want to
1119 * be able to get to D3. Therefore first do a D0 transition
1120 * before going to D3.
1121 */
1122 pci_set_power_state(pdev, PCI_D0);
1123 pci_set_power_state(pdev, PCI_D3hot);
1124 }
1125
89e1f7d4
AW
1126 return ret;
1127}
1128
1129static void vfio_pci_remove(struct pci_dev *pdev)
1130{
1131 struct vfio_pci_device *vdev;
1132
1133 vdev = vfio_del_group_dev(&pdev->dev);
ecaa1f6a
AW
1134 if (!vdev)
1135 return;
1136
03a76b60 1137 vfio_iommu_group_put(pdev->dev.iommu_group, &pdev->dev);
28541d41 1138 kfree(vdev->region);
ecaa1f6a
AW
1139 kfree(vdev);
1140
1141 if (vfio_pci_is_vga(pdev)) {
1142 vga_client_register(pdev, NULL, NULL, NULL);
1143 vga_set_legacy_decoding(pdev,
1144 VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
1145 VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM);
61d79256 1146 }
6eb70187
AW
1147
1148 if (!disable_idle_d3)
1149 pci_set_power_state(pdev, PCI_D0);
89e1f7d4
AW
1150}
1151
dad9f897
VMP
1152static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev,
1153 pci_channel_state_t state)
1154{
1155 struct vfio_pci_device *vdev;
1156 struct vfio_device *device;
1157
1158 device = vfio_device_get_from_dev(&pdev->dev);
1159 if (device == NULL)
1160 return PCI_ERS_RESULT_DISCONNECT;
1161
1162 vdev = vfio_device_data(device);
1163 if (vdev == NULL) {
1164 vfio_device_put(device);
1165 return PCI_ERS_RESULT_DISCONNECT;
1166 }
1167
3be3a074
AW
1168 mutex_lock(&vdev->igate);
1169
dad9f897
VMP
1170 if (vdev->err_trigger)
1171 eventfd_signal(vdev->err_trigger, 1);
1172
3be3a074
AW
1173 mutex_unlock(&vdev->igate);
1174
dad9f897
VMP
1175 vfio_device_put(device);
1176
1177 return PCI_ERS_RESULT_CAN_RECOVER;
1178}
1179
7d10f4e0 1180static const struct pci_error_handlers vfio_err_handlers = {
dad9f897
VMP
1181 .error_detected = vfio_pci_aer_err_detected,
1182};
1183
89e1f7d4
AW
1184static struct pci_driver vfio_pci_driver = {
1185 .name = "vfio-pci",
1186 .id_table = NULL, /* only dynamic ids */
1187 .probe = vfio_pci_probe,
1188 .remove = vfio_pci_remove,
dad9f897 1189 .err_handler = &vfio_err_handlers,
89e1f7d4
AW
1190};
1191
93899a67
AW
1192struct vfio_devices {
1193 struct vfio_device **devices;
1194 int cur_index;
1195 int max_index;
1196};
bc4fba77 1197
93899a67 1198static int vfio_pci_get_devs(struct pci_dev *pdev, void *data)
bc4fba77 1199{
93899a67 1200 struct vfio_devices *devs = data;
20f30017 1201 struct vfio_device *device;
bc4fba77 1202
93899a67
AW
1203 if (devs->cur_index == devs->max_index)
1204 return -ENOSPC;
bc4fba77 1205
20f30017
AW
1206 device = vfio_device_get_from_dev(&pdev->dev);
1207 if (!device)
93899a67 1208 return -EINVAL;
bc4fba77 1209
20f30017
AW
1210 if (pci_dev_driver(pdev) != &vfio_pci_driver) {
1211 vfio_device_put(device);
1212 return -EBUSY;
1213 }
1214
1215 devs->devices[devs->cur_index++] = device;
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1216 return 0;
1217}
1218
1219/*
1220 * Attempt to do a bus/slot reset if there are devices affected by a reset for
1221 * this device that are needs_reset and all of the affected devices are unused
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1222 * (!refcnt). Callers are required to hold driver_lock when calling this to
1223 * prevent device opens and concurrent bus reset attempts. We prevent device
1224 * unbinds by acquiring and holding a reference to the vfio_device.
1225 *
1226 * NB: vfio-core considers a group to be viable even if some devices are
1227 * bound to drivers like pci-stub or pcieport. Here we require all devices
1228 * to be bound to vfio_pci since that's the only way we can be sure they
1229 * stay put.
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1230 */
1231static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev)
1232{
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1233 struct vfio_devices devs = { .cur_index = 0 };
1234 int i = 0, ret = -EINVAL;
bc4fba77 1235 bool needs_reset = false, slot = false;
93899a67 1236 struct vfio_pci_device *tmp;
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1237
1238 if (!pci_probe_reset_slot(vdev->pdev->slot))
1239 slot = true;
1240 else if (pci_probe_reset_bus(vdev->pdev->bus))
1241 return;
1242
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1243 if (vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
1244 &i, slot) || !i)
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1245 return;
1246
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1247 devs.max_index = i;
1248 devs.devices = kcalloc(i, sizeof(struct vfio_device *), GFP_KERNEL);
1249 if (!devs.devices)
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1250 return;
1251
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1252 if (vfio_pci_for_each_slot_or_bus(vdev->pdev,
1253 vfio_pci_get_devs, &devs, slot))
1254 goto put_devs;
1255
1256 for (i = 0; i < devs.cur_index; i++) {
1257 tmp = vfio_device_data(devs.devices[i]);
1258 if (tmp->needs_reset)
1259 needs_reset = true;
1260 if (tmp->refcnt)
1261 goto put_devs;
1262 }
1263
1264 if (needs_reset)
1265 ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
1266 pci_try_reset_bus(vdev->pdev->bus);
1267
1268put_devs:
1269 for (i = 0; i < devs.cur_index; i++) {
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1270 tmp = vfio_device_data(devs.devices[i]);
1271 if (!ret)
93899a67 1272 tmp->needs_reset = false;
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1273
1274 if (!tmp->refcnt && !disable_idle_d3)
1275 pci_set_power_state(tmp->pdev, PCI_D3hot);
1276
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1277 vfio_device_put(devs.devices[i]);
1278 }
1279
1280 kfree(devs.devices);
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1281}
1282
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1283static void __exit vfio_pci_cleanup(void)
1284{
1285 pci_unregister_driver(&vfio_pci_driver);
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1286 vfio_pci_uninit_perm_bits();
1287}
1288
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1289static void __init vfio_pci_fill_ids(void)
1290{
1291 char *p, *id;
1292 int rc;
1293
1294 /* no ids passed actually */
1295 if (ids[0] == '\0')
1296 return;
1297
1298 /* add ids specified in the module parameter */
1299 p = ids;
1300 while ((id = strsep(&p, ","))) {
1301 unsigned int vendor, device, subvendor = PCI_ANY_ID,
1302 subdevice = PCI_ANY_ID, class = 0, class_mask = 0;
1303 int fields;
1304
1305 if (!strlen(id))
1306 continue;
1307
1308 fields = sscanf(id, "%x:%x:%x:%x:%x:%x",
1309 &vendor, &device, &subvendor, &subdevice,
1310 &class, &class_mask);
1311
1312 if (fields < 2) {
1313 pr_warn("invalid id string \"%s\"\n", id);
1314 continue;
1315 }
1316
1317 rc = pci_add_dynid(&vfio_pci_driver, vendor, device,
1318 subvendor, subdevice, class, class_mask, 0);
1319 if (rc)
1320 pr_warn("failed to add dynamic id [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x (%d)\n",
1321 vendor, device, subvendor, subdevice,
1322 class, class_mask, rc);
1323 else
1324 pr_info("add [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x\n",
1325 vendor, device, subvendor, subdevice,
1326 class, class_mask);
1327 }
1328}
1329
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1330static int __init vfio_pci_init(void)
1331{
1332 int ret;
1333
1334 /* Allocate shared config space permision data used by all devices */
1335 ret = vfio_pci_init_perm_bits();
1336 if (ret)
1337 return ret;
1338
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1339 /* Register and scan for devices */
1340 ret = pci_register_driver(&vfio_pci_driver);
1341 if (ret)
1342 goto out_driver;
1343
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1344 vfio_pci_fill_ids();
1345
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1346 return 0;
1347
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1348out_driver:
1349 vfio_pci_uninit_perm_bits();
1350 return ret;
1351}
1352
1353module_init(vfio_pci_init);
1354module_exit(vfio_pci_cleanup);
1355
1356MODULE_VERSION(DRIVER_VERSION);
1357MODULE_LICENSE("GPL v2");
1358MODULE_AUTHOR(DRIVER_AUTHOR);
1359MODULE_DESCRIPTION(DRIVER_DESC);