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vfio/pci: Expose shadow ROM as PCI option ROM
[mirror_ubuntu-artful-kernel.git] / drivers / vfio / pci / vfio_pci.c
CommitLineData
89e1f7d4
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1/*
2 * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
3 * Author: Alex Williamson <alex.williamson@redhat.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Derived from original vfio:
10 * Copyright 2010 Cisco Systems, Inc. All rights reserved.
11 * Author: Tom Lyon, pugs@cisco.com
12 */
13
80c7e8cc
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14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
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16#include <linux/device.h>
17#include <linux/eventfd.h>
8b27ee60 18#include <linux/file.h>
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19#include <linux/interrupt.h>
20#include <linux/iommu.h>
21#include <linux/module.h>
22#include <linux/mutex.h>
23#include <linux/notifier.h>
24#include <linux/pci.h>
25#include <linux/pm_runtime.h>
26#include <linux/slab.h>
27#include <linux/types.h>
28#include <linux/uaccess.h>
29#include <linux/vfio.h>
ecaa1f6a 30#include <linux/vgaarb.h>
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31
32#include "vfio_pci_private.h"
33
34#define DRIVER_VERSION "0.2"
35#define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>"
36#define DRIVER_DESC "VFIO PCI - User Level meta-driver"
37
80c7e8cc
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38static char ids[1024] __initdata;
39module_param_string(ids, ids, sizeof(ids), 0);
40MODULE_PARM_DESC(ids, "Initial PCI IDs to add to the vfio driver, format is \"vendor:device[:subvendor[:subdevice[:class[:class_mask]]]]\" and multiple comma separated entries can be specified");
41
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42static bool nointxmask;
43module_param_named(nointxmask, nointxmask, bool, S_IRUGO | S_IWUSR);
44MODULE_PARM_DESC(nointxmask,
45 "Disable support for PCI 2.3 style INTx masking. If this resolves problems for specific devices, report lspci -vvvxxx to linux-pci@vger.kernel.org so the device can be fixed automatically via the broken_intx_masking flag.");
46
88c0dead
AW
47#ifdef CONFIG_VFIO_PCI_VGA
48static bool disable_vga;
49module_param(disable_vga, bool, S_IRUGO);
50MODULE_PARM_DESC(disable_vga, "Disable VGA resource access through vfio-pci");
51#endif
52
6eb70187
AW
53static bool disable_idle_d3;
54module_param(disable_idle_d3, bool, S_IRUGO | S_IWUSR);
55MODULE_PARM_DESC(disable_idle_d3,
56 "Disable using the PCI D3 low power state for idle, unused devices");
57
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58static DEFINE_MUTEX(driver_lock);
59
88c0dead
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60static inline bool vfio_vga_disabled(void)
61{
62#ifdef CONFIG_VFIO_PCI_VGA
63 return disable_vga;
64#else
65 return true;
66#endif
67}
68
ecaa1f6a
AW
69/*
70 * Our VGA arbiter participation is limited since we don't know anything
71 * about the device itself. However, if the device is the only VGA device
72 * downstream of a bridge and VFIO VGA support is disabled, then we can
73 * safely return legacy VGA IO and memory as not decoded since the user
74 * has no way to get to it and routing can be disabled externally at the
75 * bridge.
76 */
77static unsigned int vfio_pci_set_vga_decode(void *opaque, bool single_vga)
78{
79 struct vfio_pci_device *vdev = opaque;
80 struct pci_dev *tmp = NULL, *pdev = vdev->pdev;
81 unsigned char max_busnr;
82 unsigned int decodes;
83
84 if (single_vga || !vfio_vga_disabled() || pci_is_root_bus(pdev->bus))
85 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
86 VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
87
88 max_busnr = pci_bus_max_busnr(pdev->bus);
89 decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
90
91 while ((tmp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, tmp)) != NULL) {
92 if (tmp == pdev ||
93 pci_domain_nr(tmp->bus) != pci_domain_nr(pdev->bus) ||
94 pci_is_root_bus(tmp->bus))
95 continue;
96
97 if (tmp->bus->number >= pdev->bus->number &&
98 tmp->bus->number <= max_busnr) {
99 pci_dev_put(tmp);
100 decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
101 break;
102 }
103 }
104
105 return decodes;
106}
107
108static inline bool vfio_pci_is_vga(struct pci_dev *pdev)
109{
110 return (pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA;
111}
112
bc4fba77 113static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev);
f572a960 114static void vfio_pci_disable(struct vfio_pci_device *vdev);
bc4fba77 115
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116static int vfio_pci_enable(struct vfio_pci_device *vdev)
117{
118 struct pci_dev *pdev = vdev->pdev;
119 int ret;
120 u16 cmd;
121 u8 msix_pos;
122
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123 pci_set_power_state(pdev, PCI_D0);
124
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125 /* Don't allow our initial saved state to include busmaster */
126 pci_clear_master(pdev);
127
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128 ret = pci_enable_device(pdev);
129 if (ret)
130 return ret;
131
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132 vdev->reset_works = (pci_reset_function(pdev) == 0);
133 pci_save_state(pdev);
134 vdev->pci_saved_state = pci_store_saved_state(pdev);
135 if (!vdev->pci_saved_state)
136 pr_debug("%s: Couldn't store %s saved state\n",
137 __func__, dev_name(&pdev->dev));
138
139 ret = vfio_config_init(vdev);
9a92c509 140 if (ret) {
eb5685f0
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141 kfree(vdev->pci_saved_state);
142 vdev->pci_saved_state = NULL;
9a92c509
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143 pci_disable_device(pdev);
144 return ret;
145 }
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146
147 if (likely(!nointxmask))
148 vdev->pci_2_3 = pci_intx_mask_supported(pdev);
149
150 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
151 if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) {
152 cmd &= ~PCI_COMMAND_INTX_DISABLE;
153 pci_write_config_word(pdev, PCI_COMMAND, cmd);
154 }
155
a9047f24 156 msix_pos = pdev->msix_cap;
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157 if (msix_pos) {
158 u16 flags;
159 u32 table;
160
161 pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags);
162 pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table);
163
508d1aa6
BH
164 vdev->msix_bar = table & PCI_MSIX_TABLE_BIR;
165 vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET;
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166 vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16;
167 } else
168 vdev->msix_bar = 0xFF;
169
ecaa1f6a 170 if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev))
84237a82 171 vdev->has_vga = true;
84237a82 172
5846ff54 173
f572a960
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174 if (vfio_pci_is_vga(pdev) &&
175 pdev->vendor == PCI_VENDOR_ID_INTEL &&
176 IS_ENABLED(CONFIG_VFIO_PCI_IGD)) {
177 ret = vfio_pci_igd_init(vdev);
178 if (ret) {
179 dev_warn(&vdev->pdev->dev,
180 "Failed to setup Intel IGD regions\n");
181 vfio_pci_disable(vdev);
182 return ret;
183 }
5846ff54
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184 }
185
9a92c509 186 return 0;
89e1f7d4
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187}
188
189static void vfio_pci_disable(struct vfio_pci_device *vdev)
190{
2007722a 191 struct pci_dev *pdev = vdev->pdev;
28541d41 192 int i, bar;
89e1f7d4 193
9c22e660
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194 /* Stop the device from further DMA */
195 pci_clear_master(pdev);
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196
197 vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE |
198 VFIO_IRQ_SET_ACTION_TRIGGER,
199 vdev->irq_type, 0, 0, NULL);
200
201 vdev->virq_disabled = false;
202
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203 for (i = 0; i < vdev->num_regions; i++)
204 vdev->region[i].ops->release(vdev, &vdev->region[i]);
205
206 vdev->num_regions = 0;
207 kfree(vdev->region);
208 vdev->region = NULL; /* don't krealloc a freed pointer */
209
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210 vfio_config_free(vdev);
211
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212 for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
213 if (!vdev->barmap[bar])
214 continue;
2007722a
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215 pci_iounmap(pdev, vdev->barmap[bar]);
216 pci_release_selected_regions(pdev, 1 << bar);
89e1f7d4
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217 vdev->barmap[bar] = NULL;
218 }
2007722a 219
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220 vdev->needs_reset = true;
221
2007722a
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222 /*
223 * If we have saved state, restore it. If we can reset the device,
224 * even better. Resetting with current state seems better than
225 * nothing, but saving and restoring current state without reset
226 * is just busy work.
227 */
228 if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) {
229 pr_info("%s: Couldn't reload %s saved state\n",
230 __func__, dev_name(&pdev->dev));
231
232 if (!vdev->reset_works)
9c22e660 233 goto out;
2007722a
AW
234
235 pci_save_state(pdev);
236 }
237
238 /*
239 * Disable INTx and MSI, presumably to avoid spurious interrupts
240 * during reset. Stolen from pci_reset_function()
241 */
242 pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
243
d24cdbfd 244 /*
890ed578
AW
245 * Try to reset the device. The success of this is dependent on
246 * being able to lock the device, which is not always possible.
d24cdbfd 247 */
561d72dd
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248 if (vdev->reset_works && !pci_try_reset_function(pdev))
249 vdev->needs_reset = false;
2007722a
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250
251 pci_restore_state(pdev);
9c22e660
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252out:
253 pci_disable_device(pdev);
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254
255 vfio_pci_try_bus_reset(vdev);
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256
257 if (!disable_idle_d3)
258 pci_set_power_state(pdev, PCI_D3hot);
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259}
260
261static void vfio_pci_release(void *device_data)
262{
263 struct vfio_pci_device *vdev = device_data;
264
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265 mutex_lock(&driver_lock);
266
267 if (!(--vdev->refcnt)) {
1b69be5e 268 vfio_spapr_pci_eeh_release(vdev->pdev);
89e1f7d4 269 vfio_pci_disable(vdev);
1b69be5e 270 }
89e1f7d4 271
61d79256
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272 mutex_unlock(&driver_lock);
273
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274 module_put(THIS_MODULE);
275}
276
277static int vfio_pci_open(void *device_data)
278{
279 struct vfio_pci_device *vdev = device_data;
61d79256 280 int ret = 0;
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281
282 if (!try_module_get(THIS_MODULE))
283 return -ENODEV;
284
61d79256
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285 mutex_lock(&driver_lock);
286
287 if (!vdev->refcnt) {
1b69be5e
GS
288 ret = vfio_pci_enable(vdev);
289 if (ret)
290 goto error;
291
9b936c96 292 vfio_spapr_pci_eeh_open(vdev->pdev);
89e1f7d4 293 }
61d79256 294 vdev->refcnt++;
1b69be5e 295error:
61d79256
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296 mutex_unlock(&driver_lock);
297 if (ret)
298 module_put(THIS_MODULE);
1b69be5e 299 return ret;
89e1f7d4
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300}
301
302static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
303{
304 if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) {
305 u8 pin;
306 pci_read_config_byte(vdev->pdev, PCI_INTERRUPT_PIN, &pin);
1d53a3a7 307 if (IS_ENABLED(CONFIG_VFIO_PCI_INTX) && pin)
89e1f7d4
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308 return 1;
309
310 } else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) {
311 u8 pos;
312 u16 flags;
313
a9047f24 314 pos = vdev->pdev->msi_cap;
89e1f7d4
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315 if (pos) {
316 pci_read_config_word(vdev->pdev,
317 pos + PCI_MSI_FLAGS, &flags);
fd49c81f 318 return 1 << ((flags & PCI_MSI_FLAGS_QMASK) >> 1);
89e1f7d4
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319 }
320 } else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) {
321 u8 pos;
322 u16 flags;
323
a9047f24 324 pos = vdev->pdev->msix_cap;
89e1f7d4
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325 if (pos) {
326 pci_read_config_word(vdev->pdev,
327 pos + PCI_MSIX_FLAGS, &flags);
328
329 return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
330 }
6140a8f5 331 } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) {
dad9f897
VMP
332 if (pci_is_pcie(vdev->pdev))
333 return 1;
6140a8f5
AW
334 } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) {
335 return 1;
336 }
89e1f7d4
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337
338 return 0;
339}
340
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341static int vfio_pci_count_devs(struct pci_dev *pdev, void *data)
342{
343 (*(int *)data)++;
344 return 0;
345}
346
347struct vfio_pci_fill_info {
348 int max;
349 int cur;
350 struct vfio_pci_dependent_device *devices;
351};
352
353static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data)
354{
355 struct vfio_pci_fill_info *fill = data;
356 struct iommu_group *iommu_group;
357
358 if (fill->cur == fill->max)
359 return -EAGAIN; /* Something changed, try again */
360
361 iommu_group = iommu_group_get(&pdev->dev);
362 if (!iommu_group)
363 return -EPERM; /* Cannot reset non-isolated devices */
364
365 fill->devices[fill->cur].group_id = iommu_group_id(iommu_group);
366 fill->devices[fill->cur].segment = pci_domain_nr(pdev->bus);
367 fill->devices[fill->cur].bus = pdev->bus->number;
368 fill->devices[fill->cur].devfn = pdev->devfn;
369 fill->cur++;
370 iommu_group_put(iommu_group);
371 return 0;
372}
373
374struct vfio_pci_group_entry {
375 struct vfio_group *group;
376 int id;
377};
378
379struct vfio_pci_group_info {
380 int count;
381 struct vfio_pci_group_entry *groups;
382};
383
384static int vfio_pci_validate_devs(struct pci_dev *pdev, void *data)
385{
386 struct vfio_pci_group_info *info = data;
387 struct iommu_group *group;
388 int id, i;
389
390 group = iommu_group_get(&pdev->dev);
391 if (!group)
392 return -EPERM;
393
394 id = iommu_group_id(group);
395
396 for (i = 0; i < info->count; i++)
397 if (info->groups[i].id == id)
398 break;
399
400 iommu_group_put(group);
401
402 return (i == info->count) ? -EINVAL : 0;
403}
404
405static bool vfio_pci_dev_below_slot(struct pci_dev *pdev, struct pci_slot *slot)
406{
407 for (; pdev; pdev = pdev->bus->self)
408 if (pdev->bus == slot->bus)
409 return (pdev->slot == slot);
410 return false;
411}
412
413struct vfio_pci_walk_info {
414 int (*fn)(struct pci_dev *, void *data);
415 void *data;
416 struct pci_dev *pdev;
417 bool slot;
418 int ret;
419};
420
421static int vfio_pci_walk_wrapper(struct pci_dev *pdev, void *data)
422{
423 struct vfio_pci_walk_info *walk = data;
424
425 if (!walk->slot || vfio_pci_dev_below_slot(pdev, walk->pdev->slot))
426 walk->ret = walk->fn(pdev, walk->data);
427
428 return walk->ret;
429}
430
431static int vfio_pci_for_each_slot_or_bus(struct pci_dev *pdev,
432 int (*fn)(struct pci_dev *,
433 void *data), void *data,
434 bool slot)
435{
436 struct vfio_pci_walk_info walk = {
437 .fn = fn, .data = data, .pdev = pdev, .slot = slot, .ret = 0,
438 };
439
440 pci_walk_bus(pdev->bus, vfio_pci_walk_wrapper, &walk);
441
442 return walk.ret;
443}
444
188ad9d6
AW
445static int msix_sparse_mmap_cap(struct vfio_pci_device *vdev,
446 struct vfio_info_cap *caps)
447{
448 struct vfio_info_cap_header *header;
449 struct vfio_region_info_cap_sparse_mmap *sparse;
450 size_t end, size;
451 int nr_areas = 2, i = 0;
452
453 end = pci_resource_len(vdev->pdev, vdev->msix_bar);
454
455 /* If MSI-X table is aligned to the start or end, only one area */
456 if (((vdev->msix_offset & PAGE_MASK) == 0) ||
457 (PAGE_ALIGN(vdev->msix_offset + vdev->msix_size) >= end))
458 nr_areas = 1;
459
460 size = sizeof(*sparse) + (nr_areas * sizeof(*sparse->areas));
461
462 header = vfio_info_cap_add(caps, size,
463 VFIO_REGION_INFO_CAP_SPARSE_MMAP, 1);
464 if (IS_ERR(header))
465 return PTR_ERR(header);
466
467 sparse = container_of(header,
468 struct vfio_region_info_cap_sparse_mmap, header);
469 sparse->nr_areas = nr_areas;
470
471 if (vdev->msix_offset & PAGE_MASK) {
472 sparse->areas[i].offset = 0;
473 sparse->areas[i].size = vdev->msix_offset & PAGE_MASK;
474 i++;
475 }
476
477 if (PAGE_ALIGN(vdev->msix_offset + vdev->msix_size) < end) {
478 sparse->areas[i].offset = PAGE_ALIGN(vdev->msix_offset +
479 vdev->msix_size);
480 sparse->areas[i].size = end - sparse->areas[i].offset;
481 i++;
482 }
483
484 return 0;
485}
486
28541d41
AW
487static int region_type_cap(struct vfio_pci_device *vdev,
488 struct vfio_info_cap *caps,
489 unsigned int type, unsigned int subtype)
490{
491 struct vfio_info_cap_header *header;
492 struct vfio_region_info_cap_type *cap;
493
494 header = vfio_info_cap_add(caps, sizeof(*cap),
495 VFIO_REGION_INFO_CAP_TYPE, 1);
496 if (IS_ERR(header))
497 return PTR_ERR(header);
498
499 cap = container_of(header, struct vfio_region_info_cap_type, header);
500 cap->type = type;
501 cap->subtype = subtype;
502
503 return 0;
504}
505
506int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
507 unsigned int type, unsigned int subtype,
508 const struct vfio_pci_regops *ops,
509 size_t size, u32 flags, void *data)
510{
511 struct vfio_pci_region *region;
512
513 region = krealloc(vdev->region,
514 (vdev->num_regions + 1) * sizeof(*region),
515 GFP_KERNEL);
516 if (!region)
517 return -ENOMEM;
518
519 vdev->region = region;
520 vdev->region[vdev->num_regions].type = type;
521 vdev->region[vdev->num_regions].subtype = subtype;
522 vdev->region[vdev->num_regions].ops = ops;
523 vdev->region[vdev->num_regions].size = size;
524 vdev->region[vdev->num_regions].flags = flags;
525 vdev->region[vdev->num_regions].data = data;
526
527 vdev->num_regions++;
528
529 return 0;
530}
531
89e1f7d4
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532static long vfio_pci_ioctl(void *device_data,
533 unsigned int cmd, unsigned long arg)
534{
535 struct vfio_pci_device *vdev = device_data;
536 unsigned long minsz;
537
538 if (cmd == VFIO_DEVICE_GET_INFO) {
539 struct vfio_device_info info;
540
541 minsz = offsetofend(struct vfio_device_info, num_irqs);
542
543 if (copy_from_user(&info, (void __user *)arg, minsz))
544 return -EFAULT;
545
546 if (info.argsz < minsz)
547 return -EINVAL;
548
549 info.flags = VFIO_DEVICE_FLAGS_PCI;
550
551 if (vdev->reset_works)
552 info.flags |= VFIO_DEVICE_FLAGS_RESET;
553
28541d41 554 info.num_regions = VFIO_PCI_NUM_REGIONS + vdev->num_regions;
89e1f7d4
AW
555 info.num_irqs = VFIO_PCI_NUM_IRQS;
556
557 return copy_to_user((void __user *)arg, &info, minsz);
558
559 } else if (cmd == VFIO_DEVICE_GET_REGION_INFO) {
560 struct pci_dev *pdev = vdev->pdev;
561 struct vfio_region_info info;
188ad9d6 562 struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
28541d41 563 int i, ret;
89e1f7d4
AW
564
565 minsz = offsetofend(struct vfio_region_info, offset);
566
567 if (copy_from_user(&info, (void __user *)arg, minsz))
568 return -EFAULT;
569
570 if (info.argsz < minsz)
571 return -EINVAL;
572
573 switch (info.index) {
574 case VFIO_PCI_CONFIG_REGION_INDEX:
575 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
576 info.size = pdev->cfg_size;
577 info.flags = VFIO_REGION_INFO_FLAG_READ |
578 VFIO_REGION_INFO_FLAG_WRITE;
579 break;
580 case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
581 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
582 info.size = pci_resource_len(pdev, info.index);
583 if (!info.size) {
584 info.flags = 0;
585 break;
586 }
587
588 info.flags = VFIO_REGION_INFO_FLAG_READ |
589 VFIO_REGION_INFO_FLAG_WRITE;
1d53a3a7
FB
590 if (IS_ENABLED(CONFIG_VFIO_PCI_MMAP) &&
591 pci_resource_flags(pdev, info.index) &
188ad9d6 592 IORESOURCE_MEM && info.size >= PAGE_SIZE) {
89e1f7d4 593 info.flags |= VFIO_REGION_INFO_FLAG_MMAP;
188ad9d6
AW
594 if (info.index == vdev->msix_bar) {
595 ret = msix_sparse_mmap_cap(vdev, &caps);
596 if (ret)
597 return ret;
598 }
599 }
600
89e1f7d4
AW
601 break;
602 case VFIO_PCI_ROM_REGION_INDEX:
603 {
604 void __iomem *io;
605 size_t size;
606
607 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
608 info.flags = 0;
609
610 /* Report the BAR size, not the ROM size */
611 info.size = pci_resource_len(pdev, info.index);
a13b6459
AW
612 if (!info.size) {
613 /* Shadow ROMs appear as PCI option ROMs */
614 if (pdev->resource[PCI_ROM_RESOURCE].flags &
615 IORESOURCE_ROM_SHADOW)
616 info.size = 0x20000;
617 else
618 break;
619 }
89e1f7d4
AW
620
621 /* Is it really there? */
622 io = pci_map_rom(pdev, &size);
623 if (!io || !size) {
624 info.size = 0;
625 break;
626 }
627 pci_unmap_rom(pdev, io);
628
629 info.flags = VFIO_REGION_INFO_FLAG_READ;
630 break;
631 }
84237a82
AW
632 case VFIO_PCI_VGA_REGION_INDEX:
633 if (!vdev->has_vga)
634 return -EINVAL;
635
636 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
637 info.size = 0xc0000;
638 info.flags = VFIO_REGION_INFO_FLAG_READ |
639 VFIO_REGION_INFO_FLAG_WRITE;
640
641 break;
89e1f7d4 642 default:
28541d41
AW
643 if (info.index >=
644 VFIO_PCI_NUM_REGIONS + vdev->num_regions)
645 return -EINVAL;
646
647 i = info.index - VFIO_PCI_NUM_REGIONS;
648
649 info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
650 info.size = vdev->region[i].size;
651 info.flags = vdev->region[i].flags;
652
653 ret = region_type_cap(vdev, &caps,
654 vdev->region[i].type,
655 vdev->region[i].subtype);
656 if (ret)
657 return ret;
89e1f7d4
AW
658 }
659
188ad9d6
AW
660 if (caps.size) {
661 info.flags |= VFIO_REGION_INFO_FLAG_CAPS;
662 if (info.argsz < sizeof(info) + caps.size) {
663 info.argsz = sizeof(info) + caps.size;
664 info.cap_offset = 0;
665 } else {
666 vfio_info_cap_shift(&caps, sizeof(info));
667 ret = copy_to_user((void __user *)arg +
668 sizeof(info), caps.buf,
669 caps.size);
670 if (ret) {
671 kfree(caps.buf);
672 return ret;
673 }
674 info.cap_offset = sizeof(info);
675 }
676
677 kfree(caps.buf);
678 }
679
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AW
680 return copy_to_user((void __user *)arg, &info, minsz);
681
682 } else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) {
683 struct vfio_irq_info info;
684
685 minsz = offsetofend(struct vfio_irq_info, count);
686
687 if (copy_from_user(&info, (void __user *)arg, minsz))
688 return -EFAULT;
689
690 if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
691 return -EINVAL;
692
dad9f897
VMP
693 switch (info.index) {
694 case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
6140a8f5 695 case VFIO_PCI_REQ_IRQ_INDEX:
dad9f897
VMP
696 break;
697 case VFIO_PCI_ERR_IRQ_INDEX:
698 if (pci_is_pcie(vdev->pdev))
699 break;
700 /* pass thru to return error */
701 default:
702 return -EINVAL;
703 }
704
89e1f7d4
AW
705 info.flags = VFIO_IRQ_INFO_EVENTFD;
706
707 info.count = vfio_pci_get_irq_count(vdev, info.index);
708
709 if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
710 info.flags |= (VFIO_IRQ_INFO_MASKABLE |
711 VFIO_IRQ_INFO_AUTOMASKED);
712 else
713 info.flags |= VFIO_IRQ_INFO_NORESIZE;
714
715 return copy_to_user((void __user *)arg, &info, minsz);
716
717 } else if (cmd == VFIO_DEVICE_SET_IRQS) {
718 struct vfio_irq_set hdr;
719 u8 *data = NULL;
720 int ret = 0;
721
722 minsz = offsetofend(struct vfio_irq_set, count);
723
724 if (copy_from_user(&hdr, (void __user *)arg, minsz))
725 return -EFAULT;
726
727 if (hdr.argsz < minsz || hdr.index >= VFIO_PCI_NUM_IRQS ||
728 hdr.flags & ~(VFIO_IRQ_SET_DATA_TYPE_MASK |
729 VFIO_IRQ_SET_ACTION_TYPE_MASK))
730 return -EINVAL;
731
732 if (!(hdr.flags & VFIO_IRQ_SET_DATA_NONE)) {
733 size_t size;
904c680c 734 int max = vfio_pci_get_irq_count(vdev, hdr.index);
89e1f7d4
AW
735
736 if (hdr.flags & VFIO_IRQ_SET_DATA_BOOL)
737 size = sizeof(uint8_t);
738 else if (hdr.flags & VFIO_IRQ_SET_DATA_EVENTFD)
739 size = sizeof(int32_t);
740 else
741 return -EINVAL;
742
743 if (hdr.argsz - minsz < hdr.count * size ||
904c680c 744 hdr.start >= max || hdr.start + hdr.count > max)
89e1f7d4
AW
745 return -EINVAL;
746
3a1f7041
FW
747 data = memdup_user((void __user *)(arg + minsz),
748 hdr.count * size);
749 if (IS_ERR(data))
750 return PTR_ERR(data);
89e1f7d4
AW
751 }
752
753 mutex_lock(&vdev->igate);
754
755 ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index,
756 hdr.start, hdr.count, data);
757
758 mutex_unlock(&vdev->igate);
759 kfree(data);
760
761 return ret;
762
8b27ee60 763 } else if (cmd == VFIO_DEVICE_RESET) {
89e1f7d4 764 return vdev->reset_works ?
890ed578 765 pci_try_reset_function(vdev->pdev) : -EINVAL;
89e1f7d4 766
8b27ee60
AW
767 } else if (cmd == VFIO_DEVICE_GET_PCI_HOT_RESET_INFO) {
768 struct vfio_pci_hot_reset_info hdr;
769 struct vfio_pci_fill_info fill = { 0 };
770 struct vfio_pci_dependent_device *devices = NULL;
771 bool slot = false;
772 int ret = 0;
773
774 minsz = offsetofend(struct vfio_pci_hot_reset_info, count);
775
776 if (copy_from_user(&hdr, (void __user *)arg, minsz))
777 return -EFAULT;
778
779 if (hdr.argsz < minsz)
780 return -EINVAL;
781
782 hdr.flags = 0;
783
784 /* Can we do a slot or bus reset or neither? */
785 if (!pci_probe_reset_slot(vdev->pdev->slot))
786 slot = true;
787 else if (pci_probe_reset_bus(vdev->pdev->bus))
788 return -ENODEV;
789
790 /* How many devices are affected? */
791 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
792 vfio_pci_count_devs,
793 &fill.max, slot);
794 if (ret)
795 return ret;
796
797 WARN_ON(!fill.max); /* Should always be at least one */
798
799 /*
800 * If there's enough space, fill it now, otherwise return
801 * -ENOSPC and the number of devices affected.
802 */
803 if (hdr.argsz < sizeof(hdr) + (fill.max * sizeof(*devices))) {
804 ret = -ENOSPC;
805 hdr.count = fill.max;
806 goto reset_info_exit;
807 }
808
809 devices = kcalloc(fill.max, sizeof(*devices), GFP_KERNEL);
810 if (!devices)
811 return -ENOMEM;
812
813 fill.devices = devices;
814
815 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
816 vfio_pci_fill_devs,
817 &fill, slot);
818
819 /*
820 * If a device was removed between counting and filling,
821 * we may come up short of fill.max. If a device was
822 * added, we'll have a return of -EAGAIN above.
823 */
824 if (!ret)
825 hdr.count = fill.cur;
826
827reset_info_exit:
828 if (copy_to_user((void __user *)arg, &hdr, minsz))
829 ret = -EFAULT;
830
831 if (!ret) {
832 if (copy_to_user((void __user *)(arg + minsz), devices,
833 hdr.count * sizeof(*devices)))
834 ret = -EFAULT;
835 }
836
837 kfree(devices);
838 return ret;
839
840 } else if (cmd == VFIO_DEVICE_PCI_HOT_RESET) {
841 struct vfio_pci_hot_reset hdr;
842 int32_t *group_fds;
843 struct vfio_pci_group_entry *groups;
844 struct vfio_pci_group_info info;
845 bool slot = false;
846 int i, count = 0, ret = 0;
847
848 minsz = offsetofend(struct vfio_pci_hot_reset, count);
849
850 if (copy_from_user(&hdr, (void __user *)arg, minsz))
851 return -EFAULT;
852
853 if (hdr.argsz < minsz || hdr.flags)
854 return -EINVAL;
855
856 /* Can we do a slot or bus reset or neither? */
857 if (!pci_probe_reset_slot(vdev->pdev->slot))
858 slot = true;
859 else if (pci_probe_reset_bus(vdev->pdev->bus))
860 return -ENODEV;
861
862 /*
863 * We can't let userspace give us an arbitrarily large
864 * buffer to copy, so verify how many we think there
865 * could be. Note groups can have multiple devices so
866 * one group per device is the max.
867 */
868 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
869 vfio_pci_count_devs,
870 &count, slot);
871 if (ret)
872 return ret;
873
874 /* Somewhere between 1 and count is OK */
875 if (!hdr.count || hdr.count > count)
876 return -EINVAL;
877
878 group_fds = kcalloc(hdr.count, sizeof(*group_fds), GFP_KERNEL);
879 groups = kcalloc(hdr.count, sizeof(*groups), GFP_KERNEL);
880 if (!group_fds || !groups) {
881 kfree(group_fds);
882 kfree(groups);
883 return -ENOMEM;
884 }
885
886 if (copy_from_user(group_fds, (void __user *)(arg + minsz),
887 hdr.count * sizeof(*group_fds))) {
888 kfree(group_fds);
889 kfree(groups);
890 return -EFAULT;
891 }
892
893 /*
894 * For each group_fd, get the group through the vfio external
895 * user interface and store the group and iommu ID. This
896 * ensures the group is held across the reset.
897 */
898 for (i = 0; i < hdr.count; i++) {
899 struct vfio_group *group;
900 struct fd f = fdget(group_fds[i]);
901 if (!f.file) {
902 ret = -EBADF;
903 break;
904 }
905
906 group = vfio_group_get_external_user(f.file);
907 fdput(f);
908 if (IS_ERR(group)) {
909 ret = PTR_ERR(group);
910 break;
911 }
912
913 groups[i].group = group;
914 groups[i].id = vfio_external_user_iommu_id(group);
915 }
916
917 kfree(group_fds);
918
919 /* release reference to groups on error */
920 if (ret)
921 goto hot_reset_release;
922
923 info.count = hdr.count;
924 info.groups = groups;
925
926 /*
927 * Test whether all the affected devices are contained
928 * by the set of groups provided by the user.
929 */
930 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
931 vfio_pci_validate_devs,
932 &info, slot);
933 if (!ret)
934 /* User has access, do the reset */
890ed578
AW
935 ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
936 pci_try_reset_bus(vdev->pdev->bus);
8b27ee60
AW
937
938hot_reset_release:
939 for (i--; i >= 0; i--)
940 vfio_group_put_external_user(groups[i].group);
941
942 kfree(groups);
943 return ret;
944 }
945
89e1f7d4
AW
946 return -ENOTTY;
947}
948
5b279a11
AW
949static ssize_t vfio_pci_rw(void *device_data, char __user *buf,
950 size_t count, loff_t *ppos, bool iswrite)
89e1f7d4
AW
951{
952 unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
953 struct vfio_pci_device *vdev = device_data;
89e1f7d4 954
28541d41 955 if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
89e1f7d4
AW
956 return -EINVAL;
957
5b279a11
AW
958 switch (index) {
959 case VFIO_PCI_CONFIG_REGION_INDEX:
906ee99d
AW
960 return vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);
961
5b279a11
AW
962 case VFIO_PCI_ROM_REGION_INDEX:
963 if (iswrite)
964 return -EINVAL;
906ee99d 965 return vfio_pci_bar_rw(vdev, buf, count, ppos, false);
89e1f7d4 966
5b279a11 967 case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
906ee99d 968 return vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);
84237a82
AW
969
970 case VFIO_PCI_VGA_REGION_INDEX:
971 return vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite);
28541d41
AW
972 default:
973 index -= VFIO_PCI_NUM_REGIONS;
974 return vdev->region[index].ops->rw(vdev, buf,
975 count, ppos, iswrite);
5b279a11
AW
976 }
977
89e1f7d4
AW
978 return -EINVAL;
979}
980
5b279a11
AW
981static ssize_t vfio_pci_read(void *device_data, char __user *buf,
982 size_t count, loff_t *ppos)
983{
906ee99d
AW
984 if (!count)
985 return 0;
986
5b279a11
AW
987 return vfio_pci_rw(device_data, buf, count, ppos, false);
988}
989
89e1f7d4
AW
990static ssize_t vfio_pci_write(void *device_data, const char __user *buf,
991 size_t count, loff_t *ppos)
992{
906ee99d
AW
993 if (!count)
994 return 0;
995
996 return vfio_pci_rw(device_data, (char __user *)buf, count, ppos, true);
89e1f7d4
AW
997}
998
999static int vfio_pci_mmap(void *device_data, struct vm_area_struct *vma)
1000{
1001 struct vfio_pci_device *vdev = device_data;
1002 struct pci_dev *pdev = vdev->pdev;
1003 unsigned int index;
34002f54 1004 u64 phys_len, req_len, pgoff, req_start;
89e1f7d4
AW
1005 int ret;
1006
1007 index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
1008
1009 if (vma->vm_end < vma->vm_start)
1010 return -EINVAL;
1011 if ((vma->vm_flags & VM_SHARED) == 0)
1012 return -EINVAL;
1013 if (index >= VFIO_PCI_ROM_REGION_INDEX)
1014 return -EINVAL;
1015 if (!(pci_resource_flags(pdev, index) & IORESOURCE_MEM))
1016 return -EINVAL;
1017
1018 phys_len = pci_resource_len(pdev, index);
1019 req_len = vma->vm_end - vma->vm_start;
1020 pgoff = vma->vm_pgoff &
1021 ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
1022 req_start = pgoff << PAGE_SHIFT;
1023
1024 if (phys_len < PAGE_SIZE || req_start + req_len > phys_len)
1025 return -EINVAL;
1026
1027 if (index == vdev->msix_bar) {
1028 /*
1029 * Disallow mmaps overlapping the MSI-X table; users don't
1030 * get to touch this directly. We could find somewhere
1031 * else to map the overlap, but page granularity is only
1032 * a recommendation, not a requirement, so the user needs
1033 * to know which bits are real. Requiring them to mmap
1034 * around the table makes that clear.
1035 */
1036
1037 /* If neither entirely above nor below, then it overlaps */
1038 if (!(req_start >= vdev->msix_offset + vdev->msix_size ||
1039 req_start + req_len <= vdev->msix_offset))
1040 return -EINVAL;
1041 }
1042
1043 /*
1044 * Even though we don't make use of the barmap for the mmap,
1045 * we need to request the region and the barmap tracks that.
1046 */
1047 if (!vdev->barmap[index]) {
1048 ret = pci_request_selected_regions(pdev,
1049 1 << index, "vfio-pci");
1050 if (ret)
1051 return ret;
1052
1053 vdev->barmap[index] = pci_iomap(pdev, index, 0);
1054 }
1055
1056 vma->vm_private_data = vdev;
89e1f7d4 1057 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
34002f54 1058 vma->vm_pgoff = (pci_resource_start(pdev, index) >> PAGE_SHIFT) + pgoff;
89e1f7d4 1059
34002f54 1060 return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
89e1f7d4
AW
1061 req_len, vma->vm_page_prot);
1062}
1063
6140a8f5
AW
1064static void vfio_pci_request(void *device_data, unsigned int count)
1065{
1066 struct vfio_pci_device *vdev = device_data;
1067
1068 mutex_lock(&vdev->igate);
1069
1070 if (vdev->req_trigger) {
5f55d2ae
AW
1071 if (!(count % 10))
1072 dev_notice_ratelimited(&vdev->pdev->dev,
1073 "Relaying device request to user (#%u)\n",
1074 count);
6140a8f5 1075 eventfd_signal(vdev->req_trigger, 1);
5f55d2ae
AW
1076 } else if (count == 0) {
1077 dev_warn(&vdev->pdev->dev,
1078 "No device request channel registered, blocked until released by user\n");
6140a8f5
AW
1079 }
1080
1081 mutex_unlock(&vdev->igate);
1082}
1083
89e1f7d4
AW
1084static const struct vfio_device_ops vfio_pci_ops = {
1085 .name = "vfio-pci",
1086 .open = vfio_pci_open,
1087 .release = vfio_pci_release,
1088 .ioctl = vfio_pci_ioctl,
1089 .read = vfio_pci_read,
1090 .write = vfio_pci_write,
1091 .mmap = vfio_pci_mmap,
6140a8f5 1092 .request = vfio_pci_request,
89e1f7d4
AW
1093};
1094
1095static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1096{
89e1f7d4
AW
1097 struct vfio_pci_device *vdev;
1098 struct iommu_group *group;
1099 int ret;
1100
7c2e211f 1101 if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL)
89e1f7d4
AW
1102 return -EINVAL;
1103
03a76b60 1104 group = vfio_iommu_group_get(&pdev->dev);
89e1f7d4
AW
1105 if (!group)
1106 return -EINVAL;
1107
1108 vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
1109 if (!vdev) {
03a76b60 1110 vfio_iommu_group_put(group, &pdev->dev);
89e1f7d4
AW
1111 return -ENOMEM;
1112 }
1113
1114 vdev->pdev = pdev;
1115 vdev->irq_type = VFIO_PCI_NUM_IRQS;
1116 mutex_init(&vdev->igate);
1117 spin_lock_init(&vdev->irqlock);
89e1f7d4
AW
1118
1119 ret = vfio_add_group_dev(&pdev->dev, &vfio_pci_ops, vdev);
1120 if (ret) {
03a76b60 1121 vfio_iommu_group_put(group, &pdev->dev);
89e1f7d4 1122 kfree(vdev);
5a0ff177 1123 return ret;
89e1f7d4
AW
1124 }
1125
ecaa1f6a
AW
1126 if (vfio_pci_is_vga(pdev)) {
1127 vga_client_register(pdev, vdev, NULL, vfio_pci_set_vga_decode);
1128 vga_set_legacy_decoding(pdev,
1129 vfio_pci_set_vga_decode(vdev, false));
1130 }
1131
6eb70187
AW
1132 if (!disable_idle_d3) {
1133 /*
1134 * pci-core sets the device power state to an unknown value at
1135 * bootup and after being removed from a driver. The only
1136 * transition it allows from this unknown state is to D0, which
1137 * typically happens when a driver calls pci_enable_device().
1138 * We're not ready to enable the device yet, but we do want to
1139 * be able to get to D3. Therefore first do a D0 transition
1140 * before going to D3.
1141 */
1142 pci_set_power_state(pdev, PCI_D0);
1143 pci_set_power_state(pdev, PCI_D3hot);
1144 }
1145
89e1f7d4
AW
1146 return ret;
1147}
1148
1149static void vfio_pci_remove(struct pci_dev *pdev)
1150{
1151 struct vfio_pci_device *vdev;
1152
1153 vdev = vfio_del_group_dev(&pdev->dev);
ecaa1f6a
AW
1154 if (!vdev)
1155 return;
1156
03a76b60 1157 vfio_iommu_group_put(pdev->dev.iommu_group, &pdev->dev);
28541d41 1158 kfree(vdev->region);
ecaa1f6a
AW
1159 kfree(vdev);
1160
1161 if (vfio_pci_is_vga(pdev)) {
1162 vga_client_register(pdev, NULL, NULL, NULL);
1163 vga_set_legacy_decoding(pdev,
1164 VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
1165 VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM);
61d79256 1166 }
6eb70187
AW
1167
1168 if (!disable_idle_d3)
1169 pci_set_power_state(pdev, PCI_D0);
89e1f7d4
AW
1170}
1171
dad9f897
VMP
1172static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev,
1173 pci_channel_state_t state)
1174{
1175 struct vfio_pci_device *vdev;
1176 struct vfio_device *device;
1177
1178 device = vfio_device_get_from_dev(&pdev->dev);
1179 if (device == NULL)
1180 return PCI_ERS_RESULT_DISCONNECT;
1181
1182 vdev = vfio_device_data(device);
1183 if (vdev == NULL) {
1184 vfio_device_put(device);
1185 return PCI_ERS_RESULT_DISCONNECT;
1186 }
1187
3be3a074
AW
1188 mutex_lock(&vdev->igate);
1189
dad9f897
VMP
1190 if (vdev->err_trigger)
1191 eventfd_signal(vdev->err_trigger, 1);
1192
3be3a074
AW
1193 mutex_unlock(&vdev->igate);
1194
dad9f897
VMP
1195 vfio_device_put(device);
1196
1197 return PCI_ERS_RESULT_CAN_RECOVER;
1198}
1199
7d10f4e0 1200static const struct pci_error_handlers vfio_err_handlers = {
dad9f897
VMP
1201 .error_detected = vfio_pci_aer_err_detected,
1202};
1203
89e1f7d4
AW
1204static struct pci_driver vfio_pci_driver = {
1205 .name = "vfio-pci",
1206 .id_table = NULL, /* only dynamic ids */
1207 .probe = vfio_pci_probe,
1208 .remove = vfio_pci_remove,
dad9f897 1209 .err_handler = &vfio_err_handlers,
89e1f7d4
AW
1210};
1211
93899a67
AW
1212struct vfio_devices {
1213 struct vfio_device **devices;
1214 int cur_index;
1215 int max_index;
1216};
bc4fba77 1217
93899a67 1218static int vfio_pci_get_devs(struct pci_dev *pdev, void *data)
bc4fba77 1219{
93899a67 1220 struct vfio_devices *devs = data;
20f30017 1221 struct vfio_device *device;
bc4fba77 1222
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1223 if (devs->cur_index == devs->max_index)
1224 return -ENOSPC;
bc4fba77 1225
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1226 device = vfio_device_get_from_dev(&pdev->dev);
1227 if (!device)
93899a67 1228 return -EINVAL;
bc4fba77 1229
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1230 if (pci_dev_driver(pdev) != &vfio_pci_driver) {
1231 vfio_device_put(device);
1232 return -EBUSY;
1233 }
1234
1235 devs->devices[devs->cur_index++] = device;
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1236 return 0;
1237}
1238
1239/*
1240 * Attempt to do a bus/slot reset if there are devices affected by a reset for
1241 * this device that are needs_reset and all of the affected devices are unused
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1242 * (!refcnt). Callers are required to hold driver_lock when calling this to
1243 * prevent device opens and concurrent bus reset attempts. We prevent device
1244 * unbinds by acquiring and holding a reference to the vfio_device.
1245 *
1246 * NB: vfio-core considers a group to be viable even if some devices are
1247 * bound to drivers like pci-stub or pcieport. Here we require all devices
1248 * to be bound to vfio_pci since that's the only way we can be sure they
1249 * stay put.
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1250 */
1251static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev)
1252{
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1253 struct vfio_devices devs = { .cur_index = 0 };
1254 int i = 0, ret = -EINVAL;
bc4fba77 1255 bool needs_reset = false, slot = false;
93899a67 1256 struct vfio_pci_device *tmp;
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1257
1258 if (!pci_probe_reset_slot(vdev->pdev->slot))
1259 slot = true;
1260 else if (pci_probe_reset_bus(vdev->pdev->bus))
1261 return;
1262
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1263 if (vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
1264 &i, slot) || !i)
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1265 return;
1266
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1267 devs.max_index = i;
1268 devs.devices = kcalloc(i, sizeof(struct vfio_device *), GFP_KERNEL);
1269 if (!devs.devices)
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1270 return;
1271
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1272 if (vfio_pci_for_each_slot_or_bus(vdev->pdev,
1273 vfio_pci_get_devs, &devs, slot))
1274 goto put_devs;
1275
1276 for (i = 0; i < devs.cur_index; i++) {
1277 tmp = vfio_device_data(devs.devices[i]);
1278 if (tmp->needs_reset)
1279 needs_reset = true;
1280 if (tmp->refcnt)
1281 goto put_devs;
1282 }
1283
1284 if (needs_reset)
1285 ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
1286 pci_try_reset_bus(vdev->pdev->bus);
1287
1288put_devs:
1289 for (i = 0; i < devs.cur_index; i++) {
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1290 tmp = vfio_device_data(devs.devices[i]);
1291 if (!ret)
93899a67 1292 tmp->needs_reset = false;
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1293
1294 if (!tmp->refcnt && !disable_idle_d3)
1295 pci_set_power_state(tmp->pdev, PCI_D3hot);
1296
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1297 vfio_device_put(devs.devices[i]);
1298 }
1299
1300 kfree(devs.devices);
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1301}
1302
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1303static void __exit vfio_pci_cleanup(void)
1304{
1305 pci_unregister_driver(&vfio_pci_driver);
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1306 vfio_pci_uninit_perm_bits();
1307}
1308
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1309static void __init vfio_pci_fill_ids(void)
1310{
1311 char *p, *id;
1312 int rc;
1313
1314 /* no ids passed actually */
1315 if (ids[0] == '\0')
1316 return;
1317
1318 /* add ids specified in the module parameter */
1319 p = ids;
1320 while ((id = strsep(&p, ","))) {
1321 unsigned int vendor, device, subvendor = PCI_ANY_ID,
1322 subdevice = PCI_ANY_ID, class = 0, class_mask = 0;
1323 int fields;
1324
1325 if (!strlen(id))
1326 continue;
1327
1328 fields = sscanf(id, "%x:%x:%x:%x:%x:%x",
1329 &vendor, &device, &subvendor, &subdevice,
1330 &class, &class_mask);
1331
1332 if (fields < 2) {
1333 pr_warn("invalid id string \"%s\"\n", id);
1334 continue;
1335 }
1336
1337 rc = pci_add_dynid(&vfio_pci_driver, vendor, device,
1338 subvendor, subdevice, class, class_mask, 0);
1339 if (rc)
1340 pr_warn("failed to add dynamic id [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x (%d)\n",
1341 vendor, device, subvendor, subdevice,
1342 class, class_mask, rc);
1343 else
1344 pr_info("add [%04hx:%04hx[%04hx:%04hx]] class %#08x/%08x\n",
1345 vendor, device, subvendor, subdevice,
1346 class, class_mask);
1347 }
1348}
1349
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1350static int __init vfio_pci_init(void)
1351{
1352 int ret;
1353
1354 /* Allocate shared config space permision data used by all devices */
1355 ret = vfio_pci_init_perm_bits();
1356 if (ret)
1357 return ret;
1358
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1359 /* Register and scan for devices */
1360 ret = pci_register_driver(&vfio_pci_driver);
1361 if (ret)
1362 goto out_driver;
1363
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1364 vfio_pci_fill_ids();
1365
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1366 return 0;
1367
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1368out_driver:
1369 vfio_pci_uninit_perm_bits();
1370 return ret;
1371}
1372
1373module_init(vfio_pci_init);
1374module_exit(vfio_pci_cleanup);
1375
1376MODULE_VERSION(DRIVER_VERSION);
1377MODULE_LICENSE("GPL v2");
1378MODULE_AUTHOR(DRIVER_AUTHOR);
1379MODULE_DESCRIPTION(DRIVER_DESC);