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e7fb9c4a AP |
1 | /* |
2 | * l4f00242t03.c -- support for Epson L4F00242T03 LCD | |
3 | * | |
4 | * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved. | |
5 | * | |
6 | * Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com> | |
e4f8ae70 | 7 | * Inspired by Marek Vasut work in l4f00242t03.c |
e7fb9c4a AP |
8 | * |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
6677110b JH |
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
15 | ||
e7fb9c4a AP |
16 | #include <linux/device.h> |
17 | #include <linux/kernel.h> | |
18 | #include <linux/delay.h> | |
355b200b | 19 | #include <linux/module.h> |
e7fb9c4a AP |
20 | #include <linux/gpio.h> |
21 | #include <linux/lcd.h> | |
5a0e3ad6 | 22 | #include <linux/slab.h> |
e7fb9c4a AP |
23 | #include <linux/regulator/consumer.h> |
24 | ||
25 | #include <linux/spi/spi.h> | |
26 | #include <linux/spi/l4f00242t03.h> | |
27 | ||
28 | struct l4f00242t03_priv { | |
29 | struct spi_device *spi; | |
30 | struct lcd_device *ld; | |
95558ad1 | 31 | int lcd_state; |
e7fb9c4a AP |
32 | struct regulator *io_reg; |
33 | struct regulator *core_reg; | |
34 | }; | |
35 | ||
e7fb9c4a AP |
36 | static void l4f00242t03_reset(unsigned int gpio) |
37 | { | |
38 | pr_debug("l4f00242t03_reset.\n"); | |
39 | gpio_set_value(gpio, 1); | |
40 | mdelay(100); | |
41 | gpio_set_value(gpio, 0); | |
42 | mdelay(10); /* tRES >= 100us */ | |
43 | gpio_set_value(gpio, 1); | |
44 | mdelay(20); | |
45 | } | |
46 | ||
47 | #define param(x) ((x) | 0x100) | |
48 | ||
49 | static void l4f00242t03_lcd_init(struct spi_device *spi) | |
50 | { | |
51 | struct l4f00242t03_pdata *pdata = spi->dev.platform_data; | |
52 | struct l4f00242t03_priv *priv = dev_get_drvdata(&spi->dev); | |
53 | const u16 cmd[] = { 0x36, param(0), 0x3A, param(0x60) }; | |
54 | ||
55 | dev_dbg(&spi->dev, "initializing LCD\n"); | |
56 | ||
0556dc34 MB |
57 | regulator_set_voltage(priv->io_reg, 1800000, 1800000); |
58 | regulator_enable(priv->io_reg); | |
e7fb9c4a | 59 | |
0556dc34 MB |
60 | regulator_set_voltage(priv->core_reg, 2800000, 2800000); |
61 | regulator_enable(priv->core_reg); | |
e7fb9c4a | 62 | |
aff5ce6c AP |
63 | l4f00242t03_reset(pdata->reset_gpio); |
64 | ||
e7fb9c4a AP |
65 | gpio_set_value(pdata->data_enable_gpio, 1); |
66 | msleep(60); | |
67 | spi_write(spi, (const u8 *)cmd, ARRAY_SIZE(cmd) * sizeof(u16)); | |
68 | } | |
69 | ||
95558ad1 AP |
70 | static void l4f00242t03_lcd_powerdown(struct spi_device *spi) |
71 | { | |
72 | struct l4f00242t03_pdata *pdata = spi->dev.platform_data; | |
73 | struct l4f00242t03_priv *priv = dev_get_drvdata(&spi->dev); | |
74 | ||
75 | dev_dbg(&spi->dev, "Powering down LCD\n"); | |
76 | ||
77 | gpio_set_value(pdata->data_enable_gpio, 0); | |
78 | ||
0556dc34 MB |
79 | regulator_disable(priv->io_reg); |
80 | regulator_disable(priv->core_reg); | |
95558ad1 AP |
81 | } |
82 | ||
83 | static int l4f00242t03_lcd_power_get(struct lcd_device *ld) | |
84 | { | |
85 | struct l4f00242t03_priv *priv = lcd_get_data(ld); | |
86 | ||
87 | return priv->lcd_state; | |
88 | } | |
89 | ||
e7fb9c4a AP |
90 | static int l4f00242t03_lcd_power_set(struct lcd_device *ld, int power) |
91 | { | |
92 | struct l4f00242t03_priv *priv = lcd_get_data(ld); | |
93 | struct spi_device *spi = priv->spi; | |
94 | ||
95 | const u16 slpout = 0x11; | |
96 | const u16 dison = 0x29; | |
97 | ||
98 | const u16 slpin = 0x10; | |
99 | const u16 disoff = 0x28; | |
100 | ||
4dbdf886 | 101 | if (power <= FB_BLANK_NORMAL) { |
95558ad1 AP |
102 | if (priv->lcd_state <= FB_BLANK_NORMAL) { |
103 | /* Do nothing, the LCD is running */ | |
104 | } else if (priv->lcd_state < FB_BLANK_POWERDOWN) { | |
105 | dev_dbg(&spi->dev, "Resuming LCD\n"); | |
106 | ||
107 | spi_write(spi, (const u8 *)&slpout, sizeof(u16)); | |
108 | msleep(60); | |
109 | spi_write(spi, (const u8 *)&dison, sizeof(u16)); | |
110 | } else { | |
111 | /* priv->lcd_state == FB_BLANK_POWERDOWN */ | |
112 | l4f00242t03_lcd_init(spi); | |
113 | priv->lcd_state = FB_BLANK_VSYNC_SUSPEND; | |
114 | l4f00242t03_lcd_power_set(priv->ld, power); | |
115 | } | |
116 | } else if (power < FB_BLANK_POWERDOWN) { | |
117 | if (priv->lcd_state <= FB_BLANK_NORMAL) { | |
118 | /* Send the display in standby */ | |
119 | dev_dbg(&spi->dev, "Standby the LCD\n"); | |
120 | ||
121 | spi_write(spi, (const u8 *)&disoff, sizeof(u16)); | |
122 | msleep(60); | |
123 | spi_write(spi, (const u8 *)&slpin, sizeof(u16)); | |
124 | } else if (priv->lcd_state < FB_BLANK_POWERDOWN) { | |
125 | /* Do nothing, the LCD is already in standby */ | |
126 | } else { | |
127 | /* priv->lcd_state == FB_BLANK_POWERDOWN */ | |
128 | l4f00242t03_lcd_init(spi); | |
129 | priv->lcd_state = FB_BLANK_UNBLANK; | |
130 | l4f00242t03_lcd_power_set(ld, power); | |
131 | } | |
e7fb9c4a | 132 | } else { |
95558ad1 | 133 | /* power == FB_BLANK_POWERDOWN */ |
26bbabc8 AP |
134 | if (priv->lcd_state != FB_BLANK_POWERDOWN) { |
135 | /* Clear the screen before shutting down */ | |
136 | spi_write(spi, (const u8 *)&disoff, sizeof(u16)); | |
137 | msleep(60); | |
138 | l4f00242t03_lcd_powerdown(spi); | |
139 | } | |
e7fb9c4a AP |
140 | } |
141 | ||
95558ad1 AP |
142 | priv->lcd_state = power; |
143 | ||
e7fb9c4a AP |
144 | return 0; |
145 | } | |
146 | ||
147 | static struct lcd_ops l4f_ops = { | |
148 | .set_power = l4f00242t03_lcd_power_set, | |
95558ad1 | 149 | .get_power = l4f00242t03_lcd_power_get, |
e7fb9c4a AP |
150 | }; |
151 | ||
1b9e450d | 152 | static int l4f00242t03_probe(struct spi_device *spi) |
e7fb9c4a AP |
153 | { |
154 | struct l4f00242t03_priv *priv; | |
155 | struct l4f00242t03_pdata *pdata = spi->dev.platform_data; | |
156 | int ret; | |
157 | ||
158 | if (pdata == NULL) { | |
159 | dev_err(&spi->dev, "Uninitialized platform data.\n"); | |
160 | return -EINVAL; | |
161 | } | |
162 | ||
ba4a887a JH |
163 | priv = devm_kzalloc(&spi->dev, sizeof(struct l4f00242t03_priv), |
164 | GFP_KERNEL); | |
e7fb9c4a AP |
165 | |
166 | if (priv == NULL) { | |
167 | dev_err(&spi->dev, "No memory for this device.\n"); | |
beb0a43f | 168 | return -ENOMEM; |
e7fb9c4a AP |
169 | } |
170 | ||
171 | dev_set_drvdata(&spi->dev, priv); | |
172 | spi->bits_per_word = 9; | |
173 | spi_setup(spi); | |
174 | ||
175 | priv->spi = spi; | |
176 | ||
62a5c075 JH |
177 | ret = devm_gpio_request_one(&spi->dev, pdata->reset_gpio, |
178 | GPIOF_OUT_INIT_HIGH, "lcd l4f00242t03 reset"); | |
e7fb9c4a AP |
179 | if (ret) { |
180 | dev_err(&spi->dev, | |
181 | "Unable to get the lcd l4f00242t03 reset gpio.\n"); | |
ba4a887a | 182 | return ret; |
e7fb9c4a AP |
183 | } |
184 | ||
62a5c075 JH |
185 | ret = devm_gpio_request_one(&spi->dev, pdata->data_enable_gpio, |
186 | GPIOF_OUT_INIT_LOW, "lcd l4f00242t03 data enable"); | |
e7fb9c4a AP |
187 | if (ret) { |
188 | dev_err(&spi->dev, | |
189 | "Unable to get the lcd l4f00242t03 data en gpio.\n"); | |
62a5c075 | 190 | return ret; |
e7fb9c4a AP |
191 | } |
192 | ||
0556dc34 MB |
193 | priv->io_reg = regulator_get(&spi->dev, "vdd"); |
194 | if (IS_ERR(priv->io_reg)) { | |
195 | dev_err(&spi->dev, "%s: Unable to get the IO regulator\n", | |
196 | __func__); | |
62a5c075 | 197 | return PTR_ERR(priv->io_reg); |
e7fb9c4a AP |
198 | } |
199 | ||
0556dc34 MB |
200 | priv->core_reg = regulator_get(&spi->dev, "vcore"); |
201 | if (IS_ERR(priv->core_reg)) { | |
d59d9eba | 202 | ret = PTR_ERR(priv->core_reg); |
0556dc34 MB |
203 | dev_err(&spi->dev, "%s: Unable to get the core regulator\n", |
204 | __func__); | |
62a5c075 | 205 | goto err1; |
e7fb9c4a AP |
206 | } |
207 | ||
208 | priv->ld = lcd_device_register("l4f00242t03", | |
209 | &spi->dev, priv, &l4f_ops); | |
210 | if (IS_ERR(priv->ld)) { | |
211 | ret = PTR_ERR(priv->ld); | |
62a5c075 | 212 | goto err2; |
e7fb9c4a AP |
213 | } |
214 | ||
215 | /* Init the LCD */ | |
e7fb9c4a | 216 | l4f00242t03_lcd_init(spi); |
95558ad1 AP |
217 | priv->lcd_state = FB_BLANK_VSYNC_SUSPEND; |
218 | l4f00242t03_lcd_power_set(priv->ld, FB_BLANK_UNBLANK); | |
e7fb9c4a AP |
219 | |
220 | dev_info(&spi->dev, "Epson l4f00242t03 lcd probed.\n"); | |
221 | ||
222 | return 0; | |
223 | ||
62a5c075 | 224 | err2: |
ba4a887a | 225 | regulator_put(priv->core_reg); |
62a5c075 | 226 | err1: |
ba4a887a | 227 | regulator_put(priv->io_reg); |
e7fb9c4a AP |
228 | |
229 | return ret; | |
230 | } | |
231 | ||
7e4b9d0b | 232 | static int l4f00242t03_remove(struct spi_device *spi) |
e7fb9c4a AP |
233 | { |
234 | struct l4f00242t03_priv *priv = dev_get_drvdata(&spi->dev); | |
e7fb9c4a | 235 | |
95558ad1 | 236 | l4f00242t03_lcd_power_set(priv->ld, FB_BLANK_POWERDOWN); |
e7fb9c4a AP |
237 | lcd_device_unregister(priv->ld); |
238 | ||
95558ad1 AP |
239 | dev_set_drvdata(&spi->dev, NULL); |
240 | ||
0556dc34 MB |
241 | regulator_put(priv->io_reg); |
242 | regulator_put(priv->core_reg); | |
e7fb9c4a | 243 | |
e7fb9c4a AP |
244 | return 0; |
245 | } | |
246 | ||
95558ad1 AP |
247 | static void l4f00242t03_shutdown(struct spi_device *spi) |
248 | { | |
249 | struct l4f00242t03_priv *priv = dev_get_drvdata(&spi->dev); | |
250 | ||
251 | if (priv) | |
252 | l4f00242t03_lcd_power_set(priv->ld, FB_BLANK_POWERDOWN); | |
253 | ||
254 | } | |
255 | ||
e7fb9c4a AP |
256 | static struct spi_driver l4f00242t03_driver = { |
257 | .driver = { | |
258 | .name = "l4f00242t03", | |
259 | .owner = THIS_MODULE, | |
260 | }, | |
261 | .probe = l4f00242t03_probe, | |
d1723fa2 | 262 | .remove = l4f00242t03_remove, |
95558ad1 | 263 | .shutdown = l4f00242t03_shutdown, |
e7fb9c4a AP |
264 | }; |
265 | ||
462dd838 | 266 | module_spi_driver(l4f00242t03_driver); |
e7fb9c4a AP |
267 | |
268 | MODULE_AUTHOR("Alberto Panizzo <maramaopercheseimorto@gmail.com>"); | |
269 | MODULE_DESCRIPTION("EPSON L4F00242T03 LCD"); | |
c3cf2e44 | 270 | MODULE_LICENSE("GPL v2"); |