[mirror_ubuntu-bionic-kernel.git] / drivers / video / bfin-t350mcqb-fb.c

/*
 * File:         drivers/video/bfin-t350mcqb-fb.c
 * Based on:
 * Author:       Michael Hennerich <hennerich@blackfin.uclinux.org>
 *
 * Created:
 * Description:  Blackfin LCD Framebufer driver
 *
 *
 * Modified:
 *               Copyright 2004-2007 Analog Devices Inc.
 *
 * Bugs:         Enter bugs at http://blackfin.uclinux.org/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, see the file COPYING, or write
 * to the Free Software Foundation, Inc.,
 * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/fb.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/device.h>
#include <linux/backlight.h>
#include <linux/lcd.h>
#include <linux/dma-mapping.h>
#include <linux/platform_device.h>

#include <asm/blackfin.h>
#include <asm/irq.h>
#include <asm/dma-mapping.h>
#include <asm/dma.h>
#include <asm/portmux.h>
#include <asm/gptimers.h>

#define NO_BL_SUPPORT

#define LCD_X_RES		320	/* Horizontal Resolution */
#define LCD_Y_RES		240	/* Vertical Resolution */
#define LCD_BPP			24	/* Bit Per Pixel */

#define	DMA_BUS_SIZE		16
#define	LCD_CLK         	(12*1000*1000)	/* 12MHz */

#define CLOCKS_PER_PIX		3

	/*
	 * HS and VS timing parameters (all in number of PPI clk ticks)
	 */

#define U_LINE		1				/* Blanking Lines */

#define H_ACTPIX	(LCD_X_RES * CLOCKS_PER_PIX)	/* active horizontal pixel */
#define H_PERIOD	(408 * CLOCKS_PER_PIX)		/* HS period */
#define H_PULSE		90				/* HS pulse width */
#define H_START		204				/* first valid pixel */

#define	V_LINES		(LCD_Y_RES + U_LINE)		/* total vertical lines */
#define V_PULSE		(3 * H_PERIOD)			/* VS pulse width (1-5 H_PERIODs) */
#define V_PERIOD	(H_PERIOD * V_LINES)		/* VS period */

#define ACTIVE_VIDEO_MEM_OFFSET	(U_LINE * H_ACTPIX)

#define BFIN_LCD_NBR_PALETTE_ENTRIES	256

#define DRIVER_NAME "bfin-t350mcqb"
static char driver_name[] = DRIVER_NAME;

struct bfin_t350mcqbfb_info {
	struct fb_info *fb;
	struct device *dev;
	unsigned char *fb_buffer;	/* RGB Buffer */
	dma_addr_t dma_handle;
	int lq043_mmap;
	int lq043_open_cnt;
	int irq;
	spinlock_t lock;	/* lock */
	u32 pseudo_pal[16];
};

static int nocursor;
module_param(nocursor, int, 0644);
MODULE_PARM_DESC(nocursor, "cursor enable/disable");

#define PPI_TX_MODE		0x2
#define PPI_XFER_TYPE_11	0xC
#define PPI_PORT_CFG_01		0x10
#define PPI_PACK_EN		0x80
#define PPI_POLS_1		0x8000

static void bfin_t350mcqb_config_ppi(struct bfin_t350mcqbfb_info *fbi)
{
	bfin_write_PPI_DELAY(H_START);
	bfin_write_PPI_COUNT(H_ACTPIX-1);
	bfin_write_PPI_FRAME(V_LINES);

	bfin_write_PPI_CONTROL(PPI_TX_MODE |	   /* output mode , PORT_DIR */
				PPI_XFER_TYPE_11 | /* sync mode XFR_TYPE */
				PPI_PORT_CFG_01 |  /* two frame sync PORT_CFG */
				PPI_PACK_EN |	   /* packing enabled PACK_EN */
				PPI_POLS_1);	   /* faling edge syncs POLS */
}

static inline void bfin_t350mcqb_disable_ppi(void)
{
	bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() & ~PORT_EN);
}

static inline void bfin_t350mcqb_enable_ppi(void)
{
	bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() | PORT_EN);
}

static void bfin_t350mcqb_start_timers(void)
{
	unsigned long flags;

	local_irq_save(flags);
		enable_gptimers(TIMER1bit);
		enable_gptimers(TIMER0bit);
	local_irq_restore(flags);
}

static void bfin_t350mcqb_stop_timers(void)
{
	disable_gptimers(TIMER0bit | TIMER1bit);

	set_gptimer_status(0, TIMER_STATUS_TRUN0 | TIMER_STATUS_TRUN1 |
				TIMER_STATUS_TIMIL0 | TIMER_STATUS_TIMIL1 |
				 TIMER_STATUS_TOVF0 | TIMER_STATUS_TOVF1);

}

static void bfin_t350mcqb_init_timers(void)
{

	bfin_t350mcqb_stop_timers();

	set_gptimer_period(TIMER0_id, H_PERIOD);
	set_gptimer_pwidth(TIMER0_id, H_PULSE);
	set_gptimer_config(TIMER0_id, TIMER_MODE_PWM | TIMER_PERIOD_CNT |
				      TIMER_TIN_SEL | TIMER_CLK_SEL|
				      TIMER_EMU_RUN);

	set_gptimer_period(TIMER1_id, V_PERIOD);
	set_gptimer_pwidth(TIMER1_id, V_PULSE);
	set_gptimer_config(TIMER1_id, TIMER_MODE_PWM | TIMER_PERIOD_CNT |
				      TIMER_TIN_SEL | TIMER_CLK_SEL |
				      TIMER_EMU_RUN);

}

static void bfin_t350mcqb_config_dma(struct bfin_t350mcqbfb_info *fbi)
{

	set_dma_config(CH_PPI,
		       set_bfin_dma_config(DIR_READ, DMA_FLOW_AUTO,
					   INTR_DISABLE, DIMENSION_2D,
					   DATA_SIZE_16,
					   DMA_NOSYNC_KEEP_DMA_BUF));
	set_dma_x_count(CH_PPI, (LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE);
	set_dma_x_modify(CH_PPI, DMA_BUS_SIZE / 8);
	set_dma_y_count(CH_PPI, V_LINES);

	set_dma_y_modify(CH_PPI, DMA_BUS_SIZE / 8);
	set_dma_start_addr(CH_PPI, (unsigned long)fbi->fb_buffer);

}

static	u16 ppi0_req_8[] = {P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
			    P_PPI0_D0, P_PPI0_D1, P_PPI0_D2,
			    P_PPI0_D3, P_PPI0_D4, P_PPI0_D5,
			    P_PPI0_D6, P_PPI0_D7, 0};

static int bfin_t350mcqb_request_ports(int action)
{
	if (action) {
		if (peripheral_request_list(ppi0_req_8, DRIVER_NAME)) {
			printk(KERN_ERR "Requesting Peripherals faild\n");
			return -EFAULT;
		}
	} else
		peripheral_free_list(ppi0_req_8);

	return 0;
}

static int bfin_t350mcqb_fb_open(struct fb_info *info, int user)
{
	struct bfin_t350mcqbfb_info *fbi = info->par;

	spin_lock(&fbi->lock);
	fbi->lq043_open_cnt++;

	if (fbi->lq043_open_cnt <= 1) {

		bfin_t350mcqb_disable_ppi();
		SSYNC();

		bfin_t350mcqb_config_dma(fbi);
		bfin_t350mcqb_config_ppi(fbi);
		bfin_t350mcqb_init_timers();

		/* start dma */
		enable_dma(CH_PPI);
		bfin_t350mcqb_enable_ppi();
		bfin_t350mcqb_start_timers();
	}

	spin_unlock(&fbi->lock);

	return 0;
}

static int bfin_t350mcqb_fb_release(struct fb_info *info, int user)
{
	struct bfin_t350mcqbfb_info *fbi = info->par;

	spin_lock(&fbi->lock);

	fbi->lq043_open_cnt--;
	fbi->lq043_mmap = 0;

	if (fbi->lq043_open_cnt <= 0) {
		bfin_t350mcqb_disable_ppi();
		SSYNC();
		disable_dma(CH_PPI);
		bfin_t350mcqb_stop_timers();
	}

	spin_unlock(&fbi->lock);

	return 0;
}

static int bfin_t350mcqb_fb_check_var(struct fb_var_screeninfo *var,
				   struct fb_info *info)
{

	switch (var->bits_per_pixel) {
	case 24:/* TRUECOLOUR, 16m */
		var->red.offset = 0;
		var->green.offset = 8;
		var->blue.offset = 16;
		var->red.length = var->green.length = var->blue.length = 8;
		var->transp.offset = 0;
		var->transp.length = 0;
		var->transp.msb_right = 0;
		var->red.msb_right = 0;
		var->green.msb_right = 0;
		var->blue.msb_right = 0;
		break;
	default:
		pr_debug("%s: depth not supported: %u BPP\n", __func__,
			 var->bits_per_pixel);
		return -EINVAL;
	}

	if (info->var.xres != var->xres || info->var.yres != var->yres ||
	    info->var.xres_virtual != var->xres_virtual ||
	    info->var.yres_virtual != var->yres_virtual) {
		pr_debug("%s: Resolution not supported: X%u x Y%u \n",
			 __func__, var->xres, var->yres);
		return -EINVAL;
	}

	/*
	 *  Memory limit
	 */

	if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) {
		pr_debug("%s: Memory Limit requested yres_virtual = %u\n",
			 __func__, var->yres_virtual);
		return -ENOMEM;
	}

	return 0;
}

static int bfin_t350mcqb_fb_mmap(struct fb_info *info, struct vm_area_struct *vma)
{
	struct bfin_t350mcqbfb_info *fbi = info->par;

	if (fbi->lq043_mmap)
		return -1;

	spin_lock(&fbi->lock);
	fbi->lq043_mmap = 1;
	spin_unlock(&fbi->lock);

	vma->vm_start = (unsigned long)(fbi->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET);

	vma->vm_end = vma->vm_start + info->fix.smem_len;
	/* For those who don't understand how mmap works, go read
	 *   Documentation/nommu-mmap.txt.
	 * For those that do, you will know that the VM_MAYSHARE flag
	 * must be set in the vma->vm_flags structure on noMMU
	 *   Other flags can be set, and are documented in
	 *   include/linux/mm.h
	 */
	vma->vm_flags |= VM_MAYSHARE | VM_SHARED;

	return 0;
}

int bfin_t350mcqb_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
{
	if (nocursor)
		return 0;
	else
		return -EINVAL;	/* just to force soft_cursor() call */
}

static int bfin_t350mcqb_fb_setcolreg(u_int regno, u_int red, u_int green,
				   u_int blue, u_int transp,
				   struct fb_info *info)
{
	if (regno >= BFIN_LCD_NBR_PALETTE_ENTRIES)
		return -EINVAL;

	if (info->var.grayscale) {
		/* grayscale = 0.30*R + 0.59*G + 0.11*B */
		red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
	}

	if (info->fix.visual == FB_VISUAL_TRUECOLOR) {

		u32 value;
		/* Place color in the pseudopalette */
		if (regno > 16)
			return -EINVAL;

		red >>= (16 - info->var.red.length);
		green >>= (16 - info->var.green.length);
		blue >>= (16 - info->var.blue.length);

		value = (red << info->var.red.offset) |
		    (green << info->var.green.offset) |
		    (blue << info->var.blue.offset);
		value &= 0xFFFFFF;

		((u32 *) (info->pseudo_palette))[regno] = value;

	}

	return 0;
}

static struct fb_ops bfin_t350mcqb_fb_ops = {
	.owner = THIS_MODULE,
	.fb_open = bfin_t350mcqb_fb_open,
	.fb_release = bfin_t350mcqb_fb_release,
	.fb_check_var = bfin_t350mcqb_fb_check_var,
	.fb_fillrect = cfb_fillrect,
	.fb_copyarea = cfb_copyarea,
	.fb_imageblit = cfb_imageblit,
	.fb_mmap = bfin_t350mcqb_fb_mmap,
	.fb_cursor = bfin_t350mcqb_fb_cursor,
	.fb_setcolreg = bfin_t350mcqb_fb_setcolreg,
};

#ifndef NO_BL_SUPPORT
static int bl_get_brightness(struct backlight_device *bd)
{
	return 0;
}

static struct backlight_ops bfin_lq043fb_bl_ops = {
	.get_brightness = bl_get_brightness,
};

static struct backlight_device *bl_dev;

static int bfin_lcd_get_power(struct lcd_device *dev)
{
	return 0;
}

static int bfin_lcd_set_power(struct lcd_device *dev, int power)
{
	return 0;
}

static int bfin_lcd_get_contrast(struct lcd_device *dev)
{
	return 0;
}

static int bfin_lcd_set_contrast(struct lcd_device *dev, int contrast)
{

	return 0;
}

static int bfin_lcd_check_fb(struct lcd_device *dev, struct fb_info *fi)
{
	if (!fi || (fi == &bfin_t350mcqb_fb))
		return 1;
	return 0;
}

static struct lcd_ops bfin_lcd_ops = {
	.get_power = bfin_lcd_get_power,
	.set_power = bfin_lcd_set_power,
	.get_contrast = bfin_lcd_get_contrast,
	.set_contrast = bfin_lcd_set_contrast,
	.check_fb = bfin_lcd_check_fb,
};

static struct lcd_device *lcd_dev;
#endif

static irqreturn_t bfin_t350mcqb_irq_error(int irq, void *dev_id)
{
	/*struct bfin_t350mcqbfb_info *info = (struct bfin_t350mcqbfb_info *)dev_id;*/

	u16 status = bfin_read_PPI_STATUS();
	bfin_write_PPI_STATUS(0xFFFF);

	if (status) {
		bfin_t350mcqb_disable_ppi();
		disable_dma(CH_PPI);

		/* start dma */
		enable_dma(CH_PPI);
		bfin_t350mcqb_enable_ppi();
		bfin_write_PPI_STATUS(0xFFFF);
	}

	return IRQ_HANDLED;
}

static int __devinit bfin_t350mcqb_probe(struct platform_device *pdev)
{
	struct bfin_t350mcqbfb_info *info;
	struct fb_info *fbinfo;
	int ret;

	printk(KERN_INFO DRIVER_NAME ": %dx%d %d-bit RGB FrameBuffer initializing...\n",
					 LCD_X_RES, LCD_Y_RES, LCD_BPP);

	if (request_dma(CH_PPI, "CH_PPI") < 0) {
		printk(KERN_ERR DRIVER_NAME
		       ": couldn't request CH_PPI DMA\n");
		ret = -EFAULT;
		goto out1;
	}

	fbinfo =
	    framebuffer_alloc(sizeof(struct bfin_t350mcqbfb_info), &pdev->dev);
	if (!fbinfo) {
		ret = -ENOMEM;
		goto out2;
	}

	info = fbinfo->par;
	info->fb = fbinfo;
	info->dev = &pdev->dev;

	platform_set_drvdata(pdev, fbinfo);

	strcpy(fbinfo->fix.id, driver_name);

	fbinfo->fix.type = FB_TYPE_PACKED_PIXELS;
	fbinfo->fix.type_aux = 0;
	fbinfo->fix.xpanstep = 0;
	fbinfo->fix.ypanstep = 0;
	fbinfo->fix.ywrapstep = 0;
	fbinfo->fix.accel = FB_ACCEL_NONE;
	fbinfo->fix.visual = FB_VISUAL_TRUECOLOR;

	fbinfo->var.nonstd = 0;
	fbinfo->var.activate = FB_ACTIVATE_NOW;
	fbinfo->var.height = -1;
	fbinfo->var.width = -1;
	fbinfo->var.accel_flags = 0;
	fbinfo->var.vmode = FB_VMODE_NONINTERLACED;

	fbinfo->var.xres = LCD_X_RES;
	fbinfo->var.xres_virtual = LCD_X_RES;
	fbinfo->var.yres = LCD_Y_RES;
	fbinfo->var.yres_virtual = LCD_Y_RES;
	fbinfo->var.bits_per_pixel = LCD_BPP;

	fbinfo->var.red.offset = 0;
	fbinfo->var.green.offset = 8;
	fbinfo->var.blue.offset = 16;
	fbinfo->var.transp.offset = 0;
	fbinfo->var.red.length = 8;
	fbinfo->var.green.length = 8;
	fbinfo->var.blue.length = 8;
	fbinfo->var.transp.length = 0;
	fbinfo->fix.smem_len = LCD_X_RES * LCD_Y_RES * LCD_BPP / 8;

	fbinfo->fix.line_length = fbinfo->var.xres_virtual *
	    fbinfo->var.bits_per_pixel / 8;


	fbinfo->fbops = &bfin_t350mcqb_fb_ops;
	fbinfo->flags = FBINFO_FLAG_DEFAULT;

	info->fb_buffer =
	    dma_alloc_coherent(NULL, fbinfo->fix.smem_len, &info->dma_handle,
			       GFP_KERNEL);

	if (NULL == info->fb_buffer) {
		printk(KERN_ERR DRIVER_NAME
		       ": couldn't allocate dma buffer.\n");
		ret = -ENOMEM;
		goto out3;
	}

	fbinfo->screen_base = (void *)info->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET;
	fbinfo->fix.smem_start = (int)info->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET;

	fbinfo->fbops = &bfin_t350mcqb_fb_ops;

	fbinfo->pseudo_palette = &info->pseudo_pal;

	if (fb_alloc_cmap(&fbinfo->cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0)
	    < 0) {
		printk(KERN_ERR DRIVER_NAME
		       "Fail to allocate colormap (%d entries)\n",
		       BFIN_LCD_NBR_PALETTE_ENTRIES);
		ret = -EFAULT;
		goto out4;
	}

	if (bfin_t350mcqb_request_ports(1)) {
		printk(KERN_ERR DRIVER_NAME ": couldn't request gpio port.\n");
		ret = -EFAULT;
		goto out6;
	}

	info->irq = platform_get_irq(pdev, 0);
	if (info->irq < 0) {
		ret = -EINVAL;
		goto out7;
	}

	ret = request_irq(info->irq, bfin_t350mcqb_irq_error, IRQF_DISABLED,
			"PPI ERROR", info);
	if (ret < 0) {
		printk(KERN_ERR DRIVER_NAME
		       ": unable to request PPI ERROR IRQ\n");
		goto out7;
	}

	if (register_framebuffer(fbinfo) < 0) {
		printk(KERN_ERR DRIVER_NAME
		       ": unable to register framebuffer.\n");
		ret = -EINVAL;
		goto out8;
	}
#ifndef NO_BL_SUPPORT
	bl_dev =
	    backlight_device_register("bf52x-bl", NULL, NULL,
				      &bfin_lq043fb_bl_ops);
	bl_dev->props.max_brightness = 255;

	lcd_dev = lcd_device_register(DRIVER_NAME, NULL, &bfin_lcd_ops);
	lcd_dev->props.max_contrast = 255, printk(KERN_INFO "Done.\n");
#endif

	return 0;

out8:
	free_irq(info->irq, info);
out7:
	bfin_t350mcqb_request_ports(0);
out6:
	fb_dealloc_cmap(&fbinfo->cmap);
out4:
	dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
			  info->dma_handle);
out3:
	framebuffer_release(fbinfo);
out2:
	free_dma(CH_PPI);
out1:
	platform_set_drvdata(pdev, NULL);

	return ret;
}

static int __devexit bfin_t350mcqb_remove(struct platform_device *pdev)
{

	struct fb_info *fbinfo = platform_get_drvdata(pdev);
	struct bfin_t350mcqbfb_info *info = fbinfo->par;

	unregister_framebuffer(fbinfo);

	free_dma(CH_PPI);
	free_irq(info->irq, info);

	if (info->fb_buffer != NULL)
		dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
				  info->dma_handle);

	fb_dealloc_cmap(&fbinfo->cmap);

#ifndef NO_BL_SUPPORT
	lcd_device_unregister(lcd_dev);
	backlight_device_unregister(bl_dev);
#endif

	bfin_t350mcqb_request_ports(0);

	platform_set_drvdata(pdev, NULL);
	framebuffer_release(fbinfo);

	printk(KERN_INFO DRIVER_NAME ": Unregister LCD driver.\n");

	return 0;
}

#ifdef CONFIG_PM
static int bfin_t350mcqb_suspend(struct platform_device *pdev, pm_message_t state)
{
	bfin_t350mcqb_disable_ppi();
	disable_dma(CH_PPI);
	bfin_write_PPI_STATUS(0xFFFF);

	return 0;
}

static int bfin_t350mcqb_resume(struct platform_device *pdev)
{
	enable_dma(CH_PPI);
	bfin_t350mcqb_enable_ppi();

	return 0;
}
#else
#define bfin_t350mcqb_suspend	NULL
#define bfin_t350mcqb_resume	NULL
#endif

static struct platform_driver bfin_t350mcqb_driver = {
	.probe = bfin_t350mcqb_probe,
	.remove = __devexit_p(bfin_t350mcqb_remove),
	.suspend = bfin_t350mcqb_suspend,
	.resume = bfin_t350mcqb_resume,
	.driver = {
		   .name = DRIVER_NAME,
		   .owner = THIS_MODULE,
		   },
};

static int __init bfin_t350mcqb_driver_init(void)
{
	return platform_driver_register(&bfin_t350mcqb_driver);
}

static void __exit bfin_t350mcqb_driver_cleanup(void)
{
	platform_driver_unregister(&bfin_t350mcqb_driver);
}

MODULE_DESCRIPTION("Blackfin TFT LCD Driver");
MODULE_LICENSE("GPL");

module_init(bfin_t350mcqb_driver_init);
module_exit(bfin_t350mcqb_driver_cleanup);
Commit	Line	Data
99eeed47 MH	1	/*
	2	* File: drivers/video/bfin-t350mcqb-fb.c
	3	* Based on:
	4	* Author: Michael Hennerich <hennerich@blackfin.uclinux.org>
	5	*
	6	* Created:
	7	* Description: Blackfin LCD Framebufer driver
	8	*
	9	*
	10	* Modified:
	11	* Copyright 2004-2007 Analog Devices Inc.
	12	*
	13	* Bugs: Enter bugs at http://blackfin.uclinux.org/
	14	*
	15	* This program is free software; you can redistribute it and/or modify
	16	* it under the terms of the GNU General Public License as published by
	17	* the Free Software Foundation; either version 2 of the License, or
	18	* (at your option) any later version.
	19	*
	20	* This program is distributed in the hope that it will be useful,
	21	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	22	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	23	* GNU General Public License for more details.
	24	*
	25	* You should have received a copy of the GNU General Public License
	26	* along with this program; if not, see the file COPYING, or write
	27	* to the Free Software Foundation, Inc.,
	28	* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	29	*/
	30
	31	#include <linux/module.h>
	32	#include <linux/kernel.h>
	33	#include <linux/errno.h>
	34	#include <linux/string.h>
	35	#include <linux/fb.h>
	36	#include <linux/init.h>
	37	#include <linux/types.h>
	38	#include <linux/interrupt.h>
	39	#include <linux/device.h>
	40	#include <linux/backlight.h>
	41	#include <linux/lcd.h>
	42	#include <linux/dma-mapping.h>
	43	#include <linux/platform_device.h>
	44
	45	#include <asm/blackfin.h>
	46	#include <asm/irq.h>
	47	#include <asm/dma-mapping.h>
	48	#include <asm/dma.h>
	49	#include <asm/portmux.h>
	50	#include <asm/gptimers.h>
	51
	52	#define NO_BL_SUPPORT
	53
	54	#define LCD_X_RES 320 /* Horizontal Resolution */
	55	#define LCD_Y_RES 240 /* Vertical Resolution */
	56	#define LCD_BPP 24 /* Bit Per Pixel */
	57
	58	#define DMA_BUS_SIZE 16
	59	#define LCD_CLK (1210001000) /* 12MHz */
	60
	61	#define CLOCKS_PER_PIX 3
	62
	63	/*
	64	* HS and VS timing parameters (all in number of PPI clk ticks)
65	*/
66
67	#define U_LINE 1 /* Blanking Lines */
68
69	#define H_ACTPIX (LCD_X_RES * CLOCKS_PER_PIX) /* active horizontal pixel */
70	#define H_PERIOD (408 * CLOCKS_PER_PIX) /* HS period */
71	#define H_PULSE 90 /* HS pulse width */
72	#define H_START 204 /* first valid pixel */
73
74	#define V_LINES (LCD_Y_RES + U_LINE) /* total vertical lines */
75	#define V_PULSE (3 * H_PERIOD) /* VS pulse width (1-5 H_PERIODs) */
76	#define V_PERIOD (H_PERIOD * V_LINES) /* VS period */
77
78	#define ACTIVE_VIDEO_MEM_OFFSET (U_LINE * H_ACTPIX)
79
80	#define BFIN_LCD_NBR_PALETTE_ENTRIES 256
81
82	#define DRIVER_NAME "bfin-t350mcqb"
83	static char driver_name[] = DRIVER_NAME;
84
85	struct bfin_t350mcqbfb_info {
86	struct fb_info *fb;
87	struct device *dev;
88	unsigned char fb_buffer; / RGB Buffer */
89	dma_addr_t dma_handle;
90	int lq043_mmap;
91	int lq043_open_cnt;
92	int irq;
93	spinlock_t lock; /* lock */
7ef9861c	94	u32 pseudo_pal[16];
99eeed47 MH	95	};
	96
	97	static int nocursor;
	98	module_param(nocursor, int, 0644);
	99	MODULE_PARM_DESC(nocursor, "cursor enable/disable");
	100
	101	#define PPI_TX_MODE 0x2
	102	#define PPI_XFER_TYPE_11 0xC
	103	#define PPI_PORT_CFG_01 0x10
	104	#define PPI_PACK_EN 0x80
	105	#define PPI_POLS_1 0x8000
	106
	107	static void bfin_t350mcqb_config_ppi(struct bfin_t350mcqbfb_info *fbi)
	108	{
	109	bfin_write_PPI_DELAY(H_START);
	110	bfin_write_PPI_COUNT(H_ACTPIX-1);
	111	bfin_write_PPI_FRAME(V_LINES);
	112
	113	bfin_write_PPI_CONTROL(PPI_TX_MODE \| /* output mode , PORT_DIR */
	114	PPI_XFER_TYPE_11 \| /* sync mode XFR_TYPE */
	115	PPI_PORT_CFG_01 \| /* two frame sync PORT_CFG */
	116	PPI_PACK_EN \| /* packing enabled PACK_EN */
	117	PPI_POLS_1); /* faling edge syncs POLS */
	118	}
	119
	120	static inline void bfin_t350mcqb_disable_ppi(void)
	121	{
	122	bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() & ~PORT_EN);
	123	}
	124
	125	static inline void bfin_t350mcqb_enable_ppi(void)
	126	{
	127	bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() \| PORT_EN);
	128	}
	129
	130	static void bfin_t350mcqb_start_timers(void)
	131	{
	132	unsigned long flags;
	133
	134	local_irq_save(flags);
	135	enable_gptimers(TIMER1bit);
	136	enable_gptimers(TIMER0bit);
	137	local_irq_restore(flags);
	138	}
	139
	140	static void bfin_t350mcqb_stop_timers(void)
	141	{
	142	disable_gptimers(TIMER0bit \| TIMER1bit);
	143
	144	set_gptimer_status(0, TIMER_STATUS_TRUN0 \| TIMER_STATUS_TRUN1 \|
	145	TIMER_STATUS_TIMIL0 \| TIMER_STATUS_TIMIL1 \|
	146	TIMER_STATUS_TOVF0 \| TIMER_STATUS_TOVF1);
	147
	148	}
	149
	150	static void bfin_t350mcqb_init_timers(void)
	151	{
	152
	153	bfin_t350mcqb_stop_timers();
	154
	155	set_gptimer_period(TIMER0_id, H_PERIOD);
	156	set_gptimer_pwidth(TIMER0_id, H_PULSE);
	157	set_gptimer_config(TIMER0_id, TIMER_MODE_PWM \| TIMER_PERIOD_CNT \|
	158	TIMER_TIN_SEL \| TIMER_CLK_SEL\|
159	TIMER_EMU_RUN);
160
161	set_gptimer_period(TIMER1_id, V_PERIOD);
162	set_gptimer_pwidth(TIMER1_id, V_PULSE);
163	set_gptimer_config(TIMER1_id, TIMER_MODE_PWM \| TIMER_PERIOD_CNT \|
164	TIMER_TIN_SEL \| TIMER_CLK_SEL \|
165	TIMER_EMU_RUN);
166
167	}
168
169	static void bfin_t350mcqb_config_dma(struct bfin_t350mcqbfb_info *fbi)
170	{
171
172	set_dma_config(CH_PPI,
173	set_bfin_dma_config(DIR_READ, DMA_FLOW_AUTO,
174	INTR_DISABLE, DIMENSION_2D,
175	DATA_SIZE_16,
176	DMA_NOSYNC_KEEP_DMA_BUF));
177	set_dma_x_count(CH_PPI, (LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE);
178	set_dma_x_modify(CH_PPI, DMA_BUS_SIZE / 8);
179	set_dma_y_count(CH_PPI, V_LINES);
180
181	set_dma_y_modify(CH_PPI, DMA_BUS_SIZE / 8);
182	set_dma_start_addr(CH_PPI, (unsigned long)fbi->fb_buffer);
183
184	}
185
7ef9861c	186	static u16 ppi0_req_8[] = {P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
99eeed47 MH	187	P_PPI0_D0, P_PPI0_D1, P_PPI0_D2,
	188	P_PPI0_D3, P_PPI0_D4, P_PPI0_D5,
	189	P_PPI0_D6, P_PPI0_D7, 0};
	190
7ef9861c BW	191	static int bfin_t350mcqb_request_ports(int action)
7ef9861c BW	192	{
99eeed47 MH	193	if (action) {
	194	if (peripheral_request_list(ppi0_req_8, DRIVER_NAME)) {
	195	printk(KERN_ERR "Requesting Peripherals faild\n");
	196	return -EFAULT;
	197	}
	198	} else
	199	peripheral_free_list(ppi0_req_8);
	200
	201	return 0;
	202	}
	203
	204	static int bfin_t350mcqb_fb_open(struct fb_info *info, int user)
	205	{
	206	struct bfin_t350mcqbfb_info *fbi = info->par;
	207
	208	spin_lock(&fbi->lock);
	209	fbi->lq043_open_cnt++;
	210
	211	if (fbi->lq043_open_cnt <= 1) {
	212
	213	bfin_t350mcqb_disable_ppi();
	214	SSYNC();
	215
	216	bfin_t350mcqb_config_dma(fbi);
	217	bfin_t350mcqb_config_ppi(fbi);
	218	bfin_t350mcqb_init_timers();
	219
	220	/* start dma */
	221	enable_dma(CH_PPI);
	222	bfin_t350mcqb_enable_ppi();
	223	bfin_t350mcqb_start_timers();
	224	}
	225
	226	spin_unlock(&fbi->lock);
	227
	228	return 0;
	229	}
	230
	231	static int bfin_t350mcqb_fb_release(struct fb_info *info, int user)
	232	{
	233	struct bfin_t350mcqbfb_info *fbi = info->par;
	234
	235	spin_lock(&fbi->lock);
	236
	237	fbi->lq043_open_cnt--;
	238	fbi->lq043_mmap = 0;
	239
	240	if (fbi->lq043_open_cnt <= 0) {
	241	bfin_t350mcqb_disable_ppi();
	242	SSYNC();
	243	disable_dma(CH_PPI);
	244	bfin_t350mcqb_stop_timers();
99eeed47 MH	245	}
	246
	247	spin_unlock(&fbi->lock);
	248
	249	return 0;
	250	}
	251
	252	static int bfin_t350mcqb_fb_check_var(struct fb_var_screeninfo *var,
	253	struct fb_info *info)
	254	{
	255
b46578ed MH	256	switch (var->bits_per_pixel) {
	257	case 24:/* TRUECOLOUR, 16m */
	258	var->red.offset = 0;
	259	var->green.offset = 8;
	260	var->blue.offset = 16;
	261	var->red.length = var->green.length = var->blue.length = 8;
	262	var->transp.offset = 0;
	263	var->transp.length = 0;
	264	var->transp.msb_right = 0;
	265	var->red.msb_right = 0;
	266	var->green.msb_right = 0;
	267	var->blue.msb_right = 0;
	268	break;
	269	default:
729f77bb	270	pr_debug("%s: depth not supported: %u BPP\n", __func__,
99eeed47 MH	271	var->bits_per_pixel);
	272	return -EINVAL;
	273	}
	274
	275	if (info->var.xres != var->xres \|\| info->var.yres != var->yres \|\|
	276	info->var.xres_virtual != var->xres_virtual \|\|
	277	info->var.yres_virtual != var->yres_virtual) {
	278	pr_debug("%s: Resolution not supported: X%u x Y%u \n",
729f77bb	279	__func__, var->xres, var->yres);
99eeed47 MH	280	return -EINVAL;
	281	}
	282
	283	/*
	284	* Memory limit
	285	*/
	286
	287	if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) {
	288	pr_debug("%s: Memory Limit requested yres_virtual = %u\n",
729f77bb	289	__func__, var->yres_virtual);
99eeed47 MH	290	return -ENOMEM;
	291	}
	292
	293	return 0;
	294	}
	295
	296	static int bfin_t350mcqb_fb_mmap(struct fb_info info, struct vm_area_struct vma)
	297	{
	298	struct bfin_t350mcqbfb_info *fbi = info->par;
	299
	300	if (fbi->lq043_mmap)
	301	return -1;
	302
	303	spin_lock(&fbi->lock);
	304	fbi->lq043_mmap = 1;
	305	spin_unlock(&fbi->lock);
	306
	307	vma->vm_start = (unsigned long)(fbi->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET);
	308
	309	vma->vm_end = vma->vm_start + info->fix.smem_len;
	310	/* For those who don't understand how mmap works, go read
	311	* Documentation/nommu-mmap.txt.
	312	* For those that do, you will know that the VM_MAYSHARE flag
	313	* must be set in the vma->vm_flags structure on noMMU
	314	* Other flags can be set, and are documented in
	315	* include/linux/mm.h
	316	*/
363df399	317	vma->vm_flags \|= VM_MAYSHARE \| VM_SHARED;
99eeed47 MH	318
	319	return 0;
	320	}
	321
	322	int bfin_t350mcqb_fb_cursor(struct fb_info info, struct fb_cursor cursor)
	323	{
	324	if (nocursor)
	325	return 0;
	326	else
	327	return -EINVAL; /* just to force soft_cursor() call */
	328	}
	329
	330	static int bfin_t350mcqb_fb_setcolreg(u_int regno, u_int red, u_int green,
	331	u_int blue, u_int transp,
	332	struct fb_info *info)
	333	{
	334	if (regno >= BFIN_LCD_NBR_PALETTE_ENTRIES)
	335	return -EINVAL;
	336
	337	if (info->var.grayscale) {
	338	/* grayscale = 0.30R + 0.59G + 0.11B /
	339	red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
	340	}
	341
	342	if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
	343
	344	u32 value;
	345	/* Place color in the pseudopalette */
	346	if (regno > 16)
	347	return -EINVAL;
	348
	349	red >>= (16 - info->var.red.length);
	350	green >>= (16 - info->var.green.length);
	351	blue >>= (16 - info->var.blue.length);
	352
	353	value = (red << info->var.red.offset) \|
	354	(green << info->var.green.offset) \|
	355	(blue << info->var.blue.offset);
	356	value &= 0xFFFFFF;
	357
	358	((u32 *) (info->pseudo_palette))[regno] = value;
	359
	360	}
	361
	362	return 0;
	363	}
	364
	365	static struct fb_ops bfin_t350mcqb_fb_ops = {
	366	.owner = THIS_MODULE,
	367	.fb_open = bfin_t350mcqb_fb_open,
	368	.fb_release = bfin_t350mcqb_fb_release,
	369	.fb_check_var = bfin_t350mcqb_fb_check_var,
	370	.fb_fillrect = cfb_fillrect,
	371	.fb_copyarea = cfb_copyarea,
	372	.fb_imageblit = cfb_imageblit,
	373	.fb_mmap = bfin_t350mcqb_fb_mmap,
	374	.fb_cursor = bfin_t350mcqb_fb_cursor,
	375	.fb_setcolreg = bfin_t350mcqb_fb_setcolreg,
	376	};
	377
	378	#ifndef NO_BL_SUPPORT
	379	static int bl_get_brightness(struct backlight_device *bd)
	380	{
	381	return 0;
382	}
383
384	static struct backlight_ops bfin_lq043fb_bl_ops = {
385	.get_brightness = bl_get_brightness,
386	};
387
388	static struct backlight_device *bl_dev;
389
390	static int bfin_lcd_get_power(struct lcd_device *dev)
391	{
392	return 0;
393	}
394
395	static int bfin_lcd_set_power(struct lcd_device *dev, int power)
396	{
397	return 0;
398	}
399
400	static int bfin_lcd_get_contrast(struct lcd_device *dev)
401	{
402	return 0;
403	}
404
405	static int bfin_lcd_set_contrast(struct lcd_device *dev, int contrast)
406	{
407
408	return 0;
409	}
410
0c531360	411	static int bfin_lcd_check_fb(struct lcd_device dev, struct fb_info fi)
99eeed47 MH	412	{
	413	if (!fi \|\| (fi == &bfin_t350mcqb_fb))
	414	return 1;
	415	return 0;
	416	}
	417
	418	static struct lcd_ops bfin_lcd_ops = {
	419	.get_power = bfin_lcd_get_power,
	420	.set_power = bfin_lcd_set_power,
	421	.get_contrast = bfin_lcd_get_contrast,
	422	.set_contrast = bfin_lcd_set_contrast,
	423	.check_fb = bfin_lcd_check_fb,
	424	};
	425
	426	static struct lcd_device *lcd_dev;
	427	#endif
	428
	429	static irqreturn_t bfin_t350mcqb_irq_error(int irq, void *dev_id)
	430	{
	431	/struct bfin_t350mcqbfb_info info = (struct bfin_t350mcqbfb_info )dev_id;/
	432
	433	u16 status = bfin_read_PPI_STATUS();
	434	bfin_write_PPI_STATUS(0xFFFF);
	435
	436	if (status) {
	437	bfin_t350mcqb_disable_ppi();
	438	disable_dma(CH_PPI);
	439
	440	/* start dma */
	441	enable_dma(CH_PPI);
	442	bfin_t350mcqb_enable_ppi();
	443	bfin_write_PPI_STATUS(0xFFFF);
	444	}
	445
	446	return IRQ_HANDLED;
	447	}
	448
d4097456	449	static int __devinit bfin_t350mcqb_probe(struct platform_device *pdev)
99eeed47 MH	450	{
	451	struct bfin_t350mcqbfb_info *info;
	452	struct fb_info *fbinfo;
	453	int ret;
	454
	455	printk(KERN_INFO DRIVER_NAME ": %dx%d %d-bit RGB FrameBuffer initializing...\n",
	456	LCD_X_RES, LCD_Y_RES, LCD_BPP);
	457
	458	if (request_dma(CH_PPI, "CH_PPI") < 0) {
	459	printk(KERN_ERR DRIVER_NAME
	460	": couldn't request CH_PPI DMA\n");
	461	ret = -EFAULT;
	462	goto out1;
	463	}
	464
	465	fbinfo =
	466	framebuffer_alloc(sizeof(struct bfin_t350mcqbfb_info), &pdev->dev);
	467	if (!fbinfo) {
	468	ret = -ENOMEM;
	469	goto out2;
	470	}
	471
	472	info = fbinfo->par;
	473	info->fb = fbinfo;
	474	info->dev = &pdev->dev;
	475
	476	platform_set_drvdata(pdev, fbinfo);
	477
	478	strcpy(fbinfo->fix.id, driver_name);
	479
	480	fbinfo->fix.type = FB_TYPE_PACKED_PIXELS;
	481	fbinfo->fix.type_aux = 0;
	482	fbinfo->fix.xpanstep = 0;
	483	fbinfo->fix.ypanstep = 0;
	484	fbinfo->fix.ywrapstep = 0;
	485	fbinfo->fix.accel = FB_ACCEL_NONE;
	486	fbinfo->fix.visual = FB_VISUAL_TRUECOLOR;
	487
	488	fbinfo->var.nonstd = 0;
	489	fbinfo->var.activate = FB_ACTIVATE_NOW;
	490	fbinfo->var.height = -1;
	491	fbinfo->var.width = -1;
	492	fbinfo->var.accel_flags = 0;
	493	fbinfo->var.vmode = FB_VMODE_NONINTERLACED;
	494
	495	fbinfo->var.xres = LCD_X_RES;
	496	fbinfo->var.xres_virtual = LCD_X_RES;
	497	fbinfo->var.yres = LCD_Y_RES;
	498	fbinfo->var.yres_virtual = LCD_Y_RES;
	499	fbinfo->var.bits_per_pixel = LCD_BPP;
	500
	501	fbinfo->var.red.offset = 0;
	502	fbinfo->var.green.offset = 8;
	503	fbinfo->var.blue.offset = 16;
	504	fbinfo->var.transp.offset = 0;
	505	fbinfo->var.red.length = 8;
	506	fbinfo->var.green.length = 8;
	507	fbinfo->var.blue.length = 8;
	508	fbinfo->var.transp.length = 0;
	509	fbinfo->fix.smem_len = LCD_X_RES * LCD_Y_RES * LCD_BPP / 8;
	510
	511	fbinfo->fix.line_length = fbinfo->var.xres_virtual *
	512	fbinfo->var.bits_per_pixel / 8;
	513
514
515	fbinfo->fbops = &bfin_t350mcqb_fb_ops;
516	fbinfo->flags = FBINFO_FLAG_DEFAULT;
517
518	info->fb_buffer =
519	dma_alloc_coherent(NULL, fbinfo->fix.smem_len, &info->dma_handle,
520	GFP_KERNEL);
521
522	if (NULL == info->fb_buffer) {
523	printk(KERN_ERR DRIVER_NAME
524	": couldn't allocate dma buffer.\n");
525	ret = -ENOMEM;
526	goto out3;
527	}
528
99eeed47 MH	529	fbinfo->screen_base = (void *)info->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET;
	530	fbinfo->fix.smem_start = (int)info->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET;
	531
	532	fbinfo->fbops = &bfin_t350mcqb_fb_ops;
	533
7ef9861c	534	fbinfo->pseudo_palette = &info->pseudo_pal;
99eeed47 MH	535
	536	if (fb_alloc_cmap(&fbinfo->cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0)
	537	< 0) {
	538	printk(KERN_ERR DRIVER_NAME
	539	"Fail to allocate colormap (%d entries)\n",
	540	BFIN_LCD_NBR_PALETTE_ENTRIES);
	541	ret = -EFAULT;
7ef9861c	542	goto out4;
99eeed47 MH	543	}
	544
	545	if (bfin_t350mcqb_request_ports(1)) {
	546	printk(KERN_ERR DRIVER_NAME ": couldn't request gpio port.\n");
	547	ret = -EFAULT;
	548	goto out6;
	549	}
	550
	551	info->irq = platform_get_irq(pdev, 0);
	552	if (info->irq < 0) {
	553	ret = -EINVAL;
	554	goto out7;
	555	}
	556
7ef9861c BW	557	ret = request_irq(info->irq, bfin_t350mcqb_irq_error, IRQF_DISABLED,
	558	"PPI ERROR", info);
	559	if (ret < 0) {
99eeed47 MH	560	printk(KERN_ERR DRIVER_NAME
99eeed47 MH	561	": unable to request PPI ERROR IRQ\n");
99eeed47 MH	562	goto out7;
	563	}
	564
	565	if (register_framebuffer(fbinfo) < 0) {
	566	printk(KERN_ERR DRIVER_NAME
	567	": unable to register framebuffer.\n");
	568	ret = -EINVAL;
	569	goto out8;
	570	}
	571	#ifndef NO_BL_SUPPORT
	572	bl_dev =
	573	backlight_device_register("bf52x-bl", NULL, NULL,
	574	&bfin_lq043fb_bl_ops);
	575	bl_dev->props.max_brightness = 255;
	576
	577	lcd_dev = lcd_device_register(DRIVER_NAME, NULL, &bfin_lcd_ops);
	578	lcd_dev->props.max_contrast = 255, printk(KERN_INFO "Done.\n");
	579	#endif
	580
	581	return 0;
	582
	583	out8:
	584	free_irq(info->irq, info);
	585	out7:
	586	bfin_t350mcqb_request_ports(0);
	587	out6:
	588	fb_dealloc_cmap(&fbinfo->cmap);
99eeed47 MH	589	out4:
	590	dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
	591	info->dma_handle);
	592	out3:
	593	framebuffer_release(fbinfo);
	594	out2:
	595	free_dma(CH_PPI);
	596	out1:
	597	platform_set_drvdata(pdev, NULL);
	598
	599	return ret;
	600	}
	601
8f09d74a	602	static int __devexit bfin_t350mcqb_remove(struct platform_device *pdev)
99eeed47 MH	603	{
	604
	605	struct fb_info *fbinfo = platform_get_drvdata(pdev);
	606	struct bfin_t350mcqbfb_info *info = fbinfo->par;
	607
7ef9861c BW	608	unregister_framebuffer(fbinfo);
7ef9861c BW	609
99eeed47 MH	610	free_dma(CH_PPI);
	611	free_irq(info->irq, info);
	612
	613	if (info->fb_buffer != NULL)
	614	dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer,
	615	info->dma_handle);
	616
99eeed47 MH	617	fb_dealloc_cmap(&fbinfo->cmap);
	618
	619	#ifndef NO_BL_SUPPORT
	620	lcd_device_unregister(lcd_dev);
	621	backlight_device_unregister(bl_dev);
	622	#endif
	623
99eeed47 MH	624	bfin_t350mcqb_request_ports(0);
99eeed47 MH	625
7ef9861c BW	626	platform_set_drvdata(pdev, NULL);
	627	framebuffer_release(fbinfo);
	628
99eeed47 MH	629	printk(KERN_INFO DRIVER_NAME ": Unregister LCD driver.\n");
	630
	631	return 0;
	632	}
	633
	634	#ifdef CONFIG_PM
	635	static int bfin_t350mcqb_suspend(struct platform_device *pdev, pm_message_t state)
	636	{
99eeed47 MH	637	bfin_t350mcqb_disable_ppi();
	638	disable_dma(CH_PPI);
	639	bfin_write_PPI_STATUS(0xFFFF);
	640
	641	return 0;
	642	}
	643
	644	static int bfin_t350mcqb_resume(struct platform_device *pdev)
	645	{
99eeed47 MH	646	enable_dma(CH_PPI);
	647	bfin_t350mcqb_enable_ppi();
	648
	649	return 0;
	650	}
	651	#else
	652	#define bfin_t350mcqb_suspend NULL
	653	#define bfin_t350mcqb_resume NULL
	654	#endif
	655
	656	static struct platform_driver bfin_t350mcqb_driver = {
	657	.probe = bfin_t350mcqb_probe,
8f09d74a	658	.remove = __devexit_p(bfin_t350mcqb_remove),
99eeed47 MH	659	.suspend = bfin_t350mcqb_suspend,
	660	.resume = bfin_t350mcqb_resume,
	661	.driver = {
	662	.name = DRIVER_NAME,
	663	.owner = THIS_MODULE,
	664	},
	665	};
	666
8f09d74a	667	static int __init bfin_t350mcqb_driver_init(void)
99eeed47 MH	668	{
	669	return platform_driver_register(&bfin_t350mcqb_driver);
	670	}
	671
	672	static void __exit bfin_t350mcqb_driver_cleanup(void)
	673	{
	674	platform_driver_unregister(&bfin_t350mcqb_driver);
	675	}
	676
	677	MODULE_DESCRIPTION("Blackfin TFT LCD Driver");
	678	MODULE_LICENSE("GPL");
	679
	680	module_init(bfin_t350mcqb_driver_init);
	681	module_exit(bfin_t350mcqb_driver_cleanup);