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1da177e4 LT |
1 | /* bw2.c: BWTWO frame buffer driver |
2 | * | |
50312ce9 | 3 | * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net) |
1da177e4 LT |
4 | * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz) |
5 | * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx) | |
6 | * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) | |
7 | * | |
8 | * Driver layout based loosely on tgafb.c, see that file for credits. | |
9 | */ | |
10 | ||
11 | #include <linux/module.h> | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/errno.h> | |
14 | #include <linux/string.h> | |
15 | #include <linux/slab.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/fb.h> | |
19 | #include <linux/mm.h> | |
20 | ||
21 | #include <asm/io.h> | |
1da177e4 | 22 | #include <asm/oplib.h> |
50312ce9 DM |
23 | #include <asm/prom.h> |
24 | #include <asm/of_device.h> | |
1da177e4 LT |
25 | #include <asm/fbio.h> |
26 | ||
1da177e4 LT |
27 | #include "sbuslib.h" |
28 | ||
29 | /* | |
30 | * Local functions. | |
31 | */ | |
32 | ||
33 | static int bw2_blank(int, struct fb_info *); | |
34 | ||
216d526c | 35 | static int bw2_mmap(struct fb_info *, struct vm_area_struct *); |
67a6680d | 36 | static int bw2_ioctl(struct fb_info *, unsigned int, unsigned long); |
1da177e4 LT |
37 | |
38 | /* | |
39 | * Frame buffer operations | |
40 | */ | |
41 | ||
42 | static struct fb_ops bw2_ops = { | |
43 | .owner = THIS_MODULE, | |
44 | .fb_blank = bw2_blank, | |
45 | .fb_fillrect = cfb_fillrect, | |
46 | .fb_copyarea = cfb_copyarea, | |
47 | .fb_imageblit = cfb_imageblit, | |
48 | .fb_mmap = bw2_mmap, | |
49 | .fb_ioctl = bw2_ioctl, | |
9ffb83bc CH |
50 | #ifdef CONFIG_COMPAT |
51 | .fb_compat_ioctl = sbusfb_compat_ioctl, | |
52 | #endif | |
1da177e4 LT |
53 | }; |
54 | ||
55 | /* OBio addresses for the bwtwo registers */ | |
56 | #define BWTWO_REGISTER_OFFSET 0x400000 | |
57 | ||
58 | struct bt_regs { | |
50312ce9 DM |
59 | u32 addr; |
60 | u32 color_map; | |
61 | u32 control; | |
62 | u32 cursor; | |
1da177e4 LT |
63 | }; |
64 | ||
65 | struct bw2_regs { | |
66 | struct bt_regs cmap; | |
50312ce9 DM |
67 | u8 control; |
68 | u8 status; | |
69 | u8 cursor_start; | |
70 | u8 cursor_end; | |
71 | u8 h_blank_start; | |
72 | u8 h_blank_end; | |
73 | u8 h_sync_start; | |
74 | u8 h_sync_end; | |
75 | u8 comp_sync_end; | |
76 | u8 v_blank_start_high; | |
77 | u8 v_blank_start_low; | |
78 | u8 v_blank_end; | |
79 | u8 v_sync_start; | |
80 | u8 v_sync_end; | |
81 | u8 xfer_holdoff_start; | |
82 | u8 xfer_holdoff_end; | |
1da177e4 LT |
83 | }; |
84 | ||
85 | /* Status Register Constants */ | |
86 | #define BWTWO_SR_RES_MASK 0x70 | |
87 | #define BWTWO_SR_1600_1280 0x50 | |
88 | #define BWTWO_SR_1152_900_76_A 0x40 | |
89 | #define BWTWO_SR_1152_900_76_B 0x60 | |
90 | #define BWTWO_SR_ID_MASK 0x0f | |
91 | #define BWTWO_SR_ID_MONO 0x02 | |
92 | #define BWTWO_SR_ID_MONO_ECL 0x03 | |
93 | #define BWTWO_SR_ID_MSYNC 0x04 | |
94 | #define BWTWO_SR_ID_NOCONN 0x0a | |
95 | ||
96 | /* Control Register Constants */ | |
97 | #define BWTWO_CTL_ENABLE_INTS 0x80 | |
98 | #define BWTWO_CTL_ENABLE_VIDEO 0x40 | |
99 | #define BWTWO_CTL_ENABLE_TIMING 0x20 | |
100 | #define BWTWO_CTL_ENABLE_CURCMP 0x10 | |
101 | #define BWTWO_CTL_XTAL_MASK 0x0C | |
102 | #define BWTWO_CTL_DIVISOR_MASK 0x03 | |
103 | ||
104 | /* Status Register Constants */ | |
105 | #define BWTWO_STAT_PENDING_INT 0x80 | |
106 | #define BWTWO_STAT_MSENSE_MASK 0x70 | |
107 | #define BWTWO_STAT_ID_MASK 0x0f | |
108 | ||
109 | struct bw2_par { | |
110 | spinlock_t lock; | |
111 | struct bw2_regs __iomem *regs; | |
112 | ||
113 | u32 flags; | |
114 | #define BW2_FLAG_BLANKED 0x00000001 | |
115 | ||
116 | unsigned long physbase; | |
50312ce9 | 117 | unsigned long which_io; |
1da177e4 | 118 | unsigned long fbsize; |
1da177e4 LT |
119 | }; |
120 | ||
121 | /** | |
122 | * bw2_blank - Optional function. Blanks the display. | |
123 | * @blank_mode: the blank mode we want. | |
124 | * @info: frame buffer structure that represents a single frame buffer | |
125 | */ | |
126 | static int | |
127 | bw2_blank(int blank, struct fb_info *info) | |
128 | { | |
129 | struct bw2_par *par = (struct bw2_par *) info->par; | |
130 | struct bw2_regs __iomem *regs = par->regs; | |
131 | unsigned long flags; | |
132 | u8 val; | |
133 | ||
134 | spin_lock_irqsave(&par->lock, flags); | |
135 | ||
136 | switch (blank) { | |
137 | case FB_BLANK_UNBLANK: /* Unblanking */ | |
138 | val = sbus_readb(®s->control); | |
139 | val |= BWTWO_CTL_ENABLE_VIDEO; | |
140 | sbus_writeb(val, ®s->control); | |
141 | par->flags &= ~BW2_FLAG_BLANKED; | |
142 | break; | |
143 | ||
144 | case FB_BLANK_NORMAL: /* Normal blanking */ | |
145 | case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */ | |
146 | case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */ | |
147 | case FB_BLANK_POWERDOWN: /* Poweroff */ | |
148 | val = sbus_readb(®s->control); | |
149 | val &= ~BWTWO_CTL_ENABLE_VIDEO; | |
150 | sbus_writeb(val, ®s->control); | |
151 | par->flags |= BW2_FLAG_BLANKED; | |
152 | break; | |
153 | } | |
154 | ||
155 | spin_unlock_irqrestore(&par->lock, flags); | |
156 | ||
157 | return 0; | |
158 | } | |
159 | ||
160 | static struct sbus_mmap_map bw2_mmap_map[] = { | |
161 | { | |
162 | .size = SBUS_MMAP_FBSIZE(1) | |
163 | }, | |
164 | { .size = 0 } | |
165 | }; | |
166 | ||
216d526c | 167 | static int bw2_mmap(struct fb_info *info, struct vm_area_struct *vma) |
1da177e4 LT |
168 | { |
169 | struct bw2_par *par = (struct bw2_par *)info->par; | |
170 | ||
171 | return sbusfb_mmap_helper(bw2_mmap_map, | |
172 | par->physbase, par->fbsize, | |
50312ce9 | 173 | par->which_io, |
1da177e4 LT |
174 | vma); |
175 | } | |
176 | ||
67a6680d | 177 | static int bw2_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) |
1da177e4 LT |
178 | { |
179 | struct bw2_par *par = (struct bw2_par *) info->par; | |
180 | ||
181 | return sbusfb_ioctl_helper(cmd, arg, info, | |
182 | FBTYPE_SUN2BW, 1, par->fbsize); | |
183 | } | |
184 | ||
185 | /* | |
186 | * Initialisation | |
187 | */ | |
188 | ||
63abdcdc | 189 | static void __devinit bw2_init_fix(struct fb_info *info, int linebytes) |
1da177e4 LT |
190 | { |
191 | strlcpy(info->fix.id, "bwtwo", sizeof(info->fix.id)); | |
192 | ||
193 | info->fix.type = FB_TYPE_PACKED_PIXELS; | |
194 | info->fix.visual = FB_VISUAL_MONO01; | |
195 | ||
196 | info->fix.line_length = linebytes; | |
197 | ||
198 | info->fix.accel = FB_ACCEL_SUN_BWTWO; | |
199 | } | |
200 | ||
63abdcdc | 201 | static u8 bw2regs_1600[] __devinitdata = { |
1da177e4 LT |
202 | 0x14, 0x8b, 0x15, 0x28, 0x16, 0x03, 0x17, 0x13, |
203 | 0x18, 0x7b, 0x19, 0x05, 0x1a, 0x34, 0x1b, 0x2e, | |
204 | 0x1c, 0x00, 0x1d, 0x0a, 0x1e, 0xff, 0x1f, 0x01, | |
205 | 0x10, 0x21, 0 | |
206 | }; | |
207 | ||
63abdcdc | 208 | static u8 bw2regs_ecl[] __devinitdata = { |
1da177e4 LT |
209 | 0x14, 0x65, 0x15, 0x1e, 0x16, 0x04, 0x17, 0x0c, |
210 | 0x18, 0x5e, 0x19, 0x03, 0x1a, 0xa7, 0x1b, 0x23, | |
211 | 0x1c, 0x00, 0x1d, 0x08, 0x1e, 0xff, 0x1f, 0x01, | |
212 | 0x10, 0x20, 0 | |
213 | }; | |
214 | ||
63abdcdc | 215 | static u8 bw2regs_analog[] __devinitdata = { |
1da177e4 LT |
216 | 0x14, 0xbb, 0x15, 0x2b, 0x16, 0x03, 0x17, 0x13, |
217 | 0x18, 0xb0, 0x19, 0x03, 0x1a, 0xa6, 0x1b, 0x22, | |
218 | 0x1c, 0x01, 0x1d, 0x05, 0x1e, 0xff, 0x1f, 0x01, | |
219 | 0x10, 0x20, 0 | |
220 | }; | |
221 | ||
63abdcdc | 222 | static u8 bw2regs_76hz[] __devinitdata = { |
1da177e4 LT |
223 | 0x14, 0xb7, 0x15, 0x27, 0x16, 0x03, 0x17, 0x0f, |
224 | 0x18, 0xae, 0x19, 0x03, 0x1a, 0xae, 0x1b, 0x2a, | |
225 | 0x1c, 0x01, 0x1d, 0x09, 0x1e, 0xff, 0x1f, 0x01, | |
226 | 0x10, 0x24, 0 | |
227 | }; | |
228 | ||
63abdcdc | 229 | static u8 bw2regs_66hz[] __devinitdata = { |
1da177e4 LT |
230 | 0x14, 0xbb, 0x15, 0x2b, 0x16, 0x04, 0x17, 0x14, |
231 | 0x18, 0xae, 0x19, 0x03, 0x1a, 0xa8, 0x1b, 0x24, | |
232 | 0x1c, 0x01, 0x1d, 0x05, 0x1e, 0xff, 0x1f, 0x01, | |
233 | 0x10, 0x20, 0 | |
234 | }; | |
235 | ||
63abdcdc RR |
236 | static void __devinit bw2_do_default_mode(struct bw2_par *par, |
237 | struct fb_info *info, | |
238 | int *linebytes) | |
1da177e4 LT |
239 | { |
240 | u8 status, mon; | |
241 | u8 *p; | |
242 | ||
243 | status = sbus_readb(&par->regs->status); | |
244 | mon = status & BWTWO_SR_RES_MASK; | |
245 | switch (status & BWTWO_SR_ID_MASK) { | |
246 | case BWTWO_SR_ID_MONO_ECL: | |
247 | if (mon == BWTWO_SR_1600_1280) { | |
248 | p = bw2regs_1600; | |
249 | info->var.xres = info->var.xres_virtual = 1600; | |
250 | info->var.yres = info->var.yres_virtual = 1280; | |
251 | *linebytes = 1600 / 8; | |
252 | } else | |
253 | p = bw2regs_ecl; | |
254 | break; | |
255 | ||
256 | case BWTWO_SR_ID_MONO: | |
257 | p = bw2regs_analog; | |
258 | break; | |
259 | ||
260 | case BWTWO_SR_ID_MSYNC: | |
261 | if (mon == BWTWO_SR_1152_900_76_A || | |
262 | mon == BWTWO_SR_1152_900_76_B) | |
263 | p = bw2regs_76hz; | |
264 | else | |
265 | p = bw2regs_66hz; | |
266 | break; | |
267 | ||
268 | case BWTWO_SR_ID_NOCONN: | |
269 | return; | |
270 | ||
271 | default: | |
272 | prom_printf("bw2: can't handle SR %02x\n", | |
273 | status); | |
274 | prom_halt(); | |
275 | } | |
276 | for ( ; *p; p += 2) { | |
277 | u8 __iomem *regp = &((u8 __iomem *)par->regs)[p[0]]; | |
278 | sbus_writeb(p[1], regp); | |
279 | } | |
280 | } | |
281 | ||
282 | struct all_info { | |
283 | struct fb_info info; | |
284 | struct bw2_par par; | |
1da177e4 | 285 | }; |
1da177e4 | 286 | |
50312ce9 | 287 | static int __devinit bw2_init_one(struct of_device *op) |
1da177e4 | 288 | { |
50312ce9 | 289 | struct device_node *dp = op->node; |
1da177e4 | 290 | struct all_info *all; |
50312ce9 | 291 | int linebytes, err; |
1da177e4 | 292 | |
50312ce9 DM |
293 | all = kzalloc(sizeof(*all), GFP_KERNEL); |
294 | if (!all) | |
295 | return -ENOMEM; | |
1da177e4 LT |
296 | |
297 | spin_lock_init(&all->par.lock); | |
50312ce9 DM |
298 | |
299 | all->par.physbase = op->resource[0].start; | |
300 | all->par.which_io = op->resource[0].flags & IORESOURCE_BITS; | |
301 | ||
302 | sbusfb_fill_var(&all->info.var, dp->node, 1); | |
303 | linebytes = of_getintprop_default(dp, "linebytes", | |
304 | all->info.var.xres); | |
305 | ||
1da177e4 LT |
306 | all->info.var.red.length = all->info.var.green.length = |
307 | all->info.var.blue.length = all->info.var.bits_per_pixel; | |
308 | all->info.var.red.offset = all->info.var.green.offset = | |
309 | all->info.var.blue.offset = 0; | |
310 | ||
50312ce9 DM |
311 | all->par.regs = of_ioremap(&op->resource[0], BWTWO_REGISTER_OFFSET, |
312 | sizeof(struct bw2_regs), "bw2 regs"); | |
1da177e4 | 313 | |
50312ce9 | 314 | if (!of_find_property(dp, "width", NULL)) |
1da177e4 LT |
315 | bw2_do_default_mode(&all->par, &all->info, &linebytes); |
316 | ||
317 | all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); | |
318 | ||
319 | all->info.flags = FBINFO_DEFAULT; | |
320 | all->info.fbops = &bw2_ops; | |
50312ce9 DM |
321 | |
322 | all->info.screen_base = | |
e3a411a3 | 323 | of_ioremap(&op->resource[0], 0, all->par.fbsize, "bw2 ram"); |
1da177e4 LT |
324 | all->info.par = &all->par; |
325 | ||
326 | bw2_blank(0, &all->info); | |
327 | ||
328 | bw2_init_fix(&all->info, linebytes); | |
329 | ||
50312ce9 DM |
330 | err= register_framebuffer(&all->info); |
331 | if (err < 0) { | |
e3a411a3 DM |
332 | of_iounmap(&op->resource[0], |
333 | all->par.regs, sizeof(struct bw2_regs)); | |
334 | of_iounmap(&op->resource[0], | |
335 | all->info.screen_base, all->par.fbsize); | |
1da177e4 | 336 | kfree(all); |
50312ce9 | 337 | return err; |
1da177e4 LT |
338 | } |
339 | ||
50312ce9 DM |
340 | dev_set_drvdata(&op->dev, all); |
341 | ||
342 | printk("%s: bwtwo at %lx:%lx\n", | |
343 | dp->full_name, | |
344 | all->par.which_io, all->par.physbase); | |
1da177e4 | 345 | |
50312ce9 | 346 | return 0; |
1da177e4 LT |
347 | } |
348 | ||
50312ce9 | 349 | static int __devinit bw2_probe(struct of_device *dev, const struct of_device_id *match) |
1da177e4 | 350 | { |
50312ce9 | 351 | struct of_device *op = to_of_device(&dev->dev); |
1da177e4 | 352 | |
50312ce9 DM |
353 | return bw2_init_one(op); |
354 | } | |
1da177e4 | 355 | |
e3a411a3 | 356 | static int __devexit bw2_remove(struct of_device *op) |
50312ce9 | 357 | { |
e3a411a3 | 358 | struct all_info *all = dev_get_drvdata(&op->dev); |
50312ce9 DM |
359 | |
360 | unregister_framebuffer(&all->info); | |
361 | ||
e3a411a3 DM |
362 | of_iounmap(&op->resource[0], all->par.regs, sizeof(struct bw2_regs)); |
363 | of_iounmap(&op->resource[0], all->info.screen_base, all->par.fbsize); | |
50312ce9 DM |
364 | |
365 | kfree(all); | |
366 | ||
e3a411a3 | 367 | dev_set_drvdata(&op->dev, NULL); |
1da177e4 LT |
368 | |
369 | return 0; | |
370 | } | |
371 | ||
50312ce9 DM |
372 | static struct of_device_id bw2_match[] = { |
373 | { | |
374 | .name = "bwtwo", | |
375 | }, | |
376 | {}, | |
377 | }; | |
378 | MODULE_DEVICE_TABLE(of, bw2_match); | |
1da177e4 | 379 | |
50312ce9 DM |
380 | static struct of_platform_driver bw2_driver = { |
381 | .name = "bw2", | |
382 | .match_table = bw2_match, | |
383 | .probe = bw2_probe, | |
384 | .remove = __devexit_p(bw2_remove), | |
385 | }; | |
1da177e4 | 386 | |
50312ce9 DM |
387 | static int __init bw2_init(void) |
388 | { | |
389 | if (fb_get_options("bw2fb", NULL)) | |
390 | return -ENODEV; | |
391 | ||
392 | return of_register_driver(&bw2_driver, &of_bus_type); | |
1da177e4 LT |
393 | } |
394 | ||
50312ce9 | 395 | static void __exit bw2_exit(void) |
1da177e4 | 396 | { |
50312ce9 | 397 | return of_unregister_driver(&bw2_driver); |
1da177e4 LT |
398 | } |
399 | ||
1da177e4 | 400 | |
50312ce9 | 401 | module_init(bw2_init); |
1da177e4 | 402 | module_exit(bw2_exit); |
1da177e4 LT |
403 | |
404 | MODULE_DESCRIPTION("framebuffer driver for BWTWO chipsets"); | |
50312ce9 DM |
405 | MODULE_AUTHOR("David S. Miller <davem@davemloft.net>"); |
406 | MODULE_VERSION("2.0"); | |
1da177e4 | 407 | MODULE_LICENSE("GPL"); |