]>
Commit | Line | Data |
---|---|---|
e9fa7c43 MH |
1 | /* |
2 | * File: drivers/video/bf54x-lq043.c | |
3 | * Based on: | |
4 | * Author: Michael Hennerich <hennerich@blackfin.uclinux.org> | |
5 | * | |
6 | * Created: | |
90802ed9 | 7 | * Description: ADSP-BF54x Framebuffer driver |
e9fa7c43 MH |
8 | * |
9 | * | |
10 | * Modified: | |
5e9e4ad0 | 11 | * Copyright 2007-2008 Analog Devices Inc. |
e9fa7c43 MH |
12 | * |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, see the file COPYING, or write | |
27 | * to the Free Software Foundation, Inc., | |
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
29 | */ | |
30 | ||
31 | #include <linux/module.h> | |
32 | #include <linux/kernel.h> | |
33 | #include <linux/errno.h> | |
34 | #include <linux/string.h> | |
35 | #include <linux/mm.h> | |
36 | #include <linux/tty.h> | |
37 | #include <linux/slab.h> | |
38 | #include <linux/delay.h> | |
39 | #include <linux/fb.h> | |
40 | #include <linux/ioport.h> | |
41 | #include <linux/init.h> | |
42 | #include <linux/types.h> | |
43 | #include <linux/interrupt.h> | |
44 | #include <linux/sched.h> | |
45 | #include <linux/timer.h> | |
46 | #include <linux/device.h> | |
47 | #include <linux/backlight.h> | |
48 | #include <linux/lcd.h> | |
49 | #include <linux/spinlock.h> | |
50 | #include <linux/dma-mapping.h> | |
51 | #include <linux/platform_device.h> | |
c26ef3eb | 52 | #include <linux/gpio.h> |
e9fa7c43 MH |
53 | |
54 | #include <asm/blackfin.h> | |
55 | #include <asm/irq.h> | |
56 | #include <asm/dpmc.h> | |
57 | #include <asm/dma-mapping.h> | |
58 | #include <asm/dma.h> | |
e9fa7c43 MH |
59 | #include <asm/portmux.h> |
60 | ||
639f6571 | 61 | #include <mach/bf54x-lq043.h> |
e9fa7c43 MH |
62 | |
63 | #define NO_BL_SUPPORT | |
64 | ||
65 | #define DRIVER_NAME "bf54x-lq043" | |
66 | static char driver_name[] = DRIVER_NAME; | |
67 | ||
68 | #define BFIN_LCD_NBR_PALETTE_ENTRIES 256 | |
69 | ||
70 | #define EPPI0_18 {P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2, P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3, \ | |
71 | P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7, P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, \ | |
72 | P_PPI0_D11, P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15, P_PPI0_D16, P_PPI0_D17, 0} | |
73 | ||
74 | #define EPPI0_24 {P_PPI0_D18, P_PPI0_D19, P_PPI0_D20, P_PPI0_D21, P_PPI0_D22, P_PPI0_D23, 0} | |
75 | ||
76 | struct bfin_bf54xfb_info { | |
77 | struct fb_info *fb; | |
78 | struct device *dev; | |
79 | ||
80 | struct bfin_bf54xfb_mach_info *mach_info; | |
81 | ||
82 | unsigned char *fb_buffer; /* RGB Buffer */ | |
83 | ||
84 | dma_addr_t dma_handle; | |
e9fa7c43 MH |
85 | int lq043_open_cnt; |
86 | int irq; | |
87 | spinlock_t lock; /* lock */ | |
88 | }; | |
89 | ||
90 | static int nocursor; | |
91 | module_param(nocursor, int, 0644); | |
92 | MODULE_PARM_DESC(nocursor, "cursor enable/disable"); | |
93 | ||
94 | static int outp_rgb666; | |
95 | module_param(outp_rgb666, int, 0); | |
96 | MODULE_PARM_DESC(outp_rgb666, "Output 18-bit RGB666"); | |
97 | ||
98 | #define LCD_X_RES 480 /*Horizontal Resolution */ | |
99 | #define LCD_Y_RES 272 /* Vertical Resolution */ | |
100 | ||
101 | #define LCD_BPP 24 /* Bit Per Pixel */ | |
102 | #define DMA_BUS_SIZE 32 | |
103 | ||
104 | /* -- Horizontal synchronizing -- | |
105 | * | |
106 | * Timing characteristics taken from the SHARP LQ043T1DG01 datasheet | |
107 | * (LCY-W-06602A Page 9 of 22) | |
108 | * | |
109 | * Clock Frequency 1/Tc Min 7.83 Typ 9.00 Max 9.26 MHz | |
110 | * | |
111 | * Period TH - 525 - Clock | |
112 | * Pulse width THp - 41 - Clock | |
113 | * Horizontal period THd - 480 - Clock | |
114 | * Back porch THb - 2 - Clock | |
115 | * Front porch THf - 2 - Clock | |
116 | * | |
117 | * -- Vertical synchronizing -- | |
118 | * Period TV - 286 - Line | |
119 | * Pulse width TVp - 10 - Line | |
120 | * Vertical period TVd - 272 - Line | |
121 | * Back porch TVb - 2 - Line | |
122 | * Front porch TVf - 2 - Line | |
123 | */ | |
124 | ||
125 | #define LCD_CLK (8*1000*1000) /* 8MHz */ | |
126 | ||
127 | /* # active data to transfer after Horizontal Delay clock */ | |
128 | #define EPPI_HCOUNT LCD_X_RES | |
129 | ||
130 | /* # active lines to transfer after Vertical Delay clock */ | |
131 | #define EPPI_VCOUNT LCD_Y_RES | |
132 | ||
133 | /* Samples per Line = 480 (active data) + 45 (padding) */ | |
134 | #define EPPI_LINE 525 | |
135 | ||
136 | /* Lines per Frame = 272 (active data) + 14 (padding) */ | |
137 | #define EPPI_FRAME 286 | |
138 | ||
139 | /* FS1 (Hsync) Width (Typical)*/ | |
140 | #define EPPI_FS1W_HBL 41 | |
141 | ||
142 | /* FS1 (Hsync) Period (Typical) */ | |
143 | #define EPPI_FS1P_AVPL EPPI_LINE | |
144 | ||
145 | /* Horizontal Delay clock after assertion of Hsync (Typical) */ | |
146 | #define EPPI_HDELAY 43 | |
147 | ||
148 | /* FS2 (Vsync) Width = FS1 (Hsync) Period * 10 */ | |
149 | #define EPPI_FS2W_LVB (EPPI_LINE * 10) | |
150 | ||
151 | /* FS2 (Vsync) Period = FS1 (Hsync) Period * Lines per Frame */ | |
152 | #define EPPI_FS2P_LAVF (EPPI_LINE * EPPI_FRAME) | |
153 | ||
154 | /* Vertical Delay after assertion of Vsync (2 Lines) */ | |
155 | #define EPPI_VDELAY 12 | |
156 | ||
157 | #define EPPI_CLIP 0xFF00FF00 | |
158 | ||
159 | /* EPPI Control register configuration value for RGB out | |
160 | * - EPPI as Output | |
161 | * GP 2 frame sync mode, | |
162 | * Internal Clock generation disabled, Internal FS generation enabled, | |
163 | * Receives samples on EPPI_CLK raising edge, Transmits samples on EPPI_CLK falling edge, | |
164 | * FS1 & FS2 are active high, | |
165 | * DLEN = 6 (24 bits for RGB888 out) or 5 (18 bits for RGB666 out) | |
166 | * DMA Unpacking disabled when RGB Formating is enabled, otherwise DMA unpacking enabled | |
167 | * Swapping Enabled, | |
168 | * One (DMA) Channel Mode, | |
169 | * RGB Formatting Enabled for RGB666 output, disabled for RGB888 output | |
170 | * Regular watermark - when FIFO is 100% full, | |
171 | * Urgent watermark - when FIFO is 75% full | |
172 | */ | |
173 | ||
174 | #define EPPI_CONTROL (0x20136E2E | SWAPEN) | |
175 | ||
176 | static inline u16 get_eppi_clkdiv(u32 target_ppi_clk) | |
177 | { | |
178 | u32 sclk = get_sclk(); | |
179 | ||
180 | /* EPPI_CLK = (SCLK) / (2 * (EPPI_CLKDIV[15:0] + 1)) */ | |
181 | ||
182 | return (((sclk / target_ppi_clk) / 2) - 1); | |
183 | } | |
184 | ||
185 | static void config_ppi(struct bfin_bf54xfb_info *fbi) | |
186 | { | |
187 | ||
188 | u16 eppi_clkdiv = get_eppi_clkdiv(LCD_CLK); | |
189 | ||
190 | bfin_write_EPPI0_FS1W_HBL(EPPI_FS1W_HBL); | |
191 | bfin_write_EPPI0_FS1P_AVPL(EPPI_FS1P_AVPL); | |
192 | bfin_write_EPPI0_FS2W_LVB(EPPI_FS2W_LVB); | |
193 | bfin_write_EPPI0_FS2P_LAVF(EPPI_FS2P_LAVF); | |
194 | bfin_write_EPPI0_CLIP(EPPI_CLIP); | |
195 | ||
196 | bfin_write_EPPI0_FRAME(EPPI_FRAME); | |
197 | bfin_write_EPPI0_LINE(EPPI_LINE); | |
198 | ||
199 | bfin_write_EPPI0_HCOUNT(EPPI_HCOUNT); | |
200 | bfin_write_EPPI0_HDELAY(EPPI_HDELAY); | |
201 | bfin_write_EPPI0_VCOUNT(EPPI_VCOUNT); | |
202 | bfin_write_EPPI0_VDELAY(EPPI_VDELAY); | |
203 | ||
204 | bfin_write_EPPI0_CLKDIV(eppi_clkdiv); | |
205 | ||
206 | /* | |
207 | * DLEN = 6 (24 bits for RGB888 out) or 5 (18 bits for RGB666 out) | |
208 | * RGB Formatting Enabled for RGB666 output, disabled for RGB888 output | |
209 | */ | |
210 | if (outp_rgb666) | |
211 | bfin_write_EPPI0_CONTROL((EPPI_CONTROL & ~DLENGTH) | DLEN_18 | | |
212 | RGB_FMT_EN); | |
213 | else | |
214 | bfin_write_EPPI0_CONTROL(((EPPI_CONTROL & ~DLENGTH) | DLEN_24) & | |
215 | ~RGB_FMT_EN); | |
216 | ||
217 | ||
218 | } | |
219 | ||
220 | static int config_dma(struct bfin_bf54xfb_info *fbi) | |
221 | { | |
222 | ||
223 | set_dma_config(CH_EPPI0, | |
224 | set_bfin_dma_config(DIR_READ, DMA_FLOW_AUTO, | |
225 | INTR_DISABLE, DIMENSION_2D, | |
2047e40d MH |
226 | DATA_SIZE_32, |
227 | DMA_NOSYNC_KEEP_DMA_BUF)); | |
e9fa7c43 MH |
228 | set_dma_x_count(CH_EPPI0, (LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE); |
229 | set_dma_x_modify(CH_EPPI0, DMA_BUS_SIZE / 8); | |
230 | set_dma_y_count(CH_EPPI0, LCD_Y_RES); | |
231 | set_dma_y_modify(CH_EPPI0, DMA_BUS_SIZE / 8); | |
232 | set_dma_start_addr(CH_EPPI0, (unsigned long)fbi->fb_buffer); | |
233 | ||
234 | return 0; | |
235 | } | |
236 | ||
237 | static int request_ports(struct bfin_bf54xfb_info *fbi) | |
238 | { | |
239 | ||
240 | u16 eppi_req_18[] = EPPI0_18; | |
241 | u16 disp = fbi->mach_info->disp; | |
242 | ||
f8bd4934 | 243 | if (gpio_request_one(disp, GPIOF_OUT_INIT_HIGH, DRIVER_NAME)) { |
426d3107 | 244 | printk(KERN_ERR "Requesting GPIO %d failed\n", disp); |
e9fa7c43 MH |
245 | return -EFAULT; |
246 | } | |
247 | ||
248 | if (peripheral_request_list(eppi_req_18, DRIVER_NAME)) { | |
426d3107 | 249 | printk(KERN_ERR "Requesting Peripherals failed\n"); |
e9fa7c43 MH |
250 | gpio_free(disp); |
251 | return -EFAULT; | |
252 | } | |
253 | ||
254 | if (!outp_rgb666) { | |
255 | ||
256 | u16 eppi_req_24[] = EPPI0_24; | |
257 | ||
258 | if (peripheral_request_list(eppi_req_24, DRIVER_NAME)) { | |
426d3107 | 259 | printk(KERN_ERR "Requesting Peripherals failed\n"); |
e9fa7c43 MH |
260 | peripheral_free_list(eppi_req_18); |
261 | gpio_free(disp); | |
262 | return -EFAULT; | |
263 | } | |
264 | } | |
265 | ||
e9fa7c43 MH |
266 | return 0; |
267 | } | |
268 | ||
269 | static void free_ports(struct bfin_bf54xfb_info *fbi) | |
270 | { | |
271 | ||
272 | u16 eppi_req_18[] = EPPI0_18; | |
273 | ||
274 | gpio_free(fbi->mach_info->disp); | |
275 | ||
276 | peripheral_free_list(eppi_req_18); | |
277 | ||
278 | if (!outp_rgb666) { | |
279 | u16 eppi_req_24[] = EPPI0_24; | |
280 | peripheral_free_list(eppi_req_24); | |
281 | } | |
282 | } | |
283 | ||
284 | static int bfin_bf54x_fb_open(struct fb_info *info, int user) | |
285 | { | |
286 | struct bfin_bf54xfb_info *fbi = info->par; | |
287 | ||
288 | spin_lock(&fbi->lock); | |
289 | fbi->lq043_open_cnt++; | |
290 | ||
291 | if (fbi->lq043_open_cnt <= 1) { | |
292 | ||
293 | bfin_write_EPPI0_CONTROL(0); | |
294 | SSYNC(); | |
295 | ||
296 | config_dma(fbi); | |
297 | config_ppi(fbi); | |
298 | ||
299 | /* start dma */ | |
300 | enable_dma(CH_EPPI0); | |
301 | bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() | EPPI_EN); | |
302 | } | |
303 | ||
304 | spin_unlock(&fbi->lock); | |
305 | ||
306 | return 0; | |
307 | } | |
308 | ||
309 | static int bfin_bf54x_fb_release(struct fb_info *info, int user) | |
310 | { | |
311 | struct bfin_bf54xfb_info *fbi = info->par; | |
312 | ||
313 | spin_lock(&fbi->lock); | |
314 | ||
315 | fbi->lq043_open_cnt--; | |
e9fa7c43 MH |
316 | |
317 | if (fbi->lq043_open_cnt <= 0) { | |
318 | ||
319 | bfin_write_EPPI0_CONTROL(0); | |
320 | SSYNC(); | |
321 | disable_dma(CH_EPPI0); | |
e9fa7c43 MH |
322 | } |
323 | ||
324 | spin_unlock(&fbi->lock); | |
325 | ||
326 | return 0; | |
327 | } | |
328 | ||
329 | static int bfin_bf54x_fb_check_var(struct fb_var_screeninfo *var, | |
330 | struct fb_info *info) | |
331 | { | |
332 | ||
b46578ed MH |
333 | switch (var->bits_per_pixel) { |
334 | case 24:/* TRUECOLOUR, 16m */ | |
335 | var->red.offset = 16; | |
336 | var->green.offset = 8; | |
337 | var->blue.offset = 0; | |
338 | var->red.length = var->green.length = var->blue.length = 8; | |
339 | var->transp.offset = 0; | |
340 | var->transp.length = 0; | |
341 | var->transp.msb_right = 0; | |
342 | var->red.msb_right = 0; | |
343 | var->green.msb_right = 0; | |
344 | var->blue.msb_right = 0; | |
345 | break; | |
346 | default: | |
5ae12170 | 347 | pr_debug("%s: depth not supported: %u BPP\n", __func__, |
e9fa7c43 MH |
348 | var->bits_per_pixel); |
349 | return -EINVAL; | |
350 | } | |
351 | ||
352 | if (info->var.xres != var->xres || info->var.yres != var->yres || | |
353 | info->var.xres_virtual != var->xres_virtual || | |
354 | info->var.yres_virtual != var->yres_virtual) { | |
355 | pr_debug("%s: Resolution not supported: X%u x Y%u \n", | |
5ae12170 | 356 | __func__, var->xres, var->yres); |
e9fa7c43 MH |
357 | return -EINVAL; |
358 | } | |
359 | ||
360 | /* | |
361 | * Memory limit | |
362 | */ | |
363 | ||
364 | if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) { | |
365 | pr_debug("%s: Memory Limit requested yres_virtual = %u\n", | |
5ae12170 | 366 | __func__, var->yres_virtual); |
e9fa7c43 MH |
367 | return -ENOMEM; |
368 | } | |
369 | ||
370 | return 0; | |
371 | } | |
372 | ||
e9fa7c43 MH |
373 | int bfin_bf54x_fb_cursor(struct fb_info *info, struct fb_cursor *cursor) |
374 | { | |
375 | if (nocursor) | |
376 | return 0; | |
377 | else | |
378 | return -EINVAL; /* just to force soft_cursor() call */ | |
379 | } | |
380 | ||
381 | static int bfin_bf54x_fb_setcolreg(u_int regno, u_int red, u_int green, | |
382 | u_int blue, u_int transp, | |
383 | struct fb_info *info) | |
384 | { | |
385 | if (regno >= BFIN_LCD_NBR_PALETTE_ENTRIES) | |
386 | return -EINVAL; | |
387 | ||
388 | if (info->var.grayscale) { | |
389 | /* grayscale = 0.30*R + 0.59*G + 0.11*B */ | |
390 | red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8; | |
391 | } | |
392 | ||
393 | if (info->fix.visual == FB_VISUAL_TRUECOLOR) { | |
394 | ||
395 | u32 value; | |
396 | /* Place color in the pseudopalette */ | |
397 | if (regno > 16) | |
398 | return -EINVAL; | |
399 | ||
400 | red >>= (16 - info->var.red.length); | |
401 | green >>= (16 - info->var.green.length); | |
402 | blue >>= (16 - info->var.blue.length); | |
403 | ||
404 | value = (red << info->var.red.offset) | | |
405 | (green << info->var.green.offset) | | |
406 | (blue << info->var.blue.offset); | |
407 | value &= 0xFFFFFF; | |
408 | ||
409 | ((u32 *) (info->pseudo_palette))[regno] = value; | |
410 | ||
411 | } | |
412 | ||
413 | return 0; | |
414 | } | |
415 | ||
416 | static struct fb_ops bfin_bf54x_fb_ops = { | |
417 | .owner = THIS_MODULE, | |
418 | .fb_open = bfin_bf54x_fb_open, | |
419 | .fb_release = bfin_bf54x_fb_release, | |
420 | .fb_check_var = bfin_bf54x_fb_check_var, | |
421 | .fb_fillrect = cfb_fillrect, | |
422 | .fb_copyarea = cfb_copyarea, | |
423 | .fb_imageblit = cfb_imageblit, | |
e9fa7c43 MH |
424 | .fb_cursor = bfin_bf54x_fb_cursor, |
425 | .fb_setcolreg = bfin_bf54x_fb_setcolreg, | |
426 | }; | |
427 | ||
428 | #ifndef NO_BL_SUPPORT | |
429 | static int bl_get_brightness(struct backlight_device *bd) | |
430 | { | |
431 | return 0; | |
432 | } | |
433 | ||
fa11de0a | 434 | static const struct backlight_ops bfin_lq043fb_bl_ops = { |
e9fa7c43 MH |
435 | .get_brightness = bl_get_brightness, |
436 | }; | |
437 | ||
438 | static struct backlight_device *bl_dev; | |
439 | ||
440 | static int bfin_lcd_get_power(struct lcd_device *dev) | |
441 | { | |
442 | return 0; | |
443 | } | |
444 | ||
445 | static int bfin_lcd_set_power(struct lcd_device *dev, int power) | |
446 | { | |
447 | return 0; | |
448 | } | |
449 | ||
450 | static int bfin_lcd_get_contrast(struct lcd_device *dev) | |
451 | { | |
452 | return 0; | |
453 | } | |
454 | ||
455 | static int bfin_lcd_set_contrast(struct lcd_device *dev, int contrast) | |
456 | { | |
457 | ||
458 | return 0; | |
459 | } | |
460 | ||
0c531360 | 461 | static int bfin_lcd_check_fb(struct lcd_device *dev, struct fb_info *fi) |
e9fa7c43 MH |
462 | { |
463 | if (!fi || (fi == &bfin_bf54x_fb)) | |
464 | return 1; | |
465 | return 0; | |
466 | } | |
467 | ||
468 | static struct lcd_ops bfin_lcd_ops = { | |
469 | .get_power = bfin_lcd_get_power, | |
470 | .set_power = bfin_lcd_set_power, | |
471 | .get_contrast = bfin_lcd_get_contrast, | |
472 | .set_contrast = bfin_lcd_set_contrast, | |
473 | .check_fb = bfin_lcd_check_fb, | |
474 | }; | |
475 | ||
476 | static struct lcd_device *lcd_dev; | |
477 | #endif | |
478 | ||
479 | static irqreturn_t bfin_bf54x_irq_error(int irq, void *dev_id) | |
480 | { | |
15aafa2f | 481 | /*struct bfin_bf54xfb_info *info = dev_id;*/ |
e9fa7c43 MH |
482 | |
483 | u16 status = bfin_read_EPPI0_STATUS(); | |
484 | ||
485 | bfin_write_EPPI0_STATUS(0xFFFF); | |
486 | ||
487 | if (status) { | |
488 | bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() & ~EPPI_EN); | |
489 | disable_dma(CH_EPPI0); | |
490 | ||
491 | /* start dma */ | |
492 | enable_dma(CH_EPPI0); | |
493 | bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() | EPPI_EN); | |
494 | bfin_write_EPPI0_STATUS(0xFFFF); | |
495 | } | |
496 | ||
497 | return IRQ_HANDLED; | |
498 | } | |
499 | ||
48c68c4f | 500 | static int bfin_bf54x_probe(struct platform_device *pdev) |
e9fa7c43 | 501 | { |
8fc809d1 | 502 | #ifndef NO_BL_SUPPORT |
a19a6ee6 | 503 | struct backlight_properties props; |
8fc809d1 | 504 | #endif |
e9fa7c43 MH |
505 | struct bfin_bf54xfb_info *info; |
506 | struct fb_info *fbinfo; | |
507 | int ret; | |
508 | ||
509 | printk(KERN_INFO DRIVER_NAME ": FrameBuffer initializing...\n"); | |
510 | ||
511 | if (request_dma(CH_EPPI0, "CH_EPPI0") < 0) { | |
512 | printk(KERN_ERR DRIVER_NAME | |
513 | ": couldn't request CH_EPPI0 DMA\n"); | |
514 | ret = -EFAULT; | |
515 | goto out1; | |
516 | } | |
517 | ||
518 | fbinfo = | |
519 | framebuffer_alloc(sizeof(struct bfin_bf54xfb_info), &pdev->dev); | |
520 | if (!fbinfo) { | |
521 | ret = -ENOMEM; | |
522 | goto out2; | |
523 | } | |
524 | ||
525 | info = fbinfo->par; | |
526 | info->fb = fbinfo; | |
527 | info->dev = &pdev->dev; | |
232703fb | 528 | spin_lock_init(&info->lock); |
e9fa7c43 MH |
529 | |
530 | platform_set_drvdata(pdev, fbinfo); | |
531 | ||
532 | strcpy(fbinfo->fix.id, driver_name); | |
533 | ||
534 | info->mach_info = pdev->dev.platform_data; | |
535 | ||
536 | if (info->mach_info == NULL) { | |
537 | dev_err(&pdev->dev, | |
538 | "no platform data for lcd, cannot attach\n"); | |
539 | ret = -EINVAL; | |
540 | goto out3; | |
541 | } | |
542 | ||
543 | fbinfo->fix.type = FB_TYPE_PACKED_PIXELS; | |
544 | fbinfo->fix.type_aux = 0; | |
545 | fbinfo->fix.xpanstep = 0; | |
546 | fbinfo->fix.ypanstep = 0; | |
547 | fbinfo->fix.ywrapstep = 0; | |
548 | fbinfo->fix.accel = FB_ACCEL_NONE; | |
549 | fbinfo->fix.visual = FB_VISUAL_TRUECOLOR; | |
550 | ||
551 | fbinfo->var.nonstd = 0; | |
552 | fbinfo->var.activate = FB_ACTIVATE_NOW; | |
553 | fbinfo->var.height = info->mach_info->height; | |
554 | fbinfo->var.width = info->mach_info->width; | |
555 | fbinfo->var.accel_flags = 0; | |
556 | fbinfo->var.vmode = FB_VMODE_NONINTERLACED; | |
557 | ||
558 | fbinfo->fbops = &bfin_bf54x_fb_ops; | |
559 | fbinfo->flags = FBINFO_FLAG_DEFAULT; | |
560 | ||
561 | fbinfo->var.xres = info->mach_info->xres.defval; | |
562 | fbinfo->var.xres_virtual = info->mach_info->xres.defval; | |
563 | fbinfo->var.yres = info->mach_info->yres.defval; | |
564 | fbinfo->var.yres_virtual = info->mach_info->yres.defval; | |
565 | fbinfo->var.bits_per_pixel = info->mach_info->bpp.defval; | |
566 | ||
567 | fbinfo->var.upper_margin = 0; | |
568 | fbinfo->var.lower_margin = 0; | |
569 | fbinfo->var.vsync_len = 0; | |
570 | ||
571 | fbinfo->var.left_margin = 0; | |
572 | fbinfo->var.right_margin = 0; | |
573 | fbinfo->var.hsync_len = 0; | |
574 | ||
575 | fbinfo->var.red.offset = 16; | |
576 | fbinfo->var.green.offset = 8; | |
577 | fbinfo->var.blue.offset = 0; | |
578 | fbinfo->var.transp.offset = 0; | |
579 | fbinfo->var.red.length = 8; | |
580 | fbinfo->var.green.length = 8; | |
581 | fbinfo->var.blue.length = 8; | |
582 | fbinfo->var.transp.length = 0; | |
583 | fbinfo->fix.smem_len = info->mach_info->xres.max * | |
584 | info->mach_info->yres.max * info->mach_info->bpp.max / 8; | |
585 | ||
586 | fbinfo->fix.line_length = fbinfo->var.xres_virtual * | |
587 | fbinfo->var.bits_per_pixel / 8; | |
588 | ||
589 | info->fb_buffer = | |
590 | dma_alloc_coherent(NULL, fbinfo->fix.smem_len, &info->dma_handle, | |
591 | GFP_KERNEL); | |
592 | ||
593 | if (NULL == info->fb_buffer) { | |
594 | printk(KERN_ERR DRIVER_NAME | |
595 | ": couldn't allocate dma buffer.\n"); | |
596 | ret = -ENOMEM; | |
597 | goto out3; | |
598 | } | |
599 | ||
e9fa7c43 MH |
600 | fbinfo->screen_base = (void *)info->fb_buffer; |
601 | fbinfo->fix.smem_start = (int)info->fb_buffer; | |
602 | ||
603 | fbinfo->fbops = &bfin_bf54x_fb_ops; | |
604 | ||
b7e69add DC |
605 | fbinfo->pseudo_palette = devm_kzalloc(&pdev->dev, sizeof(u32) * 16, |
606 | GFP_KERNEL); | |
e9fa7c43 MH |
607 | if (!fbinfo->pseudo_palette) { |
608 | printk(KERN_ERR DRIVER_NAME | |
609 | "Fail to allocate pseudo_palette\n"); | |
610 | ||
611 | ret = -ENOMEM; | |
612 | goto out4; | |
613 | } | |
614 | ||
e9fa7c43 MH |
615 | if (fb_alloc_cmap(&fbinfo->cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0) |
616 | < 0) { | |
617 | printk(KERN_ERR DRIVER_NAME | |
618 | "Fail to allocate colormap (%d entries)\n", | |
619 | BFIN_LCD_NBR_PALETTE_ENTRIES); | |
620 | ret = -EFAULT; | |
b7e69add | 621 | goto out4; |
e9fa7c43 MH |
622 | } |
623 | ||
624 | if (request_ports(info)) { | |
625 | printk(KERN_ERR DRIVER_NAME ": couldn't request gpio port.\n"); | |
626 | ret = -EFAULT; | |
627 | goto out6; | |
628 | } | |
629 | ||
630 | info->irq = platform_get_irq(pdev, 0); | |
631 | if (info->irq < 0) { | |
632 | ret = -EINVAL; | |
633 | goto out7; | |
634 | } | |
635 | ||
f8798ccb | 636 | if (request_irq(info->irq, bfin_bf54x_irq_error, 0, |
e9fa7c43 MH |
637 | "PPI ERROR", info) < 0) { |
638 | printk(KERN_ERR DRIVER_NAME | |
639 | ": unable to request PPI ERROR IRQ\n"); | |
640 | ret = -EFAULT; | |
641 | goto out7; | |
642 | } | |
643 | ||
644 | if (register_framebuffer(fbinfo) < 0) { | |
645 | printk(KERN_ERR DRIVER_NAME | |
646 | ": unable to register framebuffer.\n"); | |
647 | ret = -EINVAL; | |
648 | goto out8; | |
649 | } | |
650 | #ifndef NO_BL_SUPPORT | |
a19a6ee6 | 651 | memset(&props, 0, sizeof(struct backlight_properties)); |
bb7ca747 | 652 | props.type = BACKLIGHT_RAW; |
a19a6ee6 MG |
653 | props.max_brightness = 255; |
654 | bl_dev = backlight_device_register("bf54x-bl", NULL, NULL, | |
655 | &bfin_lq043fb_bl_ops, &props); | |
fa11de0a BP |
656 | if (IS_ERR(bl_dev)) { |
657 | printk(KERN_ERR DRIVER_NAME | |
658 | ": unable to register backlight.\n"); | |
659 | ret = -EINVAL; | |
8fc809d1 MF |
660 | unregister_framebuffer(fbinfo); |
661 | goto out8; | |
fa11de0a | 662 | } |
e9fa7c43 | 663 | |
b3544ea9 | 664 | lcd_dev = lcd_device_register(DRIVER_NAME, &pdev->dev, NULL, &bfin_lcd_ops); |
e9fa7c43 MH |
665 | lcd_dev->props.max_contrast = 255, printk(KERN_INFO "Done.\n"); |
666 | #endif | |
667 | ||
668 | return 0; | |
669 | ||
670 | out8: | |
671 | free_irq(info->irq, info); | |
672 | out7: | |
673 | free_ports(info); | |
674 | out6: | |
675 | fb_dealloc_cmap(&fbinfo->cmap); | |
e9fa7c43 MH |
676 | out4: |
677 | dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer, | |
678 | info->dma_handle); | |
679 | out3: | |
680 | framebuffer_release(fbinfo); | |
681 | out2: | |
682 | free_dma(CH_EPPI0); | |
683 | out1: | |
e9fa7c43 MH |
684 | |
685 | return ret; | |
686 | } | |
687 | ||
48c68c4f | 688 | static int bfin_bf54x_remove(struct platform_device *pdev) |
e9fa7c43 MH |
689 | { |
690 | ||
691 | struct fb_info *fbinfo = platform_get_drvdata(pdev); | |
692 | struct bfin_bf54xfb_info *info = fbinfo->par; | |
693 | ||
694 | free_dma(CH_EPPI0); | |
695 | free_irq(info->irq, info); | |
696 | ||
697 | if (info->fb_buffer != NULL) | |
698 | dma_free_coherent(NULL, fbinfo->fix.smem_len, info->fb_buffer, | |
699 | info->dma_handle); | |
700 | ||
e9fa7c43 MH |
701 | fb_dealloc_cmap(&fbinfo->cmap); |
702 | ||
703 | #ifndef NO_BL_SUPPORT | |
704 | lcd_device_unregister(lcd_dev); | |
705 | backlight_device_unregister(bl_dev); | |
706 | #endif | |
707 | ||
708 | unregister_framebuffer(fbinfo); | |
709 | ||
710 | free_ports(info); | |
711 | ||
712 | printk(KERN_INFO DRIVER_NAME ": Unregister LCD driver.\n"); | |
713 | ||
714 | return 0; | |
715 | } | |
716 | ||
717 | #ifdef CONFIG_PM | |
718 | static int bfin_bf54x_suspend(struct platform_device *pdev, pm_message_t state) | |
719 | { | |
e9fa7c43 MH |
720 | bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() & ~EPPI_EN); |
721 | disable_dma(CH_EPPI0); | |
722 | bfin_write_EPPI0_STATUS(0xFFFF); | |
723 | ||
724 | return 0; | |
725 | } | |
726 | ||
727 | static int bfin_bf54x_resume(struct platform_device *pdev) | |
728 | { | |
729 | struct fb_info *fbinfo = platform_get_drvdata(pdev); | |
730 | struct bfin_bf54xfb_info *info = fbinfo->par; | |
731 | ||
141d87e7 MH |
732 | if (info->lq043_open_cnt) { |
733 | ||
734 | bfin_write_EPPI0_CONTROL(0); | |
735 | SSYNC(); | |
736 | ||
737 | config_dma(info); | |
738 | config_ppi(info); | |
739 | ||
740 | /* start dma */ | |
741 | enable_dma(CH_EPPI0); | |
742 | bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() | EPPI_EN); | |
743 | } | |
e9fa7c43 MH |
744 | |
745 | return 0; | |
746 | } | |
747 | #else | |
748 | #define bfin_bf54x_suspend NULL | |
749 | #define bfin_bf54x_resume NULL | |
750 | #endif | |
751 | ||
752 | static struct platform_driver bfin_bf54x_driver = { | |
753 | .probe = bfin_bf54x_probe, | |
48c68c4f | 754 | .remove = bfin_bf54x_remove, |
e9fa7c43 MH |
755 | .suspend = bfin_bf54x_suspend, |
756 | .resume = bfin_bf54x_resume, | |
757 | .driver = { | |
758 | .name = DRIVER_NAME, | |
759 | .owner = THIS_MODULE, | |
760 | }, | |
761 | }; | |
fbc0156c | 762 | module_platform_driver(bfin_bf54x_driver); |
e9fa7c43 MH |
763 | |
764 | MODULE_DESCRIPTION("Blackfin BF54x TFT LCD Driver"); | |
765 | MODULE_LICENSE("GPL"); |