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cffd9348 MH |
1 | /* |
2 | * Frame buffer driver for ADV7393/2 video encoder | |
3 | * | |
4 | * Copyright 2006-2009 Analog Devices Inc. | |
5 | * Licensed under the GPL-2 or late. | |
6 | */ | |
7 | ||
8 | #ifndef __BFIN_ADV7393FB_H__ | |
9 | #define __BFIN_ADV7393FB_H__ | |
10 | ||
11 | #define BFIN_LCD_NBR_PALETTE_ENTRIES 256 | |
12 | ||
13 | #ifdef CONFIG_NTSC | |
14 | # define VMODE 0 | |
15 | #endif | |
16 | #ifdef CONFIG_PAL | |
17 | # define VMODE 1 | |
18 | #endif | |
19 | #ifdef CONFIG_NTSC_640x480 | |
20 | # define VMODE 2 | |
21 | #endif | |
22 | #ifdef CONFIG_PAL_640x480 | |
23 | # define VMODE 3 | |
24 | #endif | |
25 | #ifdef CONFIG_NTSC_YCBCR | |
26 | # define VMODE 4 | |
27 | #endif | |
28 | #ifdef CONFIG_PAL_YCBCR | |
29 | # define VMODE 5 | |
30 | #endif | |
31 | ||
32 | #ifndef VMODE | |
33 | # define VMODE 1 | |
34 | #endif | |
35 | ||
36 | #ifdef CONFIG_ADV7393_2XMEM | |
37 | # define VMEM 2 | |
38 | #else | |
39 | # define VMEM 1 | |
40 | #endif | |
41 | ||
42 | #if defined(CONFIG_BF537) || defined(CONFIG_BF536) || defined(CONFIG_BF534) | |
43 | # define DMA_CFG_VAL 0x7935 /* Set Sync Bit */ | |
44 | # define VB_DUMMY_MEMORY_SOURCE L1_DATA_B_START | |
45 | #else | |
46 | # define DMA_CFG_VAL 0x7915 | |
47 | # define VB_DUMMY_MEMORY_SOURCE BOOT_ROM_START | |
48 | #endif | |
49 | ||
50 | enum { | |
51 | DESTRUCT, | |
52 | BUILD, | |
53 | }; | |
54 | ||
55 | enum { | |
56 | POWER_ON, | |
57 | POWER_DOWN, | |
58 | BLANK_ON, | |
59 | BLANK_OFF, | |
60 | }; | |
61 | ||
cffd9348 MH |
62 | struct adv7393fb_modes { |
63 | const s8 name[25]; /* Full name */ | |
64 | u16 xres; /* Active Horizonzal Pixels */ | |
65 | u16 yres; /* Active Vertical Pixels */ | |
66 | u16 bpp; | |
67 | u16 vmode; | |
68 | u16 a_lines; /* Active Lines per Field */ | |
69 | u16 vb1_lines; /* Vertical Blanking Field 1 Lines */ | |
70 | u16 vb2_lines; /* Vertical Blanking Field 2 Lines */ | |
71 | u16 tot_lines; /* Total Lines per Frame */ | |
72 | u16 boeft_blank; /* Before Odd/Even Field Transition No. of Blank Pixels */ | |
73 | u16 aoeft_blank; /* After Odd/Even Field Transition No. of Blank Pixels */ | |
74 | const s8 *adv7393_i2c_initd; | |
75 | u16 adv7393_i2c_initd_len; | |
76 | }; | |
77 | ||
78 | static const u8 init_NTSC_TESTPATTERN[] = { | |
79 | 0x00, 0x1E, /* Power up all DACs and PLL */ | |
80 | 0x01, 0x00, /* SD-Only Mode */ | |
81 | 0x80, 0x10, /* SSAF Luma Filter Enabled, NTSC Mode */ | |
82 | 0x82, 0xCB, /* Step control on, pixel data valid, pedestal on, PrPb SSAF on, CVBS/YC output */ | |
83 | 0x84, 0x40, /* SD Color Bar Test Pattern Enabled, DAC 2 = Luma, DAC 3 = Chroma */ | |
84 | }; | |
85 | ||
86 | static const u8 init_NTSC[] = { | |
87 | 0x00, 0x1E, /* Power up all DACs and PLL */ | |
25985edc LDM |
88 | 0xC3, 0x26, /* Program RGB->YCrCb Color Space conversion matrix */ |
89 | 0xC5, 0x12, /* Program RGB->YCrCb Color Space conversion matrix */ | |
90 | 0xC2, 0x4A, /* Program RGB->YCrCb Color Space conversion matrix */ | |
91 | 0xC6, 0x5E, /* Program RGB->YCrCb Color Space conversion matrix */ | |
92 | 0xBD, 0x19, /* Program RGB->YCrCb Color Space conversion matrix */ | |
93 | 0xBF, 0x42, /* Program RGB->YCrCb Color Space conversion matrix */ | |
cffd9348 MH |
94 | 0x8C, 0x1F, /* NTSC Subcarrier Frequency */ |
95 | 0x8D, 0x7C, /* NTSC Subcarrier Frequency */ | |
96 | 0x8E, 0xF0, /* NTSC Subcarrier Frequency */ | |
97 | 0x8F, 0x21, /* NTSC Subcarrier Frequency */ | |
98 | 0x01, 0x00, /* SD-Only Mode */ | |
99 | 0x80, 0x30, /* SSAF Luma Filter Enabled, NTSC Mode */ | |
100 | 0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */ | |
101 | 0x87, 0x80, /* SD Color Bar Test Pattern Enabled, DAC 2 = Luma, DAC 3 = Chroma */ | |
102 | 0x86, 0x82, | |
103 | 0x8B, 0x11, | |
104 | 0x88, 0x20, | |
105 | 0x8A, 0x0d, | |
106 | }; | |
107 | ||
108 | static const u8 init_PAL[] = { | |
109 | 0x00, 0x1E, /* Power up all DACs and PLL */ | |
25985edc LDM |
110 | 0xC3, 0x26, /* Program RGB->YCrCb Color Space conversion matrix */ |
111 | 0xC5, 0x12, /* Program RGB->YCrCb Color Space conversion matrix */ | |
112 | 0xC2, 0x4A, /* Program RGB->YCrCb Color Space conversion matrix */ | |
113 | 0xC6, 0x5E, /* Program RGB->YCrCb Color Space conversion matrix */ | |
114 | 0xBD, 0x19, /* Program RGB->YCrCb Color Space conversion matrix */ | |
115 | 0xBF, 0x42, /* Program RGB->YCrCb Color Space conversion matrix */ | |
cffd9348 MH |
116 | 0x8C, 0xCB, /* PAL Subcarrier Frequency */ |
117 | 0x8D, 0x8A, /* PAL Subcarrier Frequency */ | |
118 | 0x8E, 0x09, /* PAL Subcarrier Frequency */ | |
119 | 0x8F, 0x2A, /* PAL Subcarrier Frequency */ | |
120 | 0x01, 0x00, /* SD-Only Mode */ | |
121 | 0x80, 0x11, /* SSAF Luma Filter Enabled, PAL Mode */ | |
122 | 0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */ | |
123 | 0x87, 0x80, /* SD Color Bar Test Pattern Enabled, DAC 2 = Luma, DAC 3 = Chroma */ | |
124 | 0x86, 0x82, | |
125 | 0x8B, 0x11, | |
126 | 0x88, 0x20, | |
127 | 0x8A, 0x0d, | |
128 | }; | |
129 | ||
130 | static const u8 init_NTSC_YCbCr[] = { | |
131 | 0x00, 0x1E, /* Power up all DACs and PLL */ | |
132 | 0x8C, 0x1F, /* NTSC Subcarrier Frequency */ | |
133 | 0x8D, 0x7C, /* NTSC Subcarrier Frequency */ | |
134 | 0x8E, 0xF0, /* NTSC Subcarrier Frequency */ | |
135 | 0x8F, 0x21, /* NTSC Subcarrier Frequency */ | |
136 | 0x01, 0x00, /* SD-Only Mode */ | |
137 | 0x80, 0x30, /* SSAF Luma Filter Enabled, NTSC Mode */ | |
138 | 0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */ | |
139 | 0x87, 0x00, /* DAC 2 = Luma, DAC 3 = Chroma */ | |
140 | 0x86, 0x82, | |
141 | 0x8B, 0x11, | |
142 | 0x88, 0x08, | |
143 | 0x8A, 0x0d, | |
144 | }; | |
145 | ||
146 | static const u8 init_PAL_YCbCr[] = { | |
147 | 0x00, 0x1E, /* Power up all DACs and PLL */ | |
148 | 0x8C, 0xCB, /* PAL Subcarrier Frequency */ | |
149 | 0x8D, 0x8A, /* PAL Subcarrier Frequency */ | |
150 | 0x8E, 0x09, /* PAL Subcarrier Frequency */ | |
151 | 0x8F, 0x2A, /* PAL Subcarrier Frequency */ | |
152 | 0x01, 0x00, /* SD-Only Mode */ | |
153 | 0x80, 0x11, /* SSAF Luma Filter Enabled, PAL Mode */ | |
154 | 0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */ | |
155 | 0x87, 0x00, /* DAC 2 = Luma, DAC 3 = Chroma */ | |
156 | 0x86, 0x82, | |
157 | 0x8B, 0x11, | |
158 | 0x88, 0x08, | |
159 | 0x8A, 0x0d, | |
160 | }; | |
161 | ||
162 | static struct adv7393fb_modes known_modes[] = { | |
163 | /* NTSC 720x480 CRT */ | |
164 | { | |
165 | .name = "NTSC 720x480", | |
166 | .xres = 720, | |
167 | .yres = 480, | |
168 | .bpp = 16, | |
169 | .vmode = FB_VMODE_INTERLACED, | |
170 | .a_lines = 240, | |
171 | .vb1_lines = 22, | |
172 | .vb2_lines = 23, | |
173 | .tot_lines = 525, | |
174 | .boeft_blank = 16, | |
175 | .aoeft_blank = 122, | |
176 | .adv7393_i2c_initd = init_NTSC, | |
177 | .adv7393_i2c_initd_len = sizeof(init_NTSC) | |
178 | }, | |
179 | /* PAL 720x480 CRT */ | |
180 | { | |
181 | .name = "PAL 720x576", | |
182 | .xres = 720, | |
183 | .yres = 576, | |
184 | .bpp = 16, | |
185 | .vmode = FB_VMODE_INTERLACED, | |
186 | .a_lines = 288, | |
187 | .vb1_lines = 24, | |
188 | .vb2_lines = 25, | |
189 | .tot_lines = 625, | |
190 | .boeft_blank = 12, | |
191 | .aoeft_blank = 132, | |
192 | .adv7393_i2c_initd = init_PAL, | |
193 | .adv7393_i2c_initd_len = sizeof(init_PAL) | |
194 | }, | |
195 | /* NTSC 640x480 CRT Experimental */ | |
196 | { | |
197 | .name = "NTSC 640x480", | |
198 | .xres = 640, | |
199 | .yres = 480, | |
200 | .bpp = 16, | |
201 | .vmode = FB_VMODE_INTERLACED, | |
202 | .a_lines = 240, | |
203 | .vb1_lines = 22, | |
204 | .vb2_lines = 23, | |
205 | .tot_lines = 525, | |
206 | .boeft_blank = 16 + 40, | |
207 | .aoeft_blank = 122 + 40, | |
208 | .adv7393_i2c_initd = init_NTSC, | |
209 | .adv7393_i2c_initd_len = sizeof(init_NTSC) | |
210 | }, | |
211 | /* PAL 640x480 CRT Experimental */ | |
212 | { | |
213 | .name = "PAL 640x480", | |
214 | .xres = 640, | |
215 | .yres = 480, | |
216 | .bpp = 16, | |
217 | .vmode = FB_VMODE_INTERLACED, | |
218 | .a_lines = 288 - 20, | |
219 | .vb1_lines = 24 + 20, | |
220 | .vb2_lines = 25 + 20, | |
221 | .tot_lines = 625, | |
222 | .boeft_blank = 12 + 40, | |
223 | .aoeft_blank = 132 + 40, | |
224 | .adv7393_i2c_initd = init_PAL, | |
225 | .adv7393_i2c_initd_len = sizeof(init_PAL) | |
226 | }, | |
227 | /* NTSC 720x480 YCbCR */ | |
228 | { | |
229 | .name = "NTSC 720x480 YCbCR", | |
230 | .xres = 720, | |
231 | .yres = 480, | |
232 | .bpp = 16, | |
233 | .vmode = FB_VMODE_INTERLACED, | |
234 | .a_lines = 240, | |
235 | .vb1_lines = 22, | |
236 | .vb2_lines = 23, | |
237 | .tot_lines = 525, | |
238 | .boeft_blank = 16, | |
239 | .aoeft_blank = 122, | |
240 | .adv7393_i2c_initd = init_NTSC_YCbCr, | |
241 | .adv7393_i2c_initd_len = sizeof(init_NTSC_YCbCr) | |
242 | }, | |
243 | /* PAL 720x480 CRT */ | |
244 | { | |
245 | .name = "PAL 720x576 YCbCR", | |
246 | .xres = 720, | |
247 | .yres = 576, | |
248 | .bpp = 16, | |
249 | .vmode = FB_VMODE_INTERLACED, | |
250 | .a_lines = 288, | |
251 | .vb1_lines = 24, | |
252 | .vb2_lines = 25, | |
253 | .tot_lines = 625, | |
254 | .boeft_blank = 12, | |
255 | .aoeft_blank = 132, | |
256 | .adv7393_i2c_initd = init_PAL_YCbCr, | |
257 | .adv7393_i2c_initd_len = sizeof(init_PAL_YCbCr) | |
258 | } | |
259 | }; | |
260 | ||
261 | struct adv7393fb_regs { | |
262 | ||
263 | }; | |
264 | ||
265 | struct adv7393fb_device { | |
266 | struct fb_info info; /* FB driver info record */ | |
267 | ||
268 | struct i2c_client *client; | |
269 | ||
270 | struct dmasg *descriptor_list_head; | |
271 | struct dmasg *vb1; | |
272 | struct dmasg *av1; | |
273 | struct dmasg *vb2; | |
274 | struct dmasg *av2; | |
275 | ||
276 | dma_addr_t dma_handle; | |
277 | ||
278 | struct fb_info bfin_adv7393_fb; | |
279 | ||
280 | struct adv7393fb_modes *modes; | |
281 | ||
282 | struct adv7393fb_regs *regs; /* Registers memory map */ | |
283 | size_t regs_len; | |
284 | size_t fb_len; | |
285 | size_t line_len; | |
286 | u16 open; | |
287 | u16 *fb_mem; /* RGB Buffer */ | |
288 | ||
289 | }; | |
290 | ||
291 | #define to_adv7393fb_device(_info) \ | |
292 | (_info ? container_of(_info, struct adv7393fb_device, info) : NULL); | |
293 | ||
294 | static int bfin_adv7393_fb_open(struct fb_info *info, int user); | |
295 | static int bfin_adv7393_fb_release(struct fb_info *info, int user); | |
296 | static int bfin_adv7393_fb_check_var(struct fb_var_screeninfo *var, | |
297 | struct fb_info *info); | |
298 | ||
299 | static int bfin_adv7393_fb_pan_display(struct fb_var_screeninfo *var, | |
300 | struct fb_info *info); | |
301 | ||
302 | static int bfin_adv7393_fb_blank(int blank, struct fb_info *info); | |
303 | ||
304 | static void bfin_config_ppi(struct adv7393fb_device *fbdev); | |
305 | static int bfin_config_dma(struct adv7393fb_device *fbdev); | |
306 | static void bfin_disable_dma(void); | |
307 | static void bfin_enable_ppi(void); | |
308 | static void bfin_disable_ppi(void); | |
309 | ||
310 | static inline int adv7393_write(struct i2c_client *client, u8 reg, u8 value); | |
311 | static inline int adv7393_read(struct i2c_client *client, u8 reg); | |
312 | static int adv7393_write_block(struct i2c_client *client, const u8 *data, | |
313 | unsigned int len); | |
314 | ||
315 | int bfin_adv7393_fb_cursor(struct fb_info *info, struct fb_cursor *cursor); | |
316 | static int bfin_adv7393_fb_setcolreg(u_int, u_int, u_int, u_int, | |
317 | u_int, struct fb_info *info); | |
318 | ||
319 | #endif |