]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/video/fbdev/matrox/matroxfb_base.c
video: fbdev: matrox: the list iterator can't be NULL
[mirror_ubuntu-artful-kernel.git] / drivers / video / fbdev / matrox / matroxfb_base.c
CommitLineData
1da177e4
LT
1/*
2 *
3 * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
4 *
5 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
6 *
7 * Portions Copyright (c) 2001 Matrox Graphics Inc.
8 *
9 * Version: 1.65 2002/08/14
10 *
11 * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org>
12 *
13 * Contributors: "menion?" <menion@mindless.com>
14 * Betatesting, fixes, ideas
15 *
16 * "Kurt Garloff" <garloff@suse.de>
17 * Betatesting, fixes, ideas, videomodes, videomodes timmings
18 *
19 * "Tom Rini" <trini@kernel.crashing.org>
20 * MTRR stuff, PPC cleanups, betatesting, fixes, ideas
21 *
22 * "Bibek Sahu" <scorpio@dodds.net>
23 * Access device through readb|w|l and write b|w|l
24 * Extensive debugging stuff
25 *
26 * "Daniel Haun" <haund@usa.net>
27 * Testing, hardware cursor fixes
28 *
29 * "Scott Wood" <sawst46+@pitt.edu>
30 * Fixes
31 *
32 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
33 * Betatesting
34 *
35 * "Kelly French" <targon@hazmat.com>
36 * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es>
37 * Betatesting, bug reporting
38 *
39 * "Pablo Bianucci" <pbian@pccp.com.ar>
40 * Fixes, ideas, betatesting
41 *
42 * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es>
43 * Fixes, enhandcements, ideas, betatesting
44 *
45 * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp>
46 * PPC betatesting, PPC support, backward compatibility
47 *
48 * "Paul Womar" <Paul@pwomar.demon.co.uk>
49 * "Owen Waller" <O.Waller@ee.qub.ac.uk>
50 * PPC betatesting
51 *
52 * "Thomas Pornin" <pornin@bolet.ens.fr>
53 * Alpha betatesting
54 *
55 * "Pieter van Leuven" <pvl@iae.nl>
56 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
57 * G100 testing
58 *
59 * "H. Peter Arvin" <hpa@transmeta.com>
60 * Ideas
61 *
62 * "Cort Dougan" <cort@cs.nmt.edu>
63 * CHRP fixes and PReP cleanup
64 *
65 * "Mark Vojkovich" <mvojkovi@ucsd.edu>
66 * G400 support
67 *
68 * "Samuel Hocevar" <sam@via.ecp.fr>
69 * Fixes
70 *
71 * "Anton Altaparmakov" <AntonA@bigfoot.com>
72 * G400 MAX/non-MAX distinction
73 *
74 * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com>
75 * memtype extension (needed for GXT130P RS/6000 adapter)
76 *
77 * "Uns Lider" <unslider@miranda.org>
78 * G100 PLNWT fixes
79 *
80 * "Denis Zaitsev" <zzz@cd-club.ru>
81 * Fixes
82 *
83 * "Mike Pieper" <mike@pieper-family.de>
84 * TVOut enhandcements, V4L2 control interface.
85 *
86 * "Diego Biurrun" <diego@biurrun.de>
87 * DFP testing
88 *
89 * (following author is not in any relation with this code, but his code
90 * is included in this driver)
91 *
92 * Based on framebuffer driver for VBE 2.0 compliant graphic boards
93 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
94 *
95 * (following author is not in any relation with this code, but his ideas
beb7dd86 96 * were used when writing this driver)
1da177e4
LT
97 *
98 * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
99 *
100 */
101
1da177e4
LT
102#include <linux/version.h>
103
104#include "matroxfb_base.h"
105#include "matroxfb_misc.h"
106#include "matroxfb_accel.h"
107#include "matroxfb_DAC1064.h"
108#include "matroxfb_Ti3026.h"
109#include "matroxfb_maven.h"
110#include "matroxfb_crtc2.h"
111#include "matroxfb_g450.h"
112#include <linux/matroxfb.h>
113#include <linux/interrupt.h>
5a0e3ad6 114#include <linux/slab.h>
84902b7a 115#include <linux/uaccess.h>
1da177e4
LT
116
117#ifdef CONFIG_PPC_PMAC
e8222502 118#include <asm/machdep.h>
1da177e4
LT
119unsigned char nvram_read_byte(int);
120static int default_vmode = VMODE_NVRAM;
121static int default_cmode = CMODE_NVRAM;
122#endif
123
124static void matroxfb_unregister_device(struct matrox_fb_info* minfo);
125
126/* --------------------------------------------------------------------- */
127
128/*
129 * card parameters
130 */
131
132/* --------------------------------------------------------------------- */
133
134static struct fb_var_screeninfo vesafb_defined = {
135 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/
136 0,0, /* virtual -> visible no offset */
137 8, /* depth -> load bits_per_pixel */
138 0, /* greyscale ? */
139 {0,0,0}, /* R */
140 {0,0,0}, /* G */
141 {0,0,0}, /* B */
142 {0,0,0}, /* transparency */
143 0, /* standard pixel format */
144 FB_ACTIVATE_NOW,
145 -1,-1,
146 FB_ACCELF_TEXT, /* accel flags */
147 39721L,48L,16L,33L,10L,
148 96L,2L,~0, /* No sync info */
149 FB_VMODE_NONINTERLACED,
1da177e4
LT
150};
151
152
153
154/* --------------------------------------------------------------------- */
316b4d64
JD
155static void update_crtc2(struct matrox_fb_info *minfo, unsigned int pos)
156{
fc2d10dd 157 struct matroxfb_dh_fb_info *info = minfo->crtc2.info;
1da177e4
LT
158
159 /* Make sure that displays are compatible */
fc2d10dd
JD
160 if (info && (info->fbcon.var.bits_per_pixel == minfo->fbcon.var.bits_per_pixel)
161 && (info->fbcon.var.xres_virtual == minfo->fbcon.var.xres_virtual)
162 && (info->fbcon.var.green.length == minfo->fbcon.var.green.length)
a50d913f 163 ) {
fc2d10dd 164 switch (minfo->fbcon.var.bits_per_pixel) {
1da177e4
LT
165 case 16:
166 case 32:
167 pos = pos * 8;
168 if (info->interlaced) {
169 mga_outl(0x3C2C, pos);
fc2d10dd 170 mga_outl(0x3C28, pos + minfo->fbcon.var.xres_virtual * minfo->fbcon.var.bits_per_pixel / 8);
1da177e4
LT
171 } else {
172 mga_outl(0x3C28, pos);
173 }
174 break;
175 }
176 }
177}
178
316b4d64
JD
179static void matroxfb_crtc1_panpos(struct matrox_fb_info *minfo)
180{
fc2d10dd 181 if (minfo->crtc1.panpos >= 0) {
1da177e4
LT
182 unsigned long flags;
183 int panpos;
184
185 matroxfb_DAC_lock_irqsave(flags);
fc2d10dd 186 panpos = minfo->crtc1.panpos;
1da177e4
LT
187 if (panpos >= 0) {
188 unsigned int extvga_reg;
189
fc2d10dd 190 minfo->crtc1.panpos = -1; /* No update pending anymore */
1da177e4
LT
191 extvga_reg = mga_inb(M_EXTVGA_INDEX);
192 mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
193 if (extvga_reg != 0x00) {
194 mga_outb(M_EXTVGA_INDEX, extvga_reg);
195 }
196 }
197 matroxfb_DAC_unlock_irqrestore(flags);
198 }
199}
200
7d12e780 201static irqreturn_t matrox_irq(int irq, void *dev_id)
1da177e4
LT
202{
203 u_int32_t status;
204 int handled = 0;
ee5a2749 205 struct matrox_fb_info *minfo = dev_id;
1da177e4
LT
206
207 status = mga_inl(M_STATUS);
208
209 if (status & 0x20) {
210 mga_outl(M_ICLEAR, 0x20);
fc2d10dd 211 minfo->crtc1.vsync.cnt++;
316b4d64 212 matroxfb_crtc1_panpos(minfo);
fc2d10dd 213 wake_up_interruptible(&minfo->crtc1.vsync.wait);
1da177e4
LT
214 handled = 1;
215 }
216 if (status & 0x200) {
217 mga_outl(M_ICLEAR, 0x200);
fc2d10dd
JD
218 minfo->crtc2.vsync.cnt++;
219 wake_up_interruptible(&minfo->crtc2.vsync.wait);
1da177e4
LT
220 handled = 1;
221 }
222 return IRQ_RETVAL(handled);
223}
224
316b4d64
JD
225int matroxfb_enable_irq(struct matrox_fb_info *minfo, int reenable)
226{
1da177e4 227 u_int32_t bm;
a50d913f 228
fc2d10dd 229 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
1da177e4
LT
230 bm = 0x220;
231 else
232 bm = 0x020;
233
fc2d10dd
JD
234 if (!test_and_set_bit(0, &minfo->irq_flags)) {
235 if (request_irq(minfo->pcidev->irq, matrox_irq,
236 IRQF_SHARED, "matroxfb", minfo)) {
237 clear_bit(0, &minfo->irq_flags);
1da177e4
LT
238 return -EINVAL;
239 }
240 /* Clear any pending field interrupts */
241 mga_outl(M_ICLEAR, bm);
242 mga_outl(M_IEN, mga_inl(M_IEN) | bm);
243 } else if (reenable) {
244 u_int32_t ien;
a50d913f 245
1da177e4
LT
246 ien = mga_inl(M_IEN);
247 if ((ien & bm) != bm) {
248 printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien);
249 mga_outl(M_IEN, ien | bm);
250 }
251 }
252 return 0;
253}
254
316b4d64
JD
255static void matroxfb_disable_irq(struct matrox_fb_info *minfo)
256{
fc2d10dd 257 if (test_and_clear_bit(0, &minfo->irq_flags)) {
1da177e4 258 /* Flush pending pan-at-vbl request... */
316b4d64 259 matroxfb_crtc1_panpos(minfo);
fc2d10dd 260 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
1da177e4
LT
261 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
262 else
263 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);
fc2d10dd 264 free_irq(minfo->pcidev->irq, minfo);
1da177e4
LT
265 }
266}
267
316b4d64
JD
268int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc)
269{
1da177e4
LT
270 struct matrox_vsync *vs;
271 unsigned int cnt;
272 int ret;
273
274 switch (crtc) {
275 case 0:
fc2d10dd 276 vs = &minfo->crtc1.vsync;
1da177e4
LT
277 break;
278 case 1:
fc2d10dd 279 if (minfo->devflags.accelerator != FB_ACCEL_MATROX_MGAG400) {
1da177e4
LT
280 return -ENODEV;
281 }
fc2d10dd 282 vs = &minfo->crtc2.vsync;
1da177e4
LT
283 break;
284 default:
285 return -ENODEV;
286 }
316b4d64 287 ret = matroxfb_enable_irq(minfo, 0);
1da177e4
LT
288 if (ret) {
289 return ret;
290 }
1da177e4
LT
291
292 cnt = vs->cnt;
293 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10);
294 if (ret < 0) {
295 return ret;
296 }
297 if (ret == 0) {
316b4d64 298 matroxfb_enable_irq(minfo, 1);
1da177e4
LT
299 return -ETIMEDOUT;
300 }
301 return 0;
302}
303
304/* --------------------------------------------------------------------- */
305
316b4d64
JD
306static void matrox_pan_var(struct matrox_fb_info *minfo,
307 struct fb_var_screeninfo *var)
308{
1da177e4
LT
309 unsigned int pos;
310 unsigned short p0, p1, p2;
1da177e4 311 unsigned int p3;
1da177e4
LT
312 int vbl;
313 unsigned long flags;
314
315 CRITFLAGS
316
5ae12170 317 DBG(__func__)
1da177e4 318
fc2d10dd 319 if (minfo->dead)
1da177e4
LT
320 return;
321
fc2d10dd
JD
322 minfo->fbcon.var.xoffset = var->xoffset;
323 minfo->fbcon.var.yoffset = var->yoffset;
324 pos = (minfo->fbcon.var.yoffset * minfo->fbcon.var.xres_virtual + minfo->fbcon.var.xoffset) * minfo->curr.final_bppShift / 32;
325 pos += minfo->curr.ydstorg.chunks;
326 p0 = minfo->hw.CRTC[0x0D] = pos & 0xFF;
327 p1 = minfo->hw.CRTC[0x0C] = (pos & 0xFF00) >> 8;
328 p2 = minfo->hw.CRTCEXT[0] = (minfo->hw.CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
fc2d10dd 329 p3 = minfo->hw.CRTCEXT[8] = pos >> 21;
1da177e4
LT
330
331 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
316b4d64 332 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(minfo, 0) == 0);
1da177e4
LT
333
334 CRITBEGIN
335
336 matroxfb_DAC_lock_irqsave(flags);
337 mga_setr(M_CRTC_INDEX, 0x0D, p0);
338 mga_setr(M_CRTC_INDEX, 0x0C, p1);
fc2d10dd 339 if (minfo->devflags.support32MB)
1da177e4 340 mga_setr(M_EXTVGA_INDEX, 0x08, p3);
1da177e4 341 if (vbl) {
fc2d10dd 342 minfo->crtc1.panpos = p2;
1da177e4
LT
343 } else {
344 /* Abort any pending change */
fc2d10dd 345 minfo->crtc1.panpos = -1;
1da177e4
LT
346 mga_setr(M_EXTVGA_INDEX, 0x00, p2);
347 }
348 matroxfb_DAC_unlock_irqrestore(flags);
a50d913f 349
316b4d64 350 update_crtc2(minfo, pos);
1da177e4
LT
351
352 CRITEND
353}
354
316b4d64
JD
355static void matroxfb_remove(struct matrox_fb_info *minfo, int dummy)
356{
1da177e4
LT
357 /* Currently we are holding big kernel lock on all dead & usecount updates.
358 * Destroy everything after all users release it. Especially do not unregister
359 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
360 * for device unplugged when in use.
361 * In future we should point mmio.vbase & video.vbase somewhere where we can
362 * write data without causing too much damage...
363 */
364
fc2d10dd
JD
365 minfo->dead = 1;
366 if (minfo->usecount) {
1da177e4
LT
367 /* destroy it later */
368 return;
369 }
fc2d10dd
JD
370 matroxfb_unregister_device(minfo);
371 unregister_framebuffer(&minfo->fbcon);
316b4d64 372 matroxfb_g450_shutdown(minfo);
888ca5d2
LR
373 arch_phys_wc_del(minfo->wc_cookie);
374 iounmap(minfo->mmio.vbase.vaddr);
375 iounmap(minfo->video.vbase.vaddr);
fc2d10dd
JD
376 release_mem_region(minfo->video.base, minfo->video.len_maximum);
377 release_mem_region(minfo->mmio.base, 16384);
1da177e4 378 kfree(minfo);
1da177e4
LT
379}
380
381 /*
382 * Open/Release the frame buffer device
383 */
384
385static int matroxfb_open(struct fb_info *info, int user)
386{
ee5a2749 387 struct matrox_fb_info *minfo = info2minfo(info);
a50d913f 388
5ae12170 389 DBG_LOOP(__func__)
1da177e4 390
fc2d10dd 391 if (minfo->dead) {
1da177e4
LT
392 return -ENXIO;
393 }
fc2d10dd 394 minfo->usecount++;
1da177e4 395 if (user) {
fc2d10dd 396 minfo->userusecount++;
1da177e4
LT
397 }
398 return(0);
399}
400
401static int matroxfb_release(struct fb_info *info, int user)
402{
ee5a2749 403 struct matrox_fb_info *minfo = info2minfo(info);
a50d913f 404
5ae12170 405 DBG_LOOP(__func__)
1da177e4
LT
406
407 if (user) {
fc2d10dd 408 if (0 == --minfo->userusecount) {
316b4d64 409 matroxfb_disable_irq(minfo);
1da177e4
LT
410 }
411 }
fc2d10dd 412 if (!(--minfo->usecount) && minfo->dead) {
316b4d64 413 matroxfb_remove(minfo, 0);
1da177e4
LT
414 }
415 return(0);
416}
417
418static int matroxfb_pan_display(struct fb_var_screeninfo *var,
419 struct fb_info* info) {
ee5a2749 420 struct matrox_fb_info *minfo = info2minfo(info);
1da177e4 421
5ae12170 422 DBG(__func__)
1da177e4 423
316b4d64 424 matrox_pan_var(minfo, var);
1da177e4
LT
425 return 0;
426}
427
316b4d64
JD
428static int matroxfb_get_final_bppShift(const struct matrox_fb_info *minfo,
429 int bpp)
430{
1da177e4
LT
431 int bppshft2;
432
5ae12170 433 DBG(__func__)
1da177e4
LT
434
435 bppshft2 = bpp;
436 if (!bppshft2) {
437 return 8;
438 }
fc2d10dd 439 if (isInterleave(minfo))
1da177e4 440 bppshft2 >>= 1;
fc2d10dd 441 if (minfo->devflags.video64bits)
1da177e4
LT
442 bppshft2 >>= 1;
443 return bppshft2;
444}
445
316b4d64
JD
446static int matroxfb_test_and_set_rounding(const struct matrox_fb_info *minfo,
447 int xres, int bpp)
448{
1da177e4
LT
449 int over;
450 int rounding;
451
5ae12170 452 DBG(__func__)
1da177e4
LT
453
454 switch (bpp) {
455 case 0: return xres;
456 case 4: rounding = 128;
457 break;
458 case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */
459 break;
460 case 16: rounding = 32;
461 break;
462 case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */
463 break;
464 default: rounding = 16;
465 /* on G400, 16 really does not work */
fc2d10dd 466 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
1da177e4
LT
467 rounding = 32;
468 break;
469 }
fc2d10dd 470 if (isInterleave(minfo)) {
1da177e4
LT
471 rounding *= 2;
472 }
473 over = xres % rounding;
474 if (over)
475 xres += rounding-over;
476 return xres;
477}
478
316b4d64
JD
479static int matroxfb_pitch_adjust(const struct matrox_fb_info *minfo, int xres,
480 int bpp)
481{
1da177e4
LT
482 const int* width;
483 int xres_new;
484
5ae12170 485 DBG(__func__)
1da177e4
LT
486
487 if (!bpp) return xres;
488
fc2d10dd 489 width = minfo->capable.vxres;
1da177e4 490
fc2d10dd 491 if (minfo->devflags.precise_width) {
1da177e4 492 while (*width) {
316b4d64 493 if ((*width >= xres) && (matroxfb_test_and_set_rounding(minfo, *width, bpp) == *width)) {
1da177e4
LT
494 break;
495 }
496 width++;
497 }
498 xres_new = *width;
499 } else {
316b4d64 500 xres_new = matroxfb_test_and_set_rounding(minfo, xres, bpp);
1da177e4 501 }
1da177e4
LT
502 return xres_new;
503}
504
505static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
506
5ae12170 507 DBG(__func__)
1da177e4
LT
508
509 switch (var->bits_per_pixel) {
510 case 4:
511 return 16; /* pseudocolor... 16 entries HW palette */
512 case 8:
513 return 256; /* pseudocolor... 256 entries HW palette */
514 case 16:
515 return 16; /* directcolor... 16 entries SW palette */
516 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
517 case 24:
518 return 16; /* directcolor... 16 entries SW palette */
519 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
520 case 32:
521 return 16; /* directcolor... 16 entries SW palette */
522 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
523 }
524 return 16; /* return something reasonable... or panic()? */
525}
526
316b4d64
JD
527static int matroxfb_decode_var(const struct matrox_fb_info *minfo,
528 struct fb_var_screeninfo *var, int *visual,
529 int *video_cmap_len, unsigned int* ydstorg)
530{
1da177e4
LT
531 struct RGBT {
532 unsigned char bpp;
533 struct {
534 unsigned char offset,
535 length;
536 } red,
537 green,
538 blue,
539 transp;
540 signed char visual;
541 };
542 static const struct RGBT table[]= {
543 { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
544 {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},
545 {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},
546 {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},
547 {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}
548 };
549 struct RGBT const *rgbt;
550 unsigned int bpp = var->bits_per_pixel;
551 unsigned int vramlen;
552 unsigned int memlen;
553
5ae12170 554 DBG(__func__)
1da177e4
LT
555
556 switch (bpp) {
fc2d10dd 557 case 4: if (!minfo->capable.cfb4) return -EINVAL;
1da177e4
LT
558 break;
559 case 8: break;
560 case 16: break;
561 case 24: break;
562 case 32: break;
563 default: return -EINVAL;
564 }
565 *ydstorg = 0;
fc2d10dd 566 vramlen = minfo->video.len_usable;
1da177e4
LT
567 if (var->yres_virtual < var->yres)
568 var->yres_virtual = var->yres;
569 if (var->xres_virtual < var->xres)
570 var->xres_virtual = var->xres;
571
316b4d64 572 var->xres_virtual = matroxfb_pitch_adjust(minfo, var->xres_virtual, bpp);
1da177e4
LT
573 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
574 if (memlen > vramlen) {
575 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
576 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
577 }
578 /* There is hardware bug that no line can cross 4MB boundary */
579 /* give up for CFB24, it is impossible to easy workaround it */
580 /* for other try to do something */
fc2d10dd 581 if (!minfo->capable.cross4MB && (memlen > 0x400000)) {
1da177e4
LT
582 if (bpp == 24) {
583 /* sorry */
584 } else {
585 unsigned int linelen;
586 unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
587 unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */
588 unsigned int max_yres;
589
590 while (m1) {
1da177e4 591 while (m2 >= m1) m2 -= m1;
889dbc17 592 swap(m1, m2);
1da177e4
LT
593 }
594 m2 = linelen * PAGE_SIZE / m2;
595 *ydstorg = m2 = 0x400000 % m2;
596 max_yres = (vramlen - m2) / linelen;
597 if (var->yres_virtual > max_yres)
598 var->yres_virtual = max_yres;
599 }
600 }
601 /* YDSTLEN contains only signed 16bit value */
602 if (var->yres_virtual > 32767)
603 var->yres_virtual = 32767;
604 /* we must round yres/xres down, we already rounded y/xres_virtual up
605 if it was possible. We should return -EINVAL, but I disagree */
606 if (var->yres_virtual < var->yres)
607 var->yres = var->yres_virtual;
608 if (var->xres_virtual < var->xres)
609 var->xres = var->xres_virtual;
610 if (var->xoffset + var->xres > var->xres_virtual)
611 var->xoffset = var->xres_virtual - var->xres;
612 if (var->yoffset + var->yres > var->yres_virtual)
613 var->yoffset = var->yres_virtual - var->yres;
614
615 if (bpp == 16 && var->green.length == 5) {
25985edc 616 bpp--; /* an artificial value - 15 */
1da177e4
LT
617 }
618
619 for (rgbt = table; rgbt->bpp < bpp; rgbt++);
620#define SETCLR(clr)\
621 var->clr.offset = rgbt->clr.offset;\
622 var->clr.length = rgbt->clr.length
623 SETCLR(red);
624 SETCLR(green);
625 SETCLR(blue);
626 SETCLR(transp);
627#undef SETCLR
628 *visual = rgbt->visual;
629
630 if (bpp > 8)
631 dprintk("matroxfb: truecolor: "
632 "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
633 var->transp.length, var->red.length, var->green.length, var->blue.length,
634 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
635
636 *video_cmap_len = matroxfb_get_cmap_len(var);
637 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel,
638 var->xres_virtual, var->yres_virtual);
639 return 0;
640}
641
642static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
643 unsigned blue, unsigned transp,
644 struct fb_info *fb_info)
645{
1da177e4 646 struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon);
1da177e4 647
5ae12170 648 DBG(__func__)
1da177e4
LT
649
650 /*
651 * Set a single color register. The values supplied are
652 * already rounded down to the hardware's capabilities
653 * (according to the entries in the `var' structure). Return
654 * != 0 for invalid regno.
655 */
656
fc2d10dd 657 if (regno >= minfo->curr.cmap_len)
1da177e4
LT
658 return 1;
659
fc2d10dd 660 if (minfo->fbcon.var.grayscale) {
1da177e4
LT
661 /* gray = 0.30*R + 0.59*G + 0.11*B */
662 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
663 }
664
fc2d10dd
JD
665 red = CNVT_TOHW(red, minfo->fbcon.var.red.length);
666 green = CNVT_TOHW(green, minfo->fbcon.var.green.length);
667 blue = CNVT_TOHW(blue, minfo->fbcon.var.blue.length);
668 transp = CNVT_TOHW(transp, minfo->fbcon.var.transp.length);
1da177e4 669
fc2d10dd 670 switch (minfo->fbcon.var.bits_per_pixel) {
1da177e4
LT
671 case 4:
672 case 8:
673 mga_outb(M_DAC_REG, regno);
674 mga_outb(M_DAC_VAL, red);
675 mga_outb(M_DAC_VAL, green);
676 mga_outb(M_DAC_VAL, blue);
677 break;
678 case 16:
08a498de
AD
679 if (regno >= 16)
680 break;
1da177e4
LT
681 {
682 u_int16_t col =
fc2d10dd
JD
683 (red << minfo->fbcon.var.red.offset) |
684 (green << minfo->fbcon.var.green.offset) |
685 (blue << minfo->fbcon.var.blue.offset) |
686 (transp << minfo->fbcon.var.transp.offset); /* for 1:5:5:5 */
687 minfo->cmap[regno] = col | (col << 16);
1da177e4
LT
688 }
689 break;
690 case 24:
691 case 32:
08a498de
AD
692 if (regno >= 16)
693 break;
fc2d10dd
JD
694 minfo->cmap[regno] =
695 (red << minfo->fbcon.var.red.offset) |
696 (green << minfo->fbcon.var.green.offset) |
697 (blue << minfo->fbcon.var.blue.offset) |
698 (transp << minfo->fbcon.var.transp.offset); /* 8:8:8:8 */
1da177e4
LT
699 break;
700 }
701 return 0;
702}
703
316b4d64 704static void matroxfb_init_fix(struct matrox_fb_info *minfo)
1da177e4 705{
fc2d10dd 706 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
5ae12170 707 DBG(__func__)
1da177e4
LT
708
709 strcpy(fix->id,"MATROX");
710
711 fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */
712 fix->ypanstep = 1;
713 fix->ywrapstep = 0;
fc2d10dd
JD
714 fix->mmio_start = minfo->mmio.base;
715 fix->mmio_len = minfo->mmio.len;
716 fix->accel = minfo->devflags.accelerator;
1da177e4
LT
717}
718
316b4d64 719static void matroxfb_update_fix(struct matrox_fb_info *minfo)
1da177e4 720{
fc2d10dd 721 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
5ae12170 722 DBG(__func__)
1da177e4 723
fc2d10dd
JD
724 mutex_lock(&minfo->fbcon.mm_lock);
725 fix->smem_start = minfo->video.base + minfo->curr.ydstorg.bytes;
726 fix->smem_len = minfo->video.len_usable - minfo->curr.ydstorg.bytes;
727 mutex_unlock(&minfo->fbcon.mm_lock);
1da177e4
LT
728}
729
730static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
731{
732 int err;
733 int visual;
734 int cmap_len;
735 unsigned int ydstorg;
ee5a2749 736 struct matrox_fb_info *minfo = info2minfo(info);
1da177e4 737
fc2d10dd 738 if (minfo->dead) {
1da177e4
LT
739 return -ENXIO;
740 }
316b4d64 741 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
1da177e4
LT
742 return err;
743 return 0;
744}
745
746static int matroxfb_set_par(struct fb_info *info)
747{
748 int err;
749 int visual;
750 int cmap_len;
751 unsigned int ydstorg;
752 struct fb_var_screeninfo *var;
ee5a2749 753 struct matrox_fb_info *minfo = info2minfo(info);
1da177e4 754
5ae12170 755 DBG(__func__)
1da177e4 756
fc2d10dd 757 if (minfo->dead) {
1da177e4
LT
758 return -ENXIO;
759 }
760
761 var = &info->var;
316b4d64 762 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
1da177e4 763 return err;
fc2d10dd 764 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase) + ydstorg;
316b4d64 765 matroxfb_update_fix(minfo);
fc2d10dd
JD
766 minfo->fbcon.fix.visual = visual;
767 minfo->fbcon.fix.type = FB_TYPE_PACKED_PIXELS;
768 minfo->fbcon.fix.type_aux = 0;
769 minfo->fbcon.fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
1da177e4
LT
770 {
771 unsigned int pos;
772
fc2d10dd
JD
773 minfo->curr.cmap_len = cmap_len;
774 ydstorg += minfo->devflags.ydstorg;
775 minfo->curr.ydstorg.bytes = ydstorg;
776 minfo->curr.ydstorg.chunks = ydstorg >> (isInterleave(minfo) ? 3 : 2);
1da177e4 777 if (var->bits_per_pixel == 4)
fc2d10dd 778 minfo->curr.ydstorg.pixels = ydstorg;
1da177e4 779 else
fc2d10dd 780 minfo->curr.ydstorg.pixels = (ydstorg * 8) / var->bits_per_pixel;
316b4d64 781 minfo->curr.final_bppShift = matroxfb_get_final_bppShift(minfo, var->bits_per_pixel);
1da177e4
LT
782 { struct my_timming mt;
783 struct matrox_hw_state* hw;
784 int out;
785
786 matroxfb_var2my(var, &mt);
787 mt.crtc = MATROXFB_SRC_CRTC1;
788 /* CRTC1 delays */
789 switch (var->bits_per_pixel) {
790 case 0: mt.delay = 31 + 0; break;
791 case 16: mt.delay = 21 + 8; break;
792 case 24: mt.delay = 17 + 8; break;
793 case 32: mt.delay = 16 + 8; break;
794 default: mt.delay = 31 + 8; break;
795 }
796
fc2d10dd 797 hw = &minfo->hw;
1da177e4 798
fc2d10dd 799 down_read(&minfo->altout.lock);
1da177e4 800 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
fc2d10dd
JD
801 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
802 minfo->outputs[out].output->compute) {
803 minfo->outputs[out].output->compute(minfo->outputs[out].data, &mt);
1da177e4
LT
804 }
805 }
fc2d10dd
JD
806 up_read(&minfo->altout.lock);
807 minfo->crtc1.pixclock = mt.pixclock;
808 minfo->crtc1.mnp = mt.mnp;
316b4d64 809 minfo->hw_switch->init(minfo, &mt);
fc2d10dd
JD
810 pos = (var->yoffset * var->xres_virtual + var->xoffset) * minfo->curr.final_bppShift / 32;
811 pos += minfo->curr.ydstorg.chunks;
1da177e4
LT
812
813 hw->CRTC[0x0D] = pos & 0xFF;
814 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
815 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
816 hw->CRTCEXT[8] = pos >> 21;
316b4d64
JD
817 minfo->hw_switch->restore(minfo);
818 update_crtc2(minfo, pos);
fc2d10dd 819 down_read(&minfo->altout.lock);
1da177e4 820 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
fc2d10dd
JD
821 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
822 minfo->outputs[out].output->program) {
823 minfo->outputs[out].output->program(minfo->outputs[out].data);
1da177e4
LT
824 }
825 }
826 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
fc2d10dd
JD
827 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
828 minfo->outputs[out].output->start) {
829 minfo->outputs[out].output->start(minfo->outputs[out].data);
1da177e4
LT
830 }
831 }
fc2d10dd 832 up_read(&minfo->altout.lock);
316b4d64 833 matrox_cfbX_init(minfo);
1da177e4
LT
834 }
835 }
fc2d10dd 836 minfo->initialized = 1;
1da177e4
LT
837 return 0;
838}
839
316b4d64
JD
840static int matroxfb_get_vblank(struct matrox_fb_info *minfo,
841 struct fb_vblank *vblank)
1da177e4
LT
842{
843 unsigned int sts1;
844
316b4d64 845 matroxfb_enable_irq(minfo, 0);
1da177e4
LT
846 memset(vblank, 0, sizeof(*vblank));
847 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
848 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK;
849 sts1 = mga_inb(M_INSTS1);
850 vblank->vcount = mga_inl(M_VCOUNT);
851 /* BTW, on my PIII/450 with G400, reading M_INSTS1
852 byte makes this call about 12% slower (1.70 vs. 2.05 us
853 per ioctl()) */
854 if (sts1 & 1)
855 vblank->flags |= FB_VBLANK_HBLANKING;
856 if (sts1 & 8)
857 vblank->flags |= FB_VBLANK_VSYNCING;
fc2d10dd 858 if (vblank->vcount >= minfo->fbcon.var.yres)
1da177e4 859 vblank->flags |= FB_VBLANK_VBLANKING;
fc2d10dd 860 if (test_bit(0, &minfo->irq_flags)) {
1da177e4 861 vblank->flags |= FB_VBLANK_HAVE_COUNT;
a50d913f 862 /* Only one writer, aligned int value...
1da177e4 863 it should work without lock and without atomic_t */
fc2d10dd 864 vblank->count = minfo->crtc1.vsync.cnt;
1da177e4
LT
865 }
866 return 0;
867}
868
869static struct matrox_altout panellink_output = {
870 .name = "Panellink output",
871};
872
67a6680d
CH
873static int matroxfb_ioctl(struct fb_info *info,
874 unsigned int cmd, unsigned long arg)
1da177e4
LT
875{
876 void __user *argp = (void __user *)arg;
ee5a2749 877 struct matrox_fb_info *minfo = info2minfo(info);
a50d913f 878
5ae12170 879 DBG(__func__)
1da177e4 880
fc2d10dd 881 if (minfo->dead) {
1da177e4
LT
882 return -ENXIO;
883 }
884
885 switch (cmd) {
886 case FBIOGET_VBLANK:
887 {
888 struct fb_vblank vblank;
889 int err;
890
316b4d64 891 err = matroxfb_get_vblank(minfo, &vblank);
1da177e4
LT
892 if (err)
893 return err;
894 if (copy_to_user(argp, &vblank, sizeof(vblank)))
895 return -EFAULT;
896 return 0;
897 }
898 case FBIO_WAITFORVSYNC:
899 {
900 u_int32_t crt;
901
902 if (get_user(crt, (u_int32_t __user *)arg))
903 return -EFAULT;
904
316b4d64 905 return matroxfb_wait_for_sync(minfo, crt);
1da177e4
LT
906 }
907 case MATROXFB_SET_OUTPUT_MODE:
908 {
909 struct matroxioc_output_mode mom;
910 struct matrox_altout *oproc;
911 int val;
912
913 if (copy_from_user(&mom, argp, sizeof(mom)))
914 return -EFAULT;
915 if (mom.output >= MATROXFB_MAX_OUTPUTS)
916 return -ENXIO;
fc2d10dd
JD
917 down_read(&minfo->altout.lock);
918 oproc = minfo->outputs[mom.output].output;
1da177e4
LT
919 if (!oproc) {
920 val = -ENXIO;
921 } else if (!oproc->verifymode) {
922 if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) {
923 val = 0;
924 } else {
925 val = -EINVAL;
926 }
927 } else {
fc2d10dd 928 val = oproc->verifymode(minfo->outputs[mom.output].data, mom.mode);
1da177e4
LT
929 }
930 if (!val) {
fc2d10dd
JD
931 if (minfo->outputs[mom.output].mode != mom.mode) {
932 minfo->outputs[mom.output].mode = mom.mode;
1da177e4
LT
933 val = 1;
934 }
935 }
fc2d10dd 936 up_read(&minfo->altout.lock);
1da177e4
LT
937 if (val != 1)
938 return val;
fc2d10dd 939 switch (minfo->outputs[mom.output].src) {
1da177e4
LT
940 case MATROXFB_SRC_CRTC1:
941 matroxfb_set_par(info);
942 break;
943 case MATROXFB_SRC_CRTC2:
944 {
945 struct matroxfb_dh_fb_info* crtc2;
946
fc2d10dd
JD
947 down_read(&minfo->crtc2.lock);
948 crtc2 = minfo->crtc2.info;
1da177e4
LT
949 if (crtc2)
950 crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon);
fc2d10dd 951 up_read(&minfo->crtc2.lock);
1da177e4
LT
952 }
953 break;
954 }
955 return 0;
956 }
957 case MATROXFB_GET_OUTPUT_MODE:
958 {
959 struct matroxioc_output_mode mom;
960 struct matrox_altout *oproc;
961 int val;
962
963 if (copy_from_user(&mom, argp, sizeof(mom)))
964 return -EFAULT;
965 if (mom.output >= MATROXFB_MAX_OUTPUTS)
966 return -ENXIO;
fc2d10dd
JD
967 down_read(&minfo->altout.lock);
968 oproc = minfo->outputs[mom.output].output;
1da177e4
LT
969 if (!oproc) {
970 val = -ENXIO;
971 } else {
fc2d10dd 972 mom.mode = minfo->outputs[mom.output].mode;
1da177e4
LT
973 val = 0;
974 }
fc2d10dd 975 up_read(&minfo->altout.lock);
1da177e4
LT
976 if (val)
977 return val;
978 if (copy_to_user(argp, &mom, sizeof(mom)))
979 return -EFAULT;
980 return 0;
981 }
982 case MATROXFB_SET_OUTPUT_CONNECTION:
983 {
984 u_int32_t tmp;
985 int i;
986 int changes;
987
988 if (copy_from_user(&tmp, argp, sizeof(tmp)))
989 return -EFAULT;
990 for (i = 0; i < 32; i++) {
991 if (tmp & (1 << i)) {
992 if (i >= MATROXFB_MAX_OUTPUTS)
993 return -ENXIO;
fc2d10dd 994 if (!minfo->outputs[i].output)
1da177e4 995 return -ENXIO;
fc2d10dd 996 switch (minfo->outputs[i].src) {
1da177e4
LT
997 case MATROXFB_SRC_NONE:
998 case MATROXFB_SRC_CRTC1:
999 break;
1000 default:
1001 return -EBUSY;
1002 }
1003 }
1004 }
fc2d10dd 1005 if (minfo->devflags.panellink) {
1da177e4
LT
1006 if (tmp & MATROXFB_OUTPUT_CONN_DFP) {
1007 if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY)
1008 return -EINVAL;
1009 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
fc2d10dd 1010 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC2) {
1da177e4
LT
1011 return -EBUSY;
1012 }
1013 }
1014 }
1015 }
1016 changes = 0;
1017 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1018 if (tmp & (1 << i)) {
fc2d10dd 1019 if (minfo->outputs[i].src != MATROXFB_SRC_CRTC1) {
1da177e4 1020 changes = 1;
fc2d10dd 1021 minfo->outputs[i].src = MATROXFB_SRC_CRTC1;
1da177e4 1022 }
fc2d10dd 1023 } else if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) {
1da177e4 1024 changes = 1;
fc2d10dd 1025 minfo->outputs[i].src = MATROXFB_SRC_NONE;
1da177e4
LT
1026 }
1027 }
1028 if (!changes)
1029 return 0;
1030 matroxfb_set_par(info);
1031 return 0;
1032 }
1033 case MATROXFB_GET_OUTPUT_CONNECTION:
1034 {
1035 u_int32_t conn = 0;
1036 int i;
1037
1038 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
fc2d10dd 1039 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) {
1da177e4
LT
1040 conn |= 1 << i;
1041 }
1042 }
1043 if (put_user(conn, (u_int32_t __user *)arg))
1044 return -EFAULT;
1045 return 0;
1046 }
1047 case MATROXFB_GET_AVAILABLE_OUTPUTS:
1048 {
1049 u_int32_t conn = 0;
1050 int i;
1051
1052 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
fc2d10dd
JD
1053 if (minfo->outputs[i].output) {
1054 switch (minfo->outputs[i].src) {
1da177e4
LT
1055 case MATROXFB_SRC_NONE:
1056 case MATROXFB_SRC_CRTC1:
1057 conn |= 1 << i;
1058 break;
1059 }
1060 }
1061 }
fc2d10dd 1062 if (minfo->devflags.panellink) {
1da177e4
LT
1063 if (conn & MATROXFB_OUTPUT_CONN_DFP)
1064 conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY;
1065 if (conn & MATROXFB_OUTPUT_CONN_SECONDARY)
1066 conn &= ~MATROXFB_OUTPUT_CONN_DFP;
1067 }
1068 if (put_user(conn, (u_int32_t __user *)arg))
1069 return -EFAULT;
1070 return 0;
1071 }
1072 case MATROXFB_GET_ALL_OUTPUTS:
1073 {
1074 u_int32_t conn = 0;
1075 int i;
1076
1077 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
fc2d10dd 1078 if (minfo->outputs[i].output) {
1da177e4
LT
1079 conn |= 1 << i;
1080 }
1081 }
1082 if (put_user(conn, (u_int32_t __user *)arg))
1083 return -EFAULT;
1084 return 0;
1085 }
1086 case VIDIOC_QUERYCAP:
1087 {
1088 struct v4l2_capability r;
a50d913f 1089
1da177e4
LT
1090 memset(&r, 0, sizeof(r));
1091 strcpy(r.driver, "matroxfb");
1092 strcpy(r.card, "Matrox");
fc2d10dd 1093 sprintf(r.bus_info, "PCI:%s", pci_name(minfo->pcidev));
1da177e4
LT
1094 r.version = KERNEL_VERSION(1,0,0);
1095 r.capabilities = V4L2_CAP_VIDEO_OUTPUT;
1096 if (copy_to_user(argp, &r, sizeof(r)))
1097 return -EFAULT;
1098 return 0;
a50d913f 1099
1da177e4
LT
1100 }
1101 case VIDIOC_QUERYCTRL:
1102 {
1103 struct v4l2_queryctrl qctrl;
1104 int err;
1105
1106 if (copy_from_user(&qctrl, argp, sizeof(qctrl)))
1107 return -EFAULT;
1108
fc2d10dd
JD
1109 down_read(&minfo->altout.lock);
1110 if (!minfo->outputs[1].output) {
1da177e4 1111 err = -ENXIO;
fc2d10dd
JD
1112 } else if (minfo->outputs[1].output->getqueryctrl) {
1113 err = minfo->outputs[1].output->getqueryctrl(minfo->outputs[1].data, &qctrl);
1da177e4
LT
1114 } else {
1115 err = -EINVAL;
1116 }
fc2d10dd 1117 up_read(&minfo->altout.lock);
1da177e4
LT
1118 if (err >= 0 &&
1119 copy_to_user(argp, &qctrl, sizeof(qctrl)))
1120 return -EFAULT;
1121 return err;
1122 }
1123 case VIDIOC_G_CTRL:
1124 {
1125 struct v4l2_control ctrl;
1126 int err;
1127
1128 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1129 return -EFAULT;
1130
fc2d10dd
JD
1131 down_read(&minfo->altout.lock);
1132 if (!minfo->outputs[1].output) {
1da177e4 1133 err = -ENXIO;
fc2d10dd
JD
1134 } else if (minfo->outputs[1].output->getctrl) {
1135 err = minfo->outputs[1].output->getctrl(minfo->outputs[1].data, &ctrl);
1da177e4
LT
1136 } else {
1137 err = -EINVAL;
1138 }
fc2d10dd 1139 up_read(&minfo->altout.lock);
1da177e4
LT
1140 if (err >= 0 &&
1141 copy_to_user(argp, &ctrl, sizeof(ctrl)))
1142 return -EFAULT;
1143 return err;
1144 }
1da177e4
LT
1145 case VIDIOC_S_CTRL:
1146 {
1147 struct v4l2_control ctrl;
1148 int err;
1149
1150 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1151 return -EFAULT;
1152
fc2d10dd
JD
1153 down_read(&minfo->altout.lock);
1154 if (!minfo->outputs[1].output) {
1da177e4 1155 err = -ENXIO;
fc2d10dd
JD
1156 } else if (minfo->outputs[1].output->setctrl) {
1157 err = minfo->outputs[1].output->setctrl(minfo->outputs[1].data, &ctrl);
1da177e4
LT
1158 } else {
1159 err = -EINVAL;
1160 }
fc2d10dd 1161 up_read(&minfo->altout.lock);
1da177e4
LT
1162 return err;
1163 }
1164 }
1165 return -ENOTTY;
1166}
1167
1168/* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
1169
1170static int matroxfb_blank(int blank, struct fb_info *info)
1171{
1172 int seq;
1173 int crtc;
1174 CRITFLAGS
ee5a2749 1175 struct matrox_fb_info *minfo = info2minfo(info);
1da177e4 1176
5ae12170 1177 DBG(__func__)
1da177e4 1178
fc2d10dd 1179 if (minfo->dead)
1da177e4
LT
1180 return 1;
1181
1182 switch (blank) {
1183 case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */
1184 case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break;
1185 case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break;
1186 case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break;
1187 default: seq = 0x00; crtc = 0x00; break;
1188 }
1189
1190 CRITBEGIN
1191
1192 mga_outb(M_SEQ_INDEX, 1);
1193 mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq);
1194 mga_outb(M_EXTVGA_INDEX, 1);
1195 mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc);
1196
1197 CRITEND
1198 return 0;
1199}
1200
1201static struct fb_ops matroxfb_ops = {
1202 .owner = THIS_MODULE,
1203 .fb_open = matroxfb_open,
1204 .fb_release = matroxfb_release,
1205 .fb_check_var = matroxfb_check_var,
1206 .fb_set_par = matroxfb_set_par,
1207 .fb_setcolreg = matroxfb_setcolreg,
1208 .fb_pan_display =matroxfb_pan_display,
1209 .fb_blank = matroxfb_blank,
1210 .fb_ioctl = matroxfb_ioctl,
1211/* .fb_fillrect = <set by matrox_cfbX_init>, */
1212/* .fb_copyarea = <set by matrox_cfbX_init>, */
1213/* .fb_imageblit = <set by matrox_cfbX_init>, */
1214/* .fb_cursor = <set by matrox_cfbX_init>, */
1215};
1216
1217#define RSDepth(X) (((X) >> 8) & 0x0F)
1218#define RS8bpp 0x1
1219#define RS15bpp 0x2
1220#define RS16bpp 0x3
1221#define RS32bpp 0x4
1222#define RS4bpp 0x5
1223#define RS24bpp 0x6
1224#define RSText 0x7
1225#define RSText8 0x8
1226/* 9-F */
1227static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = {
1228 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 },
1229 { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
1230 { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 },
1231 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
1232 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 },
1233 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 },
1234 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */
1235 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */
1236};
1237
1238/* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */
90a48151 1239static unsigned int mem; /* "matroxfb:mem:xxxxxM" */
1da177e4 1240static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */
90a48151
VJ
1241static int inv24; /* "matroxfb:inv24" */
1242static int cross4MB = -1; /* "matroxfb:cross4MB" */
1243static int disabled; /* "matroxfb:disabled" */
1244static int noaccel; /* "matroxfb:noaccel" */
1245static int nopan; /* "matroxfb:nopan" */
1246static int no_pci_retry; /* "matroxfb:nopciretry" */
1247static int novga; /* "matroxfb:novga" */
1248static int nobios; /* "matroxfb:nobios" */
1249static int noinit = 1; /* "matroxfb:init" */
1250static int inverse; /* "matroxfb:inverse" */
1251static int sgram; /* "matroxfb:sgram" */
90a48151 1252static int mtrr = 1; /* "matroxfb:nomtrr" */
90a48151
VJ
1253static int grayscale; /* "matroxfb:grayscale" */
1254static int dev = -1; /* "matroxfb:dev:xxxxx" */
1255static unsigned int vesa = ~0; /* "matroxfb:vesa:xxxxx" */
1256static int depth = -1; /* "matroxfb:depth:xxxxx" */
1257static unsigned int xres; /* "matroxfb:xres:xxxxx" */
1258static unsigned int yres; /* "matroxfb:yres:xxxxx" */
1259static unsigned int upper = ~0; /* "matroxfb:upper:xxxxx" */
1260static unsigned int lower = ~0; /* "matroxfb:lower:xxxxx" */
1261static unsigned int vslen; /* "matroxfb:vslen:xxxxx" */
1262static unsigned int left = ~0; /* "matroxfb:left:xxxxx" */
1263static unsigned int right = ~0; /* "matroxfb:right:xxxxx" */
1264static unsigned int hslen; /* "matroxfb:hslen:xxxxx" */
1265static unsigned int pixclock; /* "matroxfb:pixclock:xxxxx" */
1266static int sync = -1; /* "matroxfb:sync:xxxxx" */
1267static unsigned int fv; /* "matroxfb:fv:xxxxx" */
1268static unsigned int fh; /* "matroxfb:fh:xxxxxk" */
1269static unsigned int maxclk; /* "matroxfb:maxclk:xxxxM" */
1270static int dfp; /* "matroxfb:dfp */
1271static int dfp_type = -1; /* "matroxfb:dfp:xxx */
1272static int memtype = -1; /* "matroxfb:memtype:xxx" */
1273static char outputs[8]; /* "matroxfb:outputs:xxx" */
1da177e4
LT
1274
1275#ifndef MODULE
90a48151 1276static char videomode[64]; /* "matroxfb:mode:xxxxx" or "matroxfb:xxxxx" */
1da177e4
LT
1277#endif
1278
316b4d64
JD
1279static int matroxfb_getmemory(struct matrox_fb_info *minfo,
1280 unsigned int maxSize, unsigned int *realSize)
1281{
1da177e4
LT
1282 vaddr_t vm;
1283 unsigned int offs;
1284 unsigned int offs2;