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Commit | Line | Data |
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cfb4f5d1 MD |
1 | /* |
2 | * SuperH Mobile LCDC Framebuffer | |
3 | * | |
4 | * Copyright (c) 2008 Magnus Damm | |
5 | * | |
6 | * This file is subject to the terms and conditions of the GNU General Public | |
7 | * License. See the file "COPYING" in the main directory of this archive | |
8 | * for more details. | |
9 | */ | |
10 | ||
f1f60b5f LP |
11 | #include <linux/atomic.h> |
12 | #include <linux/backlight.h> | |
cfb4f5d1 | 13 | #include <linux/clk.h> |
f1f60b5f | 14 | #include <linux/console.h> |
c5deac3c | 15 | #include <linux/ctype.h> |
cfb4f5d1 | 16 | #include <linux/dma-mapping.h> |
f1f60b5f | 17 | #include <linux/delay.h> |
9e146700 | 18 | #include <linux/fbcon.h> |
f1f60b5f LP |
19 | #include <linux/gpio.h> |
20 | #include <linux/init.h> | |
8564557a | 21 | #include <linux/interrupt.h> |
40331b21 | 22 | #include <linux/ioctl.h> |
f1f60b5f LP |
23 | #include <linux/kernel.h> |
24 | #include <linux/mm.h> | |
355b200b | 25 | #include <linux/module.h> |
f1f60b5f LP |
26 | #include <linux/platform_device.h> |
27 | #include <linux/pm_runtime.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/videodev2.h> | |
30 | #include <linux/vmalloc.h> | |
31 | ||
225c9a8d | 32 | #include <video/sh_mobile_lcdc.h> |
cfb4f5d1 | 33 | |
6de9edd5 GL |
34 | #include "sh_mobile_lcdcfb.h" |
35 | ||
c5deac3c LP |
36 | /* ---------------------------------------------------------------------------- |
37 | * Overlay register definitions | |
38 | */ | |
39 | ||
40 | #define LDBCR 0xb00 | |
41 | #define LDBCR_UPC(n) (1 << ((n) + 16)) | |
42 | #define LDBCR_UPF(n) (1 << ((n) + 8)) | |
43 | #define LDBCR_UPD(n) (1 << ((n) + 0)) | |
44 | #define LDBnBSIFR(n) (0xb20 + (n) * 0x20 + 0x00) | |
45 | #define LDBBSIFR_EN (1 << 31) | |
46 | #define LDBBSIFR_VS (1 << 29) | |
47 | #define LDBBSIFR_BRSEL (1 << 28) | |
48 | #define LDBBSIFR_MX (1 << 27) | |
49 | #define LDBBSIFR_MY (1 << 26) | |
50 | #define LDBBSIFR_CV3 (3 << 24) | |
51 | #define LDBBSIFR_CV2 (2 << 24) | |
52 | #define LDBBSIFR_CV1 (1 << 24) | |
53 | #define LDBBSIFR_CV0 (0 << 24) | |
54 | #define LDBBSIFR_CV_MASK (3 << 24) | |
55 | #define LDBBSIFR_LAY_MASK (0xff << 16) | |
56 | #define LDBBSIFR_LAY_SHIFT 16 | |
57 | #define LDBBSIFR_ROP3_MASK (0xff << 16) | |
58 | #define LDBBSIFR_ROP3_SHIFT 16 | |
59 | #define LDBBSIFR_AL_PL8 (3 << 14) | |
60 | #define LDBBSIFR_AL_PL1 (2 << 14) | |
61 | #define LDBBSIFR_AL_PK (1 << 14) | |
62 | #define LDBBSIFR_AL_1 (0 << 14) | |
63 | #define LDBBSIFR_AL_MASK (3 << 14) | |
64 | #define LDBBSIFR_SWPL (1 << 10) | |
65 | #define LDBBSIFR_SWPW (1 << 9) | |
66 | #define LDBBSIFR_SWPB (1 << 8) | |
67 | #define LDBBSIFR_RY (1 << 7) | |
68 | #define LDBBSIFR_CHRR_420 (2 << 0) | |
69 | #define LDBBSIFR_CHRR_422 (1 << 0) | |
70 | #define LDBBSIFR_CHRR_444 (0 << 0) | |
71 | #define LDBBSIFR_RPKF_ARGB32 (0x00 << 0) | |
72 | #define LDBBSIFR_RPKF_RGB16 (0x03 << 0) | |
73 | #define LDBBSIFR_RPKF_RGB24 (0x0b << 0) | |
74 | #define LDBBSIFR_RPKF_MASK (0x1f << 0) | |
75 | #define LDBnBSSZR(n) (0xb20 + (n) * 0x20 + 0x04) | |
76 | #define LDBBSSZR_BVSS_MASK (0xfff << 16) | |
77 | #define LDBBSSZR_BVSS_SHIFT 16 | |
78 | #define LDBBSSZR_BHSS_MASK (0xfff << 0) | |
79 | #define LDBBSSZR_BHSS_SHIFT 0 | |
80 | #define LDBnBLOCR(n) (0xb20 + (n) * 0x20 + 0x08) | |
81 | #define LDBBLOCR_CVLC_MASK (0xfff << 16) | |
82 | #define LDBBLOCR_CVLC_SHIFT 16 | |
83 | #define LDBBLOCR_CHLC_MASK (0xfff << 0) | |
84 | #define LDBBLOCR_CHLC_SHIFT 0 | |
85 | #define LDBnBSMWR(n) (0xb20 + (n) * 0x20 + 0x0c) | |
86 | #define LDBBSMWR_BSMWA_MASK (0xffff << 16) | |
87 | #define LDBBSMWR_BSMWA_SHIFT 16 | |
88 | #define LDBBSMWR_BSMW_MASK (0xffff << 0) | |
89 | #define LDBBSMWR_BSMW_SHIFT 0 | |
90 | #define LDBnBSAYR(n) (0xb20 + (n) * 0x20 + 0x10) | |
91 | #define LDBBSAYR_FG1A_MASK (0xff << 24) | |
92 | #define LDBBSAYR_FG1A_SHIFT 24 | |
93 | #define LDBBSAYR_FG1R_MASK (0xff << 16) | |
94 | #define LDBBSAYR_FG1R_SHIFT 16 | |
95 | #define LDBBSAYR_FG1G_MASK (0xff << 8) | |
96 | #define LDBBSAYR_FG1G_SHIFT 8 | |
97 | #define LDBBSAYR_FG1B_MASK (0xff << 0) | |
98 | #define LDBBSAYR_FG1B_SHIFT 0 | |
99 | #define LDBnBSACR(n) (0xb20 + (n) * 0x20 + 0x14) | |
100 | #define LDBBSACR_FG2A_MASK (0xff << 24) | |
101 | #define LDBBSACR_FG2A_SHIFT 24 | |
102 | #define LDBBSACR_FG2R_MASK (0xff << 16) | |
103 | #define LDBBSACR_FG2R_SHIFT 16 | |
104 | #define LDBBSACR_FG2G_MASK (0xff << 8) | |
105 | #define LDBBSACR_FG2G_SHIFT 8 | |
106 | #define LDBBSACR_FG2B_MASK (0xff << 0) | |
107 | #define LDBBSACR_FG2B_SHIFT 0 | |
108 | #define LDBnBSAAR(n) (0xb20 + (n) * 0x20 + 0x18) | |
109 | #define LDBBSAAR_AP_MASK (0xff << 24) | |
110 | #define LDBBSAAR_AP_SHIFT 24 | |
111 | #define LDBBSAAR_R_MASK (0xff << 16) | |
112 | #define LDBBSAAR_R_SHIFT 16 | |
113 | #define LDBBSAAR_GY_MASK (0xff << 8) | |
114 | #define LDBBSAAR_GY_SHIFT 8 | |
115 | #define LDBBSAAR_B_MASK (0xff << 0) | |
116 | #define LDBBSAAR_B_SHIFT 0 | |
117 | #define LDBnBPPCR(n) (0xb20 + (n) * 0x20 + 0x1c) | |
118 | #define LDBBPPCR_AP_MASK (0xff << 24) | |
119 | #define LDBBPPCR_AP_SHIFT 24 | |
120 | #define LDBBPPCR_R_MASK (0xff << 16) | |
121 | #define LDBBPPCR_R_SHIFT 16 | |
122 | #define LDBBPPCR_GY_MASK (0xff << 8) | |
123 | #define LDBBPPCR_GY_SHIFT 8 | |
124 | #define LDBBPPCR_B_MASK (0xff << 0) | |
125 | #define LDBBPPCR_B_SHIFT 0 | |
126 | #define LDBnBBGCL(n) (0xb10 + (n) * 0x04) | |
127 | #define LDBBBGCL_BGA_MASK (0xff << 24) | |
128 | #define LDBBBGCL_BGA_SHIFT 24 | |
129 | #define LDBBBGCL_BGR_MASK (0xff << 16) | |
130 | #define LDBBBGCL_BGR_SHIFT 16 | |
131 | #define LDBBBGCL_BGG_MASK (0xff << 8) | |
132 | #define LDBBBGCL_BGG_SHIFT 8 | |
133 | #define LDBBBGCL_BGB_MASK (0xff << 0) | |
134 | #define LDBBBGCL_BGB_SHIFT 0 | |
135 | ||
a6f15ade PE |
136 | #define SIDE_B_OFFSET 0x1000 |
137 | #define MIRROR_OFFSET 0x2000 | |
cfb4f5d1 | 138 | |
d2ecbab5 GL |
139 | #define MAX_XRES 1920 |
140 | #define MAX_YRES 1080 | |
cfb4f5d1 | 141 | |
c5deac3c LP |
142 | enum sh_mobile_lcdc_overlay_mode { |
143 | LCDC_OVERLAY_BLEND, | |
144 | LCDC_OVERLAY_ROP3, | |
145 | }; | |
146 | ||
147 | /* | |
148 | * struct sh_mobile_lcdc_overlay - LCDC display overlay | |
149 | * | |
150 | * @channel: LCDC channel this overlay belongs to | |
151 | * @cfg: Overlay configuration | |
152 | * @info: Frame buffer device | |
153 | * @index: Overlay index (0-3) | |
154 | * @base: Overlay registers base address | |
155 | * @enabled: True if the overlay is enabled | |
156 | * @mode: Overlay blending mode (alpha blend or ROP3) | |
157 | * @alpha: Global alpha blending value (0-255, for alpha blending mode) | |
158 | * @rop3: Raster operation (for ROP3 mode) | |
159 | * @fb_mem: Frame buffer virtual memory address | |
160 | * @fb_size: Frame buffer size in bytes | |
161 | * @dma_handle: Frame buffer DMA address | |
162 | * @base_addr_y: Overlay base address (RGB or luma component) | |
163 | * @base_addr_c: Overlay base address (chroma component) | |
a4aa25f6 | 164 | * @pan_y_offset: Panning linear offset in bytes (luma component) |
c5deac3c LP |
165 | * @format: Current pixelf format |
166 | * @xres: Horizontal visible resolution | |
167 | * @xres_virtual: Horizontal total resolution | |
168 | * @yres: Vertical visible resolution | |
169 | * @yres_virtual: Vertical total resolution | |
170 | * @pitch: Overlay line pitch | |
171 | * @pos_x: Horizontal overlay position | |
172 | * @pos_y: Vertical overlay position | |
173 | */ | |
174 | struct sh_mobile_lcdc_overlay { | |
175 | struct sh_mobile_lcdc_chan *channel; | |
176 | ||
177 | const struct sh_mobile_lcdc_overlay_cfg *cfg; | |
178 | struct fb_info *info; | |
179 | ||
180 | unsigned int index; | |
181 | unsigned long base; | |
182 | ||
183 | bool enabled; | |
184 | enum sh_mobile_lcdc_overlay_mode mode; | |
185 | unsigned int alpha; | |
186 | unsigned int rop3; | |
187 | ||
188 | void *fb_mem; | |
189 | unsigned long fb_size; | |
190 | ||
191 | dma_addr_t dma_handle; | |
192 | unsigned long base_addr_y; | |
193 | unsigned long base_addr_c; | |
a4aa25f6 | 194 | unsigned long pan_y_offset; |
c5deac3c LP |
195 | |
196 | const struct sh_mobile_lcdc_format_info *format; | |
197 | unsigned int xres; | |
198 | unsigned int xres_virtual; | |
199 | unsigned int yres; | |
200 | unsigned int yres_virtual; | |
201 | unsigned int pitch; | |
202 | int pos_x; | |
203 | int pos_y; | |
204 | }; | |
205 | ||
f1f60b5f LP |
206 | struct sh_mobile_lcdc_priv { |
207 | void __iomem *base; | |
208 | int irq; | |
209 | atomic_t hw_usecnt; | |
210 | struct device *dev; | |
211 | struct clk *dot_clk; | |
212 | unsigned long lddckr; | |
c5deac3c | 213 | |
f1f60b5f | 214 | struct sh_mobile_lcdc_chan ch[2]; |
c5deac3c LP |
215 | struct sh_mobile_lcdc_overlay overlays[4]; |
216 | ||
f1f60b5f LP |
217 | int started; |
218 | int forced_fourcc; /* 2 channel LCDC must share fourcc setting */ | |
f1f60b5f LP |
219 | }; |
220 | ||
221 | /* ----------------------------------------------------------------------------- | |
222 | * Registers access | |
223 | */ | |
224 | ||
0246c471 | 225 | static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = { |
cfb4f5d1 MD |
226 | [LDDCKPAT1R] = 0x400, |
227 | [LDDCKPAT2R] = 0x404, | |
228 | [LDMT1R] = 0x418, | |
229 | [LDMT2R] = 0x41c, | |
230 | [LDMT3R] = 0x420, | |
231 | [LDDFR] = 0x424, | |
232 | [LDSM1R] = 0x428, | |
8564557a | 233 | [LDSM2R] = 0x42c, |
cfb4f5d1 | 234 | [LDSA1R] = 0x430, |
53b50314 | 235 | [LDSA2R] = 0x434, |
cfb4f5d1 MD |
236 | [LDMLSR] = 0x438, |
237 | [LDHCNR] = 0x448, | |
238 | [LDHSYNR] = 0x44c, | |
239 | [LDVLNR] = 0x450, | |
240 | [LDVSYNR] = 0x454, | |
241 | [LDPMR] = 0x460, | |
6011bdea | 242 | [LDHAJR] = 0x4a0, |
cfb4f5d1 MD |
243 | }; |
244 | ||
0246c471 | 245 | static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = { |
cfb4f5d1 MD |
246 | [LDDCKPAT1R] = 0x408, |
247 | [LDDCKPAT2R] = 0x40c, | |
248 | [LDMT1R] = 0x600, | |
249 | [LDMT2R] = 0x604, | |
250 | [LDMT3R] = 0x608, | |
251 | [LDDFR] = 0x60c, | |
252 | [LDSM1R] = 0x610, | |
8564557a | 253 | [LDSM2R] = 0x614, |
cfb4f5d1 MD |
254 | [LDSA1R] = 0x618, |
255 | [LDMLSR] = 0x620, | |
256 | [LDHCNR] = 0x624, | |
257 | [LDHSYNR] = 0x628, | |
258 | [LDVLNR] = 0x62c, | |
259 | [LDVSYNR] = 0x630, | |
260 | [LDPMR] = 0x63c, | |
261 | }; | |
262 | ||
a6f15ade PE |
263 | static bool banked(int reg_nr) |
264 | { | |
265 | switch (reg_nr) { | |
266 | case LDMT1R: | |
267 | case LDMT2R: | |
268 | case LDMT3R: | |
269 | case LDDFR: | |
270 | case LDSM1R: | |
271 | case LDSA1R: | |
53b50314 | 272 | case LDSA2R: |
a6f15ade PE |
273 | case LDMLSR: |
274 | case LDHCNR: | |
275 | case LDHSYNR: | |
276 | case LDVLNR: | |
277 | case LDVSYNR: | |
278 | return true; | |
279 | } | |
280 | return false; | |
281 | } | |
282 | ||
f1f60b5f LP |
283 | static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan) |
284 | { | |
b5ef967d | 285 | return chan->cfg->chan == LCDC_CHAN_SUBLCD; |
f1f60b5f LP |
286 | } |
287 | ||
cfb4f5d1 MD |
288 | static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan, |
289 | int reg_nr, unsigned long data) | |
290 | { | |
291 | iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]); | |
a6f15ade PE |
292 | if (banked(reg_nr)) |
293 | iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] + | |
294 | SIDE_B_OFFSET); | |
295 | } | |
296 | ||
297 | static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan, | |
298 | int reg_nr, unsigned long data) | |
299 | { | |
300 | iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] + | |
301 | MIRROR_OFFSET); | |
cfb4f5d1 MD |
302 | } |
303 | ||
304 | static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan, | |
305 | int reg_nr) | |
306 | { | |
307 | return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]); | |
308 | } | |
309 | ||
c5deac3c LP |
310 | static void lcdc_write_overlay(struct sh_mobile_lcdc_overlay *ovl, |
311 | int reg, unsigned long data) | |
312 | { | |
313 | iowrite32(data, ovl->channel->lcdc->base + reg); | |
314 | iowrite32(data, ovl->channel->lcdc->base + reg + SIDE_B_OFFSET); | |
315 | } | |
316 | ||
cfb4f5d1 MD |
317 | static void lcdc_write(struct sh_mobile_lcdc_priv *priv, |
318 | unsigned long reg_offs, unsigned long data) | |
319 | { | |
320 | iowrite32(data, priv->base + reg_offs); | |
321 | } | |
322 | ||
323 | static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv, | |
324 | unsigned long reg_offs) | |
325 | { | |
326 | return ioread32(priv->base + reg_offs); | |
327 | } | |
328 | ||
329 | static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv, | |
330 | unsigned long reg_offs, | |
331 | unsigned long mask, unsigned long until) | |
332 | { | |
333 | while ((lcdc_read(priv, reg_offs) & mask) != until) | |
334 | cpu_relax(); | |
335 | } | |
336 | ||
f1f60b5f LP |
337 | /* ----------------------------------------------------------------------------- |
338 | * Clock management | |
339 | */ | |
340 | ||
341 | static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv) | |
cfb4f5d1 | 342 | { |
f1f60b5f LP |
343 | if (atomic_inc_and_test(&priv->hw_usecnt)) { |
344 | if (priv->dot_clk) | |
deccd24f | 345 | clk_prepare_enable(priv->dot_clk); |
f1f60b5f | 346 | pm_runtime_get_sync(priv->dev); |
f1f60b5f | 347 | } |
cfb4f5d1 MD |
348 | } |
349 | ||
f1f60b5f LP |
350 | static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv) |
351 | { | |
352 | if (atomic_sub_return(1, &priv->hw_usecnt) == -1) { | |
f1f60b5f LP |
353 | pm_runtime_put(priv->dev); |
354 | if (priv->dot_clk) | |
deccd24f | 355 | clk_disable_unprepare(priv->dot_clk); |
f1f60b5f LP |
356 | } |
357 | } | |
358 | ||
0a7f17aa LP |
359 | static int sh_mobile_lcdc_setup_clocks(struct sh_mobile_lcdc_priv *priv, |
360 | int clock_source) | |
f1f60b5f | 361 | { |
4774c12a | 362 | struct clk *clk; |
f1f60b5f LP |
363 | char *str; |
364 | ||
365 | switch (clock_source) { | |
366 | case LCDC_CLK_BUS: | |
367 | str = "bus_clk"; | |
368 | priv->lddckr = LDDCKR_ICKSEL_BUS; | |
369 | break; | |
370 | case LCDC_CLK_PERIPHERAL: | |
371 | str = "peripheral_clk"; | |
372 | priv->lddckr = LDDCKR_ICKSEL_MIPI; | |
373 | break; | |
374 | case LCDC_CLK_EXTERNAL: | |
375 | str = NULL; | |
376 | priv->lddckr = LDDCKR_ICKSEL_HDMI; | |
377 | break; | |
378 | default: | |
379 | return -EINVAL; | |
380 | } | |
381 | ||
4774c12a LP |
382 | if (str == NULL) |
383 | return 0; | |
384 | ||
0a7f17aa | 385 | clk = clk_get(priv->dev, str); |
4774c12a | 386 | if (IS_ERR(clk)) { |
0a7f17aa | 387 | dev_err(priv->dev, "cannot get dot clock %s\n", str); |
4774c12a | 388 | return PTR_ERR(clk); |
f1f60b5f LP |
389 | } |
390 | ||
4774c12a | 391 | priv->dot_clk = clk; |
f1f60b5f LP |
392 | return 0; |
393 | } | |
394 | ||
395 | /* ----------------------------------------------------------------------------- | |
37c5dcc2 | 396 | * Display, panel and deferred I/O |
f1f60b5f LP |
397 | */ |
398 | ||
cfb4f5d1 MD |
399 | static void lcdc_sys_write_index(void *handle, unsigned long data) |
400 | { | |
401 | struct sh_mobile_lcdc_chan *ch = handle; | |
402 | ||
ce1c0b08 LP |
403 | lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT); |
404 | lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0); | |
405 | lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA | | |
406 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); | |
407 | lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0); | |
cfb4f5d1 MD |
408 | } |
409 | ||
410 | static void lcdc_sys_write_data(void *handle, unsigned long data) | |
411 | { | |
412 | struct sh_mobile_lcdc_chan *ch = handle; | |
413 | ||
ce1c0b08 LP |
414 | lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT | LDDWDxR_RSW); |
415 | lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0); | |
416 | lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA | | |
417 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); | |
418 | lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0); | |
cfb4f5d1 MD |
419 | } |
420 | ||
421 | static unsigned long lcdc_sys_read_data(void *handle) | |
422 | { | |
423 | struct sh_mobile_lcdc_chan *ch = handle; | |
424 | ||
ce1c0b08 LP |
425 | lcdc_write(ch->lcdc, _LDDRDR, LDDRDR_RSR); |
426 | lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0); | |
427 | lcdc_write(ch->lcdc, _LDDRAR, LDDRAR_RA | | |
428 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); | |
cfb4f5d1 | 429 | udelay(1); |
ce1c0b08 | 430 | lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0); |
cfb4f5d1 | 431 | |
ce1c0b08 | 432 | return lcdc_read(ch->lcdc, _LDDRDR) & LDDRDR_DRD_MASK; |
cfb4f5d1 MD |
433 | } |
434 | ||
d38d840a | 435 | static struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = { |
6895aff4 KC |
436 | .write_index = lcdc_sys_write_index, |
437 | .write_data = lcdc_sys_write_data, | |
438 | .read_data = lcdc_sys_read_data, | |
cfb4f5d1 MD |
439 | }; |
440 | ||
1c6a307a PM |
441 | static int sh_mobile_lcdc_sginit(struct fb_info *info, |
442 | struct list_head *pagelist) | |
443 | { | |
444 | struct sh_mobile_lcdc_chan *ch = info->par; | |
58f03d99 | 445 | unsigned int nr_pages_max = ch->fb_size >> PAGE_SHIFT; |
1c6a307a PM |
446 | struct page *page; |
447 | int nr_pages = 0; | |
448 | ||
449 | sg_init_table(ch->sglist, nr_pages_max); | |
450 | ||
451 | list_for_each_entry(page, pagelist, lru) | |
452 | sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0); | |
453 | ||
454 | return nr_pages; | |
455 | } | |
456 | ||
8564557a MD |
457 | static void sh_mobile_lcdc_deferred_io(struct fb_info *info, |
458 | struct list_head *pagelist) | |
459 | { | |
460 | struct sh_mobile_lcdc_chan *ch = info->par; | |
b5ef967d | 461 | const struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg->panel_cfg; |
8564557a MD |
462 | |
463 | /* enable clocks before accessing hardware */ | |
464 | sh_mobile_lcdc_clk_on(ch->lcdc); | |
465 | ||
5c1a56b5 PM |
466 | /* |
467 | * It's possible to get here without anything on the pagelist via | |
468 | * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync() | |
469 | * invocation. In the former case, the acceleration routines are | |
470 | * stepped in to when using the framebuffer console causing the | |
471 | * workqueue to be scheduled without any dirty pages on the list. | |
472 | * | |
473 | * Despite this, a panel update is still needed given that the | |
474 | * acceleration routines have their own methods for writing in | |
475 | * that still need to be updated. | |
476 | * | |
477 | * The fsync() and empty pagelist case could be optimized for, | |
478 | * but we don't bother, as any application exhibiting such | |
479 | * behaviour is fundamentally broken anyways. | |
480 | */ | |
481 | if (!list_empty(pagelist)) { | |
482 | unsigned int nr_pages = sh_mobile_lcdc_sginit(info, pagelist); | |
483 | ||
484 | /* trigger panel update */ | |
e8363140 | 485 | dma_map_sg(ch->lcdc->dev, ch->sglist, nr_pages, DMA_TO_DEVICE); |
afaad83b LP |
486 | if (panel->start_transfer) |
487 | panel->start_transfer(ch, &sh_mobile_lcdc_sys_bus_ops); | |
ce1c0b08 | 488 | lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG); |
e8363140 LP |
489 | dma_unmap_sg(ch->lcdc->dev, ch->sglist, nr_pages, |
490 | DMA_TO_DEVICE); | |
ef61aae4 | 491 | } else { |
afaad83b LP |
492 | if (panel->start_transfer) |
493 | panel->start_transfer(ch, &sh_mobile_lcdc_sys_bus_ops); | |
ce1c0b08 | 494 | lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG); |
ef61aae4 | 495 | } |
8564557a MD |
496 | } |
497 | ||
498 | static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info) | |
499 | { | |
500 | struct fb_deferred_io *fbdefio = info->fbdefio; | |
501 | ||
502 | if (fbdefio) | |
503 | schedule_delayed_work(&info->deferred_work, fbdefio->delay); | |
504 | } | |
505 | ||
37c5dcc2 LP |
506 | static void sh_mobile_lcdc_display_on(struct sh_mobile_lcdc_chan *ch) |
507 | { | |
b5ef967d | 508 | const struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg->panel_cfg; |
37c5dcc2 | 509 | |
9a2985e7 | 510 | if (ch->tx_dev) { |
458981c3 LP |
511 | int ret; |
512 | ||
513 | ret = ch->tx_dev->ops->display_on(ch->tx_dev); | |
514 | if (ret < 0) | |
9a2985e7 | 515 | return; |
458981c3 LP |
516 | |
517 | if (ret == SH_MOBILE_LCDC_DISPLAY_DISCONNECTED) | |
518 | ch->info->state = FBINFO_STATE_SUSPENDED; | |
9a2985e7 LP |
519 | } |
520 | ||
37c5dcc2 | 521 | /* HDMI must be enabled before LCDC configuration */ |
afaad83b LP |
522 | if (panel->display_on) |
523 | panel->display_on(); | |
37c5dcc2 LP |
524 | } |
525 | ||
526 | static void sh_mobile_lcdc_display_off(struct sh_mobile_lcdc_chan *ch) | |
527 | { | |
b5ef967d | 528 | const struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg->panel_cfg; |
37c5dcc2 | 529 | |
afaad83b LP |
530 | if (panel->display_off) |
531 | panel->display_off(); | |
9a2985e7 LP |
532 | |
533 | if (ch->tx_dev) | |
534 | ch->tx_dev->ops->display_off(ch->tx_dev); | |
37c5dcc2 LP |
535 | } |
536 | ||
d7ad3342 LP |
537 | static int sh_mobile_lcdc_check_var(struct fb_var_screeninfo *var, |
538 | struct fb_info *info); | |
ecd29947 | 539 | |
f1f60b5f LP |
540 | /* ----------------------------------------------------------------------------- |
541 | * Format helpers | |
542 | */ | |
543 | ||
105784bb LP |
544 | struct sh_mobile_lcdc_format_info { |
545 | u32 fourcc; | |
546 | unsigned int bpp; | |
547 | bool yuv; | |
548 | u32 lddfr; | |
549 | }; | |
550 | ||
551 | static const struct sh_mobile_lcdc_format_info sh_mobile_format_infos[] = { | |
552 | { | |
553 | .fourcc = V4L2_PIX_FMT_RGB565, | |
554 | .bpp = 16, | |
555 | .yuv = false, | |
556 | .lddfr = LDDFR_PKF_RGB16, | |
557 | }, { | |
558 | .fourcc = V4L2_PIX_FMT_BGR24, | |
559 | .bpp = 24, | |
560 | .yuv = false, | |
561 | .lddfr = LDDFR_PKF_RGB24, | |
562 | }, { | |
563 | .fourcc = V4L2_PIX_FMT_BGR32, | |
564 | .bpp = 32, | |
565 | .yuv = false, | |
566 | .lddfr = LDDFR_PKF_ARGB32, | |
567 | }, { | |
568 | .fourcc = V4L2_PIX_FMT_NV12, | |
569 | .bpp = 12, | |
570 | .yuv = true, | |
571 | .lddfr = LDDFR_CC | LDDFR_YF_420, | |
572 | }, { | |
573 | .fourcc = V4L2_PIX_FMT_NV21, | |
574 | .bpp = 12, | |
575 | .yuv = true, | |
576 | .lddfr = LDDFR_CC | LDDFR_YF_420, | |
577 | }, { | |
578 | .fourcc = V4L2_PIX_FMT_NV16, | |
579 | .bpp = 16, | |
580 | .yuv = true, | |
581 | .lddfr = LDDFR_CC | LDDFR_YF_422, | |
582 | }, { | |
583 | .fourcc = V4L2_PIX_FMT_NV61, | |
584 | .bpp = 16, | |
585 | .yuv = true, | |
586 | .lddfr = LDDFR_CC | LDDFR_YF_422, | |
587 | }, { | |
588 | .fourcc = V4L2_PIX_FMT_NV24, | |
589 | .bpp = 24, | |
590 | .yuv = true, | |
591 | .lddfr = LDDFR_CC | LDDFR_YF_444, | |
592 | }, { | |
593 | .fourcc = V4L2_PIX_FMT_NV42, | |
594 | .bpp = 24, | |
595 | .yuv = true, | |
596 | .lddfr = LDDFR_CC | LDDFR_YF_444, | |
597 | }, | |
598 | }; | |
599 | ||
600 | static const struct sh_mobile_lcdc_format_info * | |
601 | sh_mobile_format_info(u32 fourcc) | |
602 | { | |
603 | unsigned int i; | |
604 | ||
605 | for (i = 0; i < ARRAY_SIZE(sh_mobile_format_infos); ++i) { | |
606 | if (sh_mobile_format_infos[i].fourcc == fourcc) | |
607 | return &sh_mobile_format_infos[i]; | |
608 | } | |
609 | ||
610 | return NULL; | |
611 | } | |
612 | ||
f1f60b5f LP |
613 | static int sh_mobile_format_fourcc(const struct fb_var_screeninfo *var) |
614 | { | |
615 | if (var->grayscale > 1) | |
616 | return var->grayscale; | |
617 | ||
618 | switch (var->bits_per_pixel) { | |
619 | case 16: | |
620 | return V4L2_PIX_FMT_RGB565; | |
621 | case 24: | |
622 | return V4L2_PIX_FMT_BGR24; | |
623 | case 32: | |
624 | return V4L2_PIX_FMT_BGR32; | |
625 | default: | |
626 | return 0; | |
627 | } | |
628 | } | |
629 | ||
630 | static int sh_mobile_format_is_fourcc(const struct fb_var_screeninfo *var) | |
631 | { | |
632 | return var->grayscale > 1; | |
633 | } | |
634 | ||
f1f60b5f LP |
635 | /* ----------------------------------------------------------------------------- |
636 | * Start, stop and IRQ | |
637 | */ | |
638 | ||
8564557a MD |
639 | static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data) |
640 | { | |
641 | struct sh_mobile_lcdc_priv *priv = data; | |
2feb075a | 642 | struct sh_mobile_lcdc_chan *ch; |
9dd38819 | 643 | unsigned long ldintr; |
2feb075a MD |
644 | int is_sub; |
645 | int k; | |
8564557a | 646 | |
dc48665f LP |
647 | /* Acknowledge interrupts and disable further VSYNC End IRQs. */ |
648 | ldintr = lcdc_read(priv, _LDINTR); | |
649 | lcdc_write(priv, _LDINTR, (ldintr ^ LDINTR_STATUS_MASK) & ~LDINTR_VEE); | |
8564557a | 650 | |
2feb075a | 651 | /* figure out if this interrupt is for main or sub lcd */ |
ce1c0b08 | 652 | is_sub = (lcdc_read(priv, _LDSR) & LDSR_MSS) ? 1 : 0; |
2feb075a | 653 | |
9dd38819 | 654 | /* wake up channel and disable clocks */ |
2feb075a MD |
655 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { |
656 | ch = &priv->ch[k]; | |
657 | ||
658 | if (!ch->enabled) | |
659 | continue; | |
660 | ||
dc48665f | 661 | /* Frame End */ |
9dd38819 PE |
662 | if (ldintr & LDINTR_FS) { |
663 | if (is_sub == lcdc_chan_is_sublcd(ch)) { | |
664 | ch->frame_end = 1; | |
665 | wake_up(&ch->frame_end_wait); | |
2feb075a | 666 | |
9dd38819 PE |
667 | sh_mobile_lcdc_clk_off(priv); |
668 | } | |
669 | } | |
670 | ||
671 | /* VSYNC End */ | |
40331b21 PE |
672 | if (ldintr & LDINTR_VES) |
673 | complete(&ch->vsync_completion); | |
2feb075a MD |
674 | } |
675 | ||
8564557a MD |
676 | return IRQ_HANDLED; |
677 | } | |
678 | ||
d7ad3342 | 679 | static int sh_mobile_lcdc_wait_for_vsync(struct sh_mobile_lcdc_chan *ch) |
4976677f LP |
680 | { |
681 | unsigned long ldintr; | |
682 | int ret; | |
683 | ||
684 | /* Enable VSync End interrupt and be careful not to acknowledge any | |
685 | * pending interrupt. | |
686 | */ | |
687 | ldintr = lcdc_read(ch->lcdc, _LDINTR); | |
688 | ldintr |= LDINTR_VEE | LDINTR_STATUS_MASK; | |
689 | lcdc_write(ch->lcdc, _LDINTR, ldintr); | |
690 | ||
691 | ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion, | |
692 | msecs_to_jiffies(100)); | |
693 | if (!ret) | |
694 | return -ETIMEDOUT; | |
695 | ||
696 | return 0; | |
697 | } | |
698 | ||
cfb4f5d1 MD |
699 | static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv, |
700 | int start) | |
701 | { | |
702 | unsigned long tmp = lcdc_read(priv, _LDCNT2R); | |
703 | int k; | |
704 | ||
705 | /* start or stop the lcdc */ | |
706 | if (start) | |
ce1c0b08 | 707 | lcdc_write(priv, _LDCNT2R, tmp | LDCNT2R_DO); |
cfb4f5d1 | 708 | else |
ce1c0b08 | 709 | lcdc_write(priv, _LDCNT2R, tmp & ~LDCNT2R_DO); |
cfb4f5d1 MD |
710 | |
711 | /* wait until power is applied/stopped on all channels */ | |
712 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) | |
713 | if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled) | |
714 | while (1) { | |
ce1c0b08 LP |
715 | tmp = lcdc_read_chan(&priv->ch[k], LDPMR) |
716 | & LDPMR_LPS; | |
717 | if (start && tmp == LDPMR_LPS) | |
cfb4f5d1 MD |
718 | break; |
719 | if (!start && tmp == 0) | |
720 | break; | |
721 | cpu_relax(); | |
722 | } | |
723 | ||
724 | if (!start) | |
725 | lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */ | |
726 | } | |
727 | ||
6011bdea GL |
728 | static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch) |
729 | { | |
2d04559d LP |
730 | const struct fb_var_screeninfo *var = &ch->info->var; |
731 | const struct fb_videomode *mode = &ch->display.mode; | |
1c120deb | 732 | unsigned long h_total, hsync_pos, display_h_total; |
6011bdea GL |
733 | u32 tmp; |
734 | ||
735 | tmp = ch->ldmt1r_value; | |
ce1c0b08 LP |
736 | tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : LDMT1R_VPOL; |
737 | tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : LDMT1R_HPOL; | |
b5ef967d LP |
738 | tmp |= (ch->cfg->flags & LCDC_FLAGS_DWPOL) ? LDMT1R_DWPOL : 0; |
739 | tmp |= (ch->cfg->flags & LCDC_FLAGS_DIPOL) ? LDMT1R_DIPOL : 0; | |
740 | tmp |= (ch->cfg->flags & LCDC_FLAGS_DAPOL) ? LDMT1R_DAPOL : 0; | |
741 | tmp |= (ch->cfg->flags & LCDC_FLAGS_HSCNT) ? LDMT1R_HSCNT : 0; | |
742 | tmp |= (ch->cfg->flags & LCDC_FLAGS_DWCNT) ? LDMT1R_DWCNT : 0; | |
6011bdea GL |
743 | lcdc_write_chan(ch, LDMT1R, tmp); |
744 | ||
745 | /* setup SYS bus */ | |
b5ef967d LP |
746 | lcdc_write_chan(ch, LDMT2R, ch->cfg->sys_bus_cfg.ldmt2r); |
747 | lcdc_write_chan(ch, LDMT3R, ch->cfg->sys_bus_cfg.ldmt3r); | |
6011bdea GL |
748 | |
749 | /* horizontal configuration */ | |
2d04559d LP |
750 | h_total = mode->xres + mode->hsync_len + mode->left_margin |
751 | + mode->right_margin; | |
6011bdea | 752 | tmp = h_total / 8; /* HTCN */ |
58f03d99 | 753 | tmp |= (min(mode->xres, ch->xres) / 8) << 16; /* HDCN */ |
6011bdea GL |
754 | lcdc_write_chan(ch, LDHCNR, tmp); |
755 | ||
2d04559d | 756 | hsync_pos = mode->xres + mode->right_margin; |
6011bdea | 757 | tmp = hsync_pos / 8; /* HSYNP */ |
2d04559d | 758 | tmp |= (mode->hsync_len / 8) << 16; /* HSYNW */ |
6011bdea GL |
759 | lcdc_write_chan(ch, LDHSYNR, tmp); |
760 | ||
761 | /* vertical configuration */ | |
2d04559d LP |
762 | tmp = mode->yres + mode->vsync_len + mode->upper_margin |
763 | + mode->lower_margin; /* VTLN */ | |
58f03d99 | 764 | tmp |= min(mode->yres, ch->yres) << 16; /* VDLN */ |
6011bdea GL |
765 | lcdc_write_chan(ch, LDVLNR, tmp); |
766 | ||
2d04559d LP |
767 | tmp = mode->yres + mode->lower_margin; /* VSYNP */ |
768 | tmp |= mode->vsync_len << 16; /* VSYNW */ | |
6011bdea GL |
769 | lcdc_write_chan(ch, LDVSYNR, tmp); |
770 | ||
771 | /* Adjust horizontal synchronisation for HDMI */ | |
2d04559d LP |
772 | display_h_total = mode->xres + mode->hsync_len + mode->left_margin |
773 | + mode->right_margin; | |
774 | tmp = ((mode->xres & 7) << 24) | ((display_h_total & 7) << 16) | |
775 | | ((mode->hsync_len & 7) << 8) | (hsync_pos & 7); | |
6011bdea | 776 | lcdc_write_chan(ch, LDHAJR, tmp); |
9beb09f1 | 777 | lcdc_write_chan_mirror(ch, LDHAJR, tmp); |
6011bdea GL |
778 | } |
779 | ||
c5deac3c LP |
780 | static void sh_mobile_lcdc_overlay_setup(struct sh_mobile_lcdc_overlay *ovl) |
781 | { | |
782 | u32 format = 0; | |
783 | ||
784 | if (!ovl->enabled) { | |
785 | lcdc_write(ovl->channel->lcdc, LDBCR, LDBCR_UPC(ovl->index)); | |
786 | lcdc_write_overlay(ovl, LDBnBSIFR(ovl->index), 0); | |
787 | lcdc_write(ovl->channel->lcdc, LDBCR, | |
788 | LDBCR_UPF(ovl->index) | LDBCR_UPD(ovl->index)); | |
789 | return; | |
790 | } | |
791 | ||
792 | ovl->base_addr_y = ovl->dma_handle; | |
a4aa25f6 LP |
793 | ovl->base_addr_c = ovl->dma_handle |
794 | + ovl->xres_virtual * ovl->yres_virtual; | |
c5deac3c LP |
795 | |
796 | switch (ovl->mode) { | |
797 | case LCDC_OVERLAY_BLEND: | |
798 | format = LDBBSIFR_EN | (ovl->alpha << LDBBSIFR_LAY_SHIFT); | |
799 | break; | |
800 | ||
801 | case LCDC_OVERLAY_ROP3: | |
802 | format = LDBBSIFR_EN | LDBBSIFR_BRSEL | |
803 | | (ovl->rop3 << LDBBSIFR_ROP3_SHIFT); | |
804 | break; | |
805 | } | |
806 | ||
807 | switch (ovl->format->fourcc) { | |
808 | case V4L2_PIX_FMT_RGB565: | |
809 | case V4L2_PIX_FMT_NV21: | |
810 | case V4L2_PIX_FMT_NV61: | |
811 | case V4L2_PIX_FMT_NV42: | |
812 | format |= LDBBSIFR_SWPL | LDBBSIFR_SWPW; | |
813 | break; | |
814 | case V4L2_PIX_FMT_BGR24: | |
815 | case V4L2_PIX_FMT_NV12: | |
816 | case V4L2_PIX_FMT_NV16: | |
817 | case V4L2_PIX_FMT_NV24: | |
818 | format |= LDBBSIFR_SWPL | LDBBSIFR_SWPW | LDBBSIFR_SWPB; | |
819 | break; | |
820 | case V4L2_PIX_FMT_BGR32: | |
821 | default: | |
822 | format |= LDBBSIFR_SWPL; | |
823 | break; | |
824 | } | |
825 | ||
826 | switch (ovl->format->fourcc) { | |
827 | case V4L2_PIX_FMT_RGB565: | |
828 | format |= LDBBSIFR_AL_1 | LDBBSIFR_RY | LDBBSIFR_RPKF_RGB16; | |
829 | break; | |
830 | case V4L2_PIX_FMT_BGR24: | |
831 | format |= LDBBSIFR_AL_1 | LDBBSIFR_RY | LDBBSIFR_RPKF_RGB24; | |
832 | break; | |
833 | case V4L2_PIX_FMT_BGR32: | |
834 | format |= LDBBSIFR_AL_PK | LDBBSIFR_RY | LDDFR_PKF_ARGB32; | |
835 | break; | |
836 | case V4L2_PIX_FMT_NV12: | |
837 | case V4L2_PIX_FMT_NV21: | |
838 | format |= LDBBSIFR_AL_1 | LDBBSIFR_CHRR_420; | |
839 | break; | |
840 | case V4L2_PIX_FMT_NV16: | |
841 | case V4L2_PIX_FMT_NV61: | |
842 | format |= LDBBSIFR_AL_1 | LDBBSIFR_CHRR_422; | |
843 | break; | |
844 | case V4L2_PIX_FMT_NV24: | |
845 | case V4L2_PIX_FMT_NV42: | |
846 | format |= LDBBSIFR_AL_1 | LDBBSIFR_CHRR_444; | |
847 | break; | |
848 | } | |
849 | ||
850 | lcdc_write(ovl->channel->lcdc, LDBCR, LDBCR_UPC(ovl->index)); | |
851 | ||
852 | lcdc_write_overlay(ovl, LDBnBSIFR(ovl->index), format); | |
853 | ||
854 | lcdc_write_overlay(ovl, LDBnBSSZR(ovl->index), | |
855 | (ovl->yres << LDBBSSZR_BVSS_SHIFT) | | |
856 | (ovl->xres << LDBBSSZR_BHSS_SHIFT)); | |
857 | lcdc_write_overlay(ovl, LDBnBLOCR(ovl->index), | |
858 | (ovl->pos_y << LDBBLOCR_CVLC_SHIFT) | | |
859 | (ovl->pos_x << LDBBLOCR_CHLC_SHIFT)); | |
860 | lcdc_write_overlay(ovl, LDBnBSMWR(ovl->index), | |
861 | ovl->pitch << LDBBSMWR_BSMW_SHIFT); | |
862 | ||
863 | lcdc_write_overlay(ovl, LDBnBSAYR(ovl->index), ovl->base_addr_y); | |
864 | lcdc_write_overlay(ovl, LDBnBSACR(ovl->index), ovl->base_addr_c); | |
865 | ||
866 | lcdc_write(ovl->channel->lcdc, LDBCR, | |
867 | LDBCR_UPF(ovl->index) | LDBCR_UPD(ovl->index)); | |
868 | } | |
869 | ||
9a217e34 | 870 | /* |
d7ad3342 | 871 | * __sh_mobile_lcdc_start - Configure and start the LCDC |
9a217e34 LP |
872 | * @priv: LCDC device |
873 | * | |
874 | * Configure all enabled channels and start the LCDC device. All external | |
875 | * devices (clocks, MERAM, panels, ...) are not touched by this function. | |
876 | */ | |
877 | static void __sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv) | |
cfb4f5d1 MD |
878 | { |
879 | struct sh_mobile_lcdc_chan *ch; | |
cfb4f5d1 | 880 | unsigned long tmp; |
9a217e34 | 881 | int k, m; |
8564557a | 882 | |
9a217e34 LP |
883 | /* Enable LCDC channels. Read data from external memory, avoid using the |
884 | * BEU for now. | |
885 | */ | |
886 | lcdc_write(priv, _LDCNT2R, priv->ch[0].enabled | priv->ch[1].enabled); | |
cfb4f5d1 | 887 | |
9a217e34 | 888 | /* Stop the LCDC first and disable all interrupts. */ |
cfb4f5d1 | 889 | sh_mobile_lcdc_start_stop(priv, 0); |
9a217e34 | 890 | lcdc_write(priv, _LDINTR, 0); |
cfb4f5d1 | 891 | |
9a217e34 | 892 | /* Configure power supply, dot clocks and start them. */ |
cfb4f5d1 MD |
893 | tmp = priv->lddckr; |
894 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { | |
895 | ch = &priv->ch[k]; | |
9a217e34 | 896 | if (!ch->enabled) |
cfb4f5d1 MD |
897 | continue; |
898 | ||
9a217e34 LP |
899 | /* Power supply */ |
900 | lcdc_write_chan(ch, LDPMR, 0); | |
901 | ||
b5ef967d | 902 | m = ch->cfg->clock_divider; |
cfb4f5d1 MD |
903 | if (!m) |
904 | continue; | |
905 | ||
505c7de5 LP |
906 | /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider |
907 | * denominator. | |
908 | */ | |
909 | lcdc_write_chan(ch, LDDCKPAT1R, 0); | |
910 | lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1); | |
911 | ||
cfb4f5d1 | 912 | if (m == 1) |
ce1c0b08 | 913 | m = LDDCKR_MOSEL; |
cfb4f5d1 | 914 | tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0); |
cfb4f5d1 MD |
915 | } |
916 | ||
917 | lcdc_write(priv, _LDDCKR, tmp); | |
cfb4f5d1 MD |
918 | lcdc_write(priv, _LDDCKSTPR, 0); |
919 | lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0); | |
920 | ||
9a217e34 | 921 | /* Setup geometry, format, frame buffer memory and operation mode. */ |
cfb4f5d1 MD |
922 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { |
923 | ch = &priv->ch[k]; | |
cfb4f5d1 MD |
924 | if (!ch->enabled) |
925 | continue; | |
926 | ||
6011bdea | 927 | sh_mobile_lcdc_geometry(ch); |
cfb4f5d1 | 928 | |
fc9e78e6 | 929 | tmp = ch->format->lddfr; |
edd153a3 | 930 | |
fc9e78e6 | 931 | if (ch->format->yuv) { |
58f03d99 | 932 | switch (ch->colorspace) { |
edd153a3 LP |
933 | case V4L2_COLORSPACE_REC709: |
934 | tmp |= LDDFR_CF1; | |
53b50314 | 935 | break; |
edd153a3 LP |
936 | case V4L2_COLORSPACE_JPEG: |
937 | tmp |= LDDFR_CF0; | |
53b50314 DHG |
938 | break; |
939 | } | |
417d4827 | 940 | } |
7caa4342 | 941 | |
9a217e34 | 942 | lcdc_write_chan(ch, LDDFR, tmp); |
72c04af9 | 943 | lcdc_write_chan(ch, LDMLSR, ch->line_size); |
9a217e34 | 944 | lcdc_write_chan(ch, LDSA1R, ch->base_addr_y); |
fc9e78e6 | 945 | if (ch->format->yuv) |
9a217e34 | 946 | lcdc_write_chan(ch, LDSA2R, ch->base_addr_c); |
7caa4342 | 947 | |
9a217e34 LP |
948 | /* When using deferred I/O mode, configure the LCDC for one-shot |
949 | * operation and enable the frame end interrupt. Otherwise use | |
950 | * continuous read mode. | |
951 | */ | |
952 | if (ch->ldmt1r_value & LDMT1R_IFM && | |
b5ef967d | 953 | ch->cfg->sys_bus_cfg.deferred_io_msec) { |
9a217e34 LP |
954 | lcdc_write_chan(ch, LDSM1R, LDSM1R_OS); |
955 | lcdc_write(priv, _LDINTR, LDINTR_FE); | |
956 | } else { | |
957 | lcdc_write_chan(ch, LDSM1R, 0); | |
958 | } | |
959 | } | |
7caa4342 | 960 | |
9a217e34 | 961 | /* Word and long word swap. */ |
fc9e78e6 | 962 | switch (priv->ch[0].format->fourcc) { |
edd153a3 LP |
963 | case V4L2_PIX_FMT_RGB565: |
964 | case V4L2_PIX_FMT_NV21: | |
965 | case V4L2_PIX_FMT_NV61: | |
966 | case V4L2_PIX_FMT_NV42: | |
967 | tmp = LDDDSR_LS | LDDDSR_WS; | |
968 | break; | |
969 | case V4L2_PIX_FMT_BGR24: | |
970 | case V4L2_PIX_FMT_NV12: | |
971 | case V4L2_PIX_FMT_NV16: | |
972 | case V4L2_PIX_FMT_NV24: | |
9a217e34 | 973 | tmp = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS; |
edd153a3 LP |
974 | break; |
975 | case V4L2_PIX_FMT_BGR32: | |
976 | default: | |
977 | tmp = LDDDSR_LS; | |
978 | break; | |
9a217e34 LP |
979 | } |
980 | lcdc_write(priv, _LDDDSR, tmp); | |
7caa4342 | 981 | |
9a217e34 LP |
982 | /* Enable the display output. */ |
983 | lcdc_write(priv, _LDCNT1R, LDCNT1R_DE); | |
984 | sh_mobile_lcdc_start_stop(priv, 1); | |
985 | priv->started = 1; | |
986 | } | |
cfb4f5d1 | 987 | |
9a217e34 LP |
988 | static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv) |
989 | { | |
9a217e34 LP |
990 | struct sh_mobile_lcdc_chan *ch; |
991 | unsigned long tmp; | |
992 | int ret; | |
993 | int k; | |
cfb4f5d1 | 994 | |
9a217e34 LP |
995 | /* enable clocks before accessing the hardware */ |
996 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { | |
997 | if (priv->ch[k].enabled) | |
998 | sh_mobile_lcdc_clk_on(priv); | |
999 | } | |
8564557a | 1000 | |
9a217e34 LP |
1001 | /* reset */ |
1002 | lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LDCNT2R_BR); | |
1003 | lcdc_wait_bit(priv, _LDCNT2R, LDCNT2R_BR, 0); | |
8564557a | 1004 | |
9a217e34 | 1005 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { |
b5ef967d | 1006 | const struct sh_mobile_lcdc_panel_cfg *panel; |
8564557a | 1007 | |
37c5dcc2 | 1008 | ch = &priv->ch[k]; |
9a217e34 LP |
1009 | if (!ch->enabled) |
1010 | continue; | |
1011 | ||
b5ef967d | 1012 | panel = &ch->cfg->panel_cfg; |
afaad83b LP |
1013 | if (panel->setup_sys) { |
1014 | ret = panel->setup_sys(ch, &sh_mobile_lcdc_sys_bus_ops); | |
9a217e34 LP |
1015 | if (ret) |
1016 | return ret; | |
8564557a | 1017 | } |
cfb4f5d1 MD |
1018 | } |
1019 | ||
9a217e34 LP |
1020 | /* Compute frame buffer base address and pitch for each channel. */ |
1021 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { | |
9a217e34 LP |
1022 | ch = &priv->ch[k]; |
1023 | if (!ch->enabled) | |
1024 | continue; | |
cfb4f5d1 | 1025 | |
58f03d99 | 1026 | ch->base_addr_y = ch->dma_handle; |
a4aa25f6 LP |
1027 | ch->base_addr_c = ch->dma_handle |
1028 | + ch->xres_virtual * ch->yres_virtual; | |
72c04af9 | 1029 | ch->line_size = ch->pitch; |
9a217e34 LP |
1030 | } |
1031 | ||
c5deac3c LP |
1032 | for (k = 0; k < ARRAY_SIZE(priv->overlays); ++k) { |
1033 | struct sh_mobile_lcdc_overlay *ovl = &priv->overlays[k]; | |
1034 | sh_mobile_lcdc_overlay_setup(ovl); | |
1035 | } | |
1036 | ||
9a217e34 LP |
1037 | /* Start the LCDC. */ |
1038 | __sh_mobile_lcdc_start(priv); | |
1039 | ||
1040 | /* Setup deferred I/O, tell the board code to enable the panels, and | |
1041 | * turn backlight on. | |
1042 | */ | |
cfb4f5d1 MD |
1043 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { |
1044 | ch = &priv->ch[k]; | |
21bc1f02 MD |
1045 | if (!ch->enabled) |
1046 | continue; | |
1047 | ||
b5ef967d | 1048 | tmp = ch->cfg->sys_bus_cfg.deferred_io_msec; |
9a217e34 LP |
1049 | if (ch->ldmt1r_value & LDMT1R_IFM && tmp) { |
1050 | ch->defio.deferred_io = sh_mobile_lcdc_deferred_io; | |
1051 | ch->defio.delay = msecs_to_jiffies(tmp); | |
1052 | ch->info->fbdefio = &ch->defio; | |
1053 | fb_deferred_io_init(ch->info); | |
1054 | } | |
1055 | ||
37c5dcc2 | 1056 | sh_mobile_lcdc_display_on(ch); |
3b0fd9d7 AC |
1057 | |
1058 | if (ch->bl) { | |
1059 | ch->bl->props.power = FB_BLANK_UNBLANK; | |
1060 | backlight_update_status(ch->bl); | |
1061 | } | |
cfb4f5d1 MD |
1062 | } |
1063 | ||
1064 | return 0; | |
1065 | } | |
1066 | ||
1067 | static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv) | |
1068 | { | |
1069 | struct sh_mobile_lcdc_chan *ch; | |
cfb4f5d1 MD |
1070 | int k; |
1071 | ||
2feb075a | 1072 | /* clean up deferred io and ask board code to disable panel */ |
cfb4f5d1 MD |
1073 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { |
1074 | ch = &priv->ch[k]; | |
21bc1f02 MD |
1075 | if (!ch->enabled) |
1076 | continue; | |
8564557a | 1077 | |
2feb075a MD |
1078 | /* deferred io mode: |
1079 | * flush frame, and wait for frame end interrupt | |
1080 | * clean up deferred io and enable clock | |
1081 | */ | |
5ef6b505 | 1082 | if (ch->info && ch->info->fbdefio) { |
2feb075a | 1083 | ch->frame_end = 0; |
e33afddc | 1084 | schedule_delayed_work(&ch->info->deferred_work, 0); |
2feb075a | 1085 | wait_event(ch->frame_end_wait, ch->frame_end); |
e33afddc PM |
1086 | fb_deferred_io_cleanup(ch->info); |
1087 | ch->info->fbdefio = NULL; | |
2feb075a | 1088 | sh_mobile_lcdc_clk_on(priv); |
8564557a | 1089 | } |
2feb075a | 1090 | |
3b0fd9d7 AC |
1091 | if (ch->bl) { |
1092 | ch->bl->props.power = FB_BLANK_POWERDOWN; | |
1093 | backlight_update_status(ch->bl); | |
1094 | } | |
1095 | ||
37c5dcc2 | 1096 | sh_mobile_lcdc_display_off(ch); |
cfb4f5d1 MD |
1097 | } |
1098 | ||
1099 | /* stop the lcdc */ | |
8e9bb19e MD |
1100 | if (priv->started) { |
1101 | sh_mobile_lcdc_start_stop(priv, 0); | |
1102 | priv->started = 0; | |
1103 | } | |
b51339ff | 1104 | |
8564557a MD |
1105 | /* stop clocks */ |
1106 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) | |
1107 | if (priv->ch[k].enabled) | |
1108 | sh_mobile_lcdc_clk_off(priv); | |
cfb4f5d1 MD |
1109 | } |
1110 | ||
c5deac3c LP |
1111 | static int __sh_mobile_lcdc_check_var(struct fb_var_screeninfo *var, |
1112 | struct fb_info *info) | |
1113 | { | |
1114 | if (var->xres > MAX_XRES || var->yres > MAX_YRES) | |
1115 | return -EINVAL; | |
1116 | ||
1117 | /* Make sure the virtual resolution is at least as big as the visible | |
1118 | * resolution. | |
1119 | */ | |
1120 | if (var->xres_virtual < var->xres) | |
1121 | var->xres_virtual = var->xres; | |
1122 | if (var->yres_virtual < var->yres) | |
1123 | var->yres_virtual = var->yres; | |
1124 | ||
1125 | if (sh_mobile_format_is_fourcc(var)) { | |
1126 | const struct sh_mobile_lcdc_format_info *format; | |
1127 | ||
1128 | format = sh_mobile_format_info(var->grayscale); | |
1129 | if (format == NULL) | |
1130 | return -EINVAL; | |
1131 | var->bits_per_pixel = format->bpp; | |
1132 | ||
1133 | /* Default to RGB and JPEG color-spaces for RGB and YUV formats | |
1134 | * respectively. | |
1135 | */ | |
1136 | if (!format->yuv) | |
1137 | var->colorspace = V4L2_COLORSPACE_SRGB; | |
1138 | else if (var->colorspace != V4L2_COLORSPACE_REC709) | |
1139 | var->colorspace = V4L2_COLORSPACE_JPEG; | |
1140 | } else { | |
1141 | if (var->bits_per_pixel <= 16) { /* RGB 565 */ | |
1142 | var->bits_per_pixel = 16; | |
1143 | var->red.offset = 11; | |
1144 | var->red.length = 5; | |
1145 | var->green.offset = 5; | |
1146 | var->green.length = 6; | |
1147 | var->blue.offset = 0; | |
1148 | var->blue.length = 5; | |
1149 | var->transp.offset = 0; | |
1150 | var->transp.length = 0; | |
1151 | } else if (var->bits_per_pixel <= 24) { /* RGB 888 */ | |
1152 | var->bits_per_pixel = 24; | |
1153 | var->red.offset = 16; | |
1154 | var->red.length = 8; | |
1155 | var->green.offset = 8; | |
1156 | var->green.length = 8; | |
1157 | var->blue.offset = 0; | |
1158 | var->blue.length = 8; | |
1159 | var->transp.offset = 0; | |
1160 | var->transp.length = 0; | |
1161 | } else if (var->bits_per_pixel <= 32) { /* RGBA 888 */ | |
1162 | var->bits_per_pixel = 32; | |
1163 | var->red.offset = 16; | |
1164 | var->red.length = 8; | |
1165 | var->green.offset = 8; | |
1166 | var->green.length = 8; | |
1167 | var->blue.offset = 0; | |
1168 | var->blue.length = 8; | |
1169 | var->transp.offset = 24; | |
1170 | var->transp.length = 8; | |
1171 | } else | |
1172 | return -EINVAL; | |
1173 | ||
1174 | var->red.msb_right = 0; | |
1175 | var->green.msb_right = 0; | |
1176 | var->blue.msb_right = 0; | |
1177 | var->transp.msb_right = 0; | |
1178 | } | |
1179 | ||
1180 | /* Make sure we don't exceed our allocated memory. */ | |
1181 | if (var->xres_virtual * var->yres_virtual * var->bits_per_pixel / 8 > | |
1182 | info->fix.smem_len) | |
1183 | return -EINVAL; | |
1184 | ||
1185 | return 0; | |
1186 | } | |
1187 | ||
1188 | /* ----------------------------------------------------------------------------- | |
1189 | * Frame buffer operations - Overlays | |
1190 | */ | |
1191 | ||
1192 | static ssize_t | |
1193 | overlay_alpha_show(struct device *dev, struct device_attribute *attr, char *buf) | |
1194 | { | |
1195 | struct fb_info *info = dev_get_drvdata(dev); | |
1196 | struct sh_mobile_lcdc_overlay *ovl = info->par; | |
1197 | ||
1198 | return scnprintf(buf, PAGE_SIZE, "%u\n", ovl->alpha); | |
1199 | } | |
1200 | ||
1201 | static ssize_t | |
1202 | overlay_alpha_store(struct device *dev, struct device_attribute *attr, | |
1203 | const char *buf, size_t count) | |
1204 | { | |
1205 | struct fb_info *info = dev_get_drvdata(dev); | |
1206 | struct sh_mobile_lcdc_overlay *ovl = info->par; | |
1207 | unsigned int alpha; | |
1208 | char *endp; | |
1209 | ||
1210 | alpha = simple_strtoul(buf, &endp, 10); | |
1211 | if (isspace(*endp)) | |
1212 | endp++; | |
1213 | ||
1214 | if (endp - buf != count) | |
1215 | return -EINVAL; | |
1216 | ||
1217 | if (alpha > 255) | |
1218 | return -EINVAL; | |
1219 | ||
1220 | if (ovl->alpha != alpha) { | |
1221 | ovl->alpha = alpha; | |
1222 | ||
1223 | if (ovl->mode == LCDC_OVERLAY_BLEND && ovl->enabled) | |
1224 | sh_mobile_lcdc_overlay_setup(ovl); | |
1225 | } | |
1226 | ||
1227 | return count; | |
1228 | } | |
1229 | ||
1230 | static ssize_t | |
1231 | overlay_mode_show(struct device *dev, struct device_attribute *attr, char *buf) | |
1232 | { | |
1233 | struct fb_info *info = dev_get_drvdata(dev); | |
1234 | struct sh_mobile_lcdc_overlay *ovl = info->par; | |
1235 | ||
1236 | return scnprintf(buf, PAGE_SIZE, "%u\n", ovl->mode); | |
1237 | } | |
1238 | ||
1239 | static ssize_t | |
1240 | overlay_mode_store(struct device *dev, struct device_attribute *attr, | |
1241 | const char *buf, size_t count) | |
1242 | { | |
1243 | struct fb_info *info = dev_get_drvdata(dev); | |
1244 | struct sh_mobile_lcdc_overlay *ovl = info->par; | |
1245 | unsigned int mode; | |
1246 | char *endp; | |
1247 | ||
1248 | mode = simple_strtoul(buf, &endp, 10); | |
1249 | if (isspace(*endp)) | |
1250 | endp++; | |
1251 | ||
1252 | if (endp - buf != count) | |
1253 | return -EINVAL; | |
1254 | ||
1255 | if (mode != LCDC_OVERLAY_BLEND && mode != LCDC_OVERLAY_ROP3) | |
1256 | return -EINVAL; | |
1257 | ||
1258 | if (ovl->mode != mode) { | |
1259 | ovl->mode = mode; | |
1260 | ||
1261 | if (ovl->enabled) | |
1262 | sh_mobile_lcdc_overlay_setup(ovl); | |
1263 | } | |
1264 | ||
1265 | return count; | |
1266 | } | |
1267 | ||
1268 | static ssize_t | |
1269 | overlay_position_show(struct device *dev, struct device_attribute *attr, | |
1270 | char *buf) | |
1271 | { | |
1272 | struct fb_info *info = dev_get_drvdata(dev); | |
1273 | struct sh_mobile_lcdc_overlay *ovl = info->par; | |
1274 | ||
1275 | return scnprintf(buf, PAGE_SIZE, "%d,%d\n", ovl->pos_x, ovl->pos_y); | |
1276 | } | |
1277 | ||
1278 | static ssize_t | |
1279 | overlay_position_store(struct device *dev, struct device_attribute *attr, | |
1280 | const char *buf, size_t count) | |
1281 | { | |
1282 | struct fb_info *info = dev_get_drvdata(dev); | |
1283 | struct sh_mobile_lcdc_overlay *ovl = info->par; | |
1284 | char *endp; | |
1285 | int pos_x; | |
1286 | int pos_y; | |
1287 | ||
1288 | pos_x = simple_strtol(buf, &endp, 10); | |
1289 | if (*endp != ',') | |
1290 | return -EINVAL; | |
1291 | ||
1292 | pos_y = simple_strtol(endp + 1, &endp, 10); | |
1293 | if (isspace(*endp)) | |
1294 | endp++; | |
1295 | ||
1296 | if (endp - buf != count) | |
1297 | return -EINVAL; | |
1298 | ||
1299 | if (ovl->pos_x != pos_x || ovl->pos_y != pos_y) { | |
1300 | ovl->pos_x = pos_x; | |
1301 | ovl->pos_y = pos_y; | |
1302 | ||
1303 | if (ovl->enabled) | |
1304 | sh_mobile_lcdc_overlay_setup(ovl); | |
1305 | } | |
1306 | ||
1307 | return count; | |
1308 | } | |
1309 | ||
1310 | static ssize_t | |
1311 | overlay_rop3_show(struct device *dev, struct device_attribute *attr, char *buf) | |
1312 | { | |
1313 | struct fb_info *info = dev_get_drvdata(dev); | |
1314 | struct sh_mobile_lcdc_overlay *ovl = info->par; | |
1315 | ||
1316 | return scnprintf(buf, PAGE_SIZE, "%u\n", ovl->rop3); | |
1317 | } | |
1318 | ||
1319 | static ssize_t | |
1320 | overlay_rop3_store(struct device *dev, struct device_attribute *attr, | |
1321 | const char *buf, size_t count) | |
1322 | { | |
1323 | struct fb_info *info = dev_get_drvdata(dev); | |
1324 | struct sh_mobile_lcdc_overlay *ovl = info->par; | |
1325 | unsigned int rop3; | |
1326 | char *endp; | |
1327 | ||
14048ffe | 1328 | rop3 = simple_strtoul(buf, &endp, 10); |
c5deac3c LP |
1329 | if (isspace(*endp)) |
1330 | endp++; | |
1331 | ||
1332 | if (endp - buf != count) | |
1333 | return -EINVAL; | |
1334 | ||
1335 | if (rop3 > 255) | |
1336 | return -EINVAL; | |
1337 | ||
1338 | if (ovl->rop3 != rop3) { | |
1339 | ovl->rop3 = rop3; | |
1340 | ||
1341 | if (ovl->mode == LCDC_OVERLAY_ROP3 && ovl->enabled) | |
1342 | sh_mobile_lcdc_overlay_setup(ovl); | |
1343 | } | |
1344 | ||
1345 | return count; | |
1346 | } | |
1347 | ||
1348 | static const struct device_attribute overlay_sysfs_attrs[] = { | |
1349 | __ATTR(ovl_alpha, S_IRUGO|S_IWUSR, | |
1350 | overlay_alpha_show, overlay_alpha_store), | |
1351 | __ATTR(ovl_mode, S_IRUGO|S_IWUSR, | |
1352 | overlay_mode_show, overlay_mode_store), | |
1353 | __ATTR(ovl_position, S_IRUGO|S_IWUSR, | |
1354 | overlay_position_show, overlay_position_store), | |
1355 | __ATTR(ovl_rop3, S_IRUGO|S_IWUSR, | |
1356 | overlay_rop3_show, overlay_rop3_store), | |
1357 | }; | |
1358 | ||
1359 | static const struct fb_fix_screeninfo sh_mobile_lcdc_overlay_fix = { | |
1360 | .id = "SH Mobile LCDC", | |
1361 | .type = FB_TYPE_PACKED_PIXELS, | |
1362 | .visual = FB_VISUAL_TRUECOLOR, | |
1363 | .accel = FB_ACCEL_NONE, | |
15dede88 | 1364 | .xpanstep = 1, |
c5deac3c LP |
1365 | .ypanstep = 1, |
1366 | .ywrapstep = 0, | |
1367 | .capabilities = FB_CAP_FOURCC, | |
1368 | }; | |
1369 | ||
1370 | static int sh_mobile_lcdc_overlay_pan(struct fb_var_screeninfo *var, | |
1371 | struct fb_info *info) | |
1372 | { | |
1373 | struct sh_mobile_lcdc_overlay *ovl = info->par; | |
1374 | unsigned long base_addr_y; | |
1375 | unsigned long base_addr_c; | |
a4aa25f6 | 1376 | unsigned long y_offset; |
c5deac3c LP |
1377 | unsigned long c_offset; |
1378 | ||
a4aa25f6 LP |
1379 | if (!ovl->format->yuv) { |
1380 | y_offset = (var->yoffset * ovl->xres_virtual + var->xoffset) | |
1381 | * ovl->format->bpp / 8; | |
1382 | c_offset = 0; | |
1383 | } else { | |
1384 | unsigned int xsub = ovl->format->bpp < 24 ? 2 : 1; | |
1385 | unsigned int ysub = ovl->format->bpp < 16 ? 2 : 1; | |
1386 | ||
1387 | y_offset = var->yoffset * ovl->xres_virtual + var->xoffset; | |
1388 | c_offset = var->yoffset / ysub * ovl->xres_virtual * 2 / xsub | |
1389 | + var->xoffset * 2 / xsub; | |
1390 | } | |
c5deac3c | 1391 | |
a4aa25f6 LP |
1392 | /* If the Y offset hasn't changed, the C offset hasn't either. There's |
1393 | * nothing to do in that case. | |
1394 | */ | |
1395 | if (y_offset == ovl->pan_y_offset) | |
1396 | return 0; | |
c5deac3c LP |
1397 | |
1398 | /* Set the source address for the next refresh */ | |
a4aa25f6 LP |
1399 | base_addr_y = ovl->dma_handle + y_offset; |
1400 | base_addr_c = ovl->dma_handle + ovl->xres_virtual * ovl->yres_virtual | |
1401 | + c_offset; | |
c5deac3c LP |
1402 | |
1403 | ovl->base_addr_y = base_addr_y; | |
a4aa25f6 LP |
1404 | ovl->base_addr_c = base_addr_c; |
1405 | ovl->pan_y_offset = y_offset; | |
c5deac3c | 1406 | |
8be7c669 LP |
1407 | lcdc_write(ovl->channel->lcdc, LDBCR, LDBCR_UPC(ovl->index)); |
1408 | ||
c5deac3c LP |
1409 | lcdc_write_overlay(ovl, LDBnBSAYR(ovl->index), ovl->base_addr_y); |
1410 | lcdc_write_overlay(ovl, LDBnBSACR(ovl->index), ovl->base_addr_c); | |
1411 | ||
8be7c669 LP |
1412 | lcdc_write(ovl->channel->lcdc, LDBCR, |
1413 | LDBCR_UPF(ovl->index) | LDBCR_UPD(ovl->index)); | |
1414 | ||
c5deac3c LP |
1415 | return 0; |
1416 | } | |
1417 | ||
1418 | static int sh_mobile_lcdc_overlay_ioctl(struct fb_info *info, unsigned int cmd, | |
1419 | unsigned long arg) | |
1420 | { | |
1421 | struct sh_mobile_lcdc_overlay *ovl = info->par; | |
1422 | ||
1423 | switch (cmd) { | |
1424 | case FBIO_WAITFORVSYNC: | |
1425 | return sh_mobile_lcdc_wait_for_vsync(ovl->channel); | |
1426 | ||
1427 | default: | |
1428 | return -ENOIOCTLCMD; | |
1429 | } | |
1430 | } | |
1431 | ||
1432 | static int sh_mobile_lcdc_overlay_check_var(struct fb_var_screeninfo *var, | |
1433 | struct fb_info *info) | |
1434 | { | |
1435 | return __sh_mobile_lcdc_check_var(var, info); | |
1436 | } | |
1437 | ||
1438 | static int sh_mobile_lcdc_overlay_set_par(struct fb_info *info) | |
1439 | { | |
1440 | struct sh_mobile_lcdc_overlay *ovl = info->par; | |
1441 | ||
1442 | ovl->format = | |
1443 | sh_mobile_format_info(sh_mobile_format_fourcc(&info->var)); | |
1444 | ||
1445 | ovl->xres = info->var.xres; | |
1446 | ovl->xres_virtual = info->var.xres_virtual; | |
1447 | ovl->yres = info->var.yres; | |
1448 | ovl->yres_virtual = info->var.yres_virtual; | |
1449 | ||
1450 | if (ovl->format->yuv) | |
16ca21c9 | 1451 | ovl->pitch = info->var.xres_virtual; |
c5deac3c | 1452 | else |
16ca21c9 | 1453 | ovl->pitch = info->var.xres_virtual * ovl->format->bpp / 8; |
c5deac3c LP |
1454 | |
1455 | sh_mobile_lcdc_overlay_setup(ovl); | |
1456 | ||
1457 | info->fix.line_length = ovl->pitch; | |
1458 | ||
1459 | if (sh_mobile_format_is_fourcc(&info->var)) { | |
1460 | info->fix.type = FB_TYPE_FOURCC; | |
1461 | info->fix.visual = FB_VISUAL_FOURCC; | |
1462 | } else { | |
1463 | info->fix.type = FB_TYPE_PACKED_PIXELS; | |
1464 | info->fix.visual = FB_VISUAL_TRUECOLOR; | |
1465 | } | |
1466 | ||
1467 | return 0; | |
1468 | } | |
1469 | ||
1470 | /* Overlay blanking. Disable the overlay when blanked. */ | |
1471 | static int sh_mobile_lcdc_overlay_blank(int blank, struct fb_info *info) | |
1472 | { | |
1473 | struct sh_mobile_lcdc_overlay *ovl = info->par; | |
1474 | ||
1475 | ovl->enabled = !blank; | |
1476 | sh_mobile_lcdc_overlay_setup(ovl); | |
1477 | ||
1478 | /* Prevent the backlight from receiving a blanking event by returning | |
1479 | * a non-zero value. | |
1480 | */ | |
1481 | return 1; | |
1482 | } | |
1483 | ||
bf10a537 HE |
1484 | static int |
1485 | sh_mobile_lcdc_overlay_mmap(struct fb_info *info, struct vm_area_struct *vma) | |
1486 | { | |
1487 | struct sh_mobile_lcdc_overlay *ovl = info->par; | |
1488 | ||
1489 | return dma_mmap_coherent(ovl->channel->lcdc->dev, vma, ovl->fb_mem, | |
1490 | ovl->dma_handle, ovl->fb_size); | |
1491 | } | |
1492 | ||
8a48ac33 | 1493 | static const struct fb_ops sh_mobile_lcdc_overlay_ops = { |
c5deac3c LP |
1494 | .owner = THIS_MODULE, |
1495 | .fb_read = fb_sys_read, | |
1496 | .fb_write = fb_sys_write, | |
1497 | .fb_fillrect = sys_fillrect, | |
1498 | .fb_copyarea = sys_copyarea, | |
1499 | .fb_imageblit = sys_imageblit, | |
1500 | .fb_blank = sh_mobile_lcdc_overlay_blank, | |
1501 | .fb_pan_display = sh_mobile_lcdc_overlay_pan, | |
1502 | .fb_ioctl = sh_mobile_lcdc_overlay_ioctl, | |
1503 | .fb_check_var = sh_mobile_lcdc_overlay_check_var, | |
1504 | .fb_set_par = sh_mobile_lcdc_overlay_set_par, | |
bf10a537 | 1505 | .fb_mmap = sh_mobile_lcdc_overlay_mmap, |
c5deac3c LP |
1506 | }; |
1507 | ||
1508 | static void | |
1509 | sh_mobile_lcdc_overlay_fb_unregister(struct sh_mobile_lcdc_overlay *ovl) | |
1510 | { | |
1511 | struct fb_info *info = ovl->info; | |
1512 | ||
1513 | if (info == NULL || info->dev == NULL) | |
1514 | return; | |
1515 | ||
1516 | unregister_framebuffer(ovl->info); | |
1517 | } | |
1518 | ||
48c68c4f | 1519 | static int |
c5deac3c LP |
1520 | sh_mobile_lcdc_overlay_fb_register(struct sh_mobile_lcdc_overlay *ovl) |
1521 | { | |
1522 | struct sh_mobile_lcdc_priv *lcdc = ovl->channel->lcdc; | |
1523 | struct fb_info *info = ovl->info; | |
1524 | unsigned int i; | |
1525 | int ret; | |
1526 | ||
1527 | if (info == NULL) | |
1528 | return 0; | |
1529 | ||
1530 | ret = register_framebuffer(info); | |
1531 | if (ret < 0) | |
1532 | return ret; | |
1533 | ||
1534 | dev_info(lcdc->dev, "registered %s/overlay %u as %dx%d %dbpp.\n", | |
1535 | dev_name(lcdc->dev), ovl->index, info->var.xres, | |
1536 | info->var.yres, info->var.bits_per_pixel); | |
1537 | ||
1538 | for (i = 0; i < ARRAY_SIZE(overlay_sysfs_attrs); ++i) { | |
1539 | ret = device_create_file(info->dev, &overlay_sysfs_attrs[i]); | |
1540 | if (ret < 0) | |
1541 | return ret; | |
1542 | } | |
1543 | ||
1544 | return 0; | |
1545 | } | |
1546 | ||
1547 | static void | |
1548 | sh_mobile_lcdc_overlay_fb_cleanup(struct sh_mobile_lcdc_overlay *ovl) | |
1549 | { | |
1550 | struct fb_info *info = ovl->info; | |
1551 | ||
1552 | if (info == NULL || info->device == NULL) | |
1553 | return; | |
1554 | ||
1555 | framebuffer_release(info); | |
1556 | } | |
1557 | ||
48c68c4f | 1558 | static int |
c5deac3c LP |
1559 | sh_mobile_lcdc_overlay_fb_init(struct sh_mobile_lcdc_overlay *ovl) |
1560 | { | |
1561 | struct sh_mobile_lcdc_priv *priv = ovl->channel->lcdc; | |
1562 | struct fb_var_screeninfo *var; | |
1563 | struct fb_info *info; | |
1564 | ||
1565 | /* Allocate and initialize the frame buffer device. */ | |
1566 | info = framebuffer_alloc(0, priv->dev); | |
0adcdbcb | 1567 | if (!info) |
c5deac3c | 1568 | return -ENOMEM; |
c5deac3c LP |
1569 | |
1570 | ovl->info = info; | |
1571 | ||
1572 | info->flags = FBINFO_FLAG_DEFAULT; | |
1573 | info->fbops = &sh_mobile_lcdc_overlay_ops; | |
1574 | info->device = priv->dev; | |
5d30146f | 1575 | info->screen_buffer = ovl->fb_mem; |
c5deac3c LP |
1576 | info->par = ovl; |
1577 | ||
1578 | /* Initialize fixed screen information. Restrict pan to 2 lines steps | |
1579 | * for NV12 and NV21. | |
1580 | */ | |
1581 | info->fix = sh_mobile_lcdc_overlay_fix; | |
1582 | snprintf(info->fix.id, sizeof(info->fix.id), | |
1583 | "SH Mobile LCDC Overlay %u", ovl->index); | |
1584 | info->fix.smem_start = ovl->dma_handle; | |
1585 | info->fix.smem_len = ovl->fb_size; | |
1586 | info->fix.line_length = ovl->pitch; | |
1587 | ||
1588 | if (ovl->format->yuv) | |
1589 | info->fix.visual = FB_VISUAL_FOURCC; | |
1590 | else | |
1591 | info->fix.visual = FB_VISUAL_TRUECOLOR; | |
1592 | ||
15dede88 | 1593 | switch (ovl->format->fourcc) { |
15dede88 LP |
1594 | case V4L2_PIX_FMT_NV12: |
1595 | case V4L2_PIX_FMT_NV21: | |
ac33a207 | 1596 | info->fix.ypanstep = 2; |
df561f66 | 1597 | fallthrough; |
ac33a207 LP |
1598 | case V4L2_PIX_FMT_NV16: |
1599 | case V4L2_PIX_FMT_NV61: | |
15dede88 LP |
1600 | info->fix.xpanstep = 2; |
1601 | } | |
c5deac3c LP |
1602 | |
1603 | /* Initialize variable screen information. */ | |
1604 | var = &info->var; | |
1605 | memset(var, 0, sizeof(*var)); | |
1606 | var->xres = ovl->xres; | |
1607 | var->yres = ovl->yres; | |
1608 | var->xres_virtual = ovl->xres_virtual; | |
1609 | var->yres_virtual = ovl->yres_virtual; | |
1610 | var->activate = FB_ACTIVATE_NOW; | |
1611 | ||
1612 | /* Use the legacy API by default for RGB formats, and the FOURCC API | |
1613 | * for YUV formats. | |
1614 | */ | |
1615 | if (!ovl->format->yuv) | |
1616 | var->bits_per_pixel = ovl->format->bpp; | |
1617 | else | |
1618 | var->grayscale = ovl->format->fourcc; | |
1619 | ||
1620 | return sh_mobile_lcdc_overlay_check_var(var, info); | |
1621 | } | |
1622 | ||
f1f60b5f | 1623 | /* ----------------------------------------------------------------------------- |
c5deac3c | 1624 | * Frame buffer operations - main frame buffer |
f1f60b5f | 1625 | */ |
cfb4f5d1 MD |
1626 | |
1627 | static int sh_mobile_lcdc_setcolreg(u_int regno, | |
1628 | u_int red, u_int green, u_int blue, | |
1629 | u_int transp, struct fb_info *info) | |
1630 | { | |
1631 | u32 *palette = info->pseudo_palette; | |
1632 | ||
1633 | if (regno >= PALETTE_NR) | |
1634 | return -EINVAL; | |
1635 | ||
1636 | /* only FB_VISUAL_TRUECOLOR supported */ | |
1637 | ||
1638 | red >>= 16 - info->var.red.length; | |
1639 | green >>= 16 - info->var.green.length; | |
1640 | blue >>= 16 - info->var.blue.length; | |
1641 | transp >>= 16 - info->var.transp.length; | |
1642 | ||
1643 | palette[regno] = (red << info->var.red.offset) | | |
1644 | (green << info->var.green.offset) | | |
1645 | (blue << info->var.blue.offset) | | |
1646 | (transp << info->var.transp.offset); | |
1647 | ||
1648 | return 0; | |
1649 | } | |
1650 | ||
3281e54c | 1651 | static const struct fb_fix_screeninfo sh_mobile_lcdc_fix = { |
cfb4f5d1 MD |
1652 | .id = "SH Mobile LCDC", |
1653 | .type = FB_TYPE_PACKED_PIXELS, | |
1654 | .visual = FB_VISUAL_TRUECOLOR, | |
1655 | .accel = FB_ACCEL_NONE, | |
15dede88 | 1656 | .xpanstep = 1, |
9dd38819 PE |
1657 | .ypanstep = 1, |
1658 | .ywrapstep = 0, | |
edd153a3 | 1659 | .capabilities = FB_CAP_FOURCC, |
cfb4f5d1 MD |
1660 | }; |
1661 | ||
8564557a MD |
1662 | static void sh_mobile_lcdc_fillrect(struct fb_info *info, |
1663 | const struct fb_fillrect *rect) | |
1664 | { | |
1665 | sys_fillrect(info, rect); | |
1666 | sh_mobile_lcdc_deferred_io_touch(info); | |
1667 | } | |
1668 | ||
1669 | static void sh_mobile_lcdc_copyarea(struct fb_info *info, | |
1670 | const struct fb_copyarea *area) | |
1671 | { | |
1672 | sys_copyarea(info, area); | |
1673 | sh_mobile_lcdc_deferred_io_touch(info); | |
1674 | } | |
1675 | ||
1676 | static void sh_mobile_lcdc_imageblit(struct fb_info *info, | |
1677 | const struct fb_image *image) | |
1678 | { | |
1679 | sys_imageblit(info, image); | |
1680 | sh_mobile_lcdc_deferred_io_touch(info); | |
1681 | } | |
1682 | ||
d7ad3342 LP |
1683 | static int sh_mobile_lcdc_pan(struct fb_var_screeninfo *var, |
1684 | struct fb_info *info) | |
9dd38819 PE |
1685 | { |
1686 | struct sh_mobile_lcdc_chan *ch = info->par; | |
92e1f9a7 PE |
1687 | struct sh_mobile_lcdc_priv *priv = ch->lcdc; |
1688 | unsigned long ldrcntr; | |
a4aa25f6 LP |
1689 | unsigned long base_addr_y, base_addr_c; |
1690 | unsigned long y_offset; | |
53b50314 | 1691 | unsigned long c_offset; |
92e1f9a7 | 1692 | |
a4aa25f6 LP |
1693 | if (!ch->format->yuv) { |
1694 | y_offset = (var->yoffset * ch->xres_virtual + var->xoffset) | |
1695 | * ch->format->bpp / 8; | |
1696 | c_offset = 0; | |
1697 | } else { | |
1698 | unsigned int xsub = ch->format->bpp < 24 ? 2 : 1; | |
1699 | unsigned int ysub = ch->format->bpp < 16 ? 2 : 1; | |
9dd38819 | 1700 | |
a4aa25f6 LP |
1701 | y_offset = var->yoffset * ch->xres_virtual + var->xoffset; |
1702 | c_offset = var->yoffset / ysub * ch->xres_virtual * 2 / xsub | |
1703 | + var->xoffset * 2 / xsub; | |
1704 | } | |
9dd38819 | 1705 | |
a4aa25f6 LP |
1706 | /* If the Y offset hasn't changed, the C offset hasn't either. There's |
1707 | * nothing to do in that case. | |
1708 | */ | |
1709 | if (y_offset == ch->pan_y_offset) | |
1710 | return 0; | |
9dd38819 | 1711 | |
92e1f9a7 | 1712 | /* Set the source address for the next refresh */ |
a4aa25f6 LP |
1713 | base_addr_y = ch->dma_handle + y_offset; |
1714 | base_addr_c = ch->dma_handle + ch->xres_virtual * ch->yres_virtual | |
1715 | + c_offset; | |
53b50314 | 1716 | |
49d79ba2 LP |
1717 | ch->base_addr_y = base_addr_y; |
1718 | ch->base_addr_c = base_addr_c; | |
a4aa25f6 | 1719 | ch->pan_y_offset = y_offset; |
7caa4342 | 1720 | |
49d79ba2 | 1721 | lcdc_write_chan_mirror(ch, LDSA1R, base_addr_y); |
58f03d99 | 1722 | if (ch->format->yuv) |
49d79ba2 | 1723 | lcdc_write_chan_mirror(ch, LDSA2R, base_addr_c); |
53b50314 | 1724 | |
a4aa25f6 | 1725 | ldrcntr = lcdc_read(priv, _LDRCNTR); |
92e1f9a7 PE |
1726 | if (lcdc_chan_is_sublcd(ch)) |
1727 | lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS); | |
1728 | else | |
1729 | lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS); | |
1730 | ||
92e1f9a7 PE |
1731 | |
1732 | sh_mobile_lcdc_deferred_io_touch(info); | |
9dd38819 PE |
1733 | |
1734 | return 0; | |
1735 | } | |
1736 | ||
d7ad3342 LP |
1737 | static int sh_mobile_lcdc_ioctl(struct fb_info *info, unsigned int cmd, |
1738 | unsigned long arg) | |
40331b21 | 1739 | { |
d7ad3342 | 1740 | struct sh_mobile_lcdc_chan *ch = info->par; |
40331b21 PE |
1741 | int retval; |
1742 | ||
1743 | switch (cmd) { | |
1744 | case FBIO_WAITFORVSYNC: | |
d7ad3342 | 1745 | retval = sh_mobile_lcdc_wait_for_vsync(ch); |
40331b21 PE |
1746 | break; |
1747 | ||
1748 | default: | |
1749 | retval = -ENOIOCTLCMD; | |
1750 | break; | |
1751 | } | |
1752 | return retval; | |
1753 | } | |
1754 | ||
dd210503 GL |
1755 | static void sh_mobile_fb_reconfig(struct fb_info *info) |
1756 | { | |
1757 | struct sh_mobile_lcdc_chan *ch = info->par; | |
2d04559d LP |
1758 | struct fb_var_screeninfo var; |
1759 | struct fb_videomode mode; | |
dd210503 GL |
1760 | |
1761 | if (ch->use_count > 1 || (ch->use_count == 1 && !info->fbcon_par)) | |
1762 | /* More framebuffer users are active */ | |
1763 | return; | |
1764 | ||
2d04559d | 1765 | fb_var_to_videomode(&mode, &info->var); |
dd210503 | 1766 | |
2d04559d | 1767 | if (fb_mode_is_equal(&ch->display.mode, &mode)) |
dd210503 GL |
1768 | return; |
1769 | ||
1770 | /* Display has been re-plugged, framebuffer is free now, reconfigure */ | |
2d04559d LP |
1771 | var = info->var; |
1772 | fb_videomode_to_var(&var, &ch->display.mode); | |
1773 | var.width = ch->display.width; | |
1774 | var.height = ch->display.height; | |
1775 | var.activate = FB_ACTIVATE_NOW; | |
1776 | ||
1777 | if (fb_set_var(info, &var) < 0) | |
dd210503 GL |
1778 | /* Couldn't reconfigure, hopefully, can continue as before */ |
1779 | return; | |
1780 | ||
9e146700 | 1781 | fbcon_update_vcs(info, true); |
dd210503 GL |
1782 | } |
1783 | ||
1784 | /* | |
1785 | * Locking: both .fb_release() and .fb_open() are called with info->lock held if | |
1786 | * user == 1, or with console sem held, if user == 0. | |
1787 | */ | |
d7ad3342 | 1788 | static int sh_mobile_lcdc_release(struct fb_info *info, int user) |
dd210503 GL |
1789 | { |
1790 | struct sh_mobile_lcdc_chan *ch = info->par; | |
1791 | ||
1792 | mutex_lock(&ch->open_lock); | |
1793 | dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count); | |
1794 | ||
1795 | ch->use_count--; | |
1796 | ||
1797 | /* Nothing to reconfigure, when called from fbcon */ | |
1798 | if (user) { | |
ac751efa | 1799 | console_lock(); |
dd210503 | 1800 | sh_mobile_fb_reconfig(info); |
ac751efa | 1801 | console_unlock(); |
dd210503 GL |
1802 | } |
1803 | ||
1804 | mutex_unlock(&ch->open_lock); | |
1805 | ||
1806 | return 0; | |
1807 | } | |
1808 | ||
d7ad3342 | 1809 | static int sh_mobile_lcdc_open(struct fb_info *info, int user) |
dd210503 GL |
1810 | { |
1811 | struct sh_mobile_lcdc_chan *ch = info->par; | |
1812 | ||
1813 | mutex_lock(&ch->open_lock); | |
1814 | ch->use_count++; | |
1815 | ||
1816 | dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count); | |
1817 | mutex_unlock(&ch->open_lock); | |
1818 | ||
1819 | return 0; | |
1820 | } | |
1821 | ||
d7ad3342 LP |
1822 | static int sh_mobile_lcdc_check_var(struct fb_var_screeninfo *var, |
1823 | struct fb_info *info) | |
dd210503 GL |
1824 | { |
1825 | struct sh_mobile_lcdc_chan *ch = info->par; | |
417d4827 | 1826 | struct sh_mobile_lcdc_priv *p = ch->lcdc; |
03862194 LP |
1827 | unsigned int best_dist = (unsigned int)-1; |
1828 | unsigned int best_xres = 0; | |
1829 | unsigned int best_yres = 0; | |
1830 | unsigned int i; | |
c5deac3c | 1831 | int ret; |
03862194 LP |
1832 | |
1833 | /* If board code provides us with a list of available modes, make sure | |
1834 | * we use one of them. Find the mode closest to the requested one. The | |
1835 | * distance between two modes is defined as the size of the | |
1836 | * non-overlapping parts of the two rectangles. | |
1837 | */ | |
b5ef967d LP |
1838 | for (i = 0; i < ch->cfg->num_modes; ++i) { |
1839 | const struct fb_videomode *mode = &ch->cfg->lcd_modes[i]; | |
03862194 LP |
1840 | unsigned int dist; |
1841 | ||
1842 | /* We can only round up. */ | |
1843 | if (var->xres > mode->xres || var->yres > mode->yres) | |
1844 | continue; | |
1845 | ||
1846 | dist = var->xres * var->yres + mode->xres * mode->yres | |
1847 | - 2 * min(var->xres, mode->xres) | |
1848 | * min(var->yres, mode->yres); | |
1849 | ||
1850 | if (dist < best_dist) { | |
1851 | best_xres = mode->xres; | |
1852 | best_yres = mode->yres; | |
1853 | best_dist = dist; | |
1854 | } | |
dd210503 | 1855 | } |
417d4827 | 1856 | |
03862194 | 1857 | /* If no available mode can be used, return an error. */ |
b5ef967d | 1858 | if (ch->cfg->num_modes != 0) { |
03862194 LP |
1859 | if (best_dist == (unsigned int)-1) |
1860 | return -EINVAL; | |
1861 | ||
1862 | var->xres = best_xres; | |
1863 | var->yres = best_yres; | |
1864 | } | |
1865 | ||
c5deac3c LP |
1866 | ret = __sh_mobile_lcdc_check_var(var, info); |
1867 | if (ret < 0) | |
1868 | return ret; | |
03862194 | 1869 | |
edd153a3 LP |
1870 | /* only accept the forced_fourcc for dual channel configurations */ |
1871 | if (p->forced_fourcc && | |
1872 | p->forced_fourcc != sh_mobile_format_fourcc(var)) | |
417d4827 | 1873 | return -EINVAL; |
417d4827 | 1874 | |
dd210503 GL |
1875 | return 0; |
1876 | } | |
40331b21 | 1877 | |
d7ad3342 | 1878 | static int sh_mobile_lcdc_set_par(struct fb_info *info) |
ed5bebf2 LP |
1879 | { |
1880 | struct sh_mobile_lcdc_chan *ch = info->par; | |
1881 | int ret; | |
1882 | ||
1883 | sh_mobile_lcdc_stop(ch->lcdc); | |
91fba48d | 1884 | |
fc9e78e6 | 1885 | ch->format = sh_mobile_format_info(sh_mobile_format_fourcc(&info->var)); |
58f03d99 LP |
1886 | ch->colorspace = info->var.colorspace; |
1887 | ||
1888 | ch->xres = info->var.xres; | |
1889 | ch->xres_virtual = info->var.xres_virtual; | |
1890 | ch->yres = info->var.yres; | |
1891 | ch->yres_virtual = info->var.yres_virtual; | |
1892 | ||
1893 | if (ch->format->yuv) | |
16ca21c9 | 1894 | ch->pitch = info->var.xres_virtual; |
58f03d99 | 1895 | else |
16ca21c9 | 1896 | ch->pitch = info->var.xres_virtual * ch->format->bpp / 8; |
fc9e78e6 | 1897 | |
ed5bebf2 | 1898 | ret = sh_mobile_lcdc_start(ch->lcdc); |
58f03d99 | 1899 | if (ret < 0) |
ed5bebf2 | 1900 | dev_err(info->dev, "%s: unable to restart LCDC\n", __func__); |
58f03d99 LP |
1901 | |
1902 | info->fix.line_length = ch->pitch; | |
ed5bebf2 | 1903 | |
edd153a3 LP |
1904 | if (sh_mobile_format_is_fourcc(&info->var)) { |
1905 | info->fix.type = FB_TYPE_FOURCC; | |
1906 | info->fix.visual = FB_VISUAL_FOURCC; | |
1907 | } else { | |
1908 | info->fix.type = FB_TYPE_PACKED_PIXELS; | |
1909 | info->fix.visual = FB_VISUAL_TRUECOLOR; | |
1910 | } | |
1911 | ||
ed5bebf2 LP |
1912 | return ret; |
1913 | } | |
1914 | ||
8857b9aa AC |
1915 | /* |
1916 | * Screen blanking. Behavior is as follows: | |
1917 | * FB_BLANK_UNBLANK: screen unblanked, clocks enabled | |
1918 | * FB_BLANK_NORMAL: screen blanked, clocks enabled | |
1919 | * FB_BLANK_VSYNC, | |
1920 | * FB_BLANK_HSYNC, | |
1921 | * FB_BLANK_POWEROFF: screen blanked, clocks disabled | |
1922 | */ | |
1923 | static int sh_mobile_lcdc_blank(int blank, struct fb_info *info) | |
1924 | { | |
1925 | struct sh_mobile_lcdc_chan *ch = info->par; | |
1926 | struct sh_mobile_lcdc_priv *p = ch->lcdc; | |
1927 | ||
1928 | /* blank the screen? */ | |
1929 | if (blank > FB_BLANK_UNBLANK && ch->blank_status == FB_BLANK_UNBLANK) { | |
1930 | struct fb_fillrect rect = { | |
58f03d99 LP |
1931 | .width = ch->xres, |
1932 | .height = ch->yres, | |
8857b9aa AC |
1933 | }; |
1934 | sh_mobile_lcdc_fillrect(info, &rect); | |
1935 | } | |
1936 | /* turn clocks on? */ | |
1937 | if (blank <= FB_BLANK_NORMAL && ch->blank_status > FB_BLANK_NORMAL) { | |
1938 | sh_mobile_lcdc_clk_on(p); | |
1939 | } | |
1940 | /* turn clocks off? */ | |
1941 | if (blank > FB_BLANK_NORMAL && ch->blank_status <= FB_BLANK_NORMAL) { | |
1942 | /* make sure the screen is updated with the black fill before | |
1943 | * switching the clocks off. one vsync is not enough since | |
1944 | * blanking may occur in the middle of a refresh. deferred io | |
1945 | * mode will reenable the clocks and update the screen in time, | |
1946 | * so it does not need this. */ | |
1947 | if (!info->fbdefio) { | |
d7ad3342 LP |
1948 | sh_mobile_lcdc_wait_for_vsync(ch); |
1949 | sh_mobile_lcdc_wait_for_vsync(ch); | |
8857b9aa AC |
1950 | } |
1951 | sh_mobile_lcdc_clk_off(p); | |
1952 | } | |
1953 | ||
1954 | ch->blank_status = blank; | |
1955 | return 0; | |
1956 | } | |
1957 | ||
bf10a537 HE |
1958 | static int |
1959 | sh_mobile_lcdc_mmap(struct fb_info *info, struct vm_area_struct *vma) | |
1960 | { | |
1961 | struct sh_mobile_lcdc_chan *ch = info->par; | |
1962 | ||
1963 | return dma_mmap_coherent(ch->lcdc->dev, vma, ch->fb_mem, | |
1964 | ch->dma_handle, ch->fb_size); | |
1965 | } | |
1966 | ||
8a48ac33 | 1967 | static const struct fb_ops sh_mobile_lcdc_ops = { |
9dd38819 | 1968 | .owner = THIS_MODULE, |
cfb4f5d1 | 1969 | .fb_setcolreg = sh_mobile_lcdc_setcolreg, |
2540c111 MD |
1970 | .fb_read = fb_sys_read, |
1971 | .fb_write = fb_sys_write, | |
8564557a MD |
1972 | .fb_fillrect = sh_mobile_lcdc_fillrect, |
1973 | .fb_copyarea = sh_mobile_lcdc_copyarea, | |
1974 | .fb_imageblit = sh_mobile_lcdc_imageblit, | |
8857b9aa | 1975 | .fb_blank = sh_mobile_lcdc_blank, |
d7ad3342 LP |
1976 | .fb_pan_display = sh_mobile_lcdc_pan, |
1977 | .fb_ioctl = sh_mobile_lcdc_ioctl, | |
1978 | .fb_open = sh_mobile_lcdc_open, | |
1979 | .fb_release = sh_mobile_lcdc_release, | |
1980 | .fb_check_var = sh_mobile_lcdc_check_var, | |
1981 | .fb_set_par = sh_mobile_lcdc_set_par, | |
bf10a537 | 1982 | .fb_mmap = sh_mobile_lcdc_mmap, |
cfb4f5d1 MD |
1983 | }; |
1984 | ||
a67f379d LP |
1985 | static void |
1986 | sh_mobile_lcdc_channel_fb_unregister(struct sh_mobile_lcdc_chan *ch) | |
1987 | { | |
1988 | if (ch->info && ch->info->dev) | |
1989 | unregister_framebuffer(ch->info); | |
1990 | } | |
1991 | ||
48c68c4f | 1992 | static int |
a67f379d LP |
1993 | sh_mobile_lcdc_channel_fb_register(struct sh_mobile_lcdc_chan *ch) |
1994 | { | |
1995 | struct fb_info *info = ch->info; | |
1996 | int ret; | |
1997 | ||
1998 | if (info->fbdefio) { | |
1999 | ch->sglist = vmalloc(sizeof(struct scatterlist) * | |
2000 | ch->fb_size >> PAGE_SHIFT); | |
e281018b | 2001 | if (!ch->sglist) |
a67f379d | 2002 | return -ENOMEM; |
a67f379d LP |
2003 | } |
2004 | ||
2005 | info->bl_dev = ch->bl; | |
2006 | ||
2007 | ret = register_framebuffer(info); | |
2008 | if (ret < 0) | |
2009 | return ret; | |
2010 | ||
2011 | dev_info(ch->lcdc->dev, "registered %s/%s as %dx%d %dbpp.\n", | |
b5ef967d | 2012 | dev_name(ch->lcdc->dev), (ch->cfg->chan == LCDC_CHAN_MAINLCD) ? |
a67f379d LP |
2013 | "mainlcd" : "sublcd", info->var.xres, info->var.yres, |
2014 | info->var.bits_per_pixel); | |
2015 | ||
2016 | /* deferred io mode: disable clock to save power */ | |
2017 | if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED) | |
2018 | sh_mobile_lcdc_clk_off(ch->lcdc); | |
2019 | ||
2020 | return ret; | |
2021 | } | |
2022 | ||
2023 | static void | |
2024 | sh_mobile_lcdc_channel_fb_cleanup(struct sh_mobile_lcdc_chan *ch) | |
2025 | { | |
2026 | struct fb_info *info = ch->info; | |
2027 | ||
2028 | if (!info || !info->device) | |
2029 | return; | |
2030 | ||
f8582758 | 2031 | vfree(ch->sglist); |
a67f379d LP |
2032 | |
2033 | fb_dealloc_cmap(&info->cmap); | |
2034 | framebuffer_release(info); | |
2035 | } | |
2036 | ||
48c68c4f | 2037 | static int |
a67f379d | 2038 | sh_mobile_lcdc_channel_fb_init(struct sh_mobile_lcdc_chan *ch, |
352d6138 | 2039 | const struct fb_videomode *modes, |
a67f379d LP |
2040 | unsigned int num_modes) |
2041 | { | |
2042 | struct sh_mobile_lcdc_priv *priv = ch->lcdc; | |
2043 | struct fb_var_screeninfo *var; | |
2044 | struct fb_info *info; | |
2045 | int ret; | |
2046 | ||
2047 | /* Allocate and initialize the frame buffer device. Create the modes | |
2048 | * list and allocate the color map. | |
2049 | */ | |
2050 | info = framebuffer_alloc(0, priv->dev); | |
0adcdbcb | 2051 | if (!info) |
a67f379d | 2052 | return -ENOMEM; |
a67f379d LP |
2053 | |
2054 | ch->info = info; | |
2055 | ||
2056 | info->flags = FBINFO_FLAG_DEFAULT; | |
2057 | info->fbops = &sh_mobile_lcdc_ops; | |
2058 | info->device = priv->dev; | |
5d30146f | 2059 | info->screen_buffer = ch->fb_mem; |
a67f379d LP |
2060 | info->pseudo_palette = &ch->pseudo_palette; |
2061 | info->par = ch; | |
2062 | ||
352d6138 | 2063 | fb_videomode_to_modelist(modes, num_modes, &info->modelist); |
a67f379d LP |
2064 | |
2065 | ret = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0); | |
2066 | if (ret < 0) { | |
2067 | dev_err(priv->dev, "unable to allocate cmap\n"); | |
2068 | return ret; | |
2069 | } | |
2070 | ||
2071 | /* Initialize fixed screen information. Restrict pan to 2 lines steps | |
2072 | * for NV12 and NV21. | |
2073 | */ | |
2074 | info->fix = sh_mobile_lcdc_fix; | |
2075 | info->fix.smem_start = ch->dma_handle; | |
2076 | info->fix.smem_len = ch->fb_size; | |
58f03d99 LP |
2077 | info->fix.line_length = ch->pitch; |
2078 | ||
2079 | if (ch->format->yuv) | |
2080 | info->fix.visual = FB_VISUAL_FOURCC; | |
2081 | else | |
2082 | info->fix.visual = FB_VISUAL_TRUECOLOR; | |
2083 | ||
15dede88 | 2084 | switch (ch->format->fourcc) { |
15dede88 LP |
2085 | case V4L2_PIX_FMT_NV12: |
2086 | case V4L2_PIX_FMT_NV21: | |
ac33a207 | 2087 | info->fix.ypanstep = 2; |
df561f66 | 2088 | fallthrough; |
ac33a207 LP |
2089 | case V4L2_PIX_FMT_NV16: |
2090 | case V4L2_PIX_FMT_NV61: | |
15dede88 LP |
2091 | info->fix.xpanstep = 2; |
2092 | } | |
a67f379d LP |
2093 | |
2094 | /* Initialize variable screen information using the first mode as | |
bd5f2c69 | 2095 | * default. |
a67f379d LP |
2096 | */ |
2097 | var = &info->var; | |
352d6138 | 2098 | fb_videomode_to_var(var, modes); |
856e8dfe LP |
2099 | var->width = ch->display.width; |
2100 | var->height = ch->display.height; | |
bd5f2c69 LP |
2101 | var->xres_virtual = ch->xres_virtual; |
2102 | var->yres_virtual = ch->yres_virtual; | |
a67f379d LP |
2103 | var->activate = FB_ACTIVATE_NOW; |
2104 | ||
2105 | /* Use the legacy API by default for RGB formats, and the FOURCC API | |
2106 | * for YUV formats. | |
2107 | */ | |
2108 | if (!ch->format->yuv) | |
2109 | var->bits_per_pixel = ch->format->bpp; | |
2110 | else | |
2111 | var->grayscale = ch->format->fourcc; | |
2112 | ||
d7ad3342 | 2113 | ret = sh_mobile_lcdc_check_var(var, info); |
a67f379d LP |
2114 | if (ret) |
2115 | return ret; | |
2116 | ||
a67f379d LP |
2117 | return 0; |
2118 | } | |
2119 | ||
f1f60b5f LP |
2120 | /* ----------------------------------------------------------------------------- |
2121 | * Backlight | |
2122 | */ | |
2123 | ||
3b0fd9d7 AC |
2124 | static int sh_mobile_lcdc_update_bl(struct backlight_device *bdev) |
2125 | { | |
2126 | struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev); | |
3b0fd9d7 AC |
2127 | int brightness = bdev->props.brightness; |
2128 | ||
2129 | if (bdev->props.power != FB_BLANK_UNBLANK || | |
2130 | bdev->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK)) | |
2131 | brightness = 0; | |
2132 | ||
656d4f33 | 2133 | ch->bl_brightness = brightness; |
b5ef967d | 2134 | return ch->cfg->bl_info.set_brightness(brightness); |
3b0fd9d7 AC |
2135 | } |
2136 | ||
2137 | static int sh_mobile_lcdc_get_brightness(struct backlight_device *bdev) | |
2138 | { | |
2139 | struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev); | |
3b0fd9d7 | 2140 | |
656d4f33 | 2141 | return ch->bl_brightness; |
3b0fd9d7 AC |
2142 | } |
2143 | ||
2144 | static int sh_mobile_lcdc_check_fb(struct backlight_device *bdev, | |
2145 | struct fb_info *info) | |
2146 | { | |
2147 | return (info->bl_dev == bdev); | |
2148 | } | |
2149 | ||
0e25884b | 2150 | static const struct backlight_ops sh_mobile_lcdc_bl_ops = { |
3b0fd9d7 AC |
2151 | .options = BL_CORE_SUSPENDRESUME, |
2152 | .update_status = sh_mobile_lcdc_update_bl, | |
2153 | .get_brightness = sh_mobile_lcdc_get_brightness, | |
2154 | .check_fb = sh_mobile_lcdc_check_fb, | |
2155 | }; | |
2156 | ||
2157 | static struct backlight_device *sh_mobile_lcdc_bl_probe(struct device *parent, | |
2158 | struct sh_mobile_lcdc_chan *ch) | |
2159 | { | |
2160 | struct backlight_device *bl; | |
2161 | ||
b5ef967d | 2162 | bl = backlight_device_register(ch->cfg->bl_info.name, parent, ch, |
3b0fd9d7 | 2163 | &sh_mobile_lcdc_bl_ops, NULL); |
beee1f20 DC |
2164 | if (IS_ERR(bl)) { |
2165 | dev_err(parent, "unable to register backlight device: %ld\n", | |
2166 | PTR_ERR(bl)); | |
3b0fd9d7 AC |
2167 | return NULL; |
2168 | } | |
2169 | ||
b5ef967d | 2170 | bl->props.max_brightness = ch->cfg->bl_info.max_brightness; |
3b0fd9d7 AC |
2171 | bl->props.brightness = bl->props.max_brightness; |
2172 | backlight_update_status(bl); | |
2173 | ||
2174 | return bl; | |
2175 | } | |
2176 | ||
2177 | static void sh_mobile_lcdc_bl_remove(struct backlight_device *bdev) | |
2178 | { | |
2179 | backlight_device_unregister(bdev); | |
2180 | } | |
2181 | ||
f1f60b5f LP |
2182 | /* ----------------------------------------------------------------------------- |
2183 | * Power management | |
2184 | */ | |
2185 | ||
2feb075a MD |
2186 | static int sh_mobile_lcdc_suspend(struct device *dev) |
2187 | { | |
2188 | struct platform_device *pdev = to_platform_device(dev); | |
2189 | ||
2190 | sh_mobile_lcdc_stop(platform_get_drvdata(pdev)); | |
2191 | return 0; | |
2192 | } | |
2193 | ||
2194 | static int sh_mobile_lcdc_resume(struct device *dev) | |
2195 | { | |
2196 | struct platform_device *pdev = to_platform_device(dev); | |
2197 | ||
2198 | return sh_mobile_lcdc_start(platform_get_drvdata(pdev)); | |
2199 | } | |
2200 | ||
0246c471 MD |
2201 | static int sh_mobile_lcdc_runtime_suspend(struct device *dev) |
2202 | { | |
b2faabc8 | 2203 | struct sh_mobile_lcdc_priv *priv = dev_get_drvdata(dev); |
0246c471 MD |
2204 | |
2205 | /* turn off LCDC hardware */ | |
2427bb24 LP |
2206 | lcdc_write(priv, _LDCNT1R, 0); |
2207 | ||
0246c471 MD |
2208 | return 0; |
2209 | } | |
2210 | ||
2211 | static int sh_mobile_lcdc_runtime_resume(struct device *dev) | |
2212 | { | |
b2faabc8 | 2213 | struct sh_mobile_lcdc_priv *priv = dev_get_drvdata(dev); |
0246c471 | 2214 | |
2427bb24 | 2215 | __sh_mobile_lcdc_start(priv); |
0246c471 MD |
2216 | |
2217 | return 0; | |
2218 | } | |
2219 | ||
47145210 | 2220 | static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = { |
2feb075a MD |
2221 | .suspend = sh_mobile_lcdc_suspend, |
2222 | .resume = sh_mobile_lcdc_resume, | |
0246c471 MD |
2223 | .runtime_suspend = sh_mobile_lcdc_runtime_suspend, |
2224 | .runtime_resume = sh_mobile_lcdc_runtime_resume, | |
2feb075a MD |
2225 | }; |
2226 | ||
f1f60b5f LP |
2227 | /* ----------------------------------------------------------------------------- |
2228 | * Framebuffer notifier | |
2229 | */ | |
2230 | ||
f1f60b5f LP |
2231 | /* ----------------------------------------------------------------------------- |
2232 | * Probe/remove and driver init/exit | |
2233 | */ | |
2234 | ||
48c68c4f | 2235 | static const struct fb_videomode default_720p = { |
f1f60b5f LP |
2236 | .name = "HDMI 720p", |
2237 | .xres = 1280, | |
2238 | .yres = 720, | |
2239 | ||
2240 | .left_margin = 220, | |
2241 | .right_margin = 110, | |
2242 | .hsync_len = 40, | |
2243 | ||
2244 | .upper_margin = 20, | |
2245 | .lower_margin = 5, | |
2246 | .vsync_len = 5, | |
2247 | ||
2248 | .pixclock = 13468, | |
2249 | .refresh = 60, | |
2250 | .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT, | |
2251 | }; | |
2252 | ||
b4bee692 LP |
2253 | static int sh_mobile_lcdc_remove(struct platform_device *pdev) |
2254 | { | |
2255 | struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev); | |
c5deac3c | 2256 | unsigned int i; |
b4bee692 | 2257 | |
c5deac3c LP |
2258 | for (i = 0; i < ARRAY_SIZE(priv->overlays); i++) |
2259 | sh_mobile_lcdc_overlay_fb_unregister(&priv->overlays[i]); | |
b4bee692 | 2260 | for (i = 0; i < ARRAY_SIZE(priv->ch); i++) |
a67f379d | 2261 | sh_mobile_lcdc_channel_fb_unregister(&priv->ch[i]); |
b4bee692 LP |
2262 | |
2263 | sh_mobile_lcdc_stop(priv); | |
2264 | ||
c5deac3c LP |
2265 | for (i = 0; i < ARRAY_SIZE(priv->overlays); i++) { |
2266 | struct sh_mobile_lcdc_overlay *ovl = &priv->overlays[i]; | |
2267 | ||
2268 | sh_mobile_lcdc_overlay_fb_cleanup(ovl); | |
2269 | ||
2270 | if (ovl->fb_mem) | |
2271 | dma_free_coherent(&pdev->dev, ovl->fb_size, | |
2272 | ovl->fb_mem, ovl->dma_handle); | |
2273 | } | |
2274 | ||
b4bee692 | 2275 | for (i = 0; i < ARRAY_SIZE(priv->ch); i++) { |
9a2985e7 | 2276 | struct sh_mobile_lcdc_chan *ch = &priv->ch[i]; |
b4bee692 | 2277 | |
e34d0bbb LP |
2278 | if (ch->tx_dev) { |
2279 | ch->tx_dev->lcdc = NULL; | |
b5ef967d | 2280 | module_put(ch->cfg->tx_dev->dev.driver->owner); |
e34d0bbb | 2281 | } |
9a2985e7 | 2282 | |
a67f379d | 2283 | sh_mobile_lcdc_channel_fb_cleanup(ch); |
b4bee692 | 2284 | |
a67f379d LP |
2285 | if (ch->fb_mem) |
2286 | dma_free_coherent(&pdev->dev, ch->fb_size, | |
2287 | ch->fb_mem, ch->dma_handle); | |
b4bee692 LP |
2288 | } |
2289 | ||
2290 | for (i = 0; i < ARRAY_SIZE(priv->ch); i++) { | |
0c75c4e0 LP |
2291 | struct sh_mobile_lcdc_chan *ch = &priv->ch[i]; |
2292 | ||
2293 | if (ch->bl) | |
2294 | sh_mobile_lcdc_bl_remove(ch->bl); | |
2295 | mutex_destroy(&ch->open_lock); | |
b4bee692 LP |
2296 | } |
2297 | ||
4774c12a LP |
2298 | if (priv->dot_clk) { |
2299 | pm_runtime_disable(&pdev->dev); | |
b4bee692 | 2300 | clk_put(priv->dot_clk); |
4774c12a | 2301 | } |
b4bee692 LP |
2302 | |
2303 | if (priv->base) | |
2304 | iounmap(priv->base); | |
2305 | ||
2306 | if (priv->irq) | |
2307 | free_irq(priv->irq, priv); | |
2308 | kfree(priv); | |
2309 | return 0; | |
2310 | } | |
cfb4f5d1 | 2311 | |
48c68c4f | 2312 | static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch) |
f1f60b5f | 2313 | { |
b5ef967d | 2314 | int interface_type = ch->cfg->interface_type; |
f1f60b5f LP |
2315 | |
2316 | switch (interface_type) { | |
2317 | case RGB8: | |
2318 | case RGB9: | |
2319 | case RGB12A: | |
2320 | case RGB12B: | |
2321 | case RGB16: | |
2322 | case RGB18: | |
2323 | case RGB24: | |
2324 | case SYS8A: | |
2325 | case SYS8B: | |
2326 | case SYS8C: | |
2327 | case SYS8D: | |
2328 | case SYS9: | |
2329 | case SYS12: | |
2330 | case SYS16A: | |
2331 | case SYS16B: | |
2332 | case SYS16C: | |
2333 | case SYS18: | |
2334 | case SYS24: | |
2335 | break; | |
2336 | default: | |
2337 | return -EINVAL; | |
2338 | } | |
2339 | ||
2340 | /* SUBLCD only supports SYS interface */ | |
2341 | if (lcdc_chan_is_sublcd(ch)) { | |
2342 | if (!(interface_type & LDMT1R_IFM)) | |
2343 | return -EINVAL; | |
2344 | ||
2345 | interface_type &= ~LDMT1R_IFM; | |
2346 | } | |
2347 | ||
2348 | ch->ldmt1r_value = interface_type; | |
2349 | return 0; | |
2350 | } | |
2351 | ||
48c68c4f | 2352 | static int |
0707330b | 2353 | sh_mobile_lcdc_overlay_init(struct sh_mobile_lcdc_overlay *ovl) |
c5deac3c LP |
2354 | { |
2355 | const struct sh_mobile_lcdc_format_info *format; | |
0707330b | 2356 | struct device *dev = ovl->channel->lcdc->dev; |
c5deac3c LP |
2357 | int ret; |
2358 | ||
2359 | if (ovl->cfg->fourcc == 0) | |
2360 | return 0; | |
2361 | ||
2362 | /* Validate the format. */ | |
2363 | format = sh_mobile_format_info(ovl->cfg->fourcc); | |
2364 | if (format == NULL) { | |
0707330b | 2365 | dev_err(dev, "Invalid FOURCC %08x\n", ovl->cfg->fourcc); |
c5deac3c LP |
2366 | return -EINVAL; |
2367 | } | |
2368 | ||
2369 | ovl->enabled = false; | |
2370 | ovl->mode = LCDC_OVERLAY_BLEND; | |
2371 | ovl->alpha = 255; | |
2372 | ovl->rop3 = 0; | |
2373 | ovl->pos_x = 0; | |
2374 | ovl->pos_y = 0; | |
2375 | ||
2376 | /* The default Y virtual resolution is twice the panel size to allow for | |
2377 | * double-buffering. | |
2378 | */ | |
2379 | ovl->format = format; | |
2380 | ovl->xres = ovl->cfg->max_xres; | |
2381 | ovl->xres_virtual = ovl->xres; | |
2382 | ovl->yres = ovl->cfg->max_yres; | |
2383 | ovl->yres_virtual = ovl->yres * 2; | |
2384 | ||
2385 | if (!format->yuv) | |
16ca21c9 | 2386 | ovl->pitch = ovl->xres_virtual * format->bpp / 8; |
c5deac3c | 2387 | else |
16ca21c9 | 2388 | ovl->pitch = ovl->xres_virtual; |
c5deac3c LP |
2389 | |
2390 | /* Allocate frame buffer memory. */ | |
2391 | ovl->fb_size = ovl->cfg->max_xres * ovl->cfg->max_yres | |
2392 | * format->bpp / 8 * 2; | |
0707330b LP |
2393 | ovl->fb_mem = dma_alloc_coherent(dev, ovl->fb_size, &ovl->dma_handle, |
2394 | GFP_KERNEL); | |
c5deac3c | 2395 | if (!ovl->fb_mem) { |
0707330b | 2396 | dev_err(dev, "unable to allocate buffer\n"); |
c5deac3c LP |
2397 | return -ENOMEM; |
2398 | } | |
2399 | ||
2400 | ret = sh_mobile_lcdc_overlay_fb_init(ovl); | |
2401 | if (ret < 0) | |
2402 | return ret; | |
2403 | ||
2404 | return 0; | |
2405 | } | |
2406 | ||
48c68c4f | 2407 | static int |
0707330b | 2408 | sh_mobile_lcdc_channel_init(struct sh_mobile_lcdc_chan *ch) |
cfb4f5d1 | 2409 | { |
105784bb | 2410 | const struct sh_mobile_lcdc_format_info *format; |
b5ef967d | 2411 | const struct sh_mobile_lcdc_chan_cfg *cfg = ch->cfg; |
0707330b | 2412 | struct device *dev = ch->lcdc->dev; |
3ce05599 LP |
2413 | const struct fb_videomode *max_mode; |
2414 | const struct fb_videomode *mode; | |
a67f379d | 2415 | unsigned int num_modes; |
3ce05599 | 2416 | unsigned int max_size; |
a67f379d | 2417 | unsigned int i; |
3ce05599 | 2418 | |
105784bb LP |
2419 | /* Validate the format. */ |
2420 | format = sh_mobile_format_info(cfg->fourcc); | |
2421 | if (format == NULL) { | |
0707330b | 2422 | dev_err(dev, "Invalid FOURCC %08x.\n", cfg->fourcc); |
105784bb LP |
2423 | return -EINVAL; |
2424 | } | |
2425 | ||
3ce05599 LP |
2426 | /* Iterate through the modes to validate them and find the highest |
2427 | * resolution. | |
2428 | */ | |
2429 | max_mode = NULL; | |
2430 | max_size = 0; | |
2431 | ||
93ff2598 | 2432 | for (i = 0, mode = cfg->lcd_modes; i < cfg->num_modes; i++, mode++) { |
3ce05599 LP |
2433 | unsigned int size = mode->yres * mode->xres; |
2434 | ||
edd153a3 LP |
2435 | /* NV12/NV21 buffers must have even number of lines */ |
2436 | if ((cfg->fourcc == V4L2_PIX_FMT_NV12 || | |
2437 | cfg->fourcc == V4L2_PIX_FMT_NV21) && (mode->yres & 0x1)) { | |
0707330b | 2438 | dev_err(dev, "yres must be multiple of 2 for " |
0a7f17aa | 2439 | "YCbCr420 mode.\n"); |
3ce05599 LP |
2440 | return -EINVAL; |
2441 | } | |
2442 | ||
2443 | if (size > max_size) { | |
2444 | max_mode = mode; | |
2445 | max_size = size; | |
2446 | } | |
2447 | } | |
2448 | ||
2449 | if (!max_size) | |
2450 | max_size = MAX_XRES * MAX_YRES; | |
2451 | else | |
0707330b | 2452 | dev_dbg(dev, "Found largest videomode %ux%u\n", |
3ce05599 LP |
2453 | max_mode->xres, max_mode->yres); |
2454 | ||
93ff2598 | 2455 | if (cfg->lcd_modes == NULL) { |
3ce05599 | 2456 | mode = &default_720p; |
93ff2598 | 2457 | num_modes = 1; |
3ce05599 | 2458 | } else { |
93ff2598 LP |
2459 | mode = cfg->lcd_modes; |
2460 | num_modes = cfg->num_modes; | |
3ce05599 LP |
2461 | } |
2462 | ||
bd5f2c69 LP |
2463 | /* Use the first mode as default. The default Y virtual resolution is |
2464 | * twice the panel size to allow for double-buffering. | |
2465 | */ | |
58f03d99 LP |
2466 | ch->format = format; |
2467 | ch->xres = mode->xres; | |
2468 | ch->xres_virtual = mode->xres; | |
2469 | ch->yres = mode->yres; | |
2470 | ch->yres_virtual = mode->yres * 2; | |
2471 | ||
2472 | if (!format->yuv) { | |
2473 | ch->colorspace = V4L2_COLORSPACE_SRGB; | |
16ca21c9 | 2474 | ch->pitch = ch->xres_virtual * format->bpp / 8; |
58f03d99 LP |
2475 | } else { |
2476 | ch->colorspace = V4L2_COLORSPACE_REC709; | |
16ca21c9 | 2477 | ch->pitch = ch->xres_virtual; |
58f03d99 LP |
2478 | } |
2479 | ||
a67f379d LP |
2480 | ch->display.width = cfg->panel_cfg.width; |
2481 | ch->display.height = cfg->panel_cfg.height; | |
2482 | ch->display.mode = *mode; | |
2483 | ||
2484 | /* Allocate frame buffer memory. */ | |
2485 | ch->fb_size = max_size * format->bpp / 8 * 2; | |
0707330b | 2486 | ch->fb_mem = dma_alloc_coherent(dev, ch->fb_size, &ch->dma_handle, |
a67f379d LP |
2487 | GFP_KERNEL); |
2488 | if (ch->fb_mem == NULL) { | |
0707330b | 2489 | dev_err(dev, "unable to allocate buffer\n"); |
a67f379d LP |
2490 | return -ENOMEM; |
2491 | } | |
3ce05599 | 2492 | |
13f80eea LP |
2493 | /* Initialize the transmitter device if present. */ |
2494 | if (cfg->tx_dev) { | |
2495 | if (!cfg->tx_dev->dev.driver || | |
2496 | !try_module_get(cfg->tx_dev->dev.driver->owner)) { | |
0707330b | 2497 | dev_warn(dev, "unable to get transmitter device\n"); |
13f80eea LP |
2498 | return -EINVAL; |
2499 | } | |
2500 | ch->tx_dev = platform_get_drvdata(cfg->tx_dev); | |
2501 | ch->tx_dev->lcdc = ch; | |
2502 | ch->tx_dev->def_mode = *mode; | |
2503 | } | |
2504 | ||
a67f379d | 2505 | return sh_mobile_lcdc_channel_fb_init(ch, mode, num_modes); |
3ce05599 LP |
2506 | } |
2507 | ||
48c68c4f | 2508 | static int sh_mobile_lcdc_probe(struct platform_device *pdev) |
3ce05599 | 2509 | { |
01ac25b5 | 2510 | struct sh_mobile_lcdc_info *pdata = pdev->dev.platform_data; |
3ce05599 | 2511 | struct sh_mobile_lcdc_priv *priv; |
cfb4f5d1 | 2512 | struct resource *res; |
3ce05599 | 2513 | int num_channels; |
cfb4f5d1 | 2514 | int error; |
7374ccc0 | 2515 | int irq, i; |
cfb4f5d1 | 2516 | |
01ac25b5 | 2517 | if (!pdata) { |
cfb4f5d1 | 2518 | dev_err(&pdev->dev, "no platform data defined\n"); |
8bed9055 | 2519 | return -EINVAL; |
cfb4f5d1 MD |
2520 | } |
2521 | ||
2522 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
7374ccc0 GU |
2523 | irq = platform_get_irq(pdev, 0); |
2524 | if (!res || irq < 0) { | |
8564557a | 2525 | dev_err(&pdev->dev, "cannot get platform resources\n"); |
8bed9055 | 2526 | return -ENOENT; |
cfb4f5d1 MD |
2527 | } |
2528 | ||
2529 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); | |
e281018b | 2530 | if (!priv) |
8bed9055 | 2531 | return -ENOMEM; |
cfb4f5d1 | 2532 | |
4774c12a | 2533 | priv->dev = &pdev->dev; |
9076aa99 | 2534 | |
7374ccc0 GU |
2535 | for (i = 0; i < ARRAY_SIZE(priv->ch); i++) |
2536 | mutex_init(&priv->ch[i].open_lock); | |
8bed9055 GL |
2537 | platform_set_drvdata(pdev, priv); |
2538 | ||
7374ccc0 | 2539 | error = request_irq(irq, sh_mobile_lcdc_irq, 0, |
7ad33e74 | 2540 | dev_name(&pdev->dev), priv); |
8564557a MD |
2541 | if (error) { |
2542 | dev_err(&pdev->dev, "unable to request irq\n"); | |
2543 | goto err1; | |
2544 | } | |
2545 | ||
7374ccc0 | 2546 | priv->irq = irq; |
5ef6b505 | 2547 | atomic_set(&priv->hw_usecnt, -1); |
cfb4f5d1 | 2548 | |
3ce05599 LP |
2549 | for (i = 0, num_channels = 0; i < ARRAY_SIZE(pdata->ch); i++) { |
2550 | struct sh_mobile_lcdc_chan *ch = priv->ch + num_channels; | |
cfb4f5d1 | 2551 | |
01ac25b5 | 2552 | ch->lcdc = priv; |
b5ef967d | 2553 | ch->cfg = &pdata->ch[i]; |
cfb4f5d1 | 2554 | |
01ac25b5 | 2555 | error = sh_mobile_lcdc_check_interface(ch); |
cfb4f5d1 MD |
2556 | if (error) { |
2557 | dev_err(&pdev->dev, "unsupported interface type\n"); | |
2558 | goto err1; | |
2559 | } | |
01ac25b5 GL |
2560 | init_waitqueue_head(&ch->frame_end_wait); |
2561 | init_completion(&ch->vsync_completion); | |
cfb4f5d1 | 2562 | |
3b0fd9d7 | 2563 | /* probe the backlight is there is one defined */ |
b5ef967d | 2564 | if (ch->cfg->bl_info.max_brightness) |
3b0fd9d7 AC |
2565 | ch->bl = sh_mobile_lcdc_bl_probe(&pdev->dev, ch); |
2566 | ||
cfb4f5d1 MD |
2567 | switch (pdata->ch[i].chan) { |
2568 | case LCDC_CHAN_MAINLCD: | |
ce1c0b08 | 2569 | ch->enabled = LDCNT2R_ME; |
01ac25b5 | 2570 | ch->reg_offs = lcdc_offs_mainlcd; |
3ce05599 | 2571 | num_channels++; |
cfb4f5d1 MD |
2572 | break; |
2573 | case LCDC_CHAN_SUBLCD: | |
ce1c0b08 | 2574 | ch->enabled = LDCNT2R_SE; |
01ac25b5 | 2575 | ch->reg_offs = lcdc_offs_sublcd; |
3ce05599 | 2576 | num_channels++; |
cfb4f5d1 MD |
2577 | break; |
2578 | } | |
2579 | } | |
2580 | ||
3ce05599 | 2581 | if (!num_channels) { |
cfb4f5d1 MD |
2582 | dev_err(&pdev->dev, "no channels defined\n"); |
2583 | error = -EINVAL; | |
2584 | goto err1; | |
2585 | } | |
2586 | ||
edd153a3 | 2587 | /* for dual channel LCDC (MAIN + SUB) force shared format setting */ |
3ce05599 | 2588 | if (num_channels == 2) |
edd153a3 | 2589 | priv->forced_fourcc = pdata->ch[0].fourcc; |
417d4827 | 2590 | |
4bdc0d67 | 2591 | priv->base = ioremap(res->start, resource_size(res)); |
b49898ce WY |
2592 | if (!priv->base) { |
2593 | error = -ENOMEM; | |
dba6f385 | 2594 | goto err1; |
b49898ce | 2595 | } |
dba6f385 | 2596 | |
0a7f17aa | 2597 | error = sh_mobile_lcdc_setup_clocks(priv, pdata->clock_source); |
cfb4f5d1 MD |
2598 | if (error) { |
2599 | dev_err(&pdev->dev, "unable to setup clocks\n"); | |
2600 | goto err1; | |
2601 | } | |
2602 | ||
4774c12a LP |
2603 | /* Enable runtime PM. */ |
2604 | pm_runtime_enable(&pdev->dev); | |
7caa4342 | 2605 | |
3ce05599 | 2606 | for (i = 0; i < num_channels; i++) { |
0707330b | 2607 | struct sh_mobile_lcdc_chan *ch = &priv->ch[i]; |
c44f9f76 | 2608 | |
0707330b | 2609 | error = sh_mobile_lcdc_channel_init(ch); |
cfb4f5d1 | 2610 | if (error) |
3ce05599 | 2611 | goto err1; |
cfb4f5d1 MD |
2612 | } |
2613 | ||
c5deac3c LP |
2614 | for (i = 0; i < ARRAY_SIZE(pdata->overlays); i++) { |
2615 | struct sh_mobile_lcdc_overlay *ovl = &priv->overlays[i]; | |
2616 | ||
2617 | ovl->cfg = &pdata->overlays[i]; | |
2618 | ovl->channel = &priv->ch[0]; | |
2619 | ||
0707330b | 2620 | error = sh_mobile_lcdc_overlay_init(ovl); |
c5deac3c LP |
2621 | if (error) |
2622 | goto err1; | |
2623 | } | |
2624 | ||
cfb4f5d1 MD |
2625 | error = sh_mobile_lcdc_start(priv); |
2626 | if (error) { | |
2627 | dev_err(&pdev->dev, "unable to start hardware\n"); | |
2628 | goto err1; | |
2629 | } | |
2630 | ||
3ce05599 | 2631 | for (i = 0; i < num_channels; i++) { |
1c6a307a | 2632 | struct sh_mobile_lcdc_chan *ch = priv->ch + i; |
1c6a307a | 2633 | |
a67f379d LP |
2634 | error = sh_mobile_lcdc_channel_fb_register(ch); |
2635 | if (error) | |
cfb4f5d1 | 2636 | goto err1; |
cfb4f5d1 MD |
2637 | } |
2638 | ||
c5deac3c LP |
2639 | for (i = 0; i < ARRAY_SIZE(pdata->overlays); i++) { |
2640 | struct sh_mobile_lcdc_overlay *ovl = &priv->overlays[i]; | |
2641 | ||
2642 | error = sh_mobile_lcdc_overlay_fb_register(ovl); | |
2643 | if (error) | |
2644 | goto err1; | |
2645 | } | |
2646 | ||
cfb4f5d1 | 2647 | return 0; |
8bed9055 | 2648 | err1: |
cfb4f5d1 | 2649 | sh_mobile_lcdc_remove(pdev); |
8bed9055 | 2650 | |
cfb4f5d1 MD |
2651 | return error; |
2652 | } | |
2653 | ||
cfb4f5d1 MD |
2654 | static struct platform_driver sh_mobile_lcdc_driver = { |
2655 | .driver = { | |
2656 | .name = "sh_mobile_lcdc_fb", | |
2feb075a | 2657 | .pm = &sh_mobile_lcdc_dev_pm_ops, |
cfb4f5d1 MD |
2658 | }, |
2659 | .probe = sh_mobile_lcdc_probe, | |
2660 | .remove = sh_mobile_lcdc_remove, | |
2661 | }; | |
2662 | ||
4277f2c4 | 2663 | module_platform_driver(sh_mobile_lcdc_driver); |
cfb4f5d1 MD |
2664 | |
2665 | MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver"); | |
2666 | MODULE_AUTHOR("Magnus Damm <damm@opensource.se>"); | |
2667 | MODULE_LICENSE("GPL v2"); |