]>
Commit | Line | Data |
---|---|---|
74f6ae84 AD |
1 | /*-*- linux-c -*- |
2 | * linux/drivers/video/i810-i2c.c -- Intel 810/815 I2C support | |
3 | * | |
4 | * Copyright (C) 2004 Antonino Daplas<adaplas@pol.net> | |
5 | * All Rights Reserved | |
6 | * | |
7 | * This file is subject to the terms and conditions of the GNU General Public | |
8 | * License. See the file COPYING in the main directory of this archive for | |
9 | * more details. | |
10 | */ | |
74f6ae84 AD |
11 | #include <linux/module.h> |
12 | #include <linux/kernel.h> | |
13 | #include <linux/sched.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/pci.h> | |
16 | #include <linux/fb.h> | |
17 | #include "i810.h" | |
18 | #include "i810_regs.h" | |
a0aa7d06 | 19 | #include "i810_main.h" |
74f6ae84 AD |
20 | #include "../edid.h" |
21 | ||
22 | #define I810_DDC 0x50 | |
23 | /* bit locations in the registers */ | |
24 | #define SCL_DIR_MASK 0x0001 | |
25 | #define SCL_DIR 0x0002 | |
26 | #define SCL_VAL_MASK 0x0004 | |
27 | #define SCL_VAL_OUT 0x0008 | |
28 | #define SCL_VAL_IN 0x0010 | |
29 | #define SDA_DIR_MASK 0x0100 | |
30 | #define SDA_DIR 0x0200 | |
31 | #define SDA_VAL_MASK 0x0400 | |
32 | #define SDA_VAL_OUT 0x0800 | |
33 | #define SDA_VAL_IN 0x1000 | |
34 | ||
35 | #define DEBUG /* define this for verbose EDID parsing output */ | |
36 | ||
37 | #ifdef DEBUG | |
38 | #define DPRINTK(fmt, args...) printk(fmt,## args) | |
39 | #else | |
40 | #define DPRINTK(fmt, args...) | |
41 | #endif | |
42 | ||
43 | static void i810i2c_setscl(void *data, int state) | |
44 | { | |
c019c0ec | 45 | struct i810fb_i2c_chan *chan = data; |
74f6ae84 | 46 | struct i810fb_par *par = chan->par; |
be88ec74 | 47 | u8 __iomem *mmio = par->mmio_start_virtual; |
74f6ae84 | 48 | |
5fab851e | 49 | i810_writel(mmio, chan->ddc_base, (state ? SCL_VAL_OUT : 0) | SCL_DIR | |
74f6ae84 | 50 | SCL_DIR_MASK | SCL_VAL_MASK); |
5fab851e | 51 | i810_readl(mmio, chan->ddc_base); /* flush posted write */ |
74f6ae84 AD |
52 | } |
53 | ||
54 | static void i810i2c_setsda(void *data, int state) | |
55 | { | |
5fab851e | 56 | struct i810fb_i2c_chan *chan = data; |
74f6ae84 | 57 | struct i810fb_par *par = chan->par; |
be88ec74 | 58 | u8 __iomem *mmio = par->mmio_start_virtual; |
74f6ae84 | 59 | |
5fab851e | 60 | i810_writel(mmio, chan->ddc_base, (state ? SDA_VAL_OUT : 0) | SDA_DIR | |
74f6ae84 | 61 | SDA_DIR_MASK | SDA_VAL_MASK); |
5fab851e | 62 | i810_readl(mmio, chan->ddc_base); /* flush posted write */ |
74f6ae84 AD |
63 | } |
64 | ||
65 | static int i810i2c_getscl(void *data) | |
66 | { | |
5fab851e | 67 | struct i810fb_i2c_chan *chan = data; |
74f6ae84 | 68 | struct i810fb_par *par = chan->par; |
be88ec74 | 69 | u8 __iomem *mmio = par->mmio_start_virtual; |
74f6ae84 | 70 | |
5fab851e AD |
71 | i810_writel(mmio, chan->ddc_base, SCL_DIR_MASK); |
72 | i810_writel(mmio, chan->ddc_base, 0); | |
73 | return ((i810_readl(mmio, chan->ddc_base) & SCL_VAL_IN) != 0); | |
74f6ae84 AD |
74 | } |
75 | ||
76 | static int i810i2c_getsda(void *data) | |
77 | { | |
5fab851e | 78 | struct i810fb_i2c_chan *chan = data; |
74f6ae84 | 79 | struct i810fb_par *par = chan->par; |
be88ec74 | 80 | u8 __iomem *mmio = par->mmio_start_virtual; |
74f6ae84 | 81 | |
5fab851e AD |
82 | i810_writel(mmio, chan->ddc_base, SDA_DIR_MASK); |
83 | i810_writel(mmio, chan->ddc_base, 0); | |
84 | return ((i810_readl(mmio, chan->ddc_base) & SDA_VAL_IN) != 0); | |
74f6ae84 AD |
85 | } |
86 | ||
5fab851e | 87 | static int i810_setup_i2c_bus(struct i810fb_i2c_chan *chan, const char *name) |
74f6ae84 AD |
88 | { |
89 | int rc; | |
90 | ||
91 | strcpy(chan->adapter.name, name); | |
92 | chan->adapter.owner = THIS_MODULE; | |
93 | chan->adapter.algo_data = &chan->algo; | |
94 | chan->adapter.dev.parent = &chan->par->dev->dev; | |
5fab851e AD |
95 | chan->adapter.id = I2C_HW_B_I810; |
96 | chan->algo.setsda = i810i2c_setsda; | |
97 | chan->algo.setscl = i810i2c_setscl; | |
98 | chan->algo.getsda = i810i2c_getsda; | |
99 | chan->algo.getscl = i810i2c_getscl; | |
74f6ae84 | 100 | chan->algo.udelay = 10; |
74f6ae84 AD |
101 | chan->algo.timeout = (HZ/2); |
102 | chan->algo.data = chan; | |
103 | ||
104 | i2c_set_adapdata(&chan->adapter, chan); | |
105 | ||
106 | /* Raise SCL and SDA */ | |
107 | chan->algo.setsda(chan, 1); | |
108 | chan->algo.setscl(chan, 1); | |
109 | udelay(20); | |
110 | ||
111 | rc = i2c_bit_add_bus(&chan->adapter); | |
5fab851e | 112 | |
74f6ae84 AD |
113 | if (rc == 0) |
114 | dev_dbg(&chan->par->dev->dev, "I2C bus %s registered.\n",name); | |
5fab851e | 115 | else { |
74f6ae84 AD |
116 | dev_warn(&chan->par->dev->dev, "Failed to register I2C bus " |
117 | "%s.\n", name); | |
5fab851e AD |
118 | chan->par = NULL; |
119 | } | |
120 | ||
74f6ae84 AD |
121 | return rc; |
122 | } | |
123 | ||
124 | void i810_create_i2c_busses(struct i810fb_par *par) | |
125 | { | |
126 | par->chan[0].par = par; | |
127 | par->chan[1].par = par; | |
5fab851e AD |
128 | par->chan[2].par = par; |
129 | ||
130 | par->chan[0].ddc_base = GPIOA; | |
131 | i810_setup_i2c_bus(&par->chan[0], "I810-DDC"); | |
132 | par->chan[1].ddc_base = GPIOB; | |
133 | i810_setup_i2c_bus(&par->chan[1], "I810-I2C"); | |
134 | par->chan[2].ddc_base = GPIOC; | |
135 | i810_setup_i2c_bus(&par->chan[2], "I810-GPIOC"); | |
74f6ae84 AD |
136 | } |
137 | ||
138 | void i810_delete_i2c_busses(struct i810fb_par *par) | |
139 | { | |
140 | if (par->chan[0].par) | |
141 | i2c_bit_del_bus(&par->chan[0].adapter); | |
142 | par->chan[0].par = NULL; | |
5fab851e | 143 | |
74f6ae84 AD |
144 | if (par->chan[1].par) |
145 | i2c_bit_del_bus(&par->chan[1].adapter); | |
146 | par->chan[1].par = NULL; | |
5fab851e AD |
147 | |
148 | if (par->chan[2].par) | |
149 | i2c_bit_del_bus(&par->chan[2].adapter); | |
150 | par->chan[2].par = NULL; | |
74f6ae84 AD |
151 | } |
152 | ||
153 | static u8 *i810_do_probe_i2c_edid(struct i810fb_i2c_chan *chan) | |
154 | { | |
155 | u8 start = 0x0; | |
156 | struct i2c_msg msgs[] = { | |
157 | { | |
158 | .addr = I810_DDC, | |
159 | .len = 1, | |
160 | .buf = &start, | |
161 | }, { | |
162 | .addr = I810_DDC, | |
163 | .flags = I2C_M_RD, | |
164 | .len = EDID_LENGTH, | |
165 | }, | |
166 | }; | |
167 | u8 *buf; | |
168 | ||
169 | buf = kmalloc(EDID_LENGTH, GFP_KERNEL); | |
170 | if (!buf) { | |
171 | DPRINTK("i810-i2c: Failed to allocate memory\n"); | |
172 | return NULL; | |
173 | } | |
174 | msgs[1].buf = buf; | |
175 | ||
176 | if (i2c_transfer(&chan->adapter, msgs, 2) == 2) { | |
177 | DPRINTK("i810-i2c: I2C Transfer successful\n"); | |
178 | return buf; | |
179 | } | |
5fab851e | 180 | |
74f6ae84 AD |
181 | DPRINTK("i810-i2c: Unable to read EDID block.\n"); |
182 | kfree(buf); | |
183 | return NULL; | |
184 | } | |
185 | ||
186 | int i810_probe_i2c_connector(struct fb_info *info, u8 **out_edid, int conn) | |
187 | { | |
188 | struct i810fb_par *par = info->par; | |
189 | u8 *edid = NULL; | |
190 | int i; | |
191 | ||
00d340b9 ML |
192 | DPRINTK("i810-i2c: Probe DDC%i Bus\n", conn+1); |
193 | if (conn < par->ddc_num) { | |
74f6ae84 AD |
194 | for (i = 0; i < 3; i++) { |
195 | /* Do the real work */ | |
00d340b9 | 196 | edid = i810_do_probe_i2c_edid(&par->chan[conn]); |
74f6ae84 AD |
197 | if (edid) |
198 | break; | |
199 | } | |
200 | } else { | |
5fab851e AD |
201 | const u8 *e = fb_firmware_edid(info->device); |
202 | ||
203 | if (e != NULL) { | |
204 | DPRINTK("i810-i2c: Getting EDID from BIOS\n"); | |
205 | edid = kmalloc(EDID_LENGTH, GFP_KERNEL); | |
206 | if (edid) | |
207 | memcpy(edid, e, EDID_LENGTH); | |
208 | } | |
74f6ae84 AD |
209 | } |
210 | ||
7c518eb8 | 211 | *out_edid = edid; |
74f6ae84 AD |
212 | |
213 | return (edid) ? 0 : 1; | |
214 | } |