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Merge branch 'for-linus' of git://www.jni.nu/cris
[mirror_ubuntu-bionic-kernel.git] / drivers / video / imxfb.c
CommitLineData
7c2f891c 1/*
7c2f891c
SH
2 * Freescale i.MX Frame Buffer device driver
3 *
4 * Copyright (C) 2004 Sascha Hauer, Pengutronix
5 * Based on acornfb.c Copyright (C) Russell King.
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file COPYING in the main directory of this archive for
9 * more details.
10 *
11 * Please direct your questions and comments on this driver to the following
12 * email address:
13 *
14 * linux-arm-kernel@lists.arm.linux.org.uk
15 */
16
7c2f891c
SH
17#include <linux/module.h>
18#include <linux/kernel.h>
7c2f891c
SH
19#include <linux/errno.h>
20#include <linux/string.h>
21#include <linux/interrupt.h>
22#include <linux/slab.h>
27ac792c 23#include <linux/mm.h>
7c2f891c
SH
24#include <linux/fb.h>
25#include <linux/delay.h>
26#include <linux/init.h>
27#include <linux/ioport.h>
28#include <linux/cpufreq.h>
f909ef64 29#include <linux/clk.h>
d052d1be 30#include <linux/platform_device.h>
7c2f891c 31#include <linux/dma-mapping.h>
72330b0e 32#include <linux/io.h>
f909ef64 33#include <linux/math64.h>
7c2f891c 34
a09e64fb 35#include <mach/imxfb.h>
f497d015 36#include <mach/hardware.h>
7c2f891c
SH
37
38/*
39 * Complain if VAR is out of range.
40 */
41#define DEBUG_VAR 1
42
72330b0e
JB
43#define DRIVER_NAME "imx-fb"
44
45#define LCDC_SSA 0x00
46
47#define LCDC_SIZE 0x04
48#define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20)
1d0f9870
SH
49
50#ifdef CONFIG_ARCH_MX1
72330b0e 51#define SIZE_YMAX(y) ((y) & 0x1ff)
1d0f9870
SH
52#else
53#define SIZE_YMAX(y) ((y) & 0x3ff)
54#endif
72330b0e
JB
55
56#define LCDC_VPW 0x08
57#define VPW_VPW(x) ((x) & 0x3ff)
58
59#define LCDC_CPOS 0x0C
60#define CPOS_CC1 (1<<31)
61#define CPOS_CC0 (1<<30)
62#define CPOS_OP (1<<28)
63#define CPOS_CXP(x) (((x) & 3ff) << 16)
1d0f9870
SH
64
65#ifdef CONFIG_ARCH_MX1
72330b0e 66#define CPOS_CYP(y) ((y) & 0x1ff)
1d0f9870
SH
67#else
68#define CPOS_CYP(y) ((y) & 0x3ff)
69#endif
72330b0e
JB
70
71#define LCDC_LCWHB 0x10
72#define LCWHB_BK_EN (1<<31)
73#define LCWHB_CW(w) (((w) & 0x1f) << 24)
74#define LCWHB_CH(h) (((h) & 0x1f) << 16)
75#define LCWHB_BD(x) ((x) & 0xff)
76
77#define LCDC_LCHCC 0x14
1d0f9870
SH
78
79#ifdef CONFIG_ARCH_MX1
72330b0e
JB
80#define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11)
81#define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5)
82#define LCHCC_CUR_COL_B(b) ((b) & 0x1f)
1d0f9870
SH
83#else
84#define LCHCC_CUR_COL_R(r) (((r) & 0x3f) << 12)
85#define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 6)
86#define LCHCC_CUR_COL_B(b) ((b) & 0x3f)
87#endif
72330b0e
JB
88
89#define LCDC_PCR 0x18
90
91#define LCDC_HCR 0x1C
92#define HCR_H_WIDTH(x) (((x) & 0x3f) << 26)
93#define HCR_H_WAIT_1(x) (((x) & 0xff) << 8)
94#define HCR_H_WAIT_2(x) ((x) & 0xff)
95
96#define LCDC_VCR 0x20
97#define VCR_V_WIDTH(x) (((x) & 0x3f) << 26)
98#define VCR_V_WAIT_1(x) (((x) & 0xff) << 8)
99#define VCR_V_WAIT_2(x) ((x) & 0xff)
100
101#define LCDC_POS 0x24
102#define POS_POS(x) ((x) & 1f)
103
104#define LCDC_LSCR1 0x28
105/* bit fields in imxfb.h */
106
107#define LCDC_PWMR 0x2C
108/* bit fields in imxfb.h */
109
110#define LCDC_DMACR 0x30
111/* bit fields in imxfb.h */
112
113#define LCDC_RMCR 0x34
1d0f9870
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114
115#ifdef CONFIG_ARCH_MX1
72330b0e 116#define RMCR_LCDC_EN (1<<1)
1d0f9870
SH
117#else
118#define RMCR_LCDC_EN 0
119#endif
120
72330b0e
JB
121#define RMCR_SELF_REF (1<<0)
122
123#define LCDC_LCDICR 0x38
124#define LCDICR_INT_SYN (1<<2)
125#define LCDICR_INT_CON (1)
126
127#define LCDC_LCDISR 0x40
128#define LCDISR_UDR_ERR (1<<3)
129#define LCDISR_ERR_RES (1<<2)
130#define LCDISR_EOF (1<<1)
131#define LCDISR_BOF (1<<0)
132
343684ff
SH
133/* Used fb-mode. Can be set on kernel command line, therefore file-static. */
134static const char *fb_mode;
135
136
24b9baf7
SH
137/*
138 * These are the bitfields for each
139 * display depth that we support.
140 */
141struct imxfb_rgb {
142 struct fb_bitfield red;
143 struct fb_bitfield green;
144 struct fb_bitfield blue;
145 struct fb_bitfield transp;
146};
147
24b9baf7
SH
148struct imxfb_info {
149 struct platform_device *pdev;
150 void __iomem *regs;
f909ef64 151 struct clk *clk;
24b9baf7 152
24b9baf7
SH
153 /*
154 * These are the addresses we mapped
155 * the framebuffer memory region to.
156 */
157 dma_addr_t map_dma;
158 u_char *map_cpu;
159 u_int map_size;
160
161 u_char *screen_cpu;
162 dma_addr_t screen_dma;
163 u_int palette_size;
164
165 dma_addr_t dbar1;
166 dma_addr_t dbar2;
167
168 u_int pcr;
169 u_int pwmr;
170 u_int lscr1;
171 u_int dmacr;
172 u_int cmap_inverse:1,
173 cmap_static:1,
174 unused:30;
175
343684ff
SH
176 struct imx_fb_videomode *mode;
177 int num_modes;
7a2bb23c 178 struct backlight_device *bl;
343684ff 179
24b9baf7
SH
180 void (*lcd_power)(int);
181 void (*backlight_power)(int);
182};
183
184#define IMX_NAME "IMX"
185
186/*
187 * Minimum X and Y resolutions
188 */
189#define MIN_XRES 64
190#define MIN_YRES 64
191
1512222b
SH
192/* Actually this really is 18bit support, the lowest 2 bits of each colour
193 * are unused in hardware. We claim to have 24bit support to make software
194 * like X work, which does not support 18bit.
195 */
196static struct imxfb_rgb def_rgb_18 = {
197 .red = {.offset = 16, .length = 8,},
198 .green = {.offset = 8, .length = 8,},
199 .blue = {.offset = 0, .length = 8,},
200 .transp = {.offset = 0, .length = 0,},
201};
202
80eee6bc
SH
203static struct imxfb_rgb def_rgb_16_tft = {
204 .red = {.offset = 11, .length = 5,},
205 .green = {.offset = 5, .length = 6,},
206 .blue = {.offset = 0, .length = 5,},
207 .transp = {.offset = 0, .length = 0,},
208};
209
210static struct imxfb_rgb def_rgb_16_stn = {
66c8719b
SH
211 .red = {.offset = 8, .length = 4,},
212 .green = {.offset = 4, .length = 4,},
213 .blue = {.offset = 0, .length = 4,},
214 .transp = {.offset = 0, .length = 0,},
7c2f891c
SH
215};
216
217static struct imxfb_rgb def_rgb_8 = {
66c8719b
SH
218 .red = {.offset = 0, .length = 8,},
219 .green = {.offset = 0, .length = 8,},
220 .blue = {.offset = 0, .length = 8,},
221 .transp = {.offset = 0, .length = 0,},
7c2f891c
SH
222};
223
66c8719b
SH
224static int imxfb_activate_var(struct fb_var_screeninfo *var,
225 struct fb_info *info);
7c2f891c
SH
226
227static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
228{
229 chan &= 0xffff;
230 chan >>= 16 - bf->length;
231 return chan << bf->offset;
232}
233
66c8719b
SH
234static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
235 u_int trans, struct fb_info *info)
7c2f891c
SH
236{
237 struct imxfb_info *fbi = info->par;
238 u_int val, ret = 1;
239
240#define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16)
241 if (regno < fbi->palette_size) {
242 val = (CNVT_TOHW(red, 4) << 8) |
243 (CNVT_TOHW(green,4) << 4) |
244 CNVT_TOHW(blue, 4);
245
72330b0e 246 writel(val, fbi->regs + 0x800 + (regno << 2));
7c2f891c
SH
247 ret = 0;
248 }
249 return ret;
250}
251
66c8719b 252static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
7c2f891c
SH
253 u_int trans, struct fb_info *info)
254{
255 struct imxfb_info *fbi = info->par;
256 unsigned int val;
257 int ret = 1;
258
259 /*
260 * If inverse mode was selected, invert all the colours
261 * rather than the register number. The register number
262 * is what you poke into the framebuffer to produce the
263 * colour you requested.
264 */
265 if (fbi->cmap_inverse) {
266 red = 0xffff - red;
267 green = 0xffff - green;
268 blue = 0xffff - blue;
269 }
270
271 /*
272 * If greyscale is true, then we convert the RGB value
273 * to greyscale no mater what visual we are using.
274 */
275 if (info->var.grayscale)
276 red = green = blue = (19595 * red + 38470 * green +
277 7471 * blue) >> 16;
278
279 switch (info->fix.visual) {
280 case FB_VISUAL_TRUECOLOR:
281 /*
282 * 12 or 16-bit True Colour. We encode the RGB value
283 * according to the RGB bitfield information.
284 */
285 if (regno < 16) {
286 u32 *pal = info->pseudo_palette;
287
288 val = chan_to_field(red, &info->var.red);
289 val |= chan_to_field(green, &info->var.green);
290 val |= chan_to_field(blue, &info->var.blue);
291
292 pal[regno] = val;
293 ret = 0;
294 }
295 break;
296
297 case FB_VISUAL_STATIC_PSEUDOCOLOR:
298 case FB_VISUAL_PSEUDOCOLOR:
299 ret = imxfb_setpalettereg(regno, red, green, blue, trans, info);
300 break;
301 }
302
303 return ret;
304}
305
343684ff
SH
306static const struct imx_fb_videomode *imxfb_find_mode(struct imxfb_info *fbi)
307{
308 struct imx_fb_videomode *m;
309 int i;
310
311 for (i = 0, m = &fbi->mode[0]; i < fbi->num_modes; i++, m++) {
312 if (!strcmp(m->mode.name, fb_mode))
313 return m;
314 }
315 return NULL;
316}
317
7c2f891c
SH
318/*
319 * imxfb_check_var():
320 * Round up in the following order: bits_per_pixel, xres,
321 * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale,
322 * bitfields, horizontal timing, vertical timing.
323 */
66c8719b 324static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
7c2f891c
SH
325{
326 struct imxfb_info *fbi = info->par;
80eee6bc 327 struct imxfb_rgb *rgb;
343684ff
SH
328 const struct imx_fb_videomode *imxfb_mode;
329 unsigned long lcd_clk;
330 unsigned long long tmp;
331 u32 pcr = 0;
7c2f891c
SH
332
333 if (var->xres < MIN_XRES)
334 var->xres = MIN_XRES;
335 if (var->yres < MIN_YRES)
336 var->yres = MIN_YRES;
343684ff
SH
337
338 imxfb_mode = imxfb_find_mode(fbi);
339 if (!imxfb_mode)
340 return -EINVAL;
341
342 var->xres = imxfb_mode->mode.xres;
343 var->yres = imxfb_mode->mode.yres;
344 var->bits_per_pixel = imxfb_mode->bpp;
345 var->pixclock = imxfb_mode->mode.pixclock;
346 var->hsync_len = imxfb_mode->mode.hsync_len;
347 var->left_margin = imxfb_mode->mode.left_margin;
348 var->right_margin = imxfb_mode->mode.right_margin;
349 var->vsync_len = imxfb_mode->mode.vsync_len;
350 var->upper_margin = imxfb_mode->mode.upper_margin;
351 var->lower_margin = imxfb_mode->mode.lower_margin;
352 var->sync = imxfb_mode->mode.sync;
353 var->xres_virtual = max(var->xres_virtual, var->xres);
354 var->yres_virtual = max(var->yres_virtual, var->yres);
7c2f891c
SH
355
356 pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel);
343684ff
SH
357
358 lcd_clk = clk_get_rate(fbi->clk);
359
360 tmp = var->pixclock * (unsigned long long)lcd_clk;
361
362 do_div(tmp, 1000000);
363
364 if (do_div(tmp, 1000000) > 500000)
365 tmp++;
366
367 pcr = (unsigned int)tmp;
368
369 if (--pcr > 0x3F) {
370 pcr = 0x3F;
371 printk(KERN_WARNING "Must limit pixel clock to %luHz\n",
372 lcd_clk / pcr);
373 }
374
7c2f891c 375 switch (var->bits_per_pixel) {
1512222b 376 case 32:
343684ff 377 pcr |= PCR_BPIX_18;
1512222b
SH
378 rgb = &def_rgb_18;
379 break;
7c2f891c 380 case 16:
80eee6bc 381 default:
343684ff
SH
382 if (cpu_is_mx1())
383 pcr |= PCR_BPIX_12;
384 else
385 pcr |= PCR_BPIX_16;
386
387 if (imxfb_mode->pcr & PCR_TFT)
80eee6bc
SH
388 rgb = &def_rgb_16_tft;
389 else
390 rgb = &def_rgb_16_stn;
7c2f891c
SH
391 break;
392 case 8:
343684ff 393 pcr |= PCR_BPIX_8;
80eee6bc 394 rgb = &def_rgb_8;
7c2f891c 395 break;
7c2f891c
SH
396 }
397
343684ff
SH
398 /* add sync polarities */
399 pcr |= imxfb_mode->pcr & ~(0x3f | (7 << 25));
400
401 fbi->pcr = pcr;
402
7c2f891c
SH
403 /*
404 * Copy the RGB parameters for this display
405 * from the machine specific parameters.
406 */
80eee6bc
SH
407 var->red = rgb->red;
408 var->green = rgb->green;
409 var->blue = rgb->blue;
410 var->transp = rgb->transp;
7c2f891c
SH
411
412 pr_debug("RGBT length = %d:%d:%d:%d\n",
413 var->red.length, var->green.length, var->blue.length,
414 var->transp.length);
415
416 pr_debug("RGBT offset = %d:%d:%d:%d\n",
417 var->red.offset, var->green.offset, var->blue.offset,
418 var->transp.offset);
419
420 return 0;
421}
422
423/*
424 * imxfb_set_par():
425 * Set the user defined part of the display for the specified console
426 */
427static int imxfb_set_par(struct fb_info *info)
428{
429 struct imxfb_info *fbi = info->par;
430 struct fb_var_screeninfo *var = &info->var;
431
1512222b 432 if (var->bits_per_pixel == 16 || var->bits_per_pixel == 32)
7c2f891c
SH
433 info->fix.visual = FB_VISUAL_TRUECOLOR;
434 else if (!fbi->cmap_static)
435 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
436 else {
437 /*
438 * Some people have weird ideas about wanting static
439 * pseudocolor maps. I suspect their user space
440 * applications are broken.
441 */
442 info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
443 }
444
66c8719b 445 info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
7c2f891c
SH
446 fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16;
447
448 imxfb_activate_var(var, info);
449
450 return 0;
451}
452
7a2bb23c
EB
453
454
455static int imxfb_bl_get_brightness(struct backlight_device *bl)
456{
457 struct imxfb_info *fbi = bl_get_data(bl);
458
459 return readl(fbi->regs + LCDC_PWMR) & 0xFF;
460}
461
462static int imxfb_bl_update_status(struct backlight_device *bl)
463{
464 struct imxfb_info *fbi = bl_get_data(bl);
465 int brightness = bl->props.brightness;
466
467 if (bl->props.power != FB_BLANK_UNBLANK)
468 brightness = 0;
469 if (bl->props.fb_blank != FB_BLANK_UNBLANK)
470 brightness = 0;
471
472 fbi->pwmr = (fbi->pwmr & ~0xFF) | brightness;
473
474 if (bl->props.fb_blank != FB_BLANK_UNBLANK)
475 clk_enable(fbi->clk);
476 writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
477 if (bl->props.fb_blank != FB_BLANK_UNBLANK)
478 clk_disable(fbi->clk);
479
480 return 0;
481}
482
483static const struct backlight_ops imxfb_lcdc_bl_ops = {
484 .update_status = imxfb_bl_update_status,
485 .get_brightness = imxfb_bl_get_brightness,
486};
487
488static void imxfb_init_backlight(struct imxfb_info *fbi)
489{
490 struct backlight_properties props;
491 struct backlight_device *bl;
492
493 if (fbi->bl)
494 return;
495
496 memset(&props, 0, sizeof(struct backlight_properties));
497 props.max_brightness = 0xff;
498 writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
499
500 bl = backlight_device_register("imxfb-bl", &fbi->pdev->dev, fbi,
501 &imxfb_lcdc_bl_ops, &props);
502 if (IS_ERR(bl)) {
503 dev_err(&fbi->pdev->dev, "error %ld on backlight register\n",
504 PTR_ERR(bl));
505 return;
506 }
507
508 fbi->bl = bl;
509 bl->props.power = FB_BLANK_UNBLANK;
510 bl->props.fb_blank = FB_BLANK_UNBLANK;
511 bl->props.brightness = imxfb_bl_get_brightness(bl);
512}
513
514static void imxfb_exit_backlight(struct imxfb_info *fbi)
515{
516 if (fbi->bl)
517 backlight_device_unregister(fbi->bl);
518}
519
7c2f891c
SH
520static void imxfb_enable_controller(struct imxfb_info *fbi)
521{
522 pr_debug("Enabling LCD controller\n");
523
72330b0e 524 writel(fbi->screen_dma, fbi->regs + LCDC_SSA);
7c2f891c 525
72330b0e
JB
526 /* panning offset 0 (0 pixel offset) */
527 writel(0x00000000, fbi->regs + LCDC_POS);
7c2f891c
SH
528
529 /* disable hardware cursor */
72330b0e
JB
530 writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1),
531 fbi->regs + LCDC_CPOS);
7c2f891c 532
72330b0e 533 writel(RMCR_LCDC_EN, fbi->regs + LCDC_RMCR);
7c2f891c 534
f909ef64
SH
535 clk_enable(fbi->clk);
536
66c8719b 537 if (fbi->backlight_power)
7c2f891c 538 fbi->backlight_power(1);
66c8719b 539 if (fbi->lcd_power)
7c2f891c
SH
540 fbi->lcd_power(1);
541}
542
543static void imxfb_disable_controller(struct imxfb_info *fbi)
544{
545 pr_debug("Disabling LCD controller\n");
546
66c8719b 547 if (fbi->backlight_power)
7c2f891c 548 fbi->backlight_power(0);
66c8719b 549 if (fbi->lcd_power)
7c2f891c
SH
550 fbi->lcd_power(0);
551
f909ef64
SH
552 clk_disable(fbi->clk);
553
72330b0e 554 writel(0, fbi->regs + LCDC_RMCR);
7c2f891c
SH
555}
556
557static int imxfb_blank(int blank, struct fb_info *info)
558{
559 struct imxfb_info *fbi = info->par;
560
561 pr_debug("imxfb_blank: blank=%d\n", blank);
562
563 switch (blank) {
564 case FB_BLANK_POWERDOWN:
565 case FB_BLANK_VSYNC_SUSPEND:
566 case FB_BLANK_HSYNC_SUSPEND:
567 case FB_BLANK_NORMAL:
568 imxfb_disable_controller(fbi);
569 break;
570
571 case FB_BLANK_UNBLANK:
572 imxfb_enable_controller(fbi);
573 break;
574 }
575 return 0;
576}
577
578static struct fb_ops imxfb_ops = {
579 .owner = THIS_MODULE,
580 .fb_check_var = imxfb_check_var,
581 .fb_set_par = imxfb_set_par,
582 .fb_setcolreg = imxfb_setcolreg,
583 .fb_fillrect = cfb_fillrect,
584 .fb_copyarea = cfb_copyarea,
585 .fb_imageblit = cfb_imageblit,
586 .fb_blank = imxfb_blank,
7c2f891c
SH
587};
588
589/*
590 * imxfb_activate_var():
591 * Configures LCD Controller based on entries in var parameter. Settings are
592 * only written to the controller if changes were made.
593 */
594static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info)
595{
596 struct imxfb_info *fbi = info->par;
f909ef64 597
7c2f891c
SH
598 pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n",
599 var->xres, var->hsync_len,
600 var->left_margin, var->right_margin);
601 pr_debug("var: yres=%d vslen=%d um=%d bm=%d\n",
602 var->yres, var->vsync_len,
603 var->upper_margin, var->lower_margin);
604
605#if DEBUG_VAR
606 if (var->xres < 16 || var->xres > 1024)
607 printk(KERN_ERR "%s: invalid xres %d\n",
608 info->fix.id, var->xres);
609 if (var->hsync_len < 1 || var->hsync_len > 64)
610 printk(KERN_ERR "%s: invalid hsync_len %d\n",
611 info->fix.id, var->hsync_len);
612 if (var->left_margin > 255)
613 printk(KERN_ERR "%s: invalid left_margin %d\n",
614 info->fix.id, var->left_margin);
615 if (var->right_margin > 255)
616 printk(KERN_ERR "%s: invalid right_margin %d\n",
617 info->fix.id, var->right_margin);
618 if (var->yres < 1 || var->yres > 511)
619 printk(KERN_ERR "%s: invalid yres %d\n",
620 info->fix.id, var->yres);
621 if (var->vsync_len > 100)
622 printk(KERN_ERR "%s: invalid vsync_len %d\n",
623 info->fix.id, var->vsync_len);
624 if (var->upper_margin > 63)
625 printk(KERN_ERR "%s: invalid upper_margin %d\n",
626 info->fix.id, var->upper_margin);
627 if (var->lower_margin > 255)
628 printk(KERN_ERR "%s: invalid lower_margin %d\n",
629 info->fix.id, var->lower_margin);
630#endif
631
343684ff
SH
632 /* physical screen start address */
633 writel(VPW_VPW(var->xres * var->bits_per_pixel / 8 / 4),
634 fbi->regs + LCDC_VPW);
635
7e8549bc
SH
636 writel(HCR_H_WIDTH(var->hsync_len - 1) |
637 HCR_H_WAIT_1(var->right_margin - 1) |
638 HCR_H_WAIT_2(var->left_margin - 3),
72330b0e 639 fbi->regs + LCDC_HCR);
7c2f891c 640
72330b0e 641 writel(VCR_V_WIDTH(var->vsync_len) |
d6ed5755
SH
642 VCR_V_WAIT_1(var->lower_margin) |
643 VCR_V_WAIT_2(var->upper_margin),
72330b0e 644 fbi->regs + LCDC_VCR);
7c2f891c 645
72330b0e
JB
646 writel(SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres),
647 fbi->regs + LCDC_SIZE);
f909ef64 648
343684ff 649 writel(fbi->pcr, fbi->regs + LCDC_PCR);
72330b0e
JB
650 writel(fbi->lscr1, fbi->regs + LCDC_LSCR1);
651 writel(fbi->dmacr, fbi->regs + LCDC_DMACR);
7c2f891c
SH
652
653 return 0;
654}
655
7c2f891c
SH
656#ifdef CONFIG_PM
657/*
658 * Power management hooks. Note that we won't be called from IRQ context,
659 * unlike the blank functions above, so we may sleep.
660 */
3ae5eaec 661static int imxfb_suspend(struct platform_device *dev, pm_message_t state)
7c2f891c 662{
1ec56203
UKK
663 struct fb_info *info = platform_get_drvdata(dev);
664 struct imxfb_info *fbi = info->par;
66c8719b
SH
665
666 pr_debug("%s\n", __func__);
7c2f891c 667
9480e307 668 imxfb_disable_controller(fbi);
7c2f891c
SH
669 return 0;
670}
671
3ae5eaec 672static int imxfb_resume(struct platform_device *dev)
7c2f891c 673{
1ec56203
UKK
674 struct fb_info *info = platform_get_drvdata(dev);
675 struct imxfb_info *fbi = info->par;
66c8719b
SH
676
677 pr_debug("%s\n", __func__);
7c2f891c 678
9480e307 679 imxfb_enable_controller(fbi);
7c2f891c
SH
680 return 0;
681}
682#else
683#define imxfb_suspend NULL
684#define imxfb_resume NULL
685#endif
686
72330b0e 687static int __init imxfb_init_fbinfo(struct platform_device *pdev)
7c2f891c 688{
27889273 689 struct imx_fb_platform_data *pdata = pdev->dev.platform_data;
72330b0e 690 struct fb_info *info = dev_get_drvdata(&pdev->dev);
7c2f891c 691 struct imxfb_info *fbi = info->par;
343684ff
SH
692 struct imx_fb_videomode *m;
693 int i;
7c2f891c 694
5ae12170 695 pr_debug("%s\n",__func__);
7c2f891c 696
66c8719b 697 info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL);
7c2f891c
SH
698 if (!info->pseudo_palette)
699 return -ENOMEM;
700
701 memset(fbi, 0, sizeof(struct imxfb_info));
7c2f891c
SH
702
703 strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id));
704
66c8719b 705 info->fix.type = FB_TYPE_PACKED_PIXELS;
7c2f891c
SH
706 info->fix.type_aux = 0;
707 info->fix.xpanstep = 0;
708 info->fix.ypanstep = 0;
709 info->fix.ywrapstep = 0;
66c8719b 710 info->fix.accel = FB_ACCEL_NONE;
7c2f891c
SH
711
712 info->var.nonstd = 0;
713 info->var.activate = FB_ACTIVATE_NOW;
714 info->var.height = -1;
715 info->var.width = -1;
716 info->var.accel_flags = 0;
66c8719b 717 info->var.vmode = FB_VMODE_NONINTERLACED;
7c2f891c
SH
718
719 info->fbops = &imxfb_ops;
66c8719b
SH
720 info->flags = FBINFO_FLAG_DEFAULT |
721 FBINFO_READS_FAST;
27889273
SH
722 info->var.grayscale = pdata->cmap_greyscale;
723 fbi->cmap_inverse = pdata->cmap_inverse;
724 fbi->cmap_static = pdata->cmap_static;
27889273
SH
725 fbi->lscr1 = pdata->lscr1;
726 fbi->dmacr = pdata->dmacr;
727 fbi->pwmr = pdata->pwmr;
728 fbi->lcd_power = pdata->lcd_power;
729 fbi->backlight_power = pdata->backlight_power;
343684ff
SH
730
731 for (i = 0, m = &pdata->mode[0]; i < pdata->num_modes; i++, m++)
732 info->fix.smem_len = max_t(size_t, info->fix.smem_len,
733 m->mode.xres * m->mode.yres * m->bpp / 8);
7c2f891c
SH
734
735 return 0;
736}
737
3ae5eaec 738static int __init imxfb_probe(struct platform_device *pdev)
7c2f891c 739{
7c2f891c
SH
740 struct imxfb_info *fbi;
741 struct fb_info *info;
27889273 742 struct imx_fb_platform_data *pdata;
7c2f891c 743 struct resource *res;
343684ff 744 int ret, i;
7c2f891c 745
d6b51502 746 dev_info(&pdev->dev, "i.MX Framebuffer driver\n");
7c2f891c
SH
747
748 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
66c8719b 749 if (!res)
7c2f891c
SH
750 return -ENODEV;
751
27889273
SH
752 pdata = pdev->dev.platform_data;
753 if (!pdata) {
f99c8929 754 dev_err(&pdev->dev,"No platform_data available\n");
7c2f891c
SH
755 return -ENOMEM;
756 }
757
3ae5eaec 758 info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev);
66c8719b 759 if (!info)
7c2f891c
SH
760 return -ENOMEM;
761
762 fbi = info->par;
763
343684ff
SH
764 if (!fb_mode)
765 fb_mode = pdata->mode[0].mode.name;
766
3ae5eaec 767 platform_set_drvdata(pdev, info);
7c2f891c 768
72330b0e 769 ret = imxfb_init_fbinfo(pdev);
66c8719b 770 if (ret < 0)
7c2f891c
SH
771 goto failed_init;
772
72330b0e
JB
773 res = request_mem_region(res->start, resource_size(res),
774 DRIVER_NAME);
7c2f891c
SH
775 if (!res) {
776 ret = -EBUSY;
72330b0e
JB
777 goto failed_req;
778 }
779
f909ef64
SH
780 fbi->clk = clk_get(&pdev->dev, NULL);
781 if (IS_ERR(fbi->clk)) {
a419aef8 782 ret = PTR_ERR(fbi->clk);
f909ef64
SH
783 dev_err(&pdev->dev, "unable to get clock: %d\n", ret);
784 goto failed_getclock;
785 }
786
72330b0e
JB
787 fbi->regs = ioremap(res->start, resource_size(res));
788 if (fbi->regs == NULL) {
d6b51502 789 dev_err(&pdev->dev, "Cannot map frame buffer registers\n");
72330b0e 790 goto failed_ioremap;
7c2f891c
SH
791 }
792
27889273 793 if (!pdata->fixed_screen_cpu) {
72330b0e
JB
794 fbi->map_size = PAGE_ALIGN(info->fix.smem_len);
795 fbi->map_cpu = dma_alloc_writecombine(&pdev->dev,
796 fbi->map_size, &fbi->map_dma, GFP_KERNEL);
797
798 if (!fbi->map_cpu) {
f99c8929 799 dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret);
7c2f891c
SH
800 ret = -ENOMEM;
801 goto failed_map;
802 }
72330b0e
JB
803
804 info->screen_base = fbi->map_cpu;
805 fbi->screen_cpu = fbi->map_cpu;
806 fbi->screen_dma = fbi->map_dma;
807 info->fix.smem_start = fbi->screen_dma;
7c2f891c
SH
808 } else {
809 /* Fixed framebuffer mapping enables location of the screen in eSRAM */
27889273
SH
810 fbi->map_cpu = pdata->fixed_screen_cpu;
811 fbi->map_dma = pdata->fixed_screen_dma;
7c2f891c
SH
812 info->screen_base = fbi->map_cpu;
813 fbi->screen_cpu = fbi->map_cpu;
814 fbi->screen_dma = fbi->map_dma;
815 info->fix.smem_start = fbi->screen_dma;
816 }
817
c0b90a31
SH
818 if (pdata->init) {
819 ret = pdata->init(fbi->pdev);
820 if (ret)
821 goto failed_platform_init;
822 }
823
343684ff
SH
824 fbi->mode = pdata->mode;
825 fbi->num_modes = pdata->num_modes;
826
827 INIT_LIST_HEAD(&info->modelist);
828 for (i = 0; i < pdata->num_modes; i++)
829 fb_add_videomode(&pdata->mode[i].mode, &info->modelist);
830
7c2f891c
SH
831 /*
832 * This makes sure that our colour bitfield
833 * descriptors are correctly initialised.
834 */
835 imxfb_check_var(&info->var, info);
836
66c8719b 837 ret = fb_alloc_cmap(&info->cmap, 1 << info->var.bits_per_pixel, 0);
7c2f891c
SH
838 if (ret < 0)
839 goto failed_cmap;
840
7c2f891c
SH
841 imxfb_set_par(info);
842 ret = register_framebuffer(info);
843 if (ret < 0) {
f99c8929 844 dev_err(&pdev->dev, "failed to register framebuffer\n");
7c2f891c
SH
845 goto failed_register;
846 }
847
848 imxfb_enable_controller(fbi);
7a2bb23c
EB
849 fbi->pdev = pdev;
850 imxfb_init_backlight(fbi);
7c2f891c
SH
851
852 return 0;
853
854failed_register:
855 fb_dealloc_cmap(&info->cmap);
856failed_cmap:
c0b90a31
SH
857 if (pdata->exit)
858 pdata->exit(fbi->pdev);
859failed_platform_init:
27889273 860 if (!pdata->fixed_screen_cpu)
3ae5eaec 861 dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu,
72330b0e 862 fbi->map_dma);
7c2f891c 863failed_map:
f909ef64
SH
864 clk_put(fbi->clk);
865failed_getclock:
72330b0e
JB
866 iounmap(fbi->regs);
867failed_ioremap:
d6b51502 868 release_mem_region(res->start, resource_size(res));
72330b0e
JB
869failed_req:
870 kfree(info->pseudo_palette);
7c2f891c 871failed_init:
3ae5eaec 872 platform_set_drvdata(pdev, NULL);
7c2f891c
SH
873 framebuffer_release(info);
874 return ret;
875}
876
72330b0e 877static int __devexit imxfb_remove(struct platform_device *pdev)
7c2f891c 878{
c0b90a31 879 struct imx_fb_platform_data *pdata;
3ae5eaec 880 struct fb_info *info = platform_get_drvdata(pdev);
772a9e63 881 struct imxfb_info *fbi = info->par;
7c2f891c
SH
882 struct resource *res;
883
884 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
885
772a9e63 886 imxfb_disable_controller(fbi);
7c2f891c 887
7a2bb23c 888 imxfb_exit_backlight(fbi);
7c2f891c
SH
889 unregister_framebuffer(info);
890
c0b90a31
SH
891 pdata = pdev->dev.platform_data;
892 if (pdata->exit)
893 pdata->exit(fbi->pdev);
894
7c2f891c
SH
895 fb_dealloc_cmap(&info->cmap);
896 kfree(info->pseudo_palette);
897 framebuffer_release(info);
898
72330b0e 899 iounmap(fbi->regs);
d6b51502 900 release_mem_region(res->start, resource_size(res));
f909ef64
SH
901 clk_disable(fbi->clk);
902 clk_put(fbi->clk);
903
3ae5eaec 904 platform_set_drvdata(pdev, NULL);
7c2f891c
SH
905
906 return 0;
907}
908
3ae5eaec 909void imxfb_shutdown(struct platform_device * dev)
7c2f891c 910{
3ae5eaec 911 struct fb_info *info = platform_get_drvdata(dev);
772a9e63
SH
912 struct imxfb_info *fbi = info->par;
913 imxfb_disable_controller(fbi);
7c2f891c
SH
914}
915
3ae5eaec 916static struct platform_driver imxfb_driver = {
7c2f891c
SH
917 .suspend = imxfb_suspend,
918 .resume = imxfb_resume,
72330b0e 919 .remove = __devexit_p(imxfb_remove),
7c2f891c 920 .shutdown = imxfb_shutdown,
3ae5eaec 921 .driver = {
72330b0e 922 .name = DRIVER_NAME,
3ae5eaec 923 },
7c2f891c
SH
924};
925
343684ff
SH
926static int imxfb_setup(void)
927{
928#ifndef MODULE
929 char *opt, *options = NULL;
930
931 if (fb_get_options("imxfb", &options))
932 return -ENODEV;
933
934 if (!options || !*options)
935 return 0;
936
937 while ((opt = strsep(&options, ",")) != NULL) {
938 if (!*opt)
939 continue;
940 else
941 fb_mode = opt;
942 }
943#endif
944 return 0;
945}
946
7c2f891c
SH
947int __init imxfb_init(void)
948{
343684ff
SH
949 int ret = imxfb_setup();
950
951 if (ret < 0)
952 return ret;
953
72330b0e 954 return platform_driver_probe(&imxfb_driver, imxfb_probe);
7c2f891c
SH
955}
956
957static void __exit imxfb_cleanup(void)
958{
3ae5eaec 959 platform_driver_unregister(&imxfb_driver);
7c2f891c
SH
960}
961
962module_init(imxfb_init);
963module_exit(imxfb_cleanup);
964
965MODULE_DESCRIPTION("Motorola i.MX framebuffer driver");
966MODULE_AUTHOR("Sascha Hauer, Pengutronix");
967MODULE_LICENSE("GPL");