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Commit | Line | Data |
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7c2f891c | 1 | /* |
7c2f891c SH |
2 | * Freescale i.MX Frame Buffer device driver |
3 | * | |
4 | * Copyright (C) 2004 Sascha Hauer, Pengutronix | |
5 | * Based on acornfb.c Copyright (C) Russell King. | |
6 | * | |
7 | * This file is subject to the terms and conditions of the GNU General Public | |
8 | * License. See the file COPYING in the main directory of this archive for | |
9 | * more details. | |
10 | * | |
11 | * Please direct your questions and comments on this driver to the following | |
12 | * email address: | |
13 | * | |
14 | * linux-arm-kernel@lists.arm.linux.org.uk | |
15 | */ | |
16 | ||
7c2f891c SH |
17 | #include <linux/module.h> |
18 | #include <linux/kernel.h> | |
7c2f891c SH |
19 | #include <linux/errno.h> |
20 | #include <linux/string.h> | |
21 | #include <linux/interrupt.h> | |
22 | #include <linux/slab.h> | |
27ac792c | 23 | #include <linux/mm.h> |
7c2f891c SH |
24 | #include <linux/fb.h> |
25 | #include <linux/delay.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/ioport.h> | |
28 | #include <linux/cpufreq.h> | |
f909ef64 | 29 | #include <linux/clk.h> |
d052d1be | 30 | #include <linux/platform_device.h> |
7c2f891c | 31 | #include <linux/dma-mapping.h> |
72330b0e | 32 | #include <linux/io.h> |
f909ef64 | 33 | #include <linux/math64.h> |
7c2f891c | 34 | |
a09e64fb | 35 | #include <mach/imxfb.h> |
f497d015 | 36 | #include <mach/hardware.h> |
7c2f891c SH |
37 | |
38 | /* | |
39 | * Complain if VAR is out of range. | |
40 | */ | |
41 | #define DEBUG_VAR 1 | |
42 | ||
72330b0e JB |
43 | #define DRIVER_NAME "imx-fb" |
44 | ||
45 | #define LCDC_SSA 0x00 | |
46 | ||
47 | #define LCDC_SIZE 0x04 | |
48 | #define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20) | |
1d0f9870 SH |
49 | |
50 | #ifdef CONFIG_ARCH_MX1 | |
72330b0e | 51 | #define SIZE_YMAX(y) ((y) & 0x1ff) |
1d0f9870 SH |
52 | #else |
53 | #define SIZE_YMAX(y) ((y) & 0x3ff) | |
54 | #endif | |
72330b0e JB |
55 | |
56 | #define LCDC_VPW 0x08 | |
57 | #define VPW_VPW(x) ((x) & 0x3ff) | |
58 | ||
59 | #define LCDC_CPOS 0x0C | |
60 | #define CPOS_CC1 (1<<31) | |
61 | #define CPOS_CC0 (1<<30) | |
62 | #define CPOS_OP (1<<28) | |
63 | #define CPOS_CXP(x) (((x) & 3ff) << 16) | |
1d0f9870 SH |
64 | |
65 | #ifdef CONFIG_ARCH_MX1 | |
72330b0e | 66 | #define CPOS_CYP(y) ((y) & 0x1ff) |
1d0f9870 SH |
67 | #else |
68 | #define CPOS_CYP(y) ((y) & 0x3ff) | |
69 | #endif | |
72330b0e JB |
70 | |
71 | #define LCDC_LCWHB 0x10 | |
72 | #define LCWHB_BK_EN (1<<31) | |
73 | #define LCWHB_CW(w) (((w) & 0x1f) << 24) | |
74 | #define LCWHB_CH(h) (((h) & 0x1f) << 16) | |
75 | #define LCWHB_BD(x) ((x) & 0xff) | |
76 | ||
77 | #define LCDC_LCHCC 0x14 | |
1d0f9870 SH |
78 | |
79 | #ifdef CONFIG_ARCH_MX1 | |
72330b0e JB |
80 | #define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11) |
81 | #define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5) | |
82 | #define LCHCC_CUR_COL_B(b) ((b) & 0x1f) | |
1d0f9870 SH |
83 | #else |
84 | #define LCHCC_CUR_COL_R(r) (((r) & 0x3f) << 12) | |
85 | #define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 6) | |
86 | #define LCHCC_CUR_COL_B(b) ((b) & 0x3f) | |
87 | #endif | |
72330b0e JB |
88 | |
89 | #define LCDC_PCR 0x18 | |
90 | ||
91 | #define LCDC_HCR 0x1C | |
92 | #define HCR_H_WIDTH(x) (((x) & 0x3f) << 26) | |
93 | #define HCR_H_WAIT_1(x) (((x) & 0xff) << 8) | |
94 | #define HCR_H_WAIT_2(x) ((x) & 0xff) | |
95 | ||
96 | #define LCDC_VCR 0x20 | |
97 | #define VCR_V_WIDTH(x) (((x) & 0x3f) << 26) | |
98 | #define VCR_V_WAIT_1(x) (((x) & 0xff) << 8) | |
99 | #define VCR_V_WAIT_2(x) ((x) & 0xff) | |
100 | ||
101 | #define LCDC_POS 0x24 | |
102 | #define POS_POS(x) ((x) & 1f) | |
103 | ||
104 | #define LCDC_LSCR1 0x28 | |
105 | /* bit fields in imxfb.h */ | |
106 | ||
107 | #define LCDC_PWMR 0x2C | |
108 | /* bit fields in imxfb.h */ | |
109 | ||
110 | #define LCDC_DMACR 0x30 | |
111 | /* bit fields in imxfb.h */ | |
112 | ||
113 | #define LCDC_RMCR 0x34 | |
1d0f9870 SH |
114 | |
115 | #ifdef CONFIG_ARCH_MX1 | |
72330b0e | 116 | #define RMCR_LCDC_EN (1<<1) |
1d0f9870 SH |
117 | #else |
118 | #define RMCR_LCDC_EN 0 | |
119 | #endif | |
120 | ||
72330b0e JB |
121 | #define RMCR_SELF_REF (1<<0) |
122 | ||
123 | #define LCDC_LCDICR 0x38 | |
124 | #define LCDICR_INT_SYN (1<<2) | |
125 | #define LCDICR_INT_CON (1) | |
126 | ||
127 | #define LCDC_LCDISR 0x40 | |
128 | #define LCDISR_UDR_ERR (1<<3) | |
129 | #define LCDISR_ERR_RES (1<<2) | |
130 | #define LCDISR_EOF (1<<1) | |
131 | #define LCDISR_BOF (1<<0) | |
132 | ||
343684ff SH |
133 | /* Used fb-mode. Can be set on kernel command line, therefore file-static. */ |
134 | static const char *fb_mode; | |
135 | ||
136 | ||
24b9baf7 SH |
137 | /* |
138 | * These are the bitfields for each | |
139 | * display depth that we support. | |
140 | */ | |
141 | struct imxfb_rgb { | |
142 | struct fb_bitfield red; | |
143 | struct fb_bitfield green; | |
144 | struct fb_bitfield blue; | |
145 | struct fb_bitfield transp; | |
146 | }; | |
147 | ||
24b9baf7 SH |
148 | struct imxfb_info { |
149 | struct platform_device *pdev; | |
150 | void __iomem *regs; | |
f909ef64 | 151 | struct clk *clk; |
24b9baf7 | 152 | |
24b9baf7 SH |
153 | /* |
154 | * These are the addresses we mapped | |
155 | * the framebuffer memory region to. | |
156 | */ | |
157 | dma_addr_t map_dma; | |
158 | u_char *map_cpu; | |
159 | u_int map_size; | |
160 | ||
161 | u_char *screen_cpu; | |
162 | dma_addr_t screen_dma; | |
163 | u_int palette_size; | |
164 | ||
165 | dma_addr_t dbar1; | |
166 | dma_addr_t dbar2; | |
167 | ||
168 | u_int pcr; | |
169 | u_int pwmr; | |
170 | u_int lscr1; | |
171 | u_int dmacr; | |
172 | u_int cmap_inverse:1, | |
173 | cmap_static:1, | |
174 | unused:30; | |
175 | ||
343684ff SH |
176 | struct imx_fb_videomode *mode; |
177 | int num_modes; | |
178 | ||
24b9baf7 SH |
179 | void (*lcd_power)(int); |
180 | void (*backlight_power)(int); | |
181 | }; | |
182 | ||
183 | #define IMX_NAME "IMX" | |
184 | ||
185 | /* | |
186 | * Minimum X and Y resolutions | |
187 | */ | |
188 | #define MIN_XRES 64 | |
189 | #define MIN_YRES 64 | |
190 | ||
1512222b SH |
191 | /* Actually this really is 18bit support, the lowest 2 bits of each colour |
192 | * are unused in hardware. We claim to have 24bit support to make software | |
193 | * like X work, which does not support 18bit. | |
194 | */ | |
195 | static struct imxfb_rgb def_rgb_18 = { | |
196 | .red = {.offset = 16, .length = 8,}, | |
197 | .green = {.offset = 8, .length = 8,}, | |
198 | .blue = {.offset = 0, .length = 8,}, | |
199 | .transp = {.offset = 0, .length = 0,}, | |
200 | }; | |
201 | ||
80eee6bc SH |
202 | static struct imxfb_rgb def_rgb_16_tft = { |
203 | .red = {.offset = 11, .length = 5,}, | |
204 | .green = {.offset = 5, .length = 6,}, | |
205 | .blue = {.offset = 0, .length = 5,}, | |
206 | .transp = {.offset = 0, .length = 0,}, | |
207 | }; | |
208 | ||
209 | static struct imxfb_rgb def_rgb_16_stn = { | |
66c8719b SH |
210 | .red = {.offset = 8, .length = 4,}, |
211 | .green = {.offset = 4, .length = 4,}, | |
212 | .blue = {.offset = 0, .length = 4,}, | |
213 | .transp = {.offset = 0, .length = 0,}, | |
7c2f891c SH |
214 | }; |
215 | ||
216 | static struct imxfb_rgb def_rgb_8 = { | |
66c8719b SH |
217 | .red = {.offset = 0, .length = 8,}, |
218 | .green = {.offset = 0, .length = 8,}, | |
219 | .blue = {.offset = 0, .length = 8,}, | |
220 | .transp = {.offset = 0, .length = 0,}, | |
7c2f891c SH |
221 | }; |
222 | ||
66c8719b SH |
223 | static int imxfb_activate_var(struct fb_var_screeninfo *var, |
224 | struct fb_info *info); | |
7c2f891c SH |
225 | |
226 | static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) | |
227 | { | |
228 | chan &= 0xffff; | |
229 | chan >>= 16 - bf->length; | |
230 | return chan << bf->offset; | |
231 | } | |
232 | ||
66c8719b SH |
233 | static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, |
234 | u_int trans, struct fb_info *info) | |
7c2f891c SH |
235 | { |
236 | struct imxfb_info *fbi = info->par; | |
237 | u_int val, ret = 1; | |
238 | ||
239 | #define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16) | |
240 | if (regno < fbi->palette_size) { | |
241 | val = (CNVT_TOHW(red, 4) << 8) | | |
242 | (CNVT_TOHW(green,4) << 4) | | |
243 | CNVT_TOHW(blue, 4); | |
244 | ||
72330b0e | 245 | writel(val, fbi->regs + 0x800 + (regno << 2)); |
7c2f891c SH |
246 | ret = 0; |
247 | } | |
248 | return ret; | |
249 | } | |
250 | ||
66c8719b | 251 | static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, |
7c2f891c SH |
252 | u_int trans, struct fb_info *info) |
253 | { | |
254 | struct imxfb_info *fbi = info->par; | |
255 | unsigned int val; | |
256 | int ret = 1; | |
257 | ||
258 | /* | |
259 | * If inverse mode was selected, invert all the colours | |
260 | * rather than the register number. The register number | |
261 | * is what you poke into the framebuffer to produce the | |
262 | * colour you requested. | |
263 | */ | |
264 | if (fbi->cmap_inverse) { | |
265 | red = 0xffff - red; | |
266 | green = 0xffff - green; | |
267 | blue = 0xffff - blue; | |
268 | } | |
269 | ||
270 | /* | |
271 | * If greyscale is true, then we convert the RGB value | |
272 | * to greyscale no mater what visual we are using. | |
273 | */ | |
274 | if (info->var.grayscale) | |
275 | red = green = blue = (19595 * red + 38470 * green + | |
276 | 7471 * blue) >> 16; | |
277 | ||
278 | switch (info->fix.visual) { | |
279 | case FB_VISUAL_TRUECOLOR: | |
280 | /* | |
281 | * 12 or 16-bit True Colour. We encode the RGB value | |
282 | * according to the RGB bitfield information. | |
283 | */ | |
284 | if (regno < 16) { | |
285 | u32 *pal = info->pseudo_palette; | |
286 | ||
287 | val = chan_to_field(red, &info->var.red); | |
288 | val |= chan_to_field(green, &info->var.green); | |
289 | val |= chan_to_field(blue, &info->var.blue); | |
290 | ||
291 | pal[regno] = val; | |
292 | ret = 0; | |
293 | } | |
294 | break; | |
295 | ||
296 | case FB_VISUAL_STATIC_PSEUDOCOLOR: | |
297 | case FB_VISUAL_PSEUDOCOLOR: | |
298 | ret = imxfb_setpalettereg(regno, red, green, blue, trans, info); | |
299 | break; | |
300 | } | |
301 | ||
302 | return ret; | |
303 | } | |
304 | ||
343684ff SH |
305 | static const struct imx_fb_videomode *imxfb_find_mode(struct imxfb_info *fbi) |
306 | { | |
307 | struct imx_fb_videomode *m; | |
308 | int i; | |
309 | ||
310 | for (i = 0, m = &fbi->mode[0]; i < fbi->num_modes; i++, m++) { | |
311 | if (!strcmp(m->mode.name, fb_mode)) | |
312 | return m; | |
313 | } | |
314 | return NULL; | |
315 | } | |
316 | ||
7c2f891c SH |
317 | /* |
318 | * imxfb_check_var(): | |
319 | * Round up in the following order: bits_per_pixel, xres, | |
320 | * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale, | |
321 | * bitfields, horizontal timing, vertical timing. | |
322 | */ | |
66c8719b | 323 | static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) |
7c2f891c SH |
324 | { |
325 | struct imxfb_info *fbi = info->par; | |
80eee6bc | 326 | struct imxfb_rgb *rgb; |
343684ff SH |
327 | const struct imx_fb_videomode *imxfb_mode; |
328 | unsigned long lcd_clk; | |
329 | unsigned long long tmp; | |
330 | u32 pcr = 0; | |
7c2f891c SH |
331 | |
332 | if (var->xres < MIN_XRES) | |
333 | var->xres = MIN_XRES; | |
334 | if (var->yres < MIN_YRES) | |
335 | var->yres = MIN_YRES; | |
343684ff SH |
336 | |
337 | imxfb_mode = imxfb_find_mode(fbi); | |
338 | if (!imxfb_mode) | |
339 | return -EINVAL; | |
340 | ||
341 | var->xres = imxfb_mode->mode.xres; | |
342 | var->yres = imxfb_mode->mode.yres; | |
343 | var->bits_per_pixel = imxfb_mode->bpp; | |
344 | var->pixclock = imxfb_mode->mode.pixclock; | |
345 | var->hsync_len = imxfb_mode->mode.hsync_len; | |
346 | var->left_margin = imxfb_mode->mode.left_margin; | |
347 | var->right_margin = imxfb_mode->mode.right_margin; | |
348 | var->vsync_len = imxfb_mode->mode.vsync_len; | |
349 | var->upper_margin = imxfb_mode->mode.upper_margin; | |
350 | var->lower_margin = imxfb_mode->mode.lower_margin; | |
351 | var->sync = imxfb_mode->mode.sync; | |
352 | var->xres_virtual = max(var->xres_virtual, var->xres); | |
353 | var->yres_virtual = max(var->yres_virtual, var->yres); | |
7c2f891c SH |
354 | |
355 | pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel); | |
343684ff SH |
356 | |
357 | lcd_clk = clk_get_rate(fbi->clk); | |
358 | ||
359 | tmp = var->pixclock * (unsigned long long)lcd_clk; | |
360 | ||
361 | do_div(tmp, 1000000); | |
362 | ||
363 | if (do_div(tmp, 1000000) > 500000) | |
364 | tmp++; | |
365 | ||
366 | pcr = (unsigned int)tmp; | |
367 | ||
368 | if (--pcr > 0x3F) { | |
369 | pcr = 0x3F; | |
370 | printk(KERN_WARNING "Must limit pixel clock to %luHz\n", | |
371 | lcd_clk / pcr); | |
372 | } | |
373 | ||
7c2f891c | 374 | switch (var->bits_per_pixel) { |
1512222b | 375 | case 32: |
343684ff | 376 | pcr |= PCR_BPIX_18; |
1512222b SH |
377 | rgb = &def_rgb_18; |
378 | break; | |
7c2f891c | 379 | case 16: |
80eee6bc | 380 | default: |
343684ff SH |
381 | if (cpu_is_mx1()) |
382 | pcr |= PCR_BPIX_12; | |
383 | else | |
384 | pcr |= PCR_BPIX_16; | |
385 | ||
386 | if (imxfb_mode->pcr & PCR_TFT) | |
80eee6bc SH |
387 | rgb = &def_rgb_16_tft; |
388 | else | |
389 | rgb = &def_rgb_16_stn; | |
7c2f891c SH |
390 | break; |
391 | case 8: | |
343684ff | 392 | pcr |= PCR_BPIX_8; |
80eee6bc | 393 | rgb = &def_rgb_8; |
7c2f891c | 394 | break; |
7c2f891c SH |
395 | } |
396 | ||
343684ff SH |
397 | /* add sync polarities */ |
398 | pcr |= imxfb_mode->pcr & ~(0x3f | (7 << 25)); | |
399 | ||
400 | fbi->pcr = pcr; | |
401 | ||
7c2f891c SH |
402 | /* |
403 | * Copy the RGB parameters for this display | |
404 | * from the machine specific parameters. | |
405 | */ | |
80eee6bc SH |
406 | var->red = rgb->red; |
407 | var->green = rgb->green; | |
408 | var->blue = rgb->blue; | |
409 | var->transp = rgb->transp; | |
7c2f891c SH |
410 | |
411 | pr_debug("RGBT length = %d:%d:%d:%d\n", | |
412 | var->red.length, var->green.length, var->blue.length, | |
413 | var->transp.length); | |
414 | ||
415 | pr_debug("RGBT offset = %d:%d:%d:%d\n", | |
416 | var->red.offset, var->green.offset, var->blue.offset, | |
417 | var->transp.offset); | |
418 | ||
419 | return 0; | |
420 | } | |
421 | ||
422 | /* | |
423 | * imxfb_set_par(): | |
424 | * Set the user defined part of the display for the specified console | |
425 | */ | |
426 | static int imxfb_set_par(struct fb_info *info) | |
427 | { | |
428 | struct imxfb_info *fbi = info->par; | |
429 | struct fb_var_screeninfo *var = &info->var; | |
430 | ||
1512222b | 431 | if (var->bits_per_pixel == 16 || var->bits_per_pixel == 32) |
7c2f891c SH |
432 | info->fix.visual = FB_VISUAL_TRUECOLOR; |
433 | else if (!fbi->cmap_static) | |
434 | info->fix.visual = FB_VISUAL_PSEUDOCOLOR; | |
435 | else { | |
436 | /* | |
437 | * Some people have weird ideas about wanting static | |
438 | * pseudocolor maps. I suspect their user space | |
439 | * applications are broken. | |
440 | */ | |
441 | info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR; | |
442 | } | |
443 | ||
66c8719b | 444 | info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8; |
7c2f891c SH |
445 | fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16; |
446 | ||
447 | imxfb_activate_var(var, info); | |
448 | ||
449 | return 0; | |
450 | } | |
451 | ||
452 | static void imxfb_enable_controller(struct imxfb_info *fbi) | |
453 | { | |
454 | pr_debug("Enabling LCD controller\n"); | |
455 | ||
72330b0e | 456 | writel(fbi->screen_dma, fbi->regs + LCDC_SSA); |
7c2f891c | 457 | |
72330b0e JB |
458 | /* panning offset 0 (0 pixel offset) */ |
459 | writel(0x00000000, fbi->regs + LCDC_POS); | |
7c2f891c SH |
460 | |
461 | /* disable hardware cursor */ | |
72330b0e JB |
462 | writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1), |
463 | fbi->regs + LCDC_CPOS); | |
7c2f891c | 464 | |
72330b0e | 465 | writel(RMCR_LCDC_EN, fbi->regs + LCDC_RMCR); |
7c2f891c | 466 | |
f909ef64 SH |
467 | clk_enable(fbi->clk); |
468 | ||
66c8719b | 469 | if (fbi->backlight_power) |
7c2f891c | 470 | fbi->backlight_power(1); |
66c8719b | 471 | if (fbi->lcd_power) |
7c2f891c SH |
472 | fbi->lcd_power(1); |
473 | } | |
474 | ||
475 | static void imxfb_disable_controller(struct imxfb_info *fbi) | |
476 | { | |
477 | pr_debug("Disabling LCD controller\n"); | |
478 | ||
66c8719b | 479 | if (fbi->backlight_power) |
7c2f891c | 480 | fbi->backlight_power(0); |
66c8719b | 481 | if (fbi->lcd_power) |
7c2f891c SH |
482 | fbi->lcd_power(0); |
483 | ||
f909ef64 SH |
484 | clk_disable(fbi->clk); |
485 | ||
72330b0e | 486 | writel(0, fbi->regs + LCDC_RMCR); |
7c2f891c SH |
487 | } |
488 | ||
489 | static int imxfb_blank(int blank, struct fb_info *info) | |
490 | { | |
491 | struct imxfb_info *fbi = info->par; | |
492 | ||
493 | pr_debug("imxfb_blank: blank=%d\n", blank); | |
494 | ||
495 | switch (blank) { | |
496 | case FB_BLANK_POWERDOWN: | |
497 | case FB_BLANK_VSYNC_SUSPEND: | |
498 | case FB_BLANK_HSYNC_SUSPEND: | |
499 | case FB_BLANK_NORMAL: | |
500 | imxfb_disable_controller(fbi); | |
501 | break; | |
502 | ||
503 | case FB_BLANK_UNBLANK: | |
504 | imxfb_enable_controller(fbi); | |
505 | break; | |
506 | } | |
507 | return 0; | |
508 | } | |
509 | ||
510 | static struct fb_ops imxfb_ops = { | |
511 | .owner = THIS_MODULE, | |
512 | .fb_check_var = imxfb_check_var, | |
513 | .fb_set_par = imxfb_set_par, | |
514 | .fb_setcolreg = imxfb_setcolreg, | |
515 | .fb_fillrect = cfb_fillrect, | |
516 | .fb_copyarea = cfb_copyarea, | |
517 | .fb_imageblit = cfb_imageblit, | |
518 | .fb_blank = imxfb_blank, | |
7c2f891c SH |
519 | }; |
520 | ||
521 | /* | |
522 | * imxfb_activate_var(): | |
523 | * Configures LCD Controller based on entries in var parameter. Settings are | |
524 | * only written to the controller if changes were made. | |
525 | */ | |
526 | static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info) | |
527 | { | |
528 | struct imxfb_info *fbi = info->par; | |
f909ef64 | 529 | |
7c2f891c SH |
530 | pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n", |
531 | var->xres, var->hsync_len, | |
532 | var->left_margin, var->right_margin); | |
533 | pr_debug("var: yres=%d vslen=%d um=%d bm=%d\n", | |
534 | var->yres, var->vsync_len, | |
535 | var->upper_margin, var->lower_margin); | |
536 | ||
537 | #if DEBUG_VAR | |
538 | if (var->xres < 16 || var->xres > 1024) | |
539 | printk(KERN_ERR "%s: invalid xres %d\n", | |
540 | info->fix.id, var->xres); | |
541 | if (var->hsync_len < 1 || var->hsync_len > 64) | |
542 | printk(KERN_ERR "%s: invalid hsync_len %d\n", | |
543 | info->fix.id, var->hsync_len); | |
544 | if (var->left_margin > 255) | |
545 | printk(KERN_ERR "%s: invalid left_margin %d\n", | |
546 | info->fix.id, var->left_margin); | |
547 | if (var->right_margin > 255) | |
548 | printk(KERN_ERR "%s: invalid right_margin %d\n", | |
549 | info->fix.id, var->right_margin); | |
550 | if (var->yres < 1 || var->yres > 511) | |
551 | printk(KERN_ERR "%s: invalid yres %d\n", | |
552 | info->fix.id, var->yres); | |
553 | if (var->vsync_len > 100) | |
554 | printk(KERN_ERR "%s: invalid vsync_len %d\n", | |
555 | info->fix.id, var->vsync_len); | |
556 | if (var->upper_margin > 63) | |
557 | printk(KERN_ERR "%s: invalid upper_margin %d\n", | |
558 | info->fix.id, var->upper_margin); | |
559 | if (var->lower_margin > 255) | |
560 | printk(KERN_ERR "%s: invalid lower_margin %d\n", | |
561 | info->fix.id, var->lower_margin); | |
562 | #endif | |
563 | ||
343684ff SH |
564 | /* physical screen start address */ |
565 | writel(VPW_VPW(var->xres * var->bits_per_pixel / 8 / 4), | |
566 | fbi->regs + LCDC_VPW); | |
567 | ||
7e8549bc SH |
568 | writel(HCR_H_WIDTH(var->hsync_len - 1) | |
569 | HCR_H_WAIT_1(var->right_margin - 1) | | |
570 | HCR_H_WAIT_2(var->left_margin - 3), | |
72330b0e | 571 | fbi->regs + LCDC_HCR); |
7c2f891c | 572 | |
72330b0e | 573 | writel(VCR_V_WIDTH(var->vsync_len) | |
d6ed5755 SH |
574 | VCR_V_WAIT_1(var->lower_margin) | |
575 | VCR_V_WAIT_2(var->upper_margin), | |
72330b0e | 576 | fbi->regs + LCDC_VCR); |
7c2f891c | 577 | |
72330b0e JB |
578 | writel(SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres), |
579 | fbi->regs + LCDC_SIZE); | |
f909ef64 | 580 | |
343684ff | 581 | writel(fbi->pcr, fbi->regs + LCDC_PCR); |
72330b0e JB |
582 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); |
583 | writel(fbi->lscr1, fbi->regs + LCDC_LSCR1); | |
584 | writel(fbi->dmacr, fbi->regs + LCDC_DMACR); | |
7c2f891c SH |
585 | |
586 | return 0; | |
587 | } | |
588 | ||
7c2f891c SH |
589 | #ifdef CONFIG_PM |
590 | /* | |
591 | * Power management hooks. Note that we won't be called from IRQ context, | |
592 | * unlike the blank functions above, so we may sleep. | |
593 | */ | |
3ae5eaec | 594 | static int imxfb_suspend(struct platform_device *dev, pm_message_t state) |
7c2f891c | 595 | { |
3ae5eaec | 596 | struct imxfb_info *fbi = platform_get_drvdata(dev); |
66c8719b SH |
597 | |
598 | pr_debug("%s\n", __func__); | |
7c2f891c | 599 | |
9480e307 | 600 | imxfb_disable_controller(fbi); |
7c2f891c SH |
601 | return 0; |
602 | } | |
603 | ||
3ae5eaec | 604 | static int imxfb_resume(struct platform_device *dev) |
7c2f891c | 605 | { |
3ae5eaec | 606 | struct imxfb_info *fbi = platform_get_drvdata(dev); |
66c8719b SH |
607 | |
608 | pr_debug("%s\n", __func__); | |
7c2f891c | 609 | |
9480e307 | 610 | imxfb_enable_controller(fbi); |
7c2f891c SH |
611 | return 0; |
612 | } | |
613 | #else | |
614 | #define imxfb_suspend NULL | |
615 | #define imxfb_resume NULL | |
616 | #endif | |
617 | ||
72330b0e | 618 | static int __init imxfb_init_fbinfo(struct platform_device *pdev) |
7c2f891c | 619 | { |
27889273 | 620 | struct imx_fb_platform_data *pdata = pdev->dev.platform_data; |
72330b0e | 621 | struct fb_info *info = dev_get_drvdata(&pdev->dev); |
7c2f891c | 622 | struct imxfb_info *fbi = info->par; |
343684ff SH |
623 | struct imx_fb_videomode *m; |
624 | int i; | |
7c2f891c | 625 | |
5ae12170 | 626 | pr_debug("%s\n",__func__); |
7c2f891c | 627 | |
66c8719b | 628 | info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL); |
7c2f891c SH |
629 | if (!info->pseudo_palette) |
630 | return -ENOMEM; | |
631 | ||
632 | memset(fbi, 0, sizeof(struct imxfb_info)); | |
7c2f891c SH |
633 | |
634 | strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id)); | |
635 | ||
66c8719b | 636 | info->fix.type = FB_TYPE_PACKED_PIXELS; |
7c2f891c SH |
637 | info->fix.type_aux = 0; |
638 | info->fix.xpanstep = 0; | |
639 | info->fix.ypanstep = 0; | |
640 | info->fix.ywrapstep = 0; | |
66c8719b | 641 | info->fix.accel = FB_ACCEL_NONE; |
7c2f891c SH |
642 | |
643 | info->var.nonstd = 0; | |
644 | info->var.activate = FB_ACTIVATE_NOW; | |
645 | info->var.height = -1; | |
646 | info->var.width = -1; | |
647 | info->var.accel_flags = 0; | |
66c8719b | 648 | info->var.vmode = FB_VMODE_NONINTERLACED; |
7c2f891c SH |
649 | |
650 | info->fbops = &imxfb_ops; | |
66c8719b SH |
651 | info->flags = FBINFO_FLAG_DEFAULT | |
652 | FBINFO_READS_FAST; | |
27889273 SH |
653 | info->var.grayscale = pdata->cmap_greyscale; |
654 | fbi->cmap_inverse = pdata->cmap_inverse; | |
655 | fbi->cmap_static = pdata->cmap_static; | |
27889273 SH |
656 | fbi->lscr1 = pdata->lscr1; |
657 | fbi->dmacr = pdata->dmacr; | |
658 | fbi->pwmr = pdata->pwmr; | |
659 | fbi->lcd_power = pdata->lcd_power; | |
660 | fbi->backlight_power = pdata->backlight_power; | |
343684ff SH |
661 | |
662 | for (i = 0, m = &pdata->mode[0]; i < pdata->num_modes; i++, m++) | |
663 | info->fix.smem_len = max_t(size_t, info->fix.smem_len, | |
664 | m->mode.xres * m->mode.yres * m->bpp / 8); | |
7c2f891c SH |
665 | |
666 | return 0; | |
667 | } | |
668 | ||
3ae5eaec | 669 | static int __init imxfb_probe(struct platform_device *pdev) |
7c2f891c | 670 | { |
7c2f891c SH |
671 | struct imxfb_info *fbi; |
672 | struct fb_info *info; | |
27889273 | 673 | struct imx_fb_platform_data *pdata; |
7c2f891c | 674 | struct resource *res; |
343684ff | 675 | int ret, i; |
7c2f891c | 676 | |
d6b51502 | 677 | dev_info(&pdev->dev, "i.MX Framebuffer driver\n"); |
7c2f891c SH |
678 | |
679 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
66c8719b | 680 | if (!res) |
7c2f891c SH |
681 | return -ENODEV; |
682 | ||
27889273 SH |
683 | pdata = pdev->dev.platform_data; |
684 | if (!pdata) { | |
f99c8929 | 685 | dev_err(&pdev->dev,"No platform_data available\n"); |
7c2f891c SH |
686 | return -ENOMEM; |
687 | } | |
688 | ||
3ae5eaec | 689 | info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev); |
66c8719b | 690 | if (!info) |
7c2f891c SH |
691 | return -ENOMEM; |
692 | ||
693 | fbi = info->par; | |
694 | ||
343684ff SH |
695 | if (!fb_mode) |
696 | fb_mode = pdata->mode[0].mode.name; | |
697 | ||
3ae5eaec | 698 | platform_set_drvdata(pdev, info); |
7c2f891c | 699 | |
72330b0e | 700 | ret = imxfb_init_fbinfo(pdev); |
66c8719b | 701 | if (ret < 0) |
7c2f891c SH |
702 | goto failed_init; |
703 | ||
72330b0e JB |
704 | res = request_mem_region(res->start, resource_size(res), |
705 | DRIVER_NAME); | |
7c2f891c SH |
706 | if (!res) { |
707 | ret = -EBUSY; | |
72330b0e JB |
708 | goto failed_req; |
709 | } | |
710 | ||
f909ef64 SH |
711 | fbi->clk = clk_get(&pdev->dev, NULL); |
712 | if (IS_ERR(fbi->clk)) { | |
a419aef8 | 713 | ret = PTR_ERR(fbi->clk); |
f909ef64 SH |
714 | dev_err(&pdev->dev, "unable to get clock: %d\n", ret); |
715 | goto failed_getclock; | |
716 | } | |
717 | ||
72330b0e JB |
718 | fbi->regs = ioremap(res->start, resource_size(res)); |
719 | if (fbi->regs == NULL) { | |
d6b51502 | 720 | dev_err(&pdev->dev, "Cannot map frame buffer registers\n"); |
72330b0e | 721 | goto failed_ioremap; |
7c2f891c SH |
722 | } |
723 | ||
27889273 | 724 | if (!pdata->fixed_screen_cpu) { |
72330b0e JB |
725 | fbi->map_size = PAGE_ALIGN(info->fix.smem_len); |
726 | fbi->map_cpu = dma_alloc_writecombine(&pdev->dev, | |
727 | fbi->map_size, &fbi->map_dma, GFP_KERNEL); | |
728 | ||
729 | if (!fbi->map_cpu) { | |
f99c8929 | 730 | dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret); |
7c2f891c SH |
731 | ret = -ENOMEM; |
732 | goto failed_map; | |
733 | } | |
72330b0e JB |
734 | |
735 | info->screen_base = fbi->map_cpu; | |
736 | fbi->screen_cpu = fbi->map_cpu; | |
737 | fbi->screen_dma = fbi->map_dma; | |
738 | info->fix.smem_start = fbi->screen_dma; | |
7c2f891c SH |
739 | } else { |
740 | /* Fixed framebuffer mapping enables location of the screen in eSRAM */ | |
27889273 SH |
741 | fbi->map_cpu = pdata->fixed_screen_cpu; |
742 | fbi->map_dma = pdata->fixed_screen_dma; | |
7c2f891c SH |
743 | info->screen_base = fbi->map_cpu; |
744 | fbi->screen_cpu = fbi->map_cpu; | |
745 | fbi->screen_dma = fbi->map_dma; | |
746 | info->fix.smem_start = fbi->screen_dma; | |
747 | } | |
748 | ||
c0b90a31 SH |
749 | if (pdata->init) { |
750 | ret = pdata->init(fbi->pdev); | |
751 | if (ret) | |
752 | goto failed_platform_init; | |
753 | } | |
754 | ||
343684ff SH |
755 | fbi->mode = pdata->mode; |
756 | fbi->num_modes = pdata->num_modes; | |
757 | ||
758 | INIT_LIST_HEAD(&info->modelist); | |
759 | for (i = 0; i < pdata->num_modes; i++) | |
760 | fb_add_videomode(&pdata->mode[i].mode, &info->modelist); | |
761 | ||
7c2f891c SH |
762 | /* |
763 | * This makes sure that our colour bitfield | |
764 | * descriptors are correctly initialised. | |
765 | */ | |
766 | imxfb_check_var(&info->var, info); | |
767 | ||
66c8719b | 768 | ret = fb_alloc_cmap(&info->cmap, 1 << info->var.bits_per_pixel, 0); |
7c2f891c SH |
769 | if (ret < 0) |
770 | goto failed_cmap; | |
771 | ||
7c2f891c SH |
772 | imxfb_set_par(info); |
773 | ret = register_framebuffer(info); | |
774 | if (ret < 0) { | |
f99c8929 | 775 | dev_err(&pdev->dev, "failed to register framebuffer\n"); |
7c2f891c SH |
776 | goto failed_register; |
777 | } | |
778 | ||
779 | imxfb_enable_controller(fbi); | |
780 | ||
781 | return 0; | |
782 | ||
783 | failed_register: | |
784 | fb_dealloc_cmap(&info->cmap); | |
785 | failed_cmap: | |
c0b90a31 SH |
786 | if (pdata->exit) |
787 | pdata->exit(fbi->pdev); | |
788 | failed_platform_init: | |
27889273 | 789 | if (!pdata->fixed_screen_cpu) |
3ae5eaec | 790 | dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu, |
72330b0e | 791 | fbi->map_dma); |
7c2f891c | 792 | failed_map: |
f909ef64 SH |
793 | clk_put(fbi->clk); |
794 | failed_getclock: | |
72330b0e JB |
795 | iounmap(fbi->regs); |
796 | failed_ioremap: | |
d6b51502 | 797 | release_mem_region(res->start, resource_size(res)); |
72330b0e JB |
798 | failed_req: |
799 | kfree(info->pseudo_palette); | |
7c2f891c | 800 | failed_init: |
3ae5eaec | 801 | platform_set_drvdata(pdev, NULL); |
7c2f891c SH |
802 | framebuffer_release(info); |
803 | return ret; | |
804 | } | |
805 | ||
72330b0e | 806 | static int __devexit imxfb_remove(struct platform_device *pdev) |
7c2f891c | 807 | { |
c0b90a31 | 808 | struct imx_fb_platform_data *pdata; |
3ae5eaec | 809 | struct fb_info *info = platform_get_drvdata(pdev); |
772a9e63 | 810 | struct imxfb_info *fbi = info->par; |
7c2f891c SH |
811 | struct resource *res; |
812 | ||
813 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
814 | ||
772a9e63 | 815 | imxfb_disable_controller(fbi); |
7c2f891c SH |
816 | |
817 | unregister_framebuffer(info); | |
818 | ||
c0b90a31 SH |
819 | pdata = pdev->dev.platform_data; |
820 | if (pdata->exit) | |
821 | pdata->exit(fbi->pdev); | |
822 | ||
7c2f891c SH |
823 | fb_dealloc_cmap(&info->cmap); |
824 | kfree(info->pseudo_palette); | |
825 | framebuffer_release(info); | |
826 | ||
72330b0e | 827 | iounmap(fbi->regs); |
d6b51502 | 828 | release_mem_region(res->start, resource_size(res)); |
f909ef64 SH |
829 | clk_disable(fbi->clk); |
830 | clk_put(fbi->clk); | |
831 | ||
3ae5eaec | 832 | platform_set_drvdata(pdev, NULL); |
7c2f891c SH |
833 | |
834 | return 0; | |
835 | } | |
836 | ||
3ae5eaec | 837 | void imxfb_shutdown(struct platform_device * dev) |
7c2f891c | 838 | { |
3ae5eaec | 839 | struct fb_info *info = platform_get_drvdata(dev); |
772a9e63 SH |
840 | struct imxfb_info *fbi = info->par; |
841 | imxfb_disable_controller(fbi); | |
7c2f891c SH |
842 | } |
843 | ||
3ae5eaec | 844 | static struct platform_driver imxfb_driver = { |
7c2f891c SH |
845 | .suspend = imxfb_suspend, |
846 | .resume = imxfb_resume, | |
72330b0e | 847 | .remove = __devexit_p(imxfb_remove), |
7c2f891c | 848 | .shutdown = imxfb_shutdown, |
3ae5eaec | 849 | .driver = { |
72330b0e | 850 | .name = DRIVER_NAME, |
3ae5eaec | 851 | }, |
7c2f891c SH |
852 | }; |
853 | ||
343684ff SH |
854 | static int imxfb_setup(void) |
855 | { | |
856 | #ifndef MODULE | |
857 | char *opt, *options = NULL; | |
858 | ||
859 | if (fb_get_options("imxfb", &options)) | |
860 | return -ENODEV; | |
861 | ||
862 | if (!options || !*options) | |
863 | return 0; | |
864 | ||
865 | while ((opt = strsep(&options, ",")) != NULL) { | |
866 | if (!*opt) | |
867 | continue; | |
868 | else | |
869 | fb_mode = opt; | |
870 | } | |
871 | #endif | |
872 | return 0; | |
873 | } | |
874 | ||
7c2f891c SH |
875 | int __init imxfb_init(void) |
876 | { | |
343684ff SH |
877 | int ret = imxfb_setup(); |
878 | ||
879 | if (ret < 0) | |
880 | return ret; | |
881 | ||
72330b0e | 882 | return platform_driver_probe(&imxfb_driver, imxfb_probe); |
7c2f891c SH |
883 | } |
884 | ||
885 | static void __exit imxfb_cleanup(void) | |
886 | { | |
3ae5eaec | 887 | platform_driver_unregister(&imxfb_driver); |
7c2f891c SH |
888 | } |
889 | ||
890 | module_init(imxfb_init); | |
891 | module_exit(imxfb_cleanup); | |
892 | ||
893 | MODULE_DESCRIPTION("Motorola i.MX framebuffer driver"); | |
894 | MODULE_AUTHOR("Sascha Hauer, Pengutronix"); | |
895 | MODULE_LICENSE("GPL"); |