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7c2f891c 1/*
7c2f891c
SH
2 * Freescale i.MX Frame Buffer device driver
3 *
4 * Copyright (C) 2004 Sascha Hauer, Pengutronix
5 * Based on acornfb.c Copyright (C) Russell King.
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file COPYING in the main directory of this archive for
9 * more details.
10 *
11 * Please direct your questions and comments on this driver to the following
12 * email address:
13 *
14 * linux-arm-kernel@lists.arm.linux.org.uk
15 */
16
7c2f891c
SH
17#include <linux/module.h>
18#include <linux/kernel.h>
7c2f891c
SH
19#include <linux/errno.h>
20#include <linux/string.h>
21#include <linux/interrupt.h>
22#include <linux/slab.h>
27ac792c 23#include <linux/mm.h>
7c2f891c
SH
24#include <linux/fb.h>
25#include <linux/delay.h>
26#include <linux/init.h>
27#include <linux/ioport.h>
28#include <linux/cpufreq.h>
f909ef64 29#include <linux/clk.h>
d052d1be 30#include <linux/platform_device.h>
7c2f891c 31#include <linux/dma-mapping.h>
72330b0e 32#include <linux/io.h>
f909ef64 33#include <linux/math64.h>
7c2f891c 34
82906b13 35#include <linux/platform_data/video-imxfb.h>
7c2f891c
SH
36
37/*
38 * Complain if VAR is out of range.
39 */
40#define DEBUG_VAR 1
41
81ef8061
EB
42#if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || \
43 (defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE) && \
44 defined(CONFIG_FB_IMX_MODULE))
45#define PWMR_BACKLIGHT_AVAILABLE
46#endif
47
72330b0e
JB
48#define DRIVER_NAME "imx-fb"
49
50#define LCDC_SSA 0x00
51
52#define LCDC_SIZE 0x04
53#define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20)
1d0f9870 54
e69dc9a9
SG
55#define YMAX_MASK_IMX1 0x1ff
56#define YMAX_MASK_IMX21 0x3ff
72330b0e
JB
57
58#define LCDC_VPW 0x08
59#define VPW_VPW(x) ((x) & 0x3ff)
60
61#define LCDC_CPOS 0x0C
62#define CPOS_CC1 (1<<31)
63#define CPOS_CC0 (1<<30)
64#define CPOS_OP (1<<28)
65#define CPOS_CXP(x) (((x) & 3ff) << 16)
1d0f9870 66
72330b0e
JB
67#define LCDC_LCWHB 0x10
68#define LCWHB_BK_EN (1<<31)
69#define LCWHB_CW(w) (((w) & 0x1f) << 24)
70#define LCWHB_CH(h) (((h) & 0x1f) << 16)
71#define LCWHB_BD(x) ((x) & 0xff)
72
73#define LCDC_LCHCC 0x14
1d0f9870 74
72330b0e
JB
75#define LCDC_PCR 0x18
76
77#define LCDC_HCR 0x1C
78#define HCR_H_WIDTH(x) (((x) & 0x3f) << 26)
79#define HCR_H_WAIT_1(x) (((x) & 0xff) << 8)
80#define HCR_H_WAIT_2(x) ((x) & 0xff)
81
82#define LCDC_VCR 0x20
83#define VCR_V_WIDTH(x) (((x) & 0x3f) << 26)
84#define VCR_V_WAIT_1(x) (((x) & 0xff) << 8)
85#define VCR_V_WAIT_2(x) ((x) & 0xff)
86
87#define LCDC_POS 0x24
88#define POS_POS(x) ((x) & 1f)
89
90#define LCDC_LSCR1 0x28
91/* bit fields in imxfb.h */
92
93#define LCDC_PWMR 0x2C
94/* bit fields in imxfb.h */
95
96#define LCDC_DMACR 0x30
97/* bit fields in imxfb.h */
98
99#define LCDC_RMCR 0x34
1d0f9870 100
f142b619 101#define RMCR_LCDC_EN_MX1 (1<<1)
1d0f9870 102
72330b0e
JB
103#define RMCR_SELF_REF (1<<0)
104
105#define LCDC_LCDICR 0x38
106#define LCDICR_INT_SYN (1<<2)
107#define LCDICR_INT_CON (1)
108
109#define LCDC_LCDISR 0x40
110#define LCDISR_UDR_ERR (1<<3)
111#define LCDISR_ERR_RES (1<<2)
112#define LCDISR_EOF (1<<1)
113#define LCDISR_BOF (1<<0)
114
343684ff
SH
115/* Used fb-mode. Can be set on kernel command line, therefore file-static. */
116static const char *fb_mode;
117
118
24b9baf7
SH
119/*
120 * These are the bitfields for each
121 * display depth that we support.
122 */
123struct imxfb_rgb {
124 struct fb_bitfield red;
125 struct fb_bitfield green;
126 struct fb_bitfield blue;
127 struct fb_bitfield transp;
128};
129
e69dc9a9
SG
130enum imxfb_type {
131 IMX1_FB,
132 IMX21_FB,
133};
134
24b9baf7
SH
135struct imxfb_info {
136 struct platform_device *pdev;
137 void __iomem *regs;
13aaea03
SH
138 struct clk *clk_ipg;
139 struct clk *clk_ahb;
140 struct clk *clk_per;
e69dc9a9 141 enum imxfb_type devtype;
24b9baf7 142
24b9baf7
SH
143 /*
144 * These are the addresses we mapped
145 * the framebuffer memory region to.
146 */
147 dma_addr_t map_dma;
148 u_char *map_cpu;
149 u_int map_size;
150
151 u_char *screen_cpu;
152 dma_addr_t screen_dma;
153 u_int palette_size;
154
155 dma_addr_t dbar1;
156 dma_addr_t dbar2;
157
158 u_int pcr;
159 u_int pwmr;
160 u_int lscr1;
161 u_int dmacr;
162 u_int cmap_inverse:1,
163 cmap_static:1,
164 unused:30;
165
343684ff
SH
166 struct imx_fb_videomode *mode;
167 int num_modes;
81ef8061 168#ifdef PWMR_BACKLIGHT_AVAILABLE
7a2bb23c 169 struct backlight_device *bl;
81ef8061 170#endif
343684ff 171
24b9baf7
SH
172 void (*lcd_power)(int);
173 void (*backlight_power)(int);
174};
175
e69dc9a9
SG
176static struct platform_device_id imxfb_devtype[] = {
177 {
178 .name = "imx1-fb",
179 .driver_data = IMX1_FB,
180 }, {
181 .name = "imx21-fb",
182 .driver_data = IMX21_FB,
183 }, {
184 /* sentinel */
185 }
186};
187MODULE_DEVICE_TABLE(platform, imxfb_devtype);
188
189static inline int is_imx1_fb(struct imxfb_info *fbi)
190{
191 return fbi->devtype == IMX1_FB;
192}
193
24b9baf7
SH
194#define IMX_NAME "IMX"
195
196/*
197 * Minimum X and Y resolutions
198 */
199#define MIN_XRES 64
200#define MIN_YRES 64
201
1512222b
SH
202/* Actually this really is 18bit support, the lowest 2 bits of each colour
203 * are unused in hardware. We claim to have 24bit support to make software
204 * like X work, which does not support 18bit.
205 */
206static struct imxfb_rgb def_rgb_18 = {
207 .red = {.offset = 16, .length = 8,},
208 .green = {.offset = 8, .length = 8,},
209 .blue = {.offset = 0, .length = 8,},
210 .transp = {.offset = 0, .length = 0,},
211};
212
80eee6bc
SH
213static struct imxfb_rgb def_rgb_16_tft = {
214 .red = {.offset = 11, .length = 5,},
215 .green = {.offset = 5, .length = 6,},
216 .blue = {.offset = 0, .length = 5,},
217 .transp = {.offset = 0, .length = 0,},
218};
219
220static struct imxfb_rgb def_rgb_16_stn = {
66c8719b
SH
221 .red = {.offset = 8, .length = 4,},
222 .green = {.offset = 4, .length = 4,},
223 .blue = {.offset = 0, .length = 4,},
224 .transp = {.offset = 0, .length = 0,},
7c2f891c
SH
225};
226
227static struct imxfb_rgb def_rgb_8 = {
66c8719b
SH
228 .red = {.offset = 0, .length = 8,},
229 .green = {.offset = 0, .length = 8,},
230 .blue = {.offset = 0, .length = 8,},
231 .transp = {.offset = 0, .length = 0,},
7c2f891c
SH
232};
233
66c8719b
SH
234static int imxfb_activate_var(struct fb_var_screeninfo *var,
235 struct fb_info *info);
7c2f891c
SH
236
237static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
238{
239 chan &= 0xffff;
240 chan >>= 16 - bf->length;
241 return chan << bf->offset;
242}
243
66c8719b
SH
244static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
245 u_int trans, struct fb_info *info)
7c2f891c
SH
246{
247 struct imxfb_info *fbi = info->par;
248 u_int val, ret = 1;
249
250#define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16)
251 if (regno < fbi->palette_size) {
252 val = (CNVT_TOHW(red, 4) << 8) |
253 (CNVT_TOHW(green,4) << 4) |
254 CNVT_TOHW(blue, 4);
255
72330b0e 256 writel(val, fbi->regs + 0x800 + (regno << 2));
7c2f891c
SH
257 ret = 0;
258 }
259 return ret;
260}
261
66c8719b 262static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
7c2f891c
SH
263 u_int trans, struct fb_info *info)
264{
265 struct imxfb_info *fbi = info->par;
266 unsigned int val;
267 int ret = 1;
268
269 /*
270 * If inverse mode was selected, invert all the colours
271 * rather than the register number. The register number
272 * is what you poke into the framebuffer to produce the
273 * colour you requested.
274 */
275 if (fbi->cmap_inverse) {
276 red = 0xffff - red;
277 green = 0xffff - green;
278 blue = 0xffff - blue;
279 }
280
281 /*
282 * If greyscale is true, then we convert the RGB value
283 * to greyscale no mater what visual we are using.
284 */
285 if (info->var.grayscale)
286 red = green = blue = (19595 * red + 38470 * green +
287 7471 * blue) >> 16;
288
289 switch (info->fix.visual) {
290 case FB_VISUAL_TRUECOLOR:
291 /*
292 * 12 or 16-bit True Colour. We encode the RGB value
293 * according to the RGB bitfield information.
294 */
295 if (regno < 16) {
296 u32 *pal = info->pseudo_palette;
297
298 val = chan_to_field(red, &info->var.red);
299 val |= chan_to_field(green, &info->var.green);
300 val |= chan_to_field(blue, &info->var.blue);
301
302 pal[regno] = val;
303 ret = 0;
304 }
305 break;
306
307 case FB_VISUAL_STATIC_PSEUDOCOLOR:
308 case FB_VISUAL_PSEUDOCOLOR:
309 ret = imxfb_setpalettereg(regno, red, green, blue, trans, info);
310 break;
311 }
312
313 return ret;
314}
315
343684ff
SH
316static const struct imx_fb_videomode *imxfb_find_mode(struct imxfb_info *fbi)
317{
318 struct imx_fb_videomode *m;
319 int i;
320
321 for (i = 0, m = &fbi->mode[0]; i < fbi->num_modes; i++, m++) {
322 if (!strcmp(m->mode.name, fb_mode))
323 return m;
324 }
325 return NULL;
326}
327
7c2f891c
SH
328/*
329 * imxfb_check_var():
330 * Round up in the following order: bits_per_pixel, xres,
331 * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale,
332 * bitfields, horizontal timing, vertical timing.
333 */
66c8719b 334static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
7c2f891c
SH
335{
336 struct imxfb_info *fbi = info->par;
80eee6bc 337 struct imxfb_rgb *rgb;
343684ff
SH
338 const struct imx_fb_videomode *imxfb_mode;
339 unsigned long lcd_clk;
340 unsigned long long tmp;
341 u32 pcr = 0;
7c2f891c
SH
342
343 if (var->xres < MIN_XRES)
344 var->xres = MIN_XRES;
345 if (var->yres < MIN_YRES)
346 var->yres = MIN_YRES;
343684ff
SH
347
348 imxfb_mode = imxfb_find_mode(fbi);
349 if (!imxfb_mode)
350 return -EINVAL;
351
352 var->xres = imxfb_mode->mode.xres;
353 var->yres = imxfb_mode->mode.yres;
354 var->bits_per_pixel = imxfb_mode->bpp;
355 var->pixclock = imxfb_mode->mode.pixclock;
356 var->hsync_len = imxfb_mode->mode.hsync_len;
357 var->left_margin = imxfb_mode->mode.left_margin;
358 var->right_margin = imxfb_mode->mode.right_margin;
359 var->vsync_len = imxfb_mode->mode.vsync_len;
360 var->upper_margin = imxfb_mode->mode.upper_margin;
361 var->lower_margin = imxfb_mode->mode.lower_margin;
362 var->sync = imxfb_mode->mode.sync;
363 var->xres_virtual = max(var->xres_virtual, var->xres);
364 var->yres_virtual = max(var->yres_virtual, var->yres);
7c2f891c
SH
365
366 pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel);
343684ff 367
13aaea03 368 lcd_clk = clk_get_rate(fbi->clk_per);
343684ff
SH
369
370 tmp = var->pixclock * (unsigned long long)lcd_clk;
371
372 do_div(tmp, 1000000);
373
374 if (do_div(tmp, 1000000) > 500000)
375 tmp++;
376
377 pcr = (unsigned int)tmp;
378
379 if (--pcr > 0x3F) {
380 pcr = 0x3F;
381 printk(KERN_WARNING "Must limit pixel clock to %luHz\n",
382 lcd_clk / pcr);
383 }
384
7c2f891c 385 switch (var->bits_per_pixel) {
1512222b 386 case 32:
343684ff 387 pcr |= PCR_BPIX_18;
1512222b
SH
388 rgb = &def_rgb_18;
389 break;
7c2f891c 390 case 16:
80eee6bc 391 default:
e69dc9a9 392 if (is_imx1_fb(fbi))
343684ff
SH
393 pcr |= PCR_BPIX_12;
394 else
395 pcr |= PCR_BPIX_16;
396
397 if (imxfb_mode->pcr & PCR_TFT)
80eee6bc
SH
398 rgb = &def_rgb_16_tft;
399 else
400 rgb = &def_rgb_16_stn;
7c2f891c
SH
401 break;
402 case 8:
343684ff 403 pcr |= PCR_BPIX_8;
80eee6bc 404 rgb = &def_rgb_8;
7c2f891c 405 break;
7c2f891c
SH
406 }
407
343684ff
SH
408 /* add sync polarities */
409 pcr |= imxfb_mode->pcr & ~(0x3f | (7 << 25));
410
411 fbi->pcr = pcr;
412
7c2f891c
SH
413 /*
414 * Copy the RGB parameters for this display
415 * from the machine specific parameters.
416 */
80eee6bc
SH
417 var->red = rgb->red;
418 var->green = rgb->green;
419 var->blue = rgb->blue;
420 var->transp = rgb->transp;
7c2f891c
SH
421
422 pr_debug("RGBT length = %d:%d:%d:%d\n",
423 var->red.length, var->green.length, var->blue.length,
424 var->transp.length);
425
426 pr_debug("RGBT offset = %d:%d:%d:%d\n",
427 var->red.offset, var->green.offset, var->blue.offset,
428 var->transp.offset);
429
430 return 0;
431}
432
433/*
434 * imxfb_set_par():
435 * Set the user defined part of the display for the specified console
436 */
437static int imxfb_set_par(struct fb_info *info)
438{
439 struct imxfb_info *fbi = info->par;
440 struct fb_var_screeninfo *var = &info->var;
441
1512222b 442 if (var->bits_per_pixel == 16 || var->bits_per_pixel == 32)
7c2f891c
SH
443 info->fix.visual = FB_VISUAL_TRUECOLOR;
444 else if (!fbi->cmap_static)
445 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
446 else {
447 /*
448 * Some people have weird ideas about wanting static
449 * pseudocolor maps. I suspect their user space
450 * applications are broken.
451 */
452 info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
453 }
454
66c8719b 455 info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
7c2f891c
SH
456 fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16;
457
458 imxfb_activate_var(var, info);
459
460 return 0;
461}
462
81ef8061 463#ifdef PWMR_BACKLIGHT_AVAILABLE
7a2bb23c
EB
464static int imxfb_bl_get_brightness(struct backlight_device *bl)
465{
466 struct imxfb_info *fbi = bl_get_data(bl);
467
468 return readl(fbi->regs + LCDC_PWMR) & 0xFF;
469}
470
471static int imxfb_bl_update_status(struct backlight_device *bl)
472{
473 struct imxfb_info *fbi = bl_get_data(bl);
474 int brightness = bl->props.brightness;
475
476 if (bl->props.power != FB_BLANK_UNBLANK)
477 brightness = 0;
478 if (bl->props.fb_blank != FB_BLANK_UNBLANK)
479 brightness = 0;
480
481 fbi->pwmr = (fbi->pwmr & ~0xFF) | brightness;
482
13aaea03
SH
483 if (bl->props.fb_blank != FB_BLANK_UNBLANK) {
484 clk_prepare_enable(fbi->clk_ipg);
485 clk_prepare_enable(fbi->clk_ahb);
486 clk_prepare_enable(fbi->clk_per);
487 }
7a2bb23c 488 writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
13aaea03
SH
489 if (bl->props.fb_blank != FB_BLANK_UNBLANK) {
490 clk_disable_unprepare(fbi->clk_per);
491 clk_disable_unprepare(fbi->clk_ahb);
492 clk_disable_unprepare(fbi->clk_ipg);
493 }
7a2bb23c
EB
494
495 return 0;
496}
497
498static const struct backlight_ops imxfb_lcdc_bl_ops = {
499 .update_status = imxfb_bl_update_status,
500 .get_brightness = imxfb_bl_get_brightness,
501};
502
503static void imxfb_init_backlight(struct imxfb_info *fbi)
504{
505 struct backlight_properties props;
506 struct backlight_device *bl;
507
508 if (fbi->bl)
509 return;
510
511 memset(&props, 0, sizeof(struct backlight_properties));
512 props.max_brightness = 0xff;
bb7ca747 513 props.type = BACKLIGHT_RAW;
7a2bb23c
EB
514 writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
515
516 bl = backlight_device_register("imxfb-bl", &fbi->pdev->dev, fbi,
517 &imxfb_lcdc_bl_ops, &props);
518 if (IS_ERR(bl)) {
519 dev_err(&fbi->pdev->dev, "error %ld on backlight register\n",
520 PTR_ERR(bl));
521 return;
522 }
523
524 fbi->bl = bl;
525 bl->props.power = FB_BLANK_UNBLANK;
526 bl->props.fb_blank = FB_BLANK_UNBLANK;
527 bl->props.brightness = imxfb_bl_get_brightness(bl);
528}
529
530static void imxfb_exit_backlight(struct imxfb_info *fbi)
531{
532 if (fbi->bl)
533 backlight_device_unregister(fbi->bl);
534}
81ef8061 535#endif
7a2bb23c 536
7c2f891c
SH
537static void imxfb_enable_controller(struct imxfb_info *fbi)
538{
539 pr_debug("Enabling LCD controller\n");
540
72330b0e 541 writel(fbi->screen_dma, fbi->regs + LCDC_SSA);
7c2f891c 542
72330b0e
JB
543 /* panning offset 0 (0 pixel offset) */
544 writel(0x00000000, fbi->regs + LCDC_POS);
7c2f891c
SH
545
546 /* disable hardware cursor */
72330b0e
JB
547 writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1),
548 fbi->regs + LCDC_CPOS);
7c2f891c 549
f142b619
SH
550 /*
551 * RMCR_LCDC_EN_MX1 is present on i.MX1 only, but doesn't hurt
552 * on other SoCs
553 */
554 writel(RMCR_LCDC_EN_MX1, fbi->regs + LCDC_RMCR);
7c2f891c 555
13aaea03
SH
556 clk_prepare_enable(fbi->clk_ipg);
557 clk_prepare_enable(fbi->clk_ahb);
558 clk_prepare_enable(fbi->clk_per);
f909ef64 559
66c8719b 560 if (fbi->backlight_power)
7c2f891c 561 fbi->backlight_power(1);
66c8719b 562 if (fbi->lcd_power)
7c2f891c
SH
563 fbi->lcd_power(1);
564}
565
566static void imxfb_disable_controller(struct imxfb_info *fbi)
567{
568 pr_debug("Disabling LCD controller\n");
569
66c8719b 570 if (fbi->backlight_power)
7c2f891c 571 fbi->backlight_power(0);
66c8719b 572 if (fbi->lcd_power)
7c2f891c
SH
573 fbi->lcd_power(0);
574
13aaea03
SH
575 clk_disable_unprepare(fbi->clk_per);
576 clk_disable_unprepare(fbi->clk_ipg);
577 clk_disable_unprepare(fbi->clk_ahb);
f909ef64 578
72330b0e 579 writel(0, fbi->regs + LCDC_RMCR);
7c2f891c
SH
580}
581
582static int imxfb_blank(int blank, struct fb_info *info)
583{
584 struct imxfb_info *fbi = info->par;
585
586 pr_debug("imxfb_blank: blank=%d\n", blank);
587
588 switch (blank) {
589 case FB_BLANK_POWERDOWN:
590 case FB_BLANK_VSYNC_SUSPEND:
591 case FB_BLANK_HSYNC_SUSPEND:
592 case FB_BLANK_NORMAL:
593 imxfb_disable_controller(fbi);
594 break;
595
596 case FB_BLANK_UNBLANK:
597 imxfb_enable_controller(fbi);
598 break;
599 }
600 return 0;
601}
602
603static struct fb_ops imxfb_ops = {
604 .owner = THIS_MODULE,
605 .fb_check_var = imxfb_check_var,
606 .fb_set_par = imxfb_set_par,
607 .fb_setcolreg = imxfb_setcolreg,
608 .fb_fillrect = cfb_fillrect,
609 .fb_copyarea = cfb_copyarea,
610 .fb_imageblit = cfb_imageblit,
611 .fb_blank = imxfb_blank,
7c2f891c
SH
612};
613
614/*
615 * imxfb_activate_var():
616 * Configures LCD Controller based on entries in var parameter. Settings are
617 * only written to the controller if changes were made.
618 */
619static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info)
620{
621 struct imxfb_info *fbi = info->par;
e69dc9a9 622 u32 ymax_mask = is_imx1_fb(fbi) ? YMAX_MASK_IMX1 : YMAX_MASK_IMX21;
f909ef64 623
7c2f891c
SH
624 pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n",
625 var->xres, var->hsync_len,
626 var->left_margin, var->right_margin);
627 pr_debug("var: yres=%d vslen=%d um=%d bm=%d\n",
628 var->yres, var->vsync_len,
629 var->upper_margin, var->lower_margin);
630
631#if DEBUG_VAR
632 if (var->xres < 16 || var->xres > 1024)
633 printk(KERN_ERR "%s: invalid xres %d\n",
634 info->fix.id, var->xres);
635 if (var->hsync_len < 1 || var->hsync_len > 64)
636 printk(KERN_ERR "%s: invalid hsync_len %d\n",
637 info->fix.id, var->hsync_len);
638 if (var->left_margin > 255)
639 printk(KERN_ERR "%s: invalid left_margin %d\n",
640 info->fix.id, var->left_margin);
641 if (var->right_margin > 255)
642 printk(KERN_ERR "%s: invalid right_margin %d\n",
643 info->fix.id, var->right_margin);
e69dc9a9 644 if (var->yres < 1 || var->yres > ymax_mask)
7c2f891c
SH
645 printk(KERN_ERR "%s: invalid yres %d\n",
646 info->fix.id, var->yres);
647 if (var->vsync_len > 100)
648 printk(KERN_ERR "%s: invalid vsync_len %d\n",
649 info->fix.id, var->vsync_len);
650 if (var->upper_margin > 63)
651 printk(KERN_ERR "%s: invalid upper_margin %d\n",
652 info->fix.id, var->upper_margin);
653 if (var->lower_margin > 255)
654 printk(KERN_ERR "%s: invalid lower_margin %d\n",
655 info->fix.id, var->lower_margin);
656#endif
657
343684ff
SH
658 /* physical screen start address */
659 writel(VPW_VPW(var->xres * var->bits_per_pixel / 8 / 4),
660 fbi->regs + LCDC_VPW);
661
7e8549bc
SH
662 writel(HCR_H_WIDTH(var->hsync_len - 1) |
663 HCR_H_WAIT_1(var->right_margin - 1) |
664 HCR_H_WAIT_2(var->left_margin - 3),
72330b0e 665 fbi->regs + LCDC_HCR);
7c2f891c 666
72330b0e 667 writel(VCR_V_WIDTH(var->vsync_len) |
d6ed5755
SH
668 VCR_V_WAIT_1(var->lower_margin) |
669 VCR_V_WAIT_2(var->upper_margin),
72330b0e 670 fbi->regs + LCDC_VCR);
7c2f891c 671
e69dc9a9 672 writel(SIZE_XMAX(var->xres) | (var->yres & ymax_mask),
72330b0e 673 fbi->regs + LCDC_SIZE);
f909ef64 674
343684ff 675 writel(fbi->pcr, fbi->regs + LCDC_PCR);
81ef8061
EB
676#ifndef PWMR_BACKLIGHT_AVAILABLE
677 writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
678#endif
72330b0e
JB
679 writel(fbi->lscr1, fbi->regs + LCDC_LSCR1);
680 writel(fbi->dmacr, fbi->regs + LCDC_DMACR);
7c2f891c
SH
681
682 return 0;
683}
684
7c2f891c
SH
685#ifdef CONFIG_PM
686/*
687 * Power management hooks. Note that we won't be called from IRQ context,
688 * unlike the blank functions above, so we may sleep.
689 */
3ae5eaec 690static int imxfb_suspend(struct platform_device *dev, pm_message_t state)
7c2f891c 691{
1ec56203
UKK
692 struct fb_info *info = platform_get_drvdata(dev);
693 struct imxfb_info *fbi = info->par;
66c8719b
SH
694
695 pr_debug("%s\n", __func__);
7c2f891c 696
9480e307 697 imxfb_disable_controller(fbi);
7c2f891c
SH
698 return 0;
699}
700
3ae5eaec 701static int imxfb_resume(struct platform_device *dev)
7c2f891c 702{
1ec56203
UKK
703 struct fb_info *info = platform_get_drvdata(dev);
704 struct imxfb_info *fbi = info->par;
66c8719b
SH
705
706 pr_debug("%s\n", __func__);
7c2f891c 707
9480e307 708 imxfb_enable_controller(fbi);
7c2f891c
SH
709 return 0;
710}
711#else
712#define imxfb_suspend NULL
713#define imxfb_resume NULL
714#endif
715
72330b0e 716static int __init imxfb_init_fbinfo(struct platform_device *pdev)
7c2f891c 717{
27889273 718 struct imx_fb_platform_data *pdata = pdev->dev.platform_data;
72330b0e 719 struct fb_info *info = dev_get_drvdata(&pdev->dev);
7c2f891c 720 struct imxfb_info *fbi = info->par;
343684ff
SH
721 struct imx_fb_videomode *m;
722 int i;
7c2f891c 723
5ae12170 724 pr_debug("%s\n",__func__);
7c2f891c 725
66c8719b 726 info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL);
7c2f891c
SH
727 if (!info->pseudo_palette)
728 return -ENOMEM;
729
730 memset(fbi, 0, sizeof(struct imxfb_info));
7c2f891c
SH
731
732 strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id));
733
66c8719b 734 info->fix.type = FB_TYPE_PACKED_PIXELS;
7c2f891c
SH
735 info->fix.type_aux = 0;
736 info->fix.xpanstep = 0;
737 info->fix.ypanstep = 0;
738 info->fix.ywrapstep = 0;
66c8719b 739 info->fix.accel = FB_ACCEL_NONE;
7c2f891c
SH
740
741 info->var.nonstd = 0;
742 info->var.activate = FB_ACTIVATE_NOW;
743 info->var.height = -1;
744 info->var.width = -1;
745 info->var.accel_flags = 0;
66c8719b 746 info->var.vmode = FB_VMODE_NONINTERLACED;
7c2f891c
SH
747
748 info->fbops = &imxfb_ops;
66c8719b
SH
749 info->flags = FBINFO_FLAG_DEFAULT |
750 FBINFO_READS_FAST;
27889273
SH
751 info->var.grayscale = pdata->cmap_greyscale;
752 fbi->cmap_inverse = pdata->cmap_inverse;
753 fbi->cmap_static = pdata->cmap_static;
27889273
SH
754 fbi->lscr1 = pdata->lscr1;
755 fbi->dmacr = pdata->dmacr;
756 fbi->pwmr = pdata->pwmr;
757 fbi->lcd_power = pdata->lcd_power;
758 fbi->backlight_power = pdata->backlight_power;
343684ff
SH
759
760 for (i = 0, m = &pdata->mode[0]; i < pdata->num_modes; i++, m++)
761 info->fix.smem_len = max_t(size_t, info->fix.smem_len,
762 m->mode.xres * m->mode.yres * m->bpp / 8);
7c2f891c
SH
763
764 return 0;
765}
766
3ae5eaec 767static int __init imxfb_probe(struct platform_device *pdev)
7c2f891c 768{
7c2f891c
SH
769 struct imxfb_info *fbi;
770 struct fb_info *info;
27889273 771 struct imx_fb_platform_data *pdata;
7c2f891c 772 struct resource *res;
343684ff 773 int ret, i;
7c2f891c 774
d6b51502 775 dev_info(&pdev->dev, "i.MX Framebuffer driver\n");
7c2f891c
SH
776
777 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
66c8719b 778 if (!res)
7c2f891c
SH
779 return -ENODEV;
780
27889273
SH
781 pdata = pdev->dev.platform_data;
782 if (!pdata) {
f99c8929 783 dev_err(&pdev->dev,"No platform_data available\n");
7c2f891c
SH
784 return -ENOMEM;
785 }
786
3ae5eaec 787 info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev);
66c8719b 788 if (!info)
7c2f891c
SH
789 return -ENOMEM;
790
791 fbi = info->par;
e69dc9a9 792 fbi->devtype = pdev->id_entry->driver_data;
7c2f891c 793
343684ff
SH
794 if (!fb_mode)
795 fb_mode = pdata->mode[0].mode.name;
796
3ae5eaec 797 platform_set_drvdata(pdev, info);
7c2f891c 798
72330b0e 799 ret = imxfb_init_fbinfo(pdev);
66c8719b 800 if (ret < 0)
7c2f891c
SH
801 goto failed_init;
802
72330b0e
JB
803 res = request_mem_region(res->start, resource_size(res),
804 DRIVER_NAME);
7c2f891c
SH
805 if (!res) {
806 ret = -EBUSY;
72330b0e
JB
807 goto failed_req;
808 }
809
13aaea03
SH
810 fbi->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
811 if (IS_ERR(fbi->clk_ipg)) {
812 ret = PTR_ERR(fbi->clk_ipg);
813 goto failed_getclock;
814 }
815
816 fbi->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
817 if (IS_ERR(fbi->clk_ahb)) {
818 ret = PTR_ERR(fbi->clk_ahb);
819 goto failed_getclock;
820 }
821
822 fbi->clk_per = devm_clk_get(&pdev->dev, "per");
823 if (IS_ERR(fbi->clk_per)) {
824 ret = PTR_ERR(fbi->clk_per);
f909ef64
SH
825 goto failed_getclock;
826 }
827
72330b0e
JB
828 fbi->regs = ioremap(res->start, resource_size(res));
829 if (fbi->regs == NULL) {
d6b51502 830 dev_err(&pdev->dev, "Cannot map frame buffer registers\n");
caf0a5c9 831 ret = -ENOMEM;
72330b0e 832 goto failed_ioremap;
7c2f891c
SH
833 }
834
27889273 835 if (!pdata->fixed_screen_cpu) {
72330b0e
JB
836 fbi->map_size = PAGE_ALIGN(info->fix.smem_len);
837 fbi->map_cpu = dma_alloc_writecombine(&pdev->dev,
838 fbi->map_size, &fbi->map_dma, GFP_KERNEL);
839
840 if (!fbi->map_cpu) {
f99c8929 841 dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret);
7c2f891c
SH
842 ret = -ENOMEM;
843 goto failed_map;
844 }
72330b0e
JB
845
846 info->screen_base = fbi->map_cpu;
847 fbi->screen_cpu = fbi->map_cpu;
848 fbi->screen_dma = fbi->map_dma;
849 info->fix.smem_start = fbi->screen_dma;
7c2f891c
SH
850 } else {
851 /* Fixed framebuffer mapping enables location of the screen in eSRAM */
27889273
SH
852 fbi->map_cpu = pdata->fixed_screen_cpu;
853 fbi->map_dma = pdata->fixed_screen_dma;
7c2f891c
SH
854 info->screen_base = fbi->map_cpu;
855 fbi->screen_cpu = fbi->map_cpu;
856 fbi->screen_dma = fbi->map_dma;
857 info->fix.smem_start = fbi->screen_dma;
858 }
859
c0b90a31
SH
860 if (pdata->init) {
861 ret = pdata->init(fbi->pdev);
862 if (ret)
863 goto failed_platform_init;
864 }
865
343684ff
SH
866 fbi->mode = pdata->mode;
867 fbi->num_modes = pdata->num_modes;
868
869 INIT_LIST_HEAD(&info->modelist);
870 for (i = 0; i < pdata->num_modes; i++)
871 fb_add_videomode(&pdata->mode[i].mode, &info->modelist);
872
7c2f891c
SH
873 /*
874 * This makes sure that our colour bitfield
875 * descriptors are correctly initialised.
876 */
877 imxfb_check_var(&info->var, info);
878
66c8719b 879 ret = fb_alloc_cmap(&info->cmap, 1 << info->var.bits_per_pixel, 0);
7c2f891c
SH
880 if (ret < 0)
881 goto failed_cmap;
882
7c2f891c
SH
883 imxfb_set_par(info);
884 ret = register_framebuffer(info);
885 if (ret < 0) {
f99c8929 886 dev_err(&pdev->dev, "failed to register framebuffer\n");
7c2f891c
SH
887 goto failed_register;
888 }
889
890 imxfb_enable_controller(fbi);
7a2bb23c 891 fbi->pdev = pdev;
81ef8061 892#ifdef PWMR_BACKLIGHT_AVAILABLE
7a2bb23c 893 imxfb_init_backlight(fbi);
81ef8061 894#endif
7c2f891c
SH
895
896 return 0;
897
898failed_register:
899 fb_dealloc_cmap(&info->cmap);
900failed_cmap:
c0b90a31
SH
901 if (pdata->exit)
902 pdata->exit(fbi->pdev);
903failed_platform_init:
27889273 904 if (!pdata->fixed_screen_cpu)
3ae5eaec 905 dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu,
72330b0e 906 fbi->map_dma);
7c2f891c 907failed_map:
72330b0e
JB
908 iounmap(fbi->regs);
909failed_ioremap:
609d3bbf 910failed_getclock:
d6b51502 911 release_mem_region(res->start, resource_size(res));
72330b0e
JB
912failed_req:
913 kfree(info->pseudo_palette);
7c2f891c 914failed_init:
3ae5eaec 915 platform_set_drvdata(pdev, NULL);
7c2f891c
SH
916 framebuffer_release(info);
917 return ret;
918}
919
72330b0e 920static int __devexit imxfb_remove(struct platform_device *pdev)
7c2f891c 921{
c0b90a31 922 struct imx_fb_platform_data *pdata;
3ae5eaec 923 struct fb_info *info = platform_get_drvdata(pdev);
772a9e63 924 struct imxfb_info *fbi = info->par;
7c2f891c
SH
925 struct resource *res;
926
927 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
928
772a9e63 929 imxfb_disable_controller(fbi);
7c2f891c 930
81ef8061 931#ifdef PWMR_BACKLIGHT_AVAILABLE
7a2bb23c 932 imxfb_exit_backlight(fbi);
81ef8061 933#endif
7c2f891c
SH
934 unregister_framebuffer(info);
935
c0b90a31
SH
936 pdata = pdev->dev.platform_data;
937 if (pdata->exit)
938 pdata->exit(fbi->pdev);
939
7c2f891c
SH
940 fb_dealloc_cmap(&info->cmap);
941 kfree(info->pseudo_palette);
942 framebuffer_release(info);
943
72330b0e 944 iounmap(fbi->regs);
d6b51502 945 release_mem_region(res->start, resource_size(res));
f909ef64 946
3ae5eaec 947 platform_set_drvdata(pdev, NULL);
7c2f891c
SH
948
949 return 0;
950}
951
3ae5eaec 952void imxfb_shutdown(struct platform_device * dev)
7c2f891c 953{
3ae5eaec 954 struct fb_info *info = platform_get_drvdata(dev);
772a9e63
SH
955 struct imxfb_info *fbi = info->par;
956 imxfb_disable_controller(fbi);
7c2f891c
SH
957}
958
3ae5eaec 959static struct platform_driver imxfb_driver = {
7c2f891c
SH
960 .suspend = imxfb_suspend,
961 .resume = imxfb_resume,
72330b0e 962 .remove = __devexit_p(imxfb_remove),
7c2f891c 963 .shutdown = imxfb_shutdown,
3ae5eaec 964 .driver = {
72330b0e 965 .name = DRIVER_NAME,
3ae5eaec 966 },
e69dc9a9 967 .id_table = imxfb_devtype,
7c2f891c
SH
968};
969
343684ff
SH
970static int imxfb_setup(void)
971{
972#ifndef MODULE
973 char *opt, *options = NULL;
974
975 if (fb_get_options("imxfb", &options))
976 return -ENODEV;
977
978 if (!options || !*options)
979 return 0;
980
981 while ((opt = strsep(&options, ",")) != NULL) {
982 if (!*opt)
983 continue;
984 else
985 fb_mode = opt;
986 }
987#endif
988 return 0;
989}
990
7c2f891c
SH
991int __init imxfb_init(void)
992{
343684ff
SH
993 int ret = imxfb_setup();
994
995 if (ret < 0)
996 return ret;
997
72330b0e 998 return platform_driver_probe(&imxfb_driver, imxfb_probe);
7c2f891c
SH
999}
1000
1001static void __exit imxfb_cleanup(void)
1002{
3ae5eaec 1003 platform_driver_unregister(&imxfb_driver);
7c2f891c
SH
1004}
1005
1006module_init(imxfb_init);
1007module_exit(imxfb_cleanup);
1008
e3d5fb71 1009MODULE_DESCRIPTION("Freescale i.MX framebuffer driver");
7c2f891c
SH
1010MODULE_AUTHOR("Sascha Hauer, Pengutronix");
1011MODULE_LICENSE("GPL");