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1da177e4 LT |
1 | /* |
2 | * linux/drivers/video/offb.c -- Open Firmware based frame buffer device | |
3 | * | |
4 | * Copyright (C) 1997 Geert Uytterhoeven | |
5 | * | |
6 | * This driver is partly based on the PowerMac console driver: | |
7 | * | |
8 | * Copyright (C) 1996 Paul Mackerras | |
9 | * | |
10 | * This file is subject to the terms and conditions of the GNU General Public | |
11 | * License. See the file COPYING in the main directory of this archive for | |
12 | * more details. | |
13 | */ | |
14 | ||
1da177e4 LT |
15 | #include <linux/module.h> |
16 | #include <linux/kernel.h> | |
17 | #include <linux/errno.h> | |
18 | #include <linux/string.h> | |
19 | #include <linux/mm.h> | |
20 | #include <linux/tty.h> | |
21 | #include <linux/slab.h> | |
22 | #include <linux/vmalloc.h> | |
23 | #include <linux/delay.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/fb.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/ioport.h> | |
f365cfd0 | 28 | #include <linux/pci.h> |
1da177e4 LT |
29 | #include <asm/io.h> |
30 | #include <asm/prom.h> | |
31 | ||
32 | #ifdef CONFIG_PPC64 | |
33 | #include <asm/pci-bridge.h> | |
34 | #endif | |
35 | ||
36 | #ifdef CONFIG_PPC32 | |
37 | #include <asm/bootx.h> | |
38 | #endif | |
39 | ||
40 | #include "macmodes.h" | |
41 | ||
42 | /* Supported palette hacks */ | |
43 | enum { | |
44 | cmap_unknown, | |
45 | cmap_m64, /* ATI Mach64 */ | |
46 | cmap_r128, /* ATI Rage128 */ | |
47 | cmap_M3A, /* ATI Rage Mobility M3 Head A */ | |
48 | cmap_M3B, /* ATI Rage Mobility M3 Head B */ | |
49 | cmap_radeon, /* ATI Radeon */ | |
50 | cmap_gxt2000, /* IBM GXT2000 */ | |
51 | }; | |
52 | ||
53 | struct offb_par { | |
54 | volatile void __iomem *cmap_adr; | |
55 | volatile void __iomem *cmap_data; | |
56 | int cmap_type; | |
57 | int blanked; | |
58 | }; | |
59 | ||
60 | struct offb_par default_par; | |
61 | ||
62 | /* | |
63 | * Interface used by the world | |
64 | */ | |
65 | ||
66 | int offb_init(void); | |
67 | ||
68 | static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | |
69 | u_int transp, struct fb_info *info); | |
70 | static int offb_blank(int blank, struct fb_info *info); | |
71 | ||
72 | #ifdef CONFIG_PPC32 | |
73 | extern boot_infos_t *boot_infos; | |
74 | #endif | |
75 | ||
76 | static void offb_init_nodriver(struct device_node *); | |
77 | static void offb_init_fb(const char *name, const char *full_name, | |
78 | int width, int height, int depth, int pitch, | |
79 | unsigned long address, struct device_node *dp); | |
80 | ||
81 | static struct fb_ops offb_ops = { | |
82 | .owner = THIS_MODULE, | |
83 | .fb_setcolreg = offb_setcolreg, | |
84 | .fb_blank = offb_blank, | |
85 | .fb_fillrect = cfb_fillrect, | |
86 | .fb_copyarea = cfb_copyarea, | |
87 | .fb_imageblit = cfb_imageblit, | |
1da177e4 LT |
88 | }; |
89 | ||
90 | /* | |
91 | * Set a single color register. The values supplied are already | |
92 | * rounded down to the hardware's capabilities (according to the | |
93 | * entries in the var structure). Return != 0 for invalid regno. | |
94 | */ | |
95 | ||
96 | static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | |
97 | u_int transp, struct fb_info *info) | |
98 | { | |
99 | struct offb_par *par = (struct offb_par *) info->par; | |
100 | ||
101 | if (!par->cmap_adr || regno > 255) | |
102 | return 1; | |
103 | ||
104 | red >>= 8; | |
105 | green >>= 8; | |
106 | blue >>= 8; | |
107 | ||
108 | switch (par->cmap_type) { | |
109 | case cmap_m64: | |
110 | writeb(regno, par->cmap_adr); | |
111 | writeb(red, par->cmap_data); | |
112 | writeb(green, par->cmap_data); | |
113 | writeb(blue, par->cmap_data); | |
114 | break; | |
115 | case cmap_M3A: | |
116 | /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */ | |
117 | out_le32(par->cmap_adr + 0x58, | |
118 | in_le32(par->cmap_adr + 0x58) & ~0x20); | |
119 | case cmap_r128: | |
120 | /* Set palette index & data */ | |
121 | out_8(par->cmap_adr + 0xb0, regno); | |
122 | out_le32(par->cmap_adr + 0xb4, | |
123 | (red << 16 | green << 8 | blue)); | |
124 | break; | |
125 | case cmap_M3B: | |
126 | /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */ | |
127 | out_le32(par->cmap_adr + 0x58, | |
128 | in_le32(par->cmap_adr + 0x58) | 0x20); | |
129 | /* Set palette index & data */ | |
130 | out_8(par->cmap_adr + 0xb0, regno); | |
131 | out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue)); | |
132 | break; | |
133 | case cmap_radeon: | |
134 | /* Set palette index & data (could be smarter) */ | |
135 | out_8(par->cmap_adr + 0xb0, regno); | |
136 | out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue)); | |
137 | break; | |
138 | case cmap_gxt2000: | |
139 | out_le32((unsigned __iomem *) par->cmap_adr + regno, | |
140 | (red << 16 | green << 8 | blue)); | |
141 | break; | |
142 | } | |
143 | ||
144 | if (regno < 16) | |
145 | switch (info->var.bits_per_pixel) { | |
146 | case 16: | |
147 | ((u16 *) (info->pseudo_palette))[regno] = | |
148 | (regno << 10) | (regno << 5) | regno; | |
149 | break; | |
150 | case 32: | |
151 | { | |
152 | int i = (regno << 8) | regno; | |
153 | ((u32 *) (info->pseudo_palette))[regno] = | |
154 | (i << 16) | i; | |
155 | break; | |
156 | } | |
157 | } | |
158 | return 0; | |
159 | } | |
160 | ||
161 | /* | |
162 | * Blank the display. | |
163 | */ | |
164 | ||
165 | static int offb_blank(int blank, struct fb_info *info) | |
166 | { | |
167 | struct offb_par *par = (struct offb_par *) info->par; | |
168 | int i, j; | |
169 | ||
170 | if (!par->cmap_adr) | |
171 | return 0; | |
172 | ||
173 | if (!par->blanked) | |
174 | if (!blank) | |
175 | return 0; | |
176 | ||
177 | par->blanked = blank; | |
178 | ||
179 | if (blank) | |
180 | for (i = 0; i < 256; i++) { | |
181 | switch (par->cmap_type) { | |
182 | case cmap_m64: | |
183 | writeb(i, par->cmap_adr); | |
184 | for (j = 0; j < 3; j++) | |
185 | writeb(0, par->cmap_data); | |
186 | break; | |
187 | case cmap_M3A: | |
188 | /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */ | |
189 | out_le32(par->cmap_adr + 0x58, | |
190 | in_le32(par->cmap_adr + 0x58) & ~0x20); | |
191 | case cmap_r128: | |
192 | /* Set palette index & data */ | |
193 | out_8(par->cmap_adr + 0xb0, i); | |
194 | out_le32(par->cmap_adr + 0xb4, 0); | |
195 | break; | |
196 | case cmap_M3B: | |
197 | /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */ | |
198 | out_le32(par->cmap_adr + 0x58, | |
199 | in_le32(par->cmap_adr + 0x58) | 0x20); | |
200 | /* Set palette index & data */ | |
201 | out_8(par->cmap_adr + 0xb0, i); | |
202 | out_le32(par->cmap_adr + 0xb4, 0); | |
203 | break; | |
204 | case cmap_radeon: | |
205 | out_8(par->cmap_adr + 0xb0, i); | |
206 | out_le32(par->cmap_adr + 0xb4, 0); | |
207 | break; | |
208 | case cmap_gxt2000: | |
209 | out_le32((unsigned __iomem *) par->cmap_adr + i, | |
210 | 0); | |
211 | break; | |
212 | } | |
213 | } else | |
214 | fb_set_cmap(&info->cmap, info); | |
215 | return 0; | |
216 | } | |
217 | ||
218 | /* | |
219 | * Initialisation | |
220 | */ | |
221 | ||
222 | int __init offb_init(void) | |
223 | { | |
224 | struct device_node *dp = NULL, *boot_disp = NULL; | |
cc5d0189 | 225 | |
1da177e4 LT |
226 | #if defined(CONFIG_BOOTX_TEXT) && defined(CONFIG_PPC32) |
227 | struct device_node *macos_display = NULL; | |
228 | #endif | |
229 | if (fb_get_options("offb", NULL)) | |
230 | return -ENODEV; | |
231 | ||
232 | #if defined(CONFIG_BOOTX_TEXT) && defined(CONFIG_PPC32) | |
233 | /* If we're booted from BootX... */ | |
234 | if (boot_infos != 0) { | |
235 | unsigned long addr = | |
236 | (unsigned long) boot_infos->dispDeviceBase; | |
cc5d0189 BH |
237 | u32 *addrp; |
238 | u64 daddr, dsize; | |
239 | unsigned int flags; | |
240 | ||
1da177e4 LT |
241 | /* find the device node corresponding to the macos display */ |
242 | while ((dp = of_find_node_by_type(dp, "display"))) { | |
243 | int i; | |
1da177e4 LT |
244 | |
245 | /* | |
cc5d0189 | 246 | * Look for an AAPL,address property first. |
1da177e4 | 247 | */ |
cc5d0189 BH |
248 | unsigned int na; |
249 | unsigned int *ap = | |
250 | (unsigned int *)get_property(dp, "AAPL,address", | |
251 | &na); | |
252 | if (ap != 0) { | |
253 | for (na /= sizeof(unsigned int); na > 0; | |
254 | --na, ++ap) | |
255 | if (*ap <= addr && | |
256 | addr < *ap + 0x1000000) { | |
257 | macos_display = dp; | |
258 | goto foundit; | |
259 | } | |
1da177e4 LT |
260 | } |
261 | ||
262 | /* | |
263 | * See if the display address is in one of the address | |
264 | * ranges for this display. | |
265 | */ | |
cc5d0189 BH |
266 | i = 0; |
267 | for (;;) { | |
268 | addrp = of_get_address(dp, i++, &dsize, &flags); | |
269 | if (addrp == NULL) | |
1da177e4 | 270 | break; |
cc5d0189 BH |
271 | if (!(flags & IORESOURCE_MEM)) |
272 | continue; | |
273 | daddr = of_translate_address(dp, addrp); | |
274 | if (daddr == OF_BAD_ADDR) | |
275 | continue; | |
276 | if (daddr <= addr && addr < (daddr + dsize)) { | |
277 | macos_display = dp; | |
278 | goto foundit; | |
279 | } | |
1da177e4 | 280 | } |
cc5d0189 BH |
281 | foundit: |
282 | if (macos_display) { | |
1da177e4 LT |
283 | printk(KERN_INFO "MacOS display is %s\n", |
284 | dp->full_name); | |
1da177e4 LT |
285 | break; |
286 | } | |
287 | } | |
288 | ||
289 | /* initialize it */ | |
290 | offb_init_fb(macos_display ? macos_display-> | |
291 | name : "MacOS display", | |
292 | macos_display ? macos_display-> | |
293 | full_name : "MacOS display", | |
294 | boot_infos->dispDeviceRect[2], | |
295 | boot_infos->dispDeviceRect[3], | |
296 | boot_infos->dispDeviceDepth, | |
297 | boot_infos->dispDeviceRowBytes, addr, NULL); | |
298 | } | |
299 | #endif /* defined(CONFIG_BOOTX_TEXT) && defined(CONFIG_PPC32) */ | |
300 | ||
301 | for (dp = NULL; (dp = of_find_node_by_type(dp, "display"));) { | |
302 | if (get_property(dp, "linux,opened", NULL) && | |
303 | get_property(dp, "linux,boot-display", NULL)) { | |
304 | boot_disp = dp; | |
305 | offb_init_nodriver(dp); | |
306 | } | |
307 | } | |
308 | for (dp = NULL; (dp = of_find_node_by_type(dp, "display"));) { | |
309 | if (get_property(dp, "linux,opened", NULL) && | |
310 | dp != boot_disp) | |
311 | offb_init_nodriver(dp); | |
312 | } | |
313 | ||
314 | return 0; | |
315 | } | |
316 | ||
317 | ||
318 | static void __init offb_init_nodriver(struct device_node *dp) | |
319 | { | |
320 | int *pp, i; | |
321 | unsigned int len; | |
322 | int width = 640, height = 480, depth = 8, pitch; | |
cc5d0189 BH |
323 | unsigned int flags, rsize, *up; |
324 | u64 address = OF_BAD_ADDR; | |
325 | u32 *addrp; | |
326 | u64 asize; | |
1da177e4 LT |
327 | |
328 | if ((pp = (int *) get_property(dp, "depth", &len)) != NULL | |
329 | && len == sizeof(int)) | |
330 | depth = *pp; | |
331 | if ((pp = (int *) get_property(dp, "width", &len)) != NULL | |
332 | && len == sizeof(int)) | |
333 | width = *pp; | |
334 | if ((pp = (int *) get_property(dp, "height", &len)) != NULL | |
335 | && len == sizeof(int)) | |
336 | height = *pp; | |
337 | if ((pp = (int *) get_property(dp, "linebytes", &len)) != NULL | |
338 | && len == sizeof(int)) { | |
339 | pitch = *pp; | |
340 | if (pitch == 1) | |
341 | pitch = 0x1000; | |
342 | } else | |
343 | pitch = width; | |
b341e32e BH |
344 | |
345 | rsize = (unsigned long)pitch * (unsigned long)height * | |
346 | (unsigned long)(depth / 8); | |
347 | ||
348 | /* Try to match device to a PCI device in order to get a properly | |
349 | * translated address rather then trying to decode the open firmware | |
350 | * stuff in various incorrect ways | |
351 | */ | |
352 | #ifdef CONFIG_PCI | |
353 | /* First try to locate the PCI device if any */ | |
354 | { | |
355 | struct pci_dev *pdev = NULL; | |
356 | ||
357 | for_each_pci_dev(pdev) { | |
358 | if (dp == pci_device_to_OF_node(pdev)) | |
359 | break; | |
360 | } | |
361 | if (pdev) { | |
cc5d0189 | 362 | for (i = 0; i < 6 && address == OF_BAD_ADDR; i++) { |
b341e32e BH |
363 | if ((pci_resource_flags(pdev, i) & |
364 | IORESOURCE_MEM) && | |
365 | (pci_resource_len(pdev, i) >= rsize)) | |
366 | address = pci_resource_start(pdev, i); | |
367 | } | |
368 | pci_dev_put(pdev); | |
369 | } | |
370 | } | |
371 | #endif /* CONFIG_PCI */ | |
372 | ||
cc5d0189 BH |
373 | /* This one is dodgy, we may drop it ... */ |
374 | if (address == OF_BAD_ADDR && | |
375 | (up = (unsigned *) get_property(dp, "address", &len)) != NULL && | |
376 | len == sizeof(unsigned int)) | |
377 | address = (u64) * up; | |
378 | ||
379 | if (address == OF_BAD_ADDR) { | |
380 | for (i = 0; (addrp = of_get_address(dp, i, &asize, &flags)) | |
381 | != NULL; i++) { | |
382 | if (!(flags & IORESOURCE_MEM)) | |
383 | continue; | |
384 | if (asize >= pitch * height * depth / 8) | |
385 | break; | |
386 | } | |
387 | if (addrp == NULL) { | |
1da177e4 LT |
388 | printk(KERN_ERR |
389 | "no framebuffer address found for %s\n", | |
390 | dp->full_name); | |
391 | return; | |
392 | } | |
cc5d0189 BH |
393 | address = of_translate_address(dp, addrp); |
394 | if (address == OF_BAD_ADDR) { | |
395 | printk(KERN_ERR | |
396 | "can't translate framebuffer address for %s\n", | |
397 | dp->full_name); | |
398 | return; | |
399 | } | |
1da177e4 LT |
400 | |
401 | /* kludge for valkyrie */ | |
402 | if (strcmp(dp->name, "valkyrie") == 0) | |
403 | address += 0x1000; | |
404 | } | |
405 | offb_init_fb(dp->name, dp->full_name, width, height, depth, | |
406 | pitch, address, dp); | |
407 | ||
408 | } | |
409 | ||
410 | static void __init offb_init_fb(const char *name, const char *full_name, | |
411 | int width, int height, int depth, | |
412 | int pitch, unsigned long address, | |
413 | struct device_node *dp) | |
414 | { | |
415 | unsigned long res_size = pitch * height * depth / 8; | |
416 | struct offb_par *par = &default_par; | |
417 | unsigned long res_start = address; | |
418 | struct fb_fix_screeninfo *fix; | |
419 | struct fb_var_screeninfo *var; | |
420 | struct fb_info *info; | |
421 | int size; | |
422 | ||
423 | if (!request_mem_region(res_start, res_size, "offb")) | |
424 | return; | |
425 | ||
426 | printk(KERN_INFO | |
427 | "Using unsupported %dx%d %s at %lx, depth=%d, pitch=%d\n", | |
428 | width, height, name, address, depth, pitch); | |
429 | if (depth != 8 && depth != 16 && depth != 32) { | |
430 | printk(KERN_ERR "%s: can't use depth = %d\n", full_name, | |
431 | depth); | |
432 | release_mem_region(res_start, res_size); | |
433 | return; | |
434 | } | |
435 | ||
436 | size = sizeof(struct fb_info) + sizeof(u32) * 17; | |
437 | ||
438 | info = kmalloc(size, GFP_ATOMIC); | |
439 | ||
440 | if (info == 0) { | |
441 | release_mem_region(res_start, res_size); | |
442 | return; | |
443 | } | |
444 | memset(info, 0, size); | |
445 | ||
446 | fix = &info->fix; | |
447 | var = &info->var; | |
448 | ||
449 | strcpy(fix->id, "OFfb "); | |
450 | strncat(fix->id, name, sizeof(fix->id) - sizeof("OFfb ")); | |
451 | fix->id[sizeof(fix->id) - 1] = '\0'; | |
452 | ||
453 | var->xres = var->xres_virtual = width; | |
454 | var->yres = var->yres_virtual = height; | |
455 | fix->line_length = pitch; | |
456 | ||
457 | fix->smem_start = address; | |
458 | fix->smem_len = pitch * height; | |
459 | fix->type = FB_TYPE_PACKED_PIXELS; | |
460 | fix->type_aux = 0; | |
461 | ||
462 | par->cmap_type = cmap_unknown; | |
463 | if (depth == 8) { | |
cc5d0189 BH |
464 | |
465 | /* Palette hacks disabled for now */ | |
466 | #if 0 | |
1da177e4 LT |
467 | if (dp && !strncmp(name, "ATY,Rage128", 11)) { |
468 | unsigned long regbase = dp->addrs[2].address; | |
469 | par->cmap_adr = ioremap(regbase, 0x1FFF); | |
470 | par->cmap_type = cmap_r128; | |
471 | } else if (dp && (!strncmp(name, "ATY,RageM3pA", 12) | |
472 | || !strncmp(name, "ATY,RageM3p12A", 14))) { | |
473 | unsigned long regbase = | |
474 | dp->parent->addrs[2].address; | |
475 | par->cmap_adr = ioremap(regbase, 0x1FFF); | |
476 | par->cmap_type = cmap_M3A; | |
477 | } else if (dp && !strncmp(name, "ATY,RageM3pB", 12)) { | |
478 | unsigned long regbase = | |
479 | dp->parent->addrs[2].address; | |
480 | par->cmap_adr = ioremap(regbase, 0x1FFF); | |
481 | par->cmap_type = cmap_M3B; | |
482 | } else if (dp && !strncmp(name, "ATY,Rage6", 9)) { | |
483 | unsigned long regbase = dp->addrs[1].address; | |
484 | par->cmap_adr = ioremap(regbase, 0x1FFF); | |
485 | par->cmap_type = cmap_radeon; | |
486 | } else if (!strncmp(name, "ATY,", 4)) { | |
487 | unsigned long base = address & 0xff000000UL; | |
488 | par->cmap_adr = | |
489 | ioremap(base + 0x7ff000, 0x1000) + 0xcc0; | |
490 | par->cmap_data = par->cmap_adr + 1; | |
491 | par->cmap_type = cmap_m64; | |
492 | } else if (device_is_compatible(dp, "pci1014,b7")) { | |
493 | unsigned long regbase = dp->addrs[0].address; | |
494 | par->cmap_adr = ioremap(regbase + 0x6000, 0x1000); | |
495 | par->cmap_type = cmap_gxt2000; | |
496 | } | |
cc5d0189 | 497 | #endif |
1da177e4 LT |
498 | fix->visual = par->cmap_adr ? FB_VISUAL_PSEUDOCOLOR |
499 | : FB_VISUAL_STATIC_PSEUDOCOLOR; | |
500 | } else | |
501 | fix->visual = /* par->cmap_adr ? FB_VISUAL_DIRECTCOLOR | |
502 | : */ FB_VISUAL_TRUECOLOR; | |
503 | ||
504 | var->xoffset = var->yoffset = 0; | |
505 | var->bits_per_pixel = depth; | |
506 | switch (depth) { | |
507 | case 8: | |
508 | var->bits_per_pixel = 8; | |
509 | var->red.offset = 0; | |
510 | var->red.length = 8; | |
511 | var->green.offset = 0; | |
512 | var->green.length = 8; | |
513 | var->blue.offset = 0; | |
514 | var->blue.length = 8; | |
515 | var->transp.offset = 0; | |
516 | var->transp.length = 0; | |
517 | break; | |
518 | case 16: /* RGB 555 */ | |
519 | var->bits_per_pixel = 16; | |
520 | var->red.offset = 10; | |
521 | var->red.length = 5; | |
522 | var->green.offset = 5; | |
523 | var->green.length = 5; | |
524 | var->blue.offset = 0; | |
525 | var->blue.length = 5; | |
526 | var->transp.offset = 0; | |
527 | var->transp.length = 0; | |
528 | break; | |
529 | case 32: /* RGB 888 */ | |
530 | var->bits_per_pixel = 32; | |
531 | var->red.offset = 16; | |
532 | var->red.length = 8; | |
533 | var->green.offset = 8; | |
534 | var->green.length = 8; | |
535 | var->blue.offset = 0; | |
536 | var->blue.length = 8; | |
537 | var->transp.offset = 24; | |
538 | var->transp.length = 8; | |
539 | break; | |
540 | } | |
541 | var->red.msb_right = var->green.msb_right = var->blue.msb_right = | |
542 | var->transp.msb_right = 0; | |
543 | var->grayscale = 0; | |
544 | var->nonstd = 0; | |
545 | var->activate = 0; | |
546 | var->height = var->width = -1; | |
547 | var->pixclock = 10000; | |
548 | var->left_margin = var->right_margin = 16; | |
549 | var->upper_margin = var->lower_margin = 16; | |
550 | var->hsync_len = var->vsync_len = 8; | |
551 | var->sync = 0; | |
552 | var->vmode = FB_VMODE_NONINTERLACED; | |
553 | ||
554 | info->fbops = &offb_ops; | |
555 | info->screen_base = ioremap(address, fix->smem_len); | |
556 | info->par = par; | |
557 | info->pseudo_palette = (void *) (info + 1); | |
558 | info->flags = FBINFO_DEFAULT; | |
559 | ||
560 | fb_alloc_cmap(&info->cmap, 256, 0); | |
561 | ||
562 | if (register_framebuffer(info) < 0) { | |
563 | kfree(info); | |
564 | release_mem_region(res_start, res_size); | |
565 | return; | |
566 | } | |
567 | ||
568 | printk(KERN_INFO "fb%d: Open Firmware frame buffer device on %s\n", | |
569 | info->node, full_name); | |
570 | } | |
571 | ||
572 | module_init(offb_init); | |
573 | MODULE_LICENSE("GPL"); |