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ps3fb: add support for configurable black borders
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CommitLineData
310d8c11
GU
1/*
2 * linux/drivers/video/ps3fb.c -- PS3 GPU frame buffer device
3 *
4 * Copyright (C) 2006 Sony Computer Entertainment Inc.
5 * Copyright 2006, 2007 Sony Corporation
6 *
7 * This file is based on :
8 *
9 * linux/drivers/video/vfb.c -- Virtual frame buffer device
10 *
11 * Copyright (C) 2002 James Simmons
12 *
13 * Copyright (C) 1997 Geert Uytterhoeven
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file COPYING in the main directory of this archive for
17 * more details.
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/errno.h>
23#include <linux/string.h>
24#include <linux/mm.h>
310d8c11 25#include <linux/interrupt.h>
310d8c11
GU
26#include <linux/console.h>
27#include <linux/ioctl.h>
1c0c8461
GU
28#include <linux/kthread.h>
29#include <linux/freezer.h>
84902b7a 30#include <linux/uaccess.h>
310d8c11
GU
31#include <linux/fb.h>
32#include <linux/init.h>
310d8c11
GU
33
34#include <asm/abs_addr.h>
35#include <asm/lv1call.h>
36#include <asm/ps3av.h>
37#include <asm/ps3fb.h>
38#include <asm/ps3.h>
39
9e6b99bd
GU
40
41#define DEVICE_NAME "ps3fb"
42
310d8c11
GU
43#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC 0x101
44#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP 0x102
45#define L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP 0x600
46#define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601
47#define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT_SYNC 0x602
48
49#define L1GPU_FB_BLIT_WAIT_FOR_COMPLETION (1ULL << 32)
50
51#define L1GPU_DISPLAY_SYNC_HSYNC 1
52#define L1GPU_DISPLAY_SYNC_VSYNC 2
53
9ac67a35
GU
54#define GPU_CMD_BUF_SIZE (2 * 1024 * 1024)
55#define GPU_FB_START (64 * 1024)
310d8c11 56#define GPU_IOIF (0x0d000000UL)
f1664ed8 57#define GPU_ALIGN_UP(x) _ALIGN_UP((x), 64)
61e0b28e 58#define GPU_MAX_LINE_LENGTH (65536 - 64)
310d8c11 59
310d8c11
GU
60#define GPU_INTR_STATUS_VSYNC_0 0 /* vsync on head A */
61#define GPU_INTR_STATUS_VSYNC_1 1 /* vsync on head B */
62#define GPU_INTR_STATUS_FLIP_0 3 /* flip head A */
63#define GPU_INTR_STATUS_FLIP_1 4 /* flip head B */
64#define GPU_INTR_STATUS_QUEUE_0 5 /* queue head A */
65#define GPU_INTR_STATUS_QUEUE_1 6 /* queue head B */
66
67#define GPU_DRIVER_INFO_VERSION 0x211
68
69/* gpu internals */
70struct display_head {
71 u64 be_time_stamp;
72 u32 status;
73 u32 offset;
74 u32 res1;
75 u32 res2;
76 u32 field;
77 u32 reserved1;
78
79 u64 res3;
80 u32 raster;
81
82 u64 vblank_count;
83 u32 field_vsync;
84 u32 reserved2;
85};
86
87struct gpu_irq {
88 u32 irq_outlet;
89 u32 status;
90 u32 mask;
91 u32 video_cause;
92 u32 graph_cause;
93 u32 user_cause;
94
95 u32 res1;
96 u64 res2;
97
98 u32 reserved[4];
99};
100
101struct gpu_driver_info {
102 u32 version_driver;
103 u32 version_gpu;
104 u32 memory_size;
105 u32 hardware_channel;
106
107 u32 nvcore_frequency;
108 u32 memory_frequency;
109
110 u32 reserved[1063];
111 struct display_head display_head[8];
112 struct gpu_irq irq;
113};
114
115struct ps3fb_priv {
116 unsigned int irq_no;
310d8c11
GU
117
118 u64 context_handle, memory_handle;
119 void *xdr_ea;
2ce32e15 120 size_t xdr_size;
310d8c11 121 struct gpu_driver_info *dinfo;
310d8c11
GU
122
123 u64 vblank_count; /* frame count */
124 wait_queue_head_t wait_vsync;
125
310d8c11
GU
126 atomic_t ext_flip; /* on/off flip with vsync */
127 atomic_t f_count; /* fb_open count */
128 int is_blanked;
1c0c8461
GU
129 int is_kicked;
130 struct task_struct *task;
310d8c11
GU
131};
132static struct ps3fb_priv ps3fb;
133
0333d835
GU
134struct ps3fb_par {
135 u32 pseudo_palette[16];
136 int mode_id, new_mode_id;
0333d835 137 unsigned int num_frames; /* num of frame buffers */
f1664ed8
GU
138 unsigned int width;
139 unsigned int height;
9f4f21b4
GU
140 unsigned int ddr_line_length;
141 unsigned int ddr_frame_size;
142 unsigned int xdr_frame_size;
7974f72a
GU
143 unsigned int full_offset; /* start of fullscreen DDR fb */
144 unsigned int fb_offset; /* start of actual DDR fb */
145 unsigned int pan_offset;
0333d835
GU
146};
147
310d8c11
GU
148
149static const struct fb_videomode ps3fb_modedb[] = {
150 /* 60 Hz broadcast modes (modes "1" to "5") */
151 {
152 /* 480i */
153 "480i", 60, 576, 384, 74074, 130, 89, 78, 57, 63, 6,
154 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
155 }, {
156 /* 480p */
157 "480p", 60, 576, 384, 37037, 130, 89, 78, 57, 63, 6,
158 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
159 }, {
160 /* 720p */
161 "720p", 60, 1124, 644, 13481, 298, 148, 57, 44, 80, 5,
162 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
163 }, {
164 /* 1080i */
165 "1080i", 60, 1688, 964, 13481, 264, 160, 94, 62, 88, 5,
166 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
167 }, {
168 /* 1080p */
169 "1080p", 60, 1688, 964, 6741, 264, 160, 94, 62, 88, 5,
170 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
171 },
172
173 /* 50 Hz broadcast modes (modes "6" to "10") */
174 {
175 /* 576i */
176 "576i", 50, 576, 460, 74074, 142, 83, 97, 63, 63, 5,
177 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
178 }, {
179 /* 576p */
180 "576p", 50, 576, 460, 37037, 142, 83, 97, 63, 63, 5,
181 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
182 }, {
183 /* 720p */
184 "720p", 50, 1124, 644, 13468, 298, 478, 57, 44, 80, 5,
185 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
186 }, {
187 /* 1080 */
188 "1080i", 50, 1688, 964, 13468, 264, 600, 94, 62, 88, 5,
189 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
190 }, {
191 /* 1080p */
192 "1080p", 50, 1688, 964, 6734, 264, 600, 94, 62, 88, 5,
193 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
194 },
195
196 /* VESA modes (modes "11" to "13") */
197 {
198 /* WXGA */
199 "wxga", 60, 1280, 768, 12924, 160, 24, 29, 3, 136, 6,
200 0, FB_VMODE_NONINTERLACED,
201 FB_MODE_IS_VESA
202 }, {
203 /* SXGA */
204 "sxga", 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3,
205 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED,
206 FB_MODE_IS_VESA
207 }, {
208 /* WUXGA */
209 "wuxga", 60, 1920, 1200, 6494, 80, 48, 26, 3, 32, 6,
210 FB_SYNC_HOR_HIGH_ACT, FB_VMODE_NONINTERLACED,
211 FB_MODE_IS_VESA
212 },
213
214 /* 60 Hz broadcast modes (full resolution versions of modes "1" to "5") */
215 {
216 /* 480if */
217 "480if", 60, 720, 480, 74074, 58, 17, 30, 9, 63, 6,
218 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
219 }, {
220 /* 480pf */
221 "480pf", 60, 720, 480, 37037, 58, 17, 30, 9, 63, 6,
222 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
223 }, {
224 /* 720pf */
225 "720pf", 60, 1280, 720, 13481, 220, 70, 19, 6, 80, 5,
226 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
227 }, {
228 /* 1080if */
229 "1080if", 60, 1920, 1080, 13481, 148, 44, 36, 4, 88, 5,
230 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
231 }, {
232 /* 1080pf */
233 "1080pf", 60, 1920, 1080, 6741, 148, 44, 36, 4, 88, 5,
234 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
235 },
236
237 /* 50 Hz broadcast modes (full resolution versions of modes "6" to "10") */
238 {
239 /* 576if */
240 "576if", 50, 720, 576, 74074, 70, 11, 39, 5, 63, 5,
241 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
242 }, {
243 /* 576pf */
244 "576pf", 50, 720, 576, 37037, 70, 11, 39, 5, 63, 5,
245 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
246 }, {
247 /* 720pf */
248 "720pf", 50, 1280, 720, 13468, 220, 400, 19, 6, 80, 5,
249 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
250 }, {
251 /* 1080if */
252 "1080f", 50, 1920, 1080, 13468, 148, 484, 36, 4, 88, 5,
253 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
254 }, {
255 /* 1080pf */
256 "1080pf", 50, 1920, 1080, 6734, 148, 484, 36, 4, 88, 5,
257 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
258 }
259};
260
261
262#define HEAD_A
263#define HEAD_B
264
2ce32e15
GU
265#define BPP 4 /* number of bytes per pixel */
266
310d8c11 267
bd685ac8 268static int ps3fb_mode;
9e6b99bd 269module_param(ps3fb_mode, int, 0);
310d8c11 270
9e6b99bd 271static char *mode_option __devinitdata;
310d8c11 272
633bd111
GU
273static int ps3fb_cmp_mode(const struct fb_videomode *vmode,
274 const struct fb_var_screeninfo *var)
275{
276 /* resolution + black border must match a native resolution */
277 if (vmode->left_margin + vmode->xres + vmode->right_margin !=
278 var->left_margin + var->xres + var->right_margin ||
279 vmode->upper_margin + vmode->yres + vmode->lower_margin !=
280 var->upper_margin + var->yres + var->lower_margin)
281 return -1;
282
283 /* minimum limits for margins */
284 if (vmode->left_margin > var->left_margin ||
285 vmode->right_margin > var->right_margin ||
286 vmode->upper_margin > var->upper_margin ||
287 vmode->lower_margin > var->lower_margin)
288 return -1;
289
290 /* these fields must match exactly */
291 if (vmode->pixclock != var->pixclock ||
292 vmode->hsync_len != var->hsync_len ||
293 vmode->vsync_len != var->vsync_len ||
294 vmode->sync != var->sync ||
295 vmode->vmode != (var->vmode & FB_VMODE_MASK))
296 return -1;
297
298 return 0;
299}
300
301static unsigned int ps3fb_find_mode(struct fb_var_screeninfo *var,
61e0b28e 302 u32 *ddr_line_length, u32 *xdr_line_length)
310d8c11 303{
633bd111
GU
304 unsigned int i, mode;
305
306 for (i = PS3AV_MODE_1080P50; i < ARRAY_SIZE(ps3fb_modedb); i++)
307 if (!ps3fb_cmp_mode(&ps3fb_modedb[i], var))
61e0b28e 308 goto found;
310d8c11 309
535da7ff 310 pr_debug("ps3fb_find_mode: mode not found\n");
310d8c11 311 return 0;
61e0b28e
GU
312
313found:
633bd111
GU
314 *ddr_line_length = ps3fb_modedb[i].xres * BPP;
315
316 if (!var->xres) {
317 var->xres = 1;
318 var->right_margin--;
319 }
320 if (!var->yres) {
321 var->yres = 1;
322 var->lower_margin--;
323 }
61e0b28e
GU
324
325 if (ps3_compare_firmware_version(1, 9, 0) >= 0) {
326 *xdr_line_length = GPU_ALIGN_UP(max(var->xres,
327 var->xres_virtual) * BPP);
328 if (*xdr_line_length > GPU_MAX_LINE_LENGTH)
329 *xdr_line_length = GPU_MAX_LINE_LENGTH;
330 } else
331 *xdr_line_length = *ddr_line_length;
332
084ffff2 333 mode = i+1;
633bd111
GU
334 if (mode > PS3AV_MODE_WUXGA) {
335 mode -= PS3AV_MODE_WUXGA;
336 /* Full broadcast modes have the full mode bit set */
337 if (ps3fb_modedb[i].xres == var->xres &&
338 ps3fb_modedb[i].yres == var->yres)
339 mode |= PS3AV_MODE_FULL;
340 }
61e0b28e
GU
341
342 pr_debug("ps3fb_find_mode: mode %u\n", mode);
343
344 return mode;
310d8c11
GU
345}
346
0333d835 347static const struct fb_videomode *ps3fb_default_mode(int id)
310d8c11 348{
0333d835 349 u32 mode = id & PS3AV_MODE_MASK;
310d8c11
GU
350 u32 flags;
351
084ffff2 352 if (mode < PS3AV_MODE_480I || mode > PS3AV_MODE_WUXGA)
310d8c11
GU
353 return NULL;
354
0333d835 355 flags = id & ~PS3AV_MODE_MASK;
310d8c11 356
bbcfe340 357 if (mode <= PS3AV_MODE_1080P50 && flags & PS3AV_MODE_FULL) {
310d8c11 358 /* Full broadcast mode */
084ffff2 359 return &ps3fb_modedb[mode + PS3AV_MODE_WUXGA - 1];
310d8c11
GU
360 }
361
362 return &ps3fb_modedb[mode - 1];
363}
364
f1664ed8
GU
365static void ps3fb_sync_image(struct device *dev, u64 frame_offset,
366 u64 dst_offset, u64 src_offset, u32 width,
61e0b28e
GU
367 u32 height, u32 dst_line_length,
368 u32 src_line_length)
310d8c11 369{
f1664ed8 370 int status;
61e0b28e
GU
371 u64 line_length;
372
373 line_length = dst_line_length;
374 if (src_line_length != dst_line_length)
375 line_length |= (u64)src_line_length << 32;
310d8c11 376
9ac67a35 377 src_offset += GPU_FB_START;
310d8c11
GU
378 status = lv1_gpu_context_attribute(ps3fb.context_handle,
379 L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT,
f1664ed8 380 dst_offset, GPU_IOIF + src_offset,
310d8c11 381 L1GPU_FB_BLIT_WAIT_FOR_COMPLETION |
f1664ed8
GU
382 (width << 16) | height,
383 line_length);
310d8c11 384 if (status)
f1664ed8 385 dev_err(dev,
535da7ff
GU
386 "%s: lv1_gpu_context_attribute FB_BLIT failed: %d\n",
387 __func__, status);
310d8c11
GU
388#ifdef HEAD_A
389 status = lv1_gpu_context_attribute(ps3fb.context_handle,
390 L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP,
f1664ed8 391 0, frame_offset, 0, 0);
310d8c11 392 if (status)
f1664ed8 393 dev_err(dev, "%s: lv1_gpu_context_attribute FLIP failed: %d\n",
535da7ff 394 __func__, status);
310d8c11
GU
395#endif
396#ifdef HEAD_B
397 status = lv1_gpu_context_attribute(ps3fb.context_handle,
398 L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP,
f1664ed8 399 1, frame_offset, 0, 0);
310d8c11 400 if (status)
f1664ed8 401 dev_err(dev, "%s: lv1_gpu_context_attribute FLIP failed: %d\n",
535da7ff 402 __func__, status);
310d8c11 403#endif
f1664ed8
GU
404}
405
406static int ps3fb_sync(struct fb_info *info, u32 frame)
407{
408 struct ps3fb_par *par = info->par;
9f4f21b4 409 int error = 0;
61e0b28e 410 u64 ddr_base, xdr_base;
f1664ed8 411
f1664ed8
GU
412 if (frame > par->num_frames - 1) {
413 dev_dbg(info->device, "%s: invalid frame number (%u)\n",
414 __func__, frame);
415 error = -EINVAL;
416 goto out;
417 }
418
9f4f21b4
GU
419 xdr_base = frame * par->xdr_frame_size;
420 ddr_base = frame * par->ddr_frame_size;
f1664ed8 421
61e0b28e
GU
422 ps3fb_sync_image(info->device, ddr_base + par->full_offset,
423 ddr_base + par->fb_offset, xdr_base + par->pan_offset,
9f4f21b4
GU
424 par->width, par->height, par->ddr_line_length,
425 info->fix.line_length);
0333d835
GU
426
427out:
0333d835 428 return error;
310d8c11
GU
429}
430
310d8c11
GU
431static int ps3fb_open(struct fb_info *info, int user)
432{
433 atomic_inc(&ps3fb.f_count);
434 return 0;
435}
436
437static int ps3fb_release(struct fb_info *info, int user)
438{
439 if (atomic_dec_and_test(&ps3fb.f_count)) {
440 if (atomic_read(&ps3fb.ext_flip)) {
441 atomic_set(&ps3fb.ext_flip, 0);
8dab6376
JK
442 if (!try_acquire_console_sem()) {
443 ps3fb_sync(info, 0); /* single buffer */
444 release_console_sem();
445 }
310d8c11
GU
446 }
447 }
448 return 0;
449}
450
451 /*
452 * Setting the video mode has been split into two parts.
453 * First part, xxxfb_check_var, must not write anything
454 * to hardware, it should only verify and adjust var.
455 * This means it doesn't alter par but it does use hardware
456 * data from it to check this var.
457 */
458
459static int ps3fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
460{
61e0b28e 461 u32 xdr_line_length, ddr_line_length;
310d8c11 462 int mode;
310d8c11 463
535da7ff
GU
464 dev_dbg(info->device, "var->xres:%u info->var.xres:%u\n", var->xres,
465 info->var.xres);
466 dev_dbg(info->device, "var->yres:%u info->var.yres:%u\n", var->yres,
467 info->var.yres);
310d8c11
GU
468
469 /* FIXME For now we do exact matches only */
61e0b28e 470 mode = ps3fb_find_mode(var, &ddr_line_length, &xdr_line_length);
310d8c11
GU
471 if (!mode)
472 return -EINVAL;
473
fc7028b7
GU
474 /* Virtual screen */
475 if (var->xres_virtual < var->xres)
476 var->xres_virtual = var->xres;
477 if (var->yres_virtual < var->yres)
478 var->yres_virtual = var->yres;
310d8c11 479
61e0b28e 480 if (var->xres_virtual > xdr_line_length / BPP) {
535da7ff 481 dev_dbg(info->device,
fc7028b7 482 "Horizontal virtual screen size too large\n");
310d8c11
GU
483 return -EINVAL;
484 }
485
fc7028b7
GU
486 if (var->xoffset + var->xres > var->xres_virtual ||
487 var->yoffset + var->yres > var->yres_virtual) {
488 dev_dbg(info->device, "panning out-of-range\n");
489 return -EINVAL;
490 }
310d8c11
GU
491
492 /* We support ARGB8888 only */
493 if (var->bits_per_pixel > 32 || var->grayscale ||
494 var->red.offset > 16 || var->green.offset > 8 ||
495 var->blue.offset > 0 || var->transp.offset > 24 ||
496 var->red.length > 8 || var->green.length > 8 ||
497 var->blue.length > 8 || var->transp.length > 8 ||
498 var->red.msb_right || var->green.msb_right ||
499 var->blue.msb_right || var->transp.msb_right || var->nonstd) {
535da7ff 500 dev_dbg(info->device, "We support ARGB8888 only\n");
310d8c11
GU
501 return -EINVAL;
502 }
503
504 var->bits_per_pixel = 32;
505 var->red.offset = 16;
506 var->green.offset = 8;
507 var->blue.offset = 0;
508 var->transp.offset = 24;
509 var->red.length = 8;
510 var->green.length = 8;
511 var->blue.length = 8;
512 var->transp.length = 8;
513 var->red.msb_right = 0;
514 var->green.msb_right = 0;
515 var->blue.msb_right = 0;
516 var->transp.msb_right = 0;
517
518 /* Rotation is not supported */
519 if (var->rotate) {
535da7ff 520 dev_dbg(info->device, "Rotation is not supported\n");
310d8c11
GU
521 return -EINVAL;
522 }
523
524 /* Memory limit */
61e0b28e 525 if (var->yres_virtual * xdr_line_length > ps3fb.xdr_size) {
535da7ff 526 dev_dbg(info->device, "Not enough memory\n");
310d8c11
GU
527 return -ENOMEM;
528 }
529
530 var->height = -1;
531 var->width = -1;
532
533 return 0;
534}
535
536 /*
537 * This routine actually sets the video mode.
538 */
539
540static int ps3fb_set_par(struct fb_info *info)
541{
0333d835 542 struct ps3fb_par *par = info->par;
61e0b28e 543 unsigned int mode, ddr_line_length, xdr_line_length, lines, maxlines;
7974f72a 544 unsigned int ddr_xoff, ddr_yoff, offset;
9f4f21b4 545 const struct fb_videomode *vmode;
61e0b28e 546 u64 dst;
310d8c11 547
535da7ff 548 dev_dbg(info->device, "xres:%d xv:%d yres:%d yv:%d clock:%d\n",
310d8c11
GU
549 info->var.xres, info->var.xres_virtual,
550 info->var.yres, info->var.yres_virtual, info->var.pixclock);
310d8c11 551
61e0b28e 552 mode = ps3fb_find_mode(&info->var, &ddr_line_length, &xdr_line_length);
310d8c11
GU
553 if (!mode)
554 return -EINVAL;
555
9f4f21b4 556 vmode = ps3fb_default_mode(mode | PS3AV_MODE_FULL);
c95344a5 557
f1664ed8
GU
558 info->fix.smem_start = virt_to_abs(ps3fb.xdr_ea);
559 info->fix.smem_len = ps3fb.xdr_size;
fc7028b7
GU
560 info->fix.xpanstep = info->var.xres_virtual > info->var.xres ? 1 : 0;
561 info->fix.ypanstep = info->var.yres_virtual > info->var.yres ? 1 : 0;
61e0b28e 562 info->fix.line_length = xdr_line_length;
fc7028b7 563
f1664ed8 564 info->screen_base = (char __iomem *)ps3fb.xdr_ea;
310d8c11 565
9f4f21b4
GU
566 par->ddr_line_length = ddr_line_length;
567 par->ddr_frame_size = vmode->yres * ddr_line_length;
568 par->xdr_frame_size = info->var.yres_virtual * xdr_line_length;
569
61e0b28e 570 par->num_frames = ps3fb.xdr_size /
9f4f21b4 571 max(par->ddr_frame_size, par->xdr_frame_size);
310d8c11
GU
572
573 /* Keep the special bits we cannot set using fb_var_screeninfo */
0333d835 574 par->new_mode_id = (par->new_mode_id & ~PS3AV_MODE_MASK) | mode;
310d8c11 575
f1664ed8
GU
576 par->width = info->var.xres;
577 par->height = info->var.yres;
d9a4ba6a
GU
578
579 /* Start of the virtual frame buffer (relative to fullscreen) */
9f4f21b4
GU
580 ddr_xoff = info->var.left_margin - vmode->left_margin;
581 ddr_yoff = info->var.upper_margin - vmode->upper_margin;
582 offset = ddr_yoff * ddr_line_length + ddr_xoff * BPP;
d9a4ba6a 583
f1664ed8
GU
584 par->fb_offset = GPU_ALIGN_UP(offset);
585 par->full_offset = par->fb_offset - offset;
61e0b28e 586 par->pan_offset = info->var.yoffset * xdr_line_length +
fc7028b7 587 info->var.xoffset * BPP;
f1664ed8 588
0333d835
GU
589 if (par->new_mode_id != par->mode_id) {
590 if (ps3av_set_video_mode(par->new_mode_id)) {
591 par->new_mode_id = par->mode_id;
592 return -EINVAL;
593 }
594 par->mode_id = par->new_mode_id;
595 }
310d8c11 596
f1664ed8
GU
597 /* Clear XDR frame buffer memory */
598 memset(ps3fb.xdr_ea, 0, ps3fb.xdr_size);
599
600 /* Clear DDR frame buffer memory */
9f4f21b4 601 lines = vmode->yres * par->num_frames;
f1664ed8
GU
602 if (par->full_offset)
603 lines++;
61e0b28e
GU
604 maxlines = ps3fb.xdr_size / ddr_line_length;
605 for (dst = 0; lines; dst += maxlines * ddr_line_length) {
f1664ed8 606 unsigned int l = min(lines, maxlines);
9f4f21b4 607 ps3fb_sync_image(info->device, 0, dst, 0, vmode->xres, l,
61e0b28e 608 ddr_line_length, ddr_line_length);
f1664ed8
GU
609 lines -= l;
610 }
611
310d8c11
GU
612 return 0;
613}
614
615 /*
616 * Set a single color register. The values supplied are already
617 * rounded down to the hardware's capabilities (according to the
618 * entries in the var structure). Return != 0 for invalid regno.
619 */
620
621static int ps3fb_setcolreg(unsigned int regno, unsigned int red,
622 unsigned int green, unsigned int blue,
623 unsigned int transp, struct fb_info *info)
624{
625 if (regno >= 16)
626 return 1;
627
628 red >>= 8;
629 green >>= 8;
630 blue >>= 8;
631 transp >>= 8;
632
633 ((u32 *)info->pseudo_palette)[regno] = transp << 24 | red << 16 |
634 green << 8 | blue;
635 return 0;
636}
637
fc7028b7
GU
638static int ps3fb_pan_display(struct fb_var_screeninfo *var,
639 struct fb_info *info)
640{
641 struct ps3fb_par *par = info->par;
642
643 par->pan_offset = var->yoffset * info->fix.line_length +
644 var->xoffset * BPP;
645 return 0;
646}
647
310d8c11
GU
648 /*
649 * As we have a virtual frame buffer, we need our own mmap function
650 */
651
652static int ps3fb_mmap(struct fb_info *info, struct vm_area_struct *vma)
653{
654 unsigned long size, offset;
310d8c11
GU
655
656 size = vma->vm_end - vma->vm_start;
657 offset = vma->vm_pgoff << PAGE_SHIFT;
658 if (offset + size > info->fix.smem_len)
659 return -EINVAL;
660
2ce32e15 661 offset += info->fix.smem_start;
310d8c11
GU
662 if (remap_pfn_range(vma, vma->vm_start, offset >> PAGE_SHIFT,
663 size, vma->vm_page_prot))
664 return -EAGAIN;
665
535da7ff
GU
666 dev_dbg(info->device, "ps3fb: mmap framebuffer P(%lx)->V(%lx)\n",
667 offset, vma->vm_start);
310d8c11
GU
668 return 0;
669}
670
671 /*
672 * Blank the display
673 */
674
675static int ps3fb_blank(int blank, struct fb_info *info)
676{
677 int retval;
678
535da7ff 679 dev_dbg(info->device, "%s: blank:%d\n", __func__, blank);
310d8c11
GU
680 switch (blank) {
681 case FB_BLANK_POWERDOWN:
682 case FB_BLANK_HSYNC_SUSPEND:
683 case FB_BLANK_VSYNC_SUSPEND:
684 case FB_BLANK_NORMAL:
685 retval = ps3av_video_mute(1); /* mute on */
686 if (!retval)
687 ps3fb.is_blanked = 1;
688 break;
689
690 default: /* unblank */
691 retval = ps3av_video_mute(0); /* mute off */
692 if (!retval)
693 ps3fb.is_blanked = 0;
694 break;
695 }
696 return retval;
697}
698
699static int ps3fb_get_vblank(struct fb_vblank *vblank)
700{
3cc2c177 701 memset(vblank, 0, sizeof(*vblank));
310d8c11
GU
702 vblank->flags = FB_VBLANK_HAVE_VSYNC;
703 return 0;
704}
705
15e4d001 706static int ps3fb_wait_for_vsync(u32 crtc)
310d8c11
GU
707{
708 int ret;
709 u64 count;
710
711 count = ps3fb.vblank_count;
712 ret = wait_event_interruptible_timeout(ps3fb.wait_vsync,
713 count != ps3fb.vblank_count,
714 HZ / 10);
715 if (!ret)
716 return -ETIMEDOUT;
717
718 return 0;
719}
720
15e4d001 721static void ps3fb_flip_ctl(int on, void *data)
310d8c11 722{
9e6b99bd 723 struct ps3fb_priv *priv = data;
eca28743 724 if (on)
9e6b99bd 725 atomic_dec_if_positive(&priv->ext_flip);
eca28743 726 else
9e6b99bd 727 atomic_inc(&priv->ext_flip);
310d8c11
GU
728}
729
310d8c11
GU
730
731 /*
732 * ioctl
733 */
734
735static int ps3fb_ioctl(struct fb_info *info, unsigned int cmd,
736 unsigned long arg)
737{
738 void __user *argp = (void __user *)arg;
0333d835 739 u32 val;
310d8c11
GU
740 int retval = -EFAULT;
741
742 switch (cmd) {
743 case FBIOGET_VBLANK:
744 {
745 struct fb_vblank vblank;
535da7ff 746 dev_dbg(info->device, "FBIOGET_VBLANK:\n");
310d8c11
GU
747 retval = ps3fb_get_vblank(&vblank);
748 if (retval)
749 break;
750
751 if (copy_to_user(argp, &vblank, sizeof(vblank)))
752 retval = -EFAULT;
753 break;
754 }
755
756 case FBIO_WAITFORVSYNC:
757 {
758 u32 crt;
535da7ff 759 dev_dbg(info->device, "FBIO_WAITFORVSYNC:\n");
310d8c11
GU
760 if (get_user(crt, (u32 __user *) arg))
761 break;
762
763 retval = ps3fb_wait_for_vsync(crt);
764 break;
765 }
766
767 case PS3FB_IOCTL_SETMODE:
768 {
0333d835 769 struct ps3fb_par *par = info->par;
310d8c11
GU
770 const struct fb_videomode *mode;
771 struct fb_var_screeninfo var;
772
773 if (copy_from_user(&val, argp, sizeof(val)))
774 break;
775
64072901 776 if (!(val & PS3AV_MODE_MASK)) {
ce4c371a 777 u32 id = ps3av_get_auto_mode();
64072901
MK
778 if (id > 0)
779 val = (val & ~PS3AV_MODE_MASK) | id;
780 }
535da7ff 781 dev_dbg(info->device, "PS3FB_IOCTL_SETMODE:%x\n", val);
310d8c11 782 retval = -EINVAL;
0333d835 783 mode = ps3fb_default_mode(val);
310d8c11
GU
784 if (mode) {
785 var = info->var;
786 fb_videomode_to_var(&var, mode);
787 acquire_console_sem();
788 info->flags |= FBINFO_MISC_USEREVENT;
789 /* Force, in case only special bits changed */
790 var.activate |= FB_ACTIVATE_FORCE;
0333d835 791 par->new_mode_id = val;
310d8c11
GU
792 retval = fb_set_var(info, &var);
793 info->flags &= ~FBINFO_MISC_USEREVENT;
794 release_console_sem();
795 }
310d8c11
GU
796 break;
797 }
798
799 case PS3FB_IOCTL_GETMODE:
800 val = ps3av_get_mode();
535da7ff 801 dev_dbg(info->device, "PS3FB_IOCTL_GETMODE:%x\n", val);
310d8c11
GU
802 if (!copy_to_user(argp, &val, sizeof(val)))
803 retval = 0;
804 break;
805
806 case PS3FB_IOCTL_SCREENINFO:
807 {
0333d835 808 struct ps3fb_par *par = info->par;
310d8c11 809 struct ps3fb_ioctl_res res;
535da7ff 810 dev_dbg(info->device, "PS3FB_IOCTL_SCREENINFO:\n");
61e0b28e
GU
811 res.xres = info->fix.line_length / BPP;
812 res.yres = info->var.yres_virtual;
813 res.xoff = (res.xres - info->var.xres) / 2;
814 res.yoff = (res.yres - info->var.yres) / 2;
0333d835 815 res.num_frames = par->num_frames;
310d8c11
GU
816 if (!copy_to_user(argp, &res, sizeof(res)))
817 retval = 0;
818 break;
819 }
820
821 case PS3FB_IOCTL_ON:
535da7ff 822 dev_dbg(info->device, "PS3FB_IOCTL_ON:\n");
310d8c11
GU
823 atomic_inc(&ps3fb.ext_flip);
824 retval = 0;
825 break;
826
827 case PS3FB_IOCTL_OFF:
535da7ff 828 dev_dbg(info->device, "PS3FB_IOCTL_OFF:\n");
eca28743 829 atomic_dec_if_positive(&ps3fb.ext_flip);
310d8c11
GU
830 retval = 0;
831 break;
832
833 case PS3FB_IOCTL_FSEL:
834 if (copy_from_user(&val, argp, sizeof(val)))
835 break;
836
535da7ff 837 dev_dbg(info->device, "PS3FB_IOCTL_FSEL:%d\n", val);
8dab6376 838 acquire_console_sem();
535da7ff 839 retval = ps3fb_sync(info, val);
8dab6376 840 release_console_sem();
310d8c11
GU
841 break;
842
843 default:
844 retval = -ENOIOCTLCMD;
845 break;
846 }
847 return retval;
848}
849
850static int ps3fbd(void *arg)
851{
535da7ff
GU
852 struct fb_info *info = arg;
853
83144186 854 set_freezable();
1c0c8461
GU
855 while (!kthread_should_stop()) {
856 try_to_freeze();
857 set_current_state(TASK_INTERRUPTIBLE);
858 if (ps3fb.is_kicked) {
859 ps3fb.is_kicked = 0;
8dab6376 860 acquire_console_sem();
535da7ff 861 ps3fb_sync(info, 0); /* single buffer */
8dab6376 862 release_console_sem();
1c0c8461
GU
863 }
864 schedule();
310d8c11
GU
865 }
866 return 0;
867}
868
869static irqreturn_t ps3fb_vsync_interrupt(int irq, void *ptr)
870{
535da7ff 871 struct device *dev = ptr;
310d8c11
GU
872 u64 v1;
873 int status;
874 struct display_head *head = &ps3fb.dinfo->display_head[1];
875
876 status = lv1_gpu_context_intr(ps3fb.context_handle, &v1);
877 if (status) {
535da7ff
GU
878 dev_err(dev, "%s: lv1_gpu_context_intr failed: %d\n", __func__,
879 status);
310d8c11
GU
880 return IRQ_NONE;
881 }
882
883 if (v1 & (1 << GPU_INTR_STATUS_VSYNC_1)) {
884 /* VSYNC */
885 ps3fb.vblank_count = head->vblank_count;
1c0c8461
GU
886 if (ps3fb.task && !ps3fb.is_blanked &&
887 !atomic_read(&ps3fb.ext_flip)) {
888 ps3fb.is_kicked = 1;
889 wake_up_process(ps3fb.task);
890 }
310d8c11
GU
891 wake_up_interruptible(&ps3fb.wait_vsync);
892 }
893
894 return IRQ_HANDLED;
895}
896
310d8c11 897
9e6b99bd 898static int ps3fb_vsync_settings(struct gpu_driver_info *dinfo,
535da7ff 899 struct device *dev)
310d8c11
GU
900{
901 int error;
902
535da7ff
GU
903 dev_dbg(dev, "version_driver:%x\n", dinfo->version_driver);
904 dev_dbg(dev, "irq outlet:%x\n", dinfo->irq.irq_outlet);
905 dev_dbg(dev,
906 "version_gpu: %x memory_size: %x ch: %x core_freq: %d "
907 "mem_freq:%d\n",
310d8c11
GU
908 dinfo->version_gpu, dinfo->memory_size, dinfo->hardware_channel,
909 dinfo->nvcore_frequency/1000000, dinfo->memory_frequency/1000000);
910
911 if (dinfo->version_driver != GPU_DRIVER_INFO_VERSION) {
535da7ff
GU
912 dev_err(dev, "%s: version_driver err:%x\n", __func__,
913 dinfo->version_driver);
310d8c11
GU
914 return -EINVAL;
915 }
916
dc4f60c2
GL
917 error = ps3_irq_plug_setup(PS3_BINDING_CPU_ANY, dinfo->irq.irq_outlet,
918 &ps3fb.irq_no);
310d8c11 919 if (error) {
535da7ff 920 dev_err(dev, "%s: ps3_alloc_irq failed %d\n", __func__, error);
310d8c11
GU
921 return error;
922 }
923
924 error = request_irq(ps3fb.irq_no, ps3fb_vsync_interrupt, IRQF_DISABLED,
9e6b99bd 925 DEVICE_NAME, dev);
310d8c11 926 if (error) {
535da7ff 927 dev_err(dev, "%s: request_irq failed %d\n", __func__, error);
dc4f60c2 928 ps3_irq_plug_destroy(ps3fb.irq_no);
310d8c11
GU
929 return error;
930 }
931
932 dinfo->irq.mask = (1 << GPU_INTR_STATUS_VSYNC_1) |
933 (1 << GPU_INTR_STATUS_FLIP_1);
934 return 0;
935}
936
535da7ff 937static int ps3fb_xdr_settings(u64 xdr_lpar, struct device *dev)
310d8c11
GU
938{
939 int status;
940
941 status = lv1_gpu_context_iomap(ps3fb.context_handle, GPU_IOIF,
942 xdr_lpar, ps3fb_videomemory.size, 0);
943 if (status) {
535da7ff
GU
944 dev_err(dev, "%s: lv1_gpu_context_iomap failed: %d\n",
945 __func__, status);
310d8c11
GU
946 return -ENXIO;
947 }
535da7ff
GU
948 dev_dbg(dev,
949 "video:%p xdr_ea:%p ioif:%lx lpar:%lx phys:%lx size:%lx\n",
310d8c11
GU
950 ps3fb_videomemory.address, ps3fb.xdr_ea, GPU_IOIF, xdr_lpar,
951 virt_to_abs(ps3fb.xdr_ea), ps3fb_videomemory.size);
952
953 status = lv1_gpu_context_attribute(ps3fb.context_handle,
954 L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP,
9ac67a35
GU
955 xdr_lpar, GPU_CMD_BUF_SIZE,
956 GPU_IOIF, 0);
310d8c11 957 if (status) {
535da7ff
GU
958 dev_err(dev,
959 "%s: lv1_gpu_context_attribute FB_SETUP failed: %d\n",
960 __func__, status);
310d8c11
GU
961 return -ENXIO;
962 }
963 return 0;
964}
965
966static struct fb_ops ps3fb_ops = {
967 .fb_open = ps3fb_open,
968 .fb_release = ps3fb_release,
92c4579d
GU
969 .fb_read = fb_sys_read,
970 .fb_write = fb_sys_write,
310d8c11
GU
971 .fb_check_var = ps3fb_check_var,
972 .fb_set_par = ps3fb_set_par,
973 .fb_setcolreg = ps3fb_setcolreg,
fc7028b7 974 .fb_pan_display = ps3fb_pan_display,
92c4579d
GU
975 .fb_fillrect = sys_fillrect,
976 .fb_copyarea = sys_copyarea,
977 .fb_imageblit = sys_imageblit,
310d8c11
GU
978 .fb_mmap = ps3fb_mmap,
979 .fb_blank = ps3fb_blank,
980 .fb_ioctl = ps3fb_ioctl,
981 .fb_compat_ioctl = ps3fb_ioctl
982};
983
984static struct fb_fix_screeninfo ps3fb_fix __initdata = {
9e6b99bd 985 .id = DEVICE_NAME,
310d8c11
GU
986 .type = FB_TYPE_PACKED_PIXELS,
987 .visual = FB_VISUAL_TRUECOLOR,
988 .accel = FB_ACCEL_NONE,
989};
990
535da7ff 991static int ps3fb_set_sync(struct device *dev)
9e6b99bd
GU
992{
993 int status;
994
995#ifdef HEAD_A
996 status = lv1_gpu_context_attribute(0x0,
997 L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC,
998 0, L1GPU_DISPLAY_SYNC_VSYNC, 0, 0);
999 if (status) {
535da7ff
GU
1000 dev_err(dev,
1001 "%s: lv1_gpu_context_attribute DISPLAY_SYNC failed: "
1002 "%d\n",
1003 __func__, status);
9e6b99bd
GU
1004 return -1;
1005 }
1006#endif
1007#ifdef HEAD_B
1008 status = lv1_gpu_context_attribute(0x0,
1009 L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC,
1010 1, L1GPU_DISPLAY_SYNC_VSYNC, 0, 0);
1011
1012 if (status) {
535da7ff
GU
1013 dev_err(dev,
1014 "%s: lv1_gpu_context_attribute DISPLAY_SYNC failed: "
1015 "%d\n",
1016 __func__, status);
9e6b99bd
GU
1017 return -1;
1018 }
1019#endif
1020 return 0;
1021}
1022
1023static int __devinit ps3fb_probe(struct ps3_system_bus_device *dev)
310d8c11
GU
1024{
1025 struct fb_info *info;
0333d835 1026 struct ps3fb_par *par;
310d8c11
GU
1027 int retval = -ENOMEM;
1028 u64 ddr_lpar = 0;
1029 u64 lpar_dma_control = 0;
1030 u64 lpar_driver_info = 0;
1031 u64 lpar_reports = 0;
1032 u64 lpar_reports_size = 0;
1033 u64 xdr_lpar;
9f4f21b4 1034 int status;
1c0c8461 1035 struct task_struct *task;
ee592a5b 1036 unsigned long max_ps3fb_size;
310d8c11 1037
9ac67a35
GU
1038 if (ps3fb_videomemory.size < GPU_CMD_BUF_SIZE) {
1039 dev_err(&dev->core, "%s: Not enough video memory\n", __func__);
1040 return -ENOMEM;
1041 }
1042
9e6b99bd
GU
1043 status = ps3_open_hv_device(dev);
1044 if (status) {
535da7ff
GU
1045 dev_err(&dev->core, "%s: ps3_open_hv_device failed\n",
1046 __func__);
9e6b99bd
GU
1047 goto err;
1048 }
1049
1050 if (!ps3fb_mode)
1051 ps3fb_mode = ps3av_get_mode();
084ffff2 1052 dev_dbg(&dev->core, "ps3fb_mode: %d\n", ps3fb_mode);
9e6b99bd 1053
9e6b99bd
GU
1054 atomic_set(&ps3fb.f_count, -1); /* fbcon opens ps3fb */
1055 atomic_set(&ps3fb.ext_flip, 0); /* for flip with vsync */
1056 init_waitqueue_head(&ps3fb.wait_vsync);
9e6b99bd 1057
535da7ff 1058 ps3fb_set_sync(&dev->core);
9e6b99bd 1059
ee592a5b
GU
1060 max_ps3fb_size = _ALIGN_UP(GPU_IOIF, 256*1024*1024) - GPU_IOIF;
1061 if (ps3fb_videomemory.size > max_ps3fb_size) {
1062 dev_info(&dev->core, "Limiting ps3fb mem size to %lu bytes\n",
1063 max_ps3fb_size);
1064 ps3fb_videomemory.size = max_ps3fb_size;
1065 }
1066
310d8c11 1067 /* get gpu context handle */
ee592a5b 1068 status = lv1_gpu_memory_allocate(ps3fb_videomemory.size, 0, 0, 0, 0,
310d8c11
GU
1069 &ps3fb.memory_handle, &ddr_lpar);
1070 if (status) {
535da7ff
GU
1071 dev_err(&dev->core, "%s: lv1_gpu_memory_allocate failed: %d\n",
1072 __func__, status);
310d8c11
GU
1073 goto err;
1074 }
535da7ff 1075 dev_dbg(&dev->core, "ddr:lpar:0x%lx\n", ddr_lpar);
310d8c11
GU
1076
1077 status = lv1_gpu_context_allocate(ps3fb.memory_handle, 0,
1078 &ps3fb.context_handle,
1079 &lpar_dma_control, &lpar_driver_info,
1080 &lpar_reports, &lpar_reports_size);
1081 if (status) {
535da7ff
GU
1082 dev_err(&dev->core,
1083 "%s: lv1_gpu_context_attribute failed: %d\n", __func__,
1084 status);
310d8c11
GU
1085 goto err_gpu_memory_free;
1086 }
1087
1088 /* vsync interrupt */
1089 ps3fb.dinfo = ioremap(lpar_driver_info, 128 * 1024);
1090 if (!ps3fb.dinfo) {
535da7ff 1091 dev_err(&dev->core, "%s: ioremap failed\n", __func__);
310d8c11
GU
1092 goto err_gpu_context_free;
1093 }
1094
535da7ff 1095 retval = ps3fb_vsync_settings(ps3fb.dinfo, &dev->core);
310d8c11
GU
1096 if (retval)
1097 goto err_iounmap_dinfo;
1098
2ce32e15 1099 /* XDR frame buffer */
310d8c11
GU
1100 ps3fb.xdr_ea = ps3fb_videomemory.address;
1101 xdr_lpar = ps3_mm_phys_to_lpar(__pa(ps3fb.xdr_ea));
2ce32e15
GU
1102
1103 /* Clear memory to prevent kernel info leakage into userspace */
1104 memset(ps3fb.xdr_ea, 0, ps3fb_videomemory.size);
1105
9ac67a35
GU
1106 /*
1107 * The GPU command buffer is at the start of video memory
1108 * As we don't use the full command buffer, we can put the actual
1109 * frame buffer at offset GPU_FB_START and save some precious XDR
1110 * memory
1111 */
1112 ps3fb.xdr_ea += GPU_FB_START;
1113 ps3fb.xdr_size = ps3fb_videomemory.size - GPU_FB_START;
2ce32e15 1114
535da7ff 1115 retval = ps3fb_xdr_settings(xdr_lpar, &dev->core);
310d8c11
GU
1116 if (retval)
1117 goto err_free_irq;
1118
0333d835 1119 info = framebuffer_alloc(sizeof(struct ps3fb_par), &dev->core);
310d8c11
GU
1120 if (!info)
1121 goto err_free_irq;
1122
0333d835
GU
1123 par = info->par;
1124 par->mode_id = ~ps3fb_mode; /* != ps3fb_mode, to trigger change */
1125 par->new_mode_id = ps3fb_mode;
0333d835
GU
1126 par->num_frames = 1;
1127
f1664ed8 1128 info->screen_base = (char __iomem *)ps3fb.xdr_ea;
310d8c11
GU
1129 info->fbops = &ps3fb_ops;
1130
1131 info->fix = ps3fb_fix;
f1664ed8
GU
1132 info->fix.smem_start = virt_to_abs(ps3fb.xdr_ea);
1133 info->fix.smem_len = ps3fb.xdr_size;
0333d835 1134 info->pseudo_palette = par->pseudo_palette;
fc7028b7
GU
1135 info->flags = FBINFO_DEFAULT | FBINFO_READS_FAST |
1136 FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
310d8c11
GU
1137
1138 retval = fb_alloc_cmap(&info->cmap, 256, 0);
1139 if (retval < 0)
1140 goto err_framebuffer_release;
1141
1142 if (!fb_find_mode(&info->var, info, mode_option, ps3fb_modedb,
0333d835
GU
1143 ARRAY_SIZE(ps3fb_modedb),
1144 ps3fb_default_mode(par->new_mode_id), 32)) {
310d8c11
GU
1145 retval = -EINVAL;
1146 goto err_fb_dealloc;
1147 }
1148
1149 fb_videomode_to_modelist(ps3fb_modedb, ARRAY_SIZE(ps3fb_modedb),
1150 &info->modelist);
1151
1152 retval = register_framebuffer(info);
1153 if (retval < 0)
1154 goto err_fb_dealloc;
1155
9e6b99bd 1156 dev->core.driver_data = info;
310d8c11 1157
535da7ff
GU
1158 dev_info(info->device, "%s %s, using %lu KiB of video memory\n",
1159 dev_driver_string(info->dev), info->dev->bus_id,
2ce32e15 1160 ps3fb.xdr_size >> 10);
310d8c11 1161
9e6b99bd 1162 task = kthread_run(ps3fbd, info, DEVICE_NAME);
1c0c8461
GU
1163 if (IS_ERR(task)) {
1164 retval = PTR_ERR(task);
1165 goto err_unregister_framebuffer;
1166 }
1167
1168 ps3fb.task = task;
9e6b99bd 1169 ps3av_register_flip_ctl(ps3fb_flip_ctl, &ps3fb);
1c0c8461 1170
310d8c11
GU
1171 return 0;
1172
1c0c8461
GU
1173err_unregister_framebuffer:
1174 unregister_framebuffer(info);
310d8c11
GU
1175err_fb_dealloc:
1176 fb_dealloc_cmap(&info->cmap);
1177err_framebuffer_release:
1178 framebuffer_release(info);
1179err_free_irq:
fcbe6e97 1180 free_irq(ps3fb.irq_no, &dev->core);
dc4f60c2 1181 ps3_irq_plug_destroy(ps3fb.irq_no);
310d8c11
GU
1182err_iounmap_dinfo:
1183 iounmap((u8 __iomem *)ps3fb.dinfo);
1184err_gpu_context_free:
1185 lv1_gpu_context_free(ps3fb.context_handle);
1186err_gpu_memory_free:
1187 lv1_gpu_memory_free(ps3fb.memory_handle);
1188err:
1189 return retval;
1190}
1191
9e6b99bd 1192static int ps3fb_shutdown(struct ps3_system_bus_device *dev)
310d8c11 1193{
9e6b99bd
GU
1194 int status;
1195 struct fb_info *info = dev->core.driver_data;
1196
535da7ff 1197 dev_dbg(&dev->core, " -> %s:%d\n", __func__, __LINE__);
9e6b99bd
GU
1198
1199 ps3fb_flip_ctl(0, &ps3fb); /* flip off */
310d8c11 1200 ps3fb.dinfo->irq.mask = 0;
310d8c11 1201
9e6b99bd 1202 ps3av_register_flip_ctl(NULL, NULL);
1c0c8461
GU
1203 if (ps3fb.task) {
1204 struct task_struct *task = ps3fb.task;
1205 ps3fb.task = NULL;
1206 kthread_stop(task);
1207 }
310d8c11 1208 if (ps3fb.irq_no) {
fcbe6e97 1209 free_irq(ps3fb.irq_no, &dev->core);
dc4f60c2 1210 ps3_irq_plug_destroy(ps3fb.irq_no);
310d8c11 1211 }
ba21611c
JK
1212 if (info) {
1213 unregister_framebuffer(info);
1214 fb_dealloc_cmap(&info->cmap);
1215 framebuffer_release(info);
1216 info = dev->core.driver_data = NULL;
1217 }
310d8c11
GU
1218 iounmap((u8 __iomem *)ps3fb.dinfo);
1219
1220 status = lv1_gpu_context_free(ps3fb.context_handle);
1221 if (status)
535da7ff
GU
1222 dev_dbg(&dev->core, "lv1_gpu_context_free failed: %d\n",
1223 status);
310d8c11
GU
1224
1225 status = lv1_gpu_memory_free(ps3fb.memory_handle);
1226 if (status)
535da7ff
GU
1227 dev_dbg(&dev->core, "lv1_gpu_memory_free failed: %d\n",
1228 status);
310d8c11 1229
9e6b99bd 1230 ps3_close_hv_device(dev);
535da7ff 1231 dev_dbg(&dev->core, " <- %s:%d\n", __func__, __LINE__);
310d8c11 1232
310d8c11
GU
1233 return 0;
1234}
1235
9e6b99bd
GU
1236static struct ps3_system_bus_driver ps3fb_driver = {
1237 .match_id = PS3_MATCH_ID_GRAPHICS,
1238 .core.name = DEVICE_NAME,
1239 .core.owner = THIS_MODULE,
1240 .probe = ps3fb_probe,
1241 .remove = ps3fb_shutdown,
1242 .shutdown = ps3fb_shutdown,
310d8c11
GU
1243};
1244
9e6b99bd 1245static int __init ps3fb_setup(void)
310d8c11 1246{
9e6b99bd 1247 char *options;
310d8c11 1248
9e6b99bd 1249#ifdef MODULE
310d8c11 1250 return 0;
310d8c11
GU
1251#endif
1252
9e6b99bd
GU
1253 if (fb_get_options(DEVICE_NAME, &options))
1254 return -ENXIO;
310d8c11 1255
9e6b99bd
GU
1256 if (!options || !*options)
1257 return 0;
310d8c11 1258
9e6b99bd
GU
1259 while (1) {
1260 char *this_opt = strsep(&options, ",");
310d8c11 1261
9e6b99bd
GU
1262 if (!this_opt)
1263 break;
1264 if (!*this_opt)
1265 continue;
1266 if (!strncmp(this_opt, "mode:", 5))
1267 ps3fb_mode = simple_strtoul(this_opt + 5, NULL, 0);
1268 else
1269 mode_option = this_opt;
310d8c11 1270 }
9e6b99bd
GU
1271 return 0;
1272}
310d8c11 1273
9e6b99bd
GU
1274static int __init ps3fb_init(void)
1275{
1276 if (!ps3fb_videomemory.address || ps3fb_setup())
1277 return -ENXIO;
310d8c11 1278
9e6b99bd 1279 return ps3_system_bus_driver_register(&ps3fb_driver);
310d8c11
GU
1280}
1281
310d8c11
GU
1282static void __exit ps3fb_exit(void)
1283{
535da7ff 1284 pr_debug(" -> %s:%d\n", __func__, __LINE__);
9e6b99bd 1285 ps3_system_bus_driver_unregister(&ps3fb_driver);
535da7ff 1286 pr_debug(" <- %s:%d\n", __func__, __LINE__);
310d8c11
GU
1287}
1288
9e6b99bd 1289module_init(ps3fb_init);
310d8c11
GU
1290module_exit(ps3fb_exit);
1291
1292MODULE_LICENSE("GPL");
9e6b99bd
GU
1293MODULE_DESCRIPTION("PS3 GPU Frame Buffer Driver");
1294MODULE_AUTHOR("Sony Computer Entertainment Inc.");
1295MODULE_ALIAS(PS3_MODULE_ALIAS_GRAPHICS);