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ps3fb: round up video modes
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CommitLineData
310d8c11
GU
1/*
2 * linux/drivers/video/ps3fb.c -- PS3 GPU frame buffer device
3 *
4 * Copyright (C) 2006 Sony Computer Entertainment Inc.
5 * Copyright 2006, 2007 Sony Corporation
6 *
7 * This file is based on :
8 *
9 * linux/drivers/video/vfb.c -- Virtual frame buffer device
10 *
11 * Copyright (C) 2002 James Simmons
12 *
13 * Copyright (C) 1997 Geert Uytterhoeven
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file COPYING in the main directory of this archive for
17 * more details.
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/errno.h>
23#include <linux/string.h>
24#include <linux/mm.h>
310d8c11 25#include <linux/interrupt.h>
310d8c11
GU
26#include <linux/console.h>
27#include <linux/ioctl.h>
1c0c8461
GU
28#include <linux/kthread.h>
29#include <linux/freezer.h>
84902b7a 30#include <linux/uaccess.h>
310d8c11
GU
31#include <linux/fb.h>
32#include <linux/init.h>
310d8c11
GU
33
34#include <asm/abs_addr.h>
35#include <asm/lv1call.h>
36#include <asm/ps3av.h>
37#include <asm/ps3fb.h>
38#include <asm/ps3.h>
39
9e6b99bd
GU
40
41#define DEVICE_NAME "ps3fb"
42
310d8c11
GU
43#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC 0x101
44#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP 0x102
45#define L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP 0x600
46#define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601
47#define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT_SYNC 0x602
48
49#define L1GPU_FB_BLIT_WAIT_FOR_COMPLETION (1ULL << 32)
50
51#define L1GPU_DISPLAY_SYNC_HSYNC 1
52#define L1GPU_DISPLAY_SYNC_VSYNC 2
53
9ac67a35
GU
54#define GPU_CMD_BUF_SIZE (2 * 1024 * 1024)
55#define GPU_FB_START (64 * 1024)
310d8c11 56#define GPU_IOIF (0x0d000000UL)
f1664ed8 57#define GPU_ALIGN_UP(x) _ALIGN_UP((x), 64)
61e0b28e 58#define GPU_MAX_LINE_LENGTH (65536 - 64)
310d8c11 59
310d8c11
GU
60#define GPU_INTR_STATUS_VSYNC_0 0 /* vsync on head A */
61#define GPU_INTR_STATUS_VSYNC_1 1 /* vsync on head B */
62#define GPU_INTR_STATUS_FLIP_0 3 /* flip head A */
63#define GPU_INTR_STATUS_FLIP_1 4 /* flip head B */
64#define GPU_INTR_STATUS_QUEUE_0 5 /* queue head A */
65#define GPU_INTR_STATUS_QUEUE_1 6 /* queue head B */
66
67#define GPU_DRIVER_INFO_VERSION 0x211
68
69/* gpu internals */
70struct display_head {
71 u64 be_time_stamp;
72 u32 status;
73 u32 offset;
74 u32 res1;
75 u32 res2;
76 u32 field;
77 u32 reserved1;
78
79 u64 res3;
80 u32 raster;
81
82 u64 vblank_count;
83 u32 field_vsync;
84 u32 reserved2;
85};
86
87struct gpu_irq {
88 u32 irq_outlet;
89 u32 status;
90 u32 mask;
91 u32 video_cause;
92 u32 graph_cause;
93 u32 user_cause;
94
95 u32 res1;
96 u64 res2;
97
98 u32 reserved[4];
99};
100
101struct gpu_driver_info {
102 u32 version_driver;
103 u32 version_gpu;
104 u32 memory_size;
105 u32 hardware_channel;
106
107 u32 nvcore_frequency;
108 u32 memory_frequency;
109
110 u32 reserved[1063];
111 struct display_head display_head[8];
112 struct gpu_irq irq;
113};
114
115struct ps3fb_priv {
116 unsigned int irq_no;
310d8c11
GU
117
118 u64 context_handle, memory_handle;
119 void *xdr_ea;
2ce32e15 120 size_t xdr_size;
310d8c11 121 struct gpu_driver_info *dinfo;
310d8c11
GU
122
123 u64 vblank_count; /* frame count */
124 wait_queue_head_t wait_vsync;
125
310d8c11
GU
126 atomic_t ext_flip; /* on/off flip with vsync */
127 atomic_t f_count; /* fb_open count */
128 int is_blanked;
1c0c8461
GU
129 int is_kicked;
130 struct task_struct *task;
310d8c11
GU
131};
132static struct ps3fb_priv ps3fb;
133
0333d835
GU
134struct ps3fb_par {
135 u32 pseudo_palette[16];
136 int mode_id, new_mode_id;
0333d835 137 unsigned int num_frames; /* num of frame buffers */
f1664ed8
GU
138 unsigned int width;
139 unsigned int height;
9f4f21b4
GU
140 unsigned int ddr_line_length;
141 unsigned int ddr_frame_size;
142 unsigned int xdr_frame_size;
7974f72a
GU
143 unsigned int full_offset; /* start of fullscreen DDR fb */
144 unsigned int fb_offset; /* start of actual DDR fb */
145 unsigned int pan_offset;
0333d835
GU
146};
147
310d8c11 148
34c422fb
GU
149#define FIRST_NATIVE_MODE_INDEX 10
150
310d8c11
GU
151static const struct fb_videomode ps3fb_modedb[] = {
152 /* 60 Hz broadcast modes (modes "1" to "5") */
153 {
154 /* 480i */
155 "480i", 60, 576, 384, 74074, 130, 89, 78, 57, 63, 6,
156 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
157 }, {
158 /* 480p */
159 "480p", 60, 576, 384, 37037, 130, 89, 78, 57, 63, 6,
160 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
161 }, {
162 /* 720p */
163 "720p", 60, 1124, 644, 13481, 298, 148, 57, 44, 80, 5,
164 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
165 }, {
166 /* 1080i */
167 "1080i", 60, 1688, 964, 13481, 264, 160, 94, 62, 88, 5,
168 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
169 }, {
170 /* 1080p */
171 "1080p", 60, 1688, 964, 6741, 264, 160, 94, 62, 88, 5,
172 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
173 },
174
175 /* 50 Hz broadcast modes (modes "6" to "10") */
176 {
177 /* 576i */
178 "576i", 50, 576, 460, 74074, 142, 83, 97, 63, 63, 5,
179 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
180 }, {
181 /* 576p */
182 "576p", 50, 576, 460, 37037, 142, 83, 97, 63, 63, 5,
183 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
184 }, {
185 /* 720p */
186 "720p", 50, 1124, 644, 13468, 298, 478, 57, 44, 80, 5,
187 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
188 }, {
189 /* 1080 */
190 "1080i", 50, 1688, 964, 13468, 264, 600, 94, 62, 88, 5,
191 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
192 }, {
193 /* 1080p */
194 "1080p", 50, 1688, 964, 6734, 264, 600, 94, 62, 88, 5,
195 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
196 },
197
34c422fb 198 [FIRST_NATIVE_MODE_INDEX] =
310d8c11
GU
199 /* 60 Hz broadcast modes (full resolution versions of modes "1" to "5") */
200 {
201 /* 480if */
202 "480if", 60, 720, 480, 74074, 58, 17, 30, 9, 63, 6,
203 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
204 }, {
205 /* 480pf */
206 "480pf", 60, 720, 480, 37037, 58, 17, 30, 9, 63, 6,
207 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
208 }, {
209 /* 720pf */
210 "720pf", 60, 1280, 720, 13481, 220, 70, 19, 6, 80, 5,
211 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
212 }, {
213 /* 1080if */
214 "1080if", 60, 1920, 1080, 13481, 148, 44, 36, 4, 88, 5,
215 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
216 }, {
217 /* 1080pf */
218 "1080pf", 60, 1920, 1080, 6741, 148, 44, 36, 4, 88, 5,
219 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
220 },
221
222 /* 50 Hz broadcast modes (full resolution versions of modes "6" to "10") */
223 {
224 /* 576if */
225 "576if", 50, 720, 576, 74074, 70, 11, 39, 5, 63, 5,
226 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
227 }, {
228 /* 576pf */
229 "576pf", 50, 720, 576, 37037, 70, 11, 39, 5, 63, 5,
230 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
231 }, {
232 /* 720pf */
233 "720pf", 50, 1280, 720, 13468, 220, 400, 19, 6, 80, 5,
234 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
235 }, {
236 /* 1080if */
237 "1080f", 50, 1920, 1080, 13468, 148, 484, 36, 4, 88, 5,
238 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED
239 }, {
240 /* 1080pf */
241 "1080pf", 50, 1920, 1080, 6734, 148, 484, 36, 4, 88, 5,
242 FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED
34c422fb
GU
243 },
244
245 /* VESA modes (modes "11" to "13") */
246 {
247 /* WXGA */
248 "wxga", 60, 1280, 768, 12924, 160, 24, 29, 3, 136, 6,
249 0, FB_VMODE_NONINTERLACED,
250 FB_MODE_IS_VESA
251 }, {
252 /* SXGA */
253 "sxga", 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3,
254 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED,
255 FB_MODE_IS_VESA
256 }, {
257 /* WUXGA */
258 "wuxga", 60, 1920, 1200, 6494, 80, 48, 26, 3, 32, 6,
259 FB_SYNC_HOR_HIGH_ACT, FB_VMODE_NONINTERLACED,
260 FB_MODE_IS_VESA
310d8c11
GU
261 }
262};
263
264
265#define HEAD_A
266#define HEAD_B
267
2ce32e15
GU
268#define BPP 4 /* number of bytes per pixel */
269
310d8c11 270
bd685ac8 271static int ps3fb_mode;
9e6b99bd 272module_param(ps3fb_mode, int, 0);
310d8c11 273
9e6b99bd 274static char *mode_option __devinitdata;
310d8c11 275
633bd111
GU
276static int ps3fb_cmp_mode(const struct fb_videomode *vmode,
277 const struct fb_var_screeninfo *var)
278{
a3665366
GU
279 long xres, yres, left_margin, right_margin, upper_margin, lower_margin;
280 long dx, dy;
281
282 /* maximum values */
283 if (var->xres > vmode->xres || var->yres > vmode->yres ||
284 var->pixclock > vmode->pixclock ||
285 var->hsync_len > vmode->hsync_len ||
286 var->vsync_len > vmode->vsync_len)
633bd111
GU
287 return -1;
288
a3665366
GU
289 /* progressive/interlaced must match */
290 if ((var->vmode & FB_VMODE_MASK) != vmode->vmode)
633bd111
GU
291 return -1;
292
a3665366
GU
293 /* minimum resolution */
294 xres = max(var->xres, 1U);
295 yres = max(var->yres, 1U);
296
297 /* minimum margins */
298 left_margin = max(var->left_margin, vmode->left_margin);
299 right_margin = max(var->right_margin, vmode->right_margin);
300 upper_margin = max(var->upper_margin, vmode->upper_margin);
301 lower_margin = max(var->lower_margin, vmode->lower_margin);
302
303 /* resolution + margins may not exceed native parameters */
304 dx = ((long)vmode->left_margin + (long)vmode->xres +
305 (long)vmode->right_margin) -
306 (left_margin + xres + right_margin);
307 if (dx < 0)
633bd111
GU
308 return -1;
309
a3665366
GU
310 dy = ((long)vmode->upper_margin + (long)vmode->yres +
311 (long)vmode->lower_margin) -
312 (upper_margin + yres + lower_margin);
313 if (dy < 0)
314 return -1;
315
316 /* exact match */
317 if (!dx && !dy)
318 return 0;
319
320 /* resolution difference */
321 return (vmode->xres - xres) * (vmode->yres - yres);
633bd111
GU
322}
323
34c422fb
GU
324static const struct fb_videomode *ps3fb_native_vmode(enum ps3av_mode_num id)
325{
326 return &ps3fb_modedb[FIRST_NATIVE_MODE_INDEX + id - 1];
327}
328
329static const struct fb_videomode *ps3fb_vmode(int id)
330{
331 u32 mode = id & PS3AV_MODE_MASK;
332
333 if (mode < PS3AV_MODE_480I || mode > PS3AV_MODE_WUXGA)
334 return NULL;
335
336 if (mode <= PS3AV_MODE_1080P50 && !(id & PS3AV_MODE_FULL)) {
337 /* Non-fullscreen broadcast mode */
338 return &ps3fb_modedb[mode - 1];
339 }
340
341 return ps3fb_native_vmode(mode);
342}
343
633bd111 344static unsigned int ps3fb_find_mode(struct fb_var_screeninfo *var,
61e0b28e 345 u32 *ddr_line_length, u32 *xdr_line_length)
310d8c11 346{
a3665366
GU
347 unsigned int id, best_id;
348 int diff, best_diff;
34c422fb 349 const struct fb_videomode *vmode;
a3665366 350 long gap;
633bd111 351
a3665366
GU
352 best_id = 0;
353 best_diff = INT_MAX;
354 pr_debug("%s: wanted %u [%u] %u x %u [%u] %u\n", __func__,
355 var->left_margin, var->xres, var->right_margin,
356 var->upper_margin, var->yres, var->lower_margin);
34c422fb
GU
357 for (id = PS3AV_MODE_480I; id <= PS3AV_MODE_WUXGA; id++) {
358 vmode = ps3fb_native_vmode(id);
a3665366
GU
359 diff = ps3fb_cmp_mode(vmode, var);
360 pr_debug("%s: mode %u: %u [%u] %u x %u [%u] %u: diff = %d\n",
361 __func__, id, vmode->left_margin, vmode->xres,
362 vmode->right_margin, vmode->upper_margin,
363 vmode->yres, vmode->lower_margin, diff);
364 if (diff < 0)
365 continue;
366 if (diff < best_diff) {
367 best_id = id;
368 if (!diff)
369 break;
370 best_diff = diff;
371 }
34c422fb 372 }
310d8c11 373
a3665366
GU
374 if (!best_id) {
375 pr_debug("%s: no suitable mode found\n", __func__);
376 return 0;
377 }
378
379 id = best_id;
380 vmode = ps3fb_native_vmode(id);
61e0b28e 381
34c422fb 382 *ddr_line_length = vmode->xres * BPP;
633bd111 383
a3665366
GU
384 /* minimum resolution */
385 if (!var->xres)
633bd111 386 var->xres = 1;
a3665366 387 if (!var->yres)
633bd111 388 var->yres = 1;
a3665366
GU
389
390 /* minimum virtual resolution */
391 if (var->xres_virtual < var->xres)
392 var->xres_virtual = var->xres;
393 if (var->yres_virtual < var->yres)
394 var->yres_virtual = var->yres;
395
396 /* minimum margins */
397 if (var->left_margin < vmode->left_margin)
398 var->left_margin = vmode->left_margin;
399 if (var->right_margin < vmode->right_margin)
400 var->right_margin = vmode->right_margin;
401 if (var->upper_margin < vmode->upper_margin)
402 var->upper_margin = vmode->upper_margin;
403 if (var->lower_margin < vmode->lower_margin)
404 var->lower_margin = vmode->lower_margin;
405
406 /* extra margins */
407 gap = ((long)vmode->left_margin + (long)vmode->xres +
408 (long)vmode->right_margin) -
409 ((long)var->left_margin + (long)var->xres +
410 (long)var->right_margin);
411 if (gap > 0) {
412 var->left_margin += gap/2;
413 var->right_margin += (gap+1)/2;
414 pr_debug("%s: rounded up H to %u [%u] %u\n", __func__,
415 var->left_margin, var->xres, var->right_margin);
416 }
417
418 gap = ((long)vmode->upper_margin + (long)vmode->yres +
419 (long)vmode->lower_margin) -
420 ((long)var->upper_margin + (long)var->yres +
421 (long)var->lower_margin);
422 if (gap > 0) {
423 var->upper_margin += gap/2;
424 var->lower_margin += (gap+1)/2;
425 pr_debug("%s: rounded up V to %u [%u] %u\n", __func__,
426 var->upper_margin, var->yres, var->lower_margin);
633bd111 427 }
61e0b28e 428
a3665366
GU
429 /* fixed fields */
430 var->pixclock = vmode->pixclock;
431 var->hsync_len = vmode->hsync_len;
432 var->vsync_len = vmode->vsync_len;
433 var->sync = vmode->sync;
434
61e0b28e 435 if (ps3_compare_firmware_version(1, 9, 0) >= 0) {
a3665366 436 *xdr_line_length = GPU_ALIGN_UP(var->xres_virtual * BPP);
61e0b28e
GU
437 if (*xdr_line_length > GPU_MAX_LINE_LENGTH)
438 *xdr_line_length = GPU_MAX_LINE_LENGTH;
439 } else
440 *xdr_line_length = *ddr_line_length;
441
34c422fb 442 if (vmode->sync & FB_SYNC_BROADCAST) {
633bd111 443 /* Full broadcast modes have the full mode bit set */
34c422fb
GU
444 if (vmode->xres == var->xres && vmode->yres == var->yres)
445 id |= PS3AV_MODE_FULL;
310d8c11
GU
446 }
447
34c422fb
GU
448 pr_debug("%s: mode %u\n", __func__, id);
449 return id;
310d8c11
GU
450}
451
f1664ed8
GU
452static void ps3fb_sync_image(struct device *dev, u64 frame_offset,
453 u64 dst_offset, u64 src_offset, u32 width,
61e0b28e
GU
454 u32 height, u32 dst_line_length,
455 u32 src_line_length)
310d8c11 456{
f1664ed8 457 int status;
61e0b28e
GU
458 u64 line_length;
459
460 line_length = dst_line_length;
461 if (src_line_length != dst_line_length)
462 line_length |= (u64)src_line_length << 32;
310d8c11 463
9ac67a35 464 src_offset += GPU_FB_START;
310d8c11
GU
465 status = lv1_gpu_context_attribute(ps3fb.context_handle,
466 L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT,
f1664ed8 467 dst_offset, GPU_IOIF + src_offset,
310d8c11 468 L1GPU_FB_BLIT_WAIT_FOR_COMPLETION |
f1664ed8
GU
469 (width << 16) | height,
470 line_length);
310d8c11 471 if (status)
f1664ed8 472 dev_err(dev,
535da7ff
GU
473 "%s: lv1_gpu_context_attribute FB_BLIT failed: %d\n",
474 __func__, status);
310d8c11
GU
475#ifdef HEAD_A
476 status = lv1_gpu_context_attribute(ps3fb.context_handle,
477 L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP,
f1664ed8 478 0, frame_offset, 0, 0);
310d8c11 479 if (status)
f1664ed8 480 dev_err(dev, "%s: lv1_gpu_context_attribute FLIP failed: %d\n",
535da7ff 481 __func__, status);
310d8c11
GU
482#endif
483#ifdef HEAD_B
484 status = lv1_gpu_context_attribute(ps3fb.context_handle,
485 L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP,
f1664ed8 486 1, frame_offset, 0, 0);
310d8c11 487 if (status)
f1664ed8 488 dev_err(dev, "%s: lv1_gpu_context_attribute FLIP failed: %d\n",
535da7ff 489 __func__, status);
310d8c11 490#endif
f1664ed8
GU
491}
492
493static int ps3fb_sync(struct fb_info *info, u32 frame)
494{
495 struct ps3fb_par *par = info->par;
9f4f21b4 496 int error = 0;
61e0b28e 497 u64 ddr_base, xdr_base;
f1664ed8 498
f1664ed8
GU
499 if (frame > par->num_frames - 1) {
500 dev_dbg(info->device, "%s: invalid frame number (%u)\n",
501 __func__, frame);
502 error = -EINVAL;
503 goto out;
504 }
505
9f4f21b4
GU
506 xdr_base = frame * par->xdr_frame_size;
507 ddr_base = frame * par->ddr_frame_size;
f1664ed8 508
61e0b28e
GU
509 ps3fb_sync_image(info->device, ddr_base + par->full_offset,
510 ddr_base + par->fb_offset, xdr_base + par->pan_offset,
9f4f21b4
GU
511 par->width, par->height, par->ddr_line_length,
512 info->fix.line_length);
0333d835
GU
513
514out:
0333d835 515 return error;
310d8c11
GU
516}
517
310d8c11
GU
518static int ps3fb_open(struct fb_info *info, int user)
519{
520 atomic_inc(&ps3fb.f_count);
521 return 0;
522}
523
524static int ps3fb_release(struct fb_info *info, int user)
525{
526 if (atomic_dec_and_test(&ps3fb.f_count)) {
527 if (atomic_read(&ps3fb.ext_flip)) {
528 atomic_set(&ps3fb.ext_flip, 0);
8dab6376
JK
529 if (!try_acquire_console_sem()) {
530 ps3fb_sync(info, 0); /* single buffer */
531 release_console_sem();
532 }
310d8c11
GU
533 }
534 }
535 return 0;
536}
537
538 /*
539 * Setting the video mode has been split into two parts.
540 * First part, xxxfb_check_var, must not write anything
541 * to hardware, it should only verify and adjust var.
542 * This means it doesn't alter par but it does use hardware
543 * data from it to check this var.
544 */
545
546static int ps3fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
547{
61e0b28e 548 u32 xdr_line_length, ddr_line_length;
310d8c11 549 int mode;
310d8c11 550
61e0b28e 551 mode = ps3fb_find_mode(var, &ddr_line_length, &xdr_line_length);
310d8c11
GU
552 if (!mode)
553 return -EINVAL;
554
fc7028b7 555 /* Virtual screen */
61e0b28e 556 if (var->xres_virtual > xdr_line_length / BPP) {
535da7ff 557 dev_dbg(info->device,
fc7028b7 558 "Horizontal virtual screen size too large\n");
310d8c11
GU
559 return -EINVAL;
560 }
561
fc7028b7
GU
562 if (var->xoffset + var->xres > var->xres_virtual ||
563 var->yoffset + var->yres > var->yres_virtual) {
564 dev_dbg(info->device, "panning out-of-range\n");
565 return -EINVAL;
566 }
310d8c11
GU
567
568 /* We support ARGB8888 only */
569 if (var->bits_per_pixel > 32 || var->grayscale ||
570 var->red.offset > 16 || var->green.offset > 8 ||
571 var->blue.offset > 0 || var->transp.offset > 24 ||
572 var->red.length > 8 || var->green.length > 8 ||
573 var->blue.length > 8 || var->transp.length > 8 ||
574 var->red.msb_right || var->green.msb_right ||
575 var->blue.msb_right || var->transp.msb_right || var->nonstd) {
535da7ff 576 dev_dbg(info->device, "We support ARGB8888 only\n");
310d8c11
GU
577 return -EINVAL;
578 }
579
580 var->bits_per_pixel = 32;
581 var->red.offset = 16;
582 var->green.offset = 8;
583 var->blue.offset = 0;
584 var->transp.offset = 24;
585 var->red.length = 8;
586 var->green.length = 8;
587 var->blue.length = 8;
588 var->transp.length = 8;
589 var->red.msb_right = 0;
590 var->green.msb_right = 0;
591 var->blue.msb_right = 0;
592 var->transp.msb_right = 0;
593
594 /* Rotation is not supported */
595 if (var->rotate) {
535da7ff 596 dev_dbg(info->device, "Rotation is not supported\n");
310d8c11
GU
597 return -EINVAL;
598 }
599
600 /* Memory limit */
61e0b28e 601 if (var->yres_virtual * xdr_line_length > ps3fb.xdr_size) {
535da7ff 602 dev_dbg(info->device, "Not enough memory\n");
310d8c11
GU
603 return -ENOMEM;
604 }
605
606 var->height = -1;
607 var->width = -1;
608
609 return 0;
610}
611
612 /*
613 * This routine actually sets the video mode.
614 */
615
616static int ps3fb_set_par(struct fb_info *info)
617{
0333d835 618 struct ps3fb_par *par = info->par;
61e0b28e 619 unsigned int mode, ddr_line_length, xdr_line_length, lines, maxlines;
7974f72a 620 unsigned int ddr_xoff, ddr_yoff, offset;
9f4f21b4 621 const struct fb_videomode *vmode;
61e0b28e 622 u64 dst;
310d8c11 623
61e0b28e 624 mode = ps3fb_find_mode(&info->var, &ddr_line_length, &xdr_line_length);
310d8c11
GU
625 if (!mode)
626 return -EINVAL;
627
34c422fb 628 vmode = ps3fb_native_vmode(mode & PS3AV_MODE_MASK);
c95344a5 629
f1664ed8
GU
630 info->fix.smem_start = virt_to_abs(ps3fb.xdr_ea);
631 info->fix.smem_len = ps3fb.xdr_size;
fc7028b7
GU
632 info->fix.xpanstep = info->var.xres_virtual > info->var.xres ? 1 : 0;
633 info->fix.ypanstep = info->var.yres_virtual > info->var.yres ? 1 : 0;
61e0b28e 634 info->fix.line_length = xdr_line_length;
fc7028b7 635
f1664ed8 636 info->screen_base = (char __iomem *)ps3fb.xdr_ea;
310d8c11 637
9f4f21b4
GU
638 par->ddr_line_length = ddr_line_length;
639 par->ddr_frame_size = vmode->yres * ddr_line_length;
640 par->xdr_frame_size = info->var.yres_virtual * xdr_line_length;
641
61e0b28e 642 par->num_frames = ps3fb.xdr_size /
9f4f21b4 643 max(par->ddr_frame_size, par->xdr_frame_size);
310d8c11
GU
644
645 /* Keep the special bits we cannot set using fb_var_screeninfo */
0333d835 646 par->new_mode_id = (par->new_mode_id & ~PS3AV_MODE_MASK) | mode;
310d8c11 647
f1664ed8
GU
648 par->width = info->var.xres;
649 par->height = info->var.yres;
d9a4ba6a
GU
650
651 /* Start of the virtual frame buffer (relative to fullscreen) */
9f4f21b4
GU
652 ddr_xoff = info->var.left_margin - vmode->left_margin;
653 ddr_yoff = info->var.upper_margin - vmode->upper_margin;
654 offset = ddr_yoff * ddr_line_length + ddr_xoff * BPP;
d9a4ba6a 655
f1664ed8
GU
656 par->fb_offset = GPU_ALIGN_UP(offset);
657 par->full_offset = par->fb_offset - offset;
61e0b28e 658 par->pan_offset = info->var.yoffset * xdr_line_length +
fc7028b7 659 info->var.xoffset * BPP;
f1664ed8 660
0333d835
GU
661 if (par->new_mode_id != par->mode_id) {
662 if (ps3av_set_video_mode(par->new_mode_id)) {
663 par->new_mode_id = par->mode_id;
664 return -EINVAL;
665 }
666 par->mode_id = par->new_mode_id;
667 }
310d8c11 668
f1664ed8
GU
669 /* Clear XDR frame buffer memory */
670 memset(ps3fb.xdr_ea, 0, ps3fb.xdr_size);
671
672 /* Clear DDR frame buffer memory */
9f4f21b4 673 lines = vmode->yres * par->num_frames;
f1664ed8
GU
674 if (par->full_offset)
675 lines++;
61e0b28e
GU
676 maxlines = ps3fb.xdr_size / ddr_line_length;
677 for (dst = 0; lines; dst += maxlines * ddr_line_length) {
f1664ed8 678 unsigned int l = min(lines, maxlines);
9f4f21b4 679 ps3fb_sync_image(info->device, 0, dst, 0, vmode->xres, l,
61e0b28e 680 ddr_line_length, ddr_line_length);
f1664ed8
GU
681 lines -= l;
682 }
683
310d8c11
GU
684 return 0;
685}
686
687 /*
688 * Set a single color register. The values supplied are already
689 * rounded down to the hardware's capabilities (according to the
690 * entries in the var structure). Return != 0 for invalid regno.
691 */
692
693static int ps3fb_setcolreg(unsigned int regno, unsigned int red,
694 unsigned int green, unsigned int blue,
695 unsigned int transp, struct fb_info *info)
696{
697 if (regno >= 16)
698 return 1;
699
700 red >>= 8;
701 green >>= 8;
702 blue >>= 8;
703 transp >>= 8;
704
705 ((u32 *)info->pseudo_palette)[regno] = transp << 24 | red << 16 |
706 green << 8 | blue;
707 return 0;
708}
709
fc7028b7
GU
710static int ps3fb_pan_display(struct fb_var_screeninfo *var,
711 struct fb_info *info)
712{
713 struct ps3fb_par *par = info->par;
714
715 par->pan_offset = var->yoffset * info->fix.line_length +
716 var->xoffset * BPP;
717 return 0;
718}
719
310d8c11
GU
720 /*
721 * As we have a virtual frame buffer, we need our own mmap function
722 */
723
724static int ps3fb_mmap(struct fb_info *info, struct vm_area_struct *vma)
725{
726 unsigned long size, offset;
310d8c11
GU
727
728 size = vma->vm_end - vma->vm_start;
729 offset = vma->vm_pgoff << PAGE_SHIFT;
730 if (offset + size > info->fix.smem_len)
731 return -EINVAL;
732
2ce32e15 733 offset += info->fix.smem_start;
310d8c11
GU
734 if (remap_pfn_range(vma, vma->vm_start, offset >> PAGE_SHIFT,
735 size, vma->vm_page_prot))
736 return -EAGAIN;
737
535da7ff
GU
738 dev_dbg(info->device, "ps3fb: mmap framebuffer P(%lx)->V(%lx)\n",
739 offset, vma->vm_start);
310d8c11
GU
740 return 0;
741}
742
743 /*
744 * Blank the display
745 */
746
747static int ps3fb_blank(int blank, struct fb_info *info)
748{
749 int retval;
750
535da7ff 751 dev_dbg(info->device, "%s: blank:%d\n", __func__, blank);
310d8c11
GU
752 switch (blank) {
753 case FB_BLANK_POWERDOWN:
754 case FB_BLANK_HSYNC_SUSPEND:
755 case FB_BLANK_VSYNC_SUSPEND:
756 case FB_BLANK_NORMAL:
757 retval = ps3av_video_mute(1); /* mute on */
758 if (!retval)
759 ps3fb.is_blanked = 1;
760 break;
761
762 default: /* unblank */
763 retval = ps3av_video_mute(0); /* mute off */
764 if (!retval)
765 ps3fb.is_blanked = 0;
766 break;
767 }
768 return retval;
769}
770
771static int ps3fb_get_vblank(struct fb_vblank *vblank)
772{
3cc2c177 773 memset(vblank, 0, sizeof(*vblank));
310d8c11
GU
774 vblank->flags = FB_VBLANK_HAVE_VSYNC;
775 return 0;
776}
777
15e4d001 778static int ps3fb_wait_for_vsync(u32 crtc)
310d8c11
GU
779{
780 int ret;
781 u64 count;
782
783 count = ps3fb.vblank_count;
784 ret = wait_event_interruptible_timeout(ps3fb.wait_vsync,
785 count != ps3fb.vblank_count,
786 HZ / 10);
787 if (!ret)
788 return -ETIMEDOUT;
789
790 return 0;
791}
792
15e4d001 793static void ps3fb_flip_ctl(int on, void *data)
310d8c11 794{
9e6b99bd 795 struct ps3fb_priv *priv = data;
eca28743 796 if (on)
9e6b99bd 797 atomic_dec_if_positive(&priv->ext_flip);
eca28743 798 else
9e6b99bd 799 atomic_inc(&priv->ext_flip);
310d8c11
GU
800}
801
310d8c11
GU
802
803 /*
804 * ioctl
805 */
806
807static int ps3fb_ioctl(struct fb_info *info, unsigned int cmd,
808 unsigned long arg)
809{
810 void __user *argp = (void __user *)arg;
0333d835 811 u32 val;
310d8c11
GU
812 int retval = -EFAULT;
813
814 switch (cmd) {
815 case FBIOGET_VBLANK:
816 {
817 struct fb_vblank vblank;
535da7ff 818 dev_dbg(info->device, "FBIOGET_VBLANK:\n");
310d8c11
GU
819 retval = ps3fb_get_vblank(&vblank);
820 if (retval)
821 break;
822
823 if (copy_to_user(argp, &vblank, sizeof(vblank)))
824 retval = -EFAULT;
825 break;
826 }
827
828 case FBIO_WAITFORVSYNC:
829 {
830 u32 crt;
535da7ff 831 dev_dbg(info->device, "FBIO_WAITFORVSYNC:\n");
310d8c11
GU
832 if (get_user(crt, (u32 __user *) arg))
833 break;
834
835 retval = ps3fb_wait_for_vsync(crt);
836 break;
837 }
838
839 case PS3FB_IOCTL_SETMODE:
840 {
0333d835 841 struct ps3fb_par *par = info->par;
34c422fb 842 const struct fb_videomode *vmode;
310d8c11
GU
843 struct fb_var_screeninfo var;
844
845 if (copy_from_user(&val, argp, sizeof(val)))
846 break;
847
64072901 848 if (!(val & PS3AV_MODE_MASK)) {
ce4c371a 849 u32 id = ps3av_get_auto_mode();
64072901
MK
850 if (id > 0)
851 val = (val & ~PS3AV_MODE_MASK) | id;
852 }
535da7ff 853 dev_dbg(info->device, "PS3FB_IOCTL_SETMODE:%x\n", val);
310d8c11 854 retval = -EINVAL;
34c422fb
GU
855 vmode = ps3fb_vmode(val);
856 if (vmode) {
310d8c11 857 var = info->var;
34c422fb 858 fb_videomode_to_var(&var, vmode);
310d8c11
GU
859 acquire_console_sem();
860 info->flags |= FBINFO_MISC_USEREVENT;
861 /* Force, in case only special bits changed */
862 var.activate |= FB_ACTIVATE_FORCE;
0333d835 863 par->new_mode_id = val;
310d8c11
GU
864 retval = fb_set_var(info, &var);
865 info->flags &= ~FBINFO_MISC_USEREVENT;
866 release_console_sem();
867 }
310d8c11
GU
868 break;
869 }
870
871 case PS3FB_IOCTL_GETMODE:
872 val = ps3av_get_mode();
535da7ff 873 dev_dbg(info->device, "PS3FB_IOCTL_GETMODE:%x\n", val);
310d8c11
GU
874 if (!copy_to_user(argp, &val, sizeof(val)))
875 retval = 0;
876 break;
877
878 case PS3FB_IOCTL_SCREENINFO:
879 {
0333d835 880 struct ps3fb_par *par = info->par;
310d8c11 881 struct ps3fb_ioctl_res res;
535da7ff 882 dev_dbg(info->device, "PS3FB_IOCTL_SCREENINFO:\n");
61e0b28e
GU
883 res.xres = info->fix.line_length / BPP;
884 res.yres = info->var.yres_virtual;
885 res.xoff = (res.xres - info->var.xres) / 2;
886 res.yoff = (res.yres - info->var.yres) / 2;
0333d835 887 res.num_frames = par->num_frames;
310d8c11
GU
888 if (!copy_to_user(argp, &res, sizeof(res)))
889 retval = 0;
890 break;
891 }
892
893 case PS3FB_IOCTL_ON:
535da7ff 894 dev_dbg(info->device, "PS3FB_IOCTL_ON:\n");
310d8c11
GU
895 atomic_inc(&ps3fb.ext_flip);
896 retval = 0;
897 break;
898
899 case PS3FB_IOCTL_OFF:
535da7ff 900 dev_dbg(info->device, "PS3FB_IOCTL_OFF:\n");
eca28743 901 atomic_dec_if_positive(&ps3fb.ext_flip);
310d8c11
GU
902 retval = 0;
903 break;
904
905 case PS3FB_IOCTL_FSEL:
906 if (copy_from_user(&val, argp, sizeof(val)))
907 break;
908
535da7ff 909 dev_dbg(info->device, "PS3FB_IOCTL_FSEL:%d\n", val);
8dab6376 910 acquire_console_sem();
535da7ff 911 retval = ps3fb_sync(info, val);
8dab6376 912 release_console_sem();
310d8c11
GU
913 break;
914
915 default:
916 retval = -ENOIOCTLCMD;
917 break;
918 }
919 return retval;
920}
921
922static int ps3fbd(void *arg)
923{
535da7ff
GU
924 struct fb_info *info = arg;
925
83144186 926 set_freezable();
1c0c8461
GU
927 while (!kthread_should_stop()) {
928 try_to_freeze();
929 set_current_state(TASK_INTERRUPTIBLE);
930 if (ps3fb.is_kicked) {
931 ps3fb.is_kicked = 0;
8dab6376 932 acquire_console_sem();
535da7ff 933 ps3fb_sync(info, 0); /* single buffer */
8dab6376 934 release_console_sem();
1c0c8461
GU
935 }
936 schedule();
310d8c11
GU
937 }
938 return 0;
939}
940
941static irqreturn_t ps3fb_vsync_interrupt(int irq, void *ptr)
942{
535da7ff 943 struct device *dev = ptr;
310d8c11
GU
944 u64 v1;
945 int status;
946 struct display_head *head = &ps3fb.dinfo->display_head[1];
947
948 status = lv1_gpu_context_intr(ps3fb.context_handle, &v1);
949 if (status) {
535da7ff
GU
950 dev_err(dev, "%s: lv1_gpu_context_intr failed: %d\n", __func__,
951 status);
310d8c11
GU
952 return IRQ_NONE;
953 }
954
955 if (v1 & (1 << GPU_INTR_STATUS_VSYNC_1)) {
956 /* VSYNC */
957 ps3fb.vblank_count = head->vblank_count;
1c0c8461
GU
958 if (ps3fb.task && !ps3fb.is_blanked &&
959 !atomic_read(&ps3fb.ext_flip)) {
960 ps3fb.is_kicked = 1;
961 wake_up_process(ps3fb.task);
962 }
310d8c11
GU
963 wake_up_interruptible(&ps3fb.wait_vsync);
964 }
965
966 return IRQ_HANDLED;
967}
968
310d8c11 969
9e6b99bd 970static int ps3fb_vsync_settings(struct gpu_driver_info *dinfo,
535da7ff 971 struct device *dev)
310d8c11
GU
972{
973 int error;
974
535da7ff
GU
975 dev_dbg(dev, "version_driver:%x\n", dinfo->version_driver);
976 dev_dbg(dev, "irq outlet:%x\n", dinfo->irq.irq_outlet);
977 dev_dbg(dev,
978 "version_gpu: %x memory_size: %x ch: %x core_freq: %d "
979 "mem_freq:%d\n",
310d8c11
GU
980 dinfo->version_gpu, dinfo->memory_size, dinfo->hardware_channel,
981 dinfo->nvcore_frequency/1000000, dinfo->memory_frequency/1000000);
982
983 if (dinfo->version_driver != GPU_DRIVER_INFO_VERSION) {
535da7ff
GU
984 dev_err(dev, "%s: version_driver err:%x\n", __func__,
985 dinfo->version_driver);
310d8c11
GU
986 return -EINVAL;
987 }
988
dc4f60c2
GL
989 error = ps3_irq_plug_setup(PS3_BINDING_CPU_ANY, dinfo->irq.irq_outlet,
990 &ps3fb.irq_no);
310d8c11 991 if (error) {
535da7ff 992 dev_err(dev, "%s: ps3_alloc_irq failed %d\n", __func__, error);
310d8c11
GU
993 return error;
994 }
995
996 error = request_irq(ps3fb.irq_no, ps3fb_vsync_interrupt, IRQF_DISABLED,
9e6b99bd 997 DEVICE_NAME, dev);
310d8c11 998 if (error) {
535da7ff 999 dev_err(dev, "%s: request_irq failed %d\n", __func__, error);
dc4f60c2 1000 ps3_irq_plug_destroy(ps3fb.irq_no);
310d8c11
GU
1001 return error;
1002 }
1003
1004 dinfo->irq.mask = (1 << GPU_INTR_STATUS_VSYNC_1) |
1005 (1 << GPU_INTR_STATUS_FLIP_1);
1006 return 0;
1007}
1008
535da7ff 1009static int ps3fb_xdr_settings(u64 xdr_lpar, struct device *dev)
310d8c11
GU
1010{
1011 int status;
1012
1013 status = lv1_gpu_context_iomap(ps3fb.context_handle, GPU_IOIF,
1014 xdr_lpar, ps3fb_videomemory.size, 0);
1015 if (status) {
535da7ff
GU
1016 dev_err(dev, "%s: lv1_gpu_context_iomap failed: %d\n",
1017 __func__, status);
310d8c11
GU
1018 return -ENXIO;
1019 }
535da7ff
GU
1020 dev_dbg(dev,
1021 "video:%p xdr_ea:%p ioif:%lx lpar:%lx phys:%lx size:%lx\n",
310d8c11
GU
1022 ps3fb_videomemory.address, ps3fb.xdr_ea, GPU_IOIF, xdr_lpar,
1023 virt_to_abs(ps3fb.xdr_ea), ps3fb_videomemory.size);
1024
1025 status = lv1_gpu_context_attribute(ps3fb.context_handle,
1026 L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP,
9ac67a35
GU
1027 xdr_lpar, GPU_CMD_BUF_SIZE,
1028 GPU_IOIF, 0);
310d8c11 1029 if (status) {
535da7ff
GU
1030 dev_err(dev,
1031 "%s: lv1_gpu_context_attribute FB_SETUP failed: %d\n",
1032 __func__, status);
310d8c11
GU
1033 return -ENXIO;
1034 }
1035 return 0;
1036}
1037
1038static struct fb_ops ps3fb_ops = {
1039 .fb_open = ps3fb_open,
1040 .fb_release = ps3fb_release,
92c4579d
GU
1041 .fb_read = fb_sys_read,
1042 .fb_write = fb_sys_write,
310d8c11
GU
1043 .fb_check_var = ps3fb_check_var,
1044 .fb_set_par = ps3fb_set_par,
1045 .fb_setcolreg = ps3fb_setcolreg,
fc7028b7 1046 .fb_pan_display = ps3fb_pan_display,
92c4579d
GU
1047 .fb_fillrect = sys_fillrect,
1048 .fb_copyarea = sys_copyarea,
1049 .fb_imageblit = sys_imageblit,
310d8c11
GU
1050 .fb_mmap = ps3fb_mmap,
1051 .fb_blank = ps3fb_blank,
1052 .fb_ioctl = ps3fb_ioctl,
1053 .fb_compat_ioctl = ps3fb_ioctl
1054};
1055
1056static struct fb_fix_screeninfo ps3fb_fix __initdata = {
9e6b99bd 1057 .id = DEVICE_NAME,
310d8c11
GU
1058 .type = FB_TYPE_PACKED_PIXELS,
1059 .visual = FB_VISUAL_TRUECOLOR,
1060 .accel = FB_ACCEL_NONE,
1061};
1062
535da7ff 1063static int ps3fb_set_sync(struct device *dev)
9e6b99bd
GU
1064{
1065 int status;
1066
1067#ifdef HEAD_A
1068 status = lv1_gpu_context_attribute(0x0,
1069 L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC,
1070 0, L1GPU_DISPLAY_SYNC_VSYNC, 0, 0);
1071 if (status) {
535da7ff
GU
1072 dev_err(dev,
1073 "%s: lv1_gpu_context_attribute DISPLAY_SYNC failed: "
1074 "%d\n",
1075 __func__, status);
9e6b99bd
GU
1076 return -1;
1077 }
1078#endif
1079#ifdef HEAD_B
1080 status = lv1_gpu_context_attribute(0x0,
1081 L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC,
1082 1, L1GPU_DISPLAY_SYNC_VSYNC, 0, 0);
1083
1084 if (status) {
535da7ff
GU
1085 dev_err(dev,
1086 "%s: lv1_gpu_context_attribute DISPLAY_SYNC failed: "
1087 "%d\n",
1088 __func__, status);
9e6b99bd
GU
1089 return -1;
1090 }
1091#endif
1092 return 0;
1093}
1094
1095static int __devinit ps3fb_probe(struct ps3_system_bus_device *dev)
310d8c11
GU
1096{
1097 struct fb_info *info;
0333d835 1098 struct ps3fb_par *par;
310d8c11
GU
1099 int retval = -ENOMEM;
1100 u64 ddr_lpar = 0;
1101 u64 lpar_dma_control = 0;
1102 u64 lpar_driver_info = 0;
1103 u64 lpar_reports = 0;
1104 u64 lpar_reports_size = 0;
1105 u64 xdr_lpar;
9f4f21b4 1106 int status;
1c0c8461 1107 struct task_struct *task;
ee592a5b 1108 unsigned long max_ps3fb_size;
310d8c11 1109
9ac67a35
GU
1110 if (ps3fb_videomemory.size < GPU_CMD_BUF_SIZE) {
1111 dev_err(&dev->core, "%s: Not enough video memory\n", __func__);
1112 return -ENOMEM;
1113 }
1114
9e6b99bd
GU
1115 status = ps3_open_hv_device(dev);
1116 if (status) {
535da7ff
GU
1117 dev_err(&dev->core, "%s: ps3_open_hv_device failed\n",
1118 __func__);
9e6b99bd
GU
1119 goto err;
1120 }
1121
1122 if (!ps3fb_mode)
1123 ps3fb_mode = ps3av_get_mode();
084ffff2 1124 dev_dbg(&dev->core, "ps3fb_mode: %d\n", ps3fb_mode);
9e6b99bd 1125
9e6b99bd
GU
1126 atomic_set(&ps3fb.f_count, -1); /* fbcon opens ps3fb */
1127 atomic_set(&ps3fb.ext_flip, 0); /* for flip with vsync */
1128 init_waitqueue_head(&ps3fb.wait_vsync);
9e6b99bd 1129
535da7ff 1130 ps3fb_set_sync(&dev->core);
9e6b99bd 1131
ee592a5b
GU
1132 max_ps3fb_size = _ALIGN_UP(GPU_IOIF, 256*1024*1024) - GPU_IOIF;
1133 if (ps3fb_videomemory.size > max_ps3fb_size) {
1134 dev_info(&dev->core, "Limiting ps3fb mem size to %lu bytes\n",
1135 max_ps3fb_size);
1136 ps3fb_videomemory.size = max_ps3fb_size;
1137 }
1138
310d8c11 1139 /* get gpu context handle */
ee592a5b 1140 status = lv1_gpu_memory_allocate(ps3fb_videomemory.size, 0, 0, 0, 0,
310d8c11
GU
1141 &ps3fb.memory_handle, &ddr_lpar);
1142 if (status) {
535da7ff
GU
1143 dev_err(&dev->core, "%s: lv1_gpu_memory_allocate failed: %d\n",
1144 __func__, status);
310d8c11
GU
1145 goto err;
1146 }
535da7ff 1147 dev_dbg(&dev->core, "ddr:lpar:0x%lx\n", ddr_lpar);
310d8c11
GU
1148
1149 status = lv1_gpu_context_allocate(ps3fb.memory_handle, 0,
1150 &ps3fb.context_handle,
1151 &lpar_dma_control, &lpar_driver_info,
1152 &lpar_reports, &lpar_reports_size);
1153 if (status) {
535da7ff
GU
1154 dev_err(&dev->core,
1155 "%s: lv1_gpu_context_attribute failed: %d\n", __func__,
1156 status);
310d8c11
GU
1157 goto err_gpu_memory_free;
1158 }
1159
1160 /* vsync interrupt */
1161 ps3fb.dinfo = ioremap(lpar_driver_info, 128 * 1024);
1162 if (!ps3fb.dinfo) {
535da7ff 1163 dev_err(&dev->core, "%s: ioremap failed\n", __func__);
310d8c11
GU
1164 goto err_gpu_context_free;
1165 }
1166
535da7ff 1167 retval = ps3fb_vsync_settings(ps3fb.dinfo, &dev->core);
310d8c11
GU
1168 if (retval)
1169 goto err_iounmap_dinfo;
1170
2ce32e15 1171 /* XDR frame buffer */
310d8c11
GU
1172 ps3fb.xdr_ea = ps3fb_videomemory.address;
1173 xdr_lpar = ps3_mm_phys_to_lpar(__pa(ps3fb.xdr_ea));
2ce32e15
GU
1174
1175 /* Clear memory to prevent kernel info leakage into userspace */
1176 memset(ps3fb.xdr_ea, 0, ps3fb_videomemory.size);
1177
9ac67a35
GU
1178 /*
1179 * The GPU command buffer is at the start of video memory
1180 * As we don't use the full command buffer, we can put the actual
1181 * frame buffer at offset GPU_FB_START and save some precious XDR
1182 * memory
1183 */
1184 ps3fb.xdr_ea += GPU_FB_START;
1185 ps3fb.xdr_size = ps3fb_videomemory.size - GPU_FB_START;
2ce32e15 1186
535da7ff 1187 retval = ps3fb_xdr_settings(xdr_lpar, &dev->core);
310d8c11
GU
1188 if (retval)
1189 goto err_free_irq;
1190
0333d835 1191 info = framebuffer_alloc(sizeof(struct ps3fb_par), &dev->core);
310d8c11
GU
1192 if (!info)
1193 goto err_free_irq;
1194
0333d835
GU
1195 par = info->par;
1196 par->mode_id = ~ps3fb_mode; /* != ps3fb_mode, to trigger change */
1197 par->new_mode_id = ps3fb_mode;
0333d835
GU
1198 par->num_frames = 1;
1199
f1664ed8 1200 info->screen_base = (char __iomem *)ps3fb.xdr_ea;
310d8c11
GU
1201 info->fbops = &ps3fb_ops;
1202
1203 info->fix = ps3fb_fix;
f1664ed8
GU
1204 info->fix.smem_start = virt_to_abs(ps3fb.xdr_ea);
1205 info->fix.smem_len = ps3fb.xdr_size;
0333d835 1206 info->pseudo_palette = par->pseudo_palette;
fc7028b7
GU
1207 info->flags = FBINFO_DEFAULT | FBINFO_READS_FAST |
1208 FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
310d8c11
GU
1209
1210 retval = fb_alloc_cmap(&info->cmap, 256, 0);
1211 if (retval < 0)
1212 goto err_framebuffer_release;
1213
1214 if (!fb_find_mode(&info->var, info, mode_option, ps3fb_modedb,
0333d835 1215 ARRAY_SIZE(ps3fb_modedb),
34c422fb 1216 ps3fb_vmode(par->new_mode_id), 32)) {
310d8c11
GU
1217 retval = -EINVAL;
1218 goto err_fb_dealloc;
1219 }
1220
1221 fb_videomode_to_modelist(ps3fb_modedb, ARRAY_SIZE(ps3fb_modedb),
1222 &info->modelist);
1223
1224 retval = register_framebuffer(info);
1225 if (retval < 0)
1226 goto err_fb_dealloc;
1227
9e6b99bd 1228 dev->core.driver_data = info;
310d8c11 1229
535da7ff
GU
1230 dev_info(info->device, "%s %s, using %lu KiB of video memory\n",
1231 dev_driver_string(info->dev), info->dev->bus_id,
2ce32e15 1232 ps3fb.xdr_size >> 10);
310d8c11 1233
9e6b99bd 1234 task = kthread_run(ps3fbd, info, DEVICE_NAME);
1c0c8461
GU
1235 if (IS_ERR(task)) {
1236 retval = PTR_ERR(task);
1237 goto err_unregister_framebuffer;
1238 }
1239
1240 ps3fb.task = task;
9e6b99bd 1241 ps3av_register_flip_ctl(ps3fb_flip_ctl, &ps3fb);
1c0c8461 1242
310d8c11
GU
1243 return 0;
1244
1c0c8461
GU
1245err_unregister_framebuffer:
1246 unregister_framebuffer(info);
310d8c11
GU
1247err_fb_dealloc:
1248 fb_dealloc_cmap(&info->cmap);
1249err_framebuffer_release:
1250 framebuffer_release(info);
1251err_free_irq:
fcbe6e97 1252 free_irq(ps3fb.irq_no, &dev->core);
dc4f60c2 1253 ps3_irq_plug_destroy(ps3fb.irq_no);
310d8c11
GU
1254err_iounmap_dinfo:
1255 iounmap((u8 __iomem *)ps3fb.dinfo);
1256err_gpu_context_free:
1257 lv1_gpu_context_free(ps3fb.context_handle);
1258err_gpu_memory_free:
1259 lv1_gpu_memory_free(ps3fb.memory_handle);
1260err:
1261 return retval;
1262}
1263
9e6b99bd 1264static int ps3fb_shutdown(struct ps3_system_bus_device *dev)
310d8c11 1265{
9e6b99bd
GU
1266 int status;
1267 struct fb_info *info = dev->core.driver_data;
1268
535da7ff 1269 dev_dbg(&dev->core, " -> %s:%d\n", __func__, __LINE__);
9e6b99bd
GU
1270
1271 ps3fb_flip_ctl(0, &ps3fb); /* flip off */
310d8c11 1272 ps3fb.dinfo->irq.mask = 0;
310d8c11 1273
9e6b99bd 1274 ps3av_register_flip_ctl(NULL, NULL);
1c0c8461
GU
1275 if (ps3fb.task) {
1276 struct task_struct *task = ps3fb.task;
1277 ps3fb.task = NULL;
1278 kthread_stop(task);
1279 }
310d8c11 1280 if (ps3fb.irq_no) {
fcbe6e97 1281 free_irq(ps3fb.irq_no, &dev->core);
dc4f60c2 1282 ps3_irq_plug_destroy(ps3fb.irq_no);
310d8c11 1283 }
ba21611c
JK
1284 if (info) {
1285 unregister_framebuffer(info);
1286 fb_dealloc_cmap(&info->cmap);
1287 framebuffer_release(info);
1288 info = dev->core.driver_data = NULL;
1289 }
310d8c11
GU
1290 iounmap((u8 __iomem *)ps3fb.dinfo);
1291
1292 status = lv1_gpu_context_free(ps3fb.context_handle);
1293 if (status)
535da7ff
GU
1294 dev_dbg(&dev->core, "lv1_gpu_context_free failed: %d\n",
1295 status);
310d8c11
GU
1296
1297 status = lv1_gpu_memory_free(ps3fb.memory_handle);
1298 if (status)
535da7ff
GU
1299 dev_dbg(&dev->core, "lv1_gpu_memory_free failed: %d\n",
1300 status);
310d8c11 1301
9e6b99bd 1302 ps3_close_hv_device(dev);
535da7ff 1303 dev_dbg(&dev->core, " <- %s:%d\n", __func__, __LINE__);
310d8c11 1304
310d8c11
GU
1305 return 0;
1306}
1307
9e6b99bd
GU
1308static struct ps3_system_bus_driver ps3fb_driver = {
1309 .match_id = PS3_MATCH_ID_GRAPHICS,
1310 .core.name = DEVICE_NAME,
1311 .core.owner = THIS_MODULE,
1312 .probe = ps3fb_probe,
1313 .remove = ps3fb_shutdown,
1314 .shutdown = ps3fb_shutdown,
310d8c11
GU
1315};
1316
9e6b99bd 1317static int __init ps3fb_setup(void)
310d8c11 1318{
9e6b99bd 1319 char *options;
310d8c11 1320
9e6b99bd 1321#ifdef MODULE
310d8c11 1322 return 0;
310d8c11
GU
1323#endif
1324
9e6b99bd
GU
1325 if (fb_get_options(DEVICE_NAME, &options))
1326 return -ENXIO;
310d8c11 1327
9e6b99bd
GU
1328 if (!options || !*options)
1329 return 0;
310d8c11 1330
9e6b99bd
GU
1331 while (1) {
1332 char *this_opt = strsep(&options, ",");
310d8c11 1333
9e6b99bd
GU
1334 if (!this_opt)
1335 break;
1336 if (!*this_opt)
1337 continue;
1338 if (!strncmp(this_opt, "mode:", 5))
1339 ps3fb_mode = simple_strtoul(this_opt + 5, NULL, 0);
1340 else
1341 mode_option = this_opt;
310d8c11 1342 }
9e6b99bd
GU
1343 return 0;
1344}
310d8c11 1345
9e6b99bd
GU
1346static int __init ps3fb_init(void)
1347{
1348 if (!ps3fb_videomemory.address || ps3fb_setup())
1349 return -ENXIO;
310d8c11 1350
9e6b99bd 1351 return ps3_system_bus_driver_register(&ps3fb_driver);
310d8c11
GU
1352}
1353
310d8c11
GU
1354static void __exit ps3fb_exit(void)
1355{
535da7ff 1356 pr_debug(" -> %s:%d\n", __func__, __LINE__);
9e6b99bd 1357 ps3_system_bus_driver_unregister(&ps3fb_driver);
535da7ff 1358 pr_debug(" <- %s:%d\n", __func__, __LINE__);
310d8c11
GU
1359}
1360
9e6b99bd 1361module_init(ps3fb_init);
310d8c11
GU
1362module_exit(ps3fb_exit);
1363
1364MODULE_LICENSE("GPL");
9e6b99bd
GU
1365MODULE_DESCRIPTION("PS3 GPU Frame Buffer Driver");
1366MODULE_AUTHOR("Sony Computer Entertainment Inc.");
1367MODULE_ALIAS(PS3_MODULE_ALIAS_GRAPHICS);