]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/drivers/video/riva/fbdev-i2c.c - nVidia i2c | |
3 | * | |
4 | * Maintained by Ani Joshi <ajoshi@shell.unixbox.com> | |
5 | * | |
6 | * Copyright 2004 Antonino A. Daplas <adaplas @pol.net> | |
7 | * | |
8 | * Based on radeonfb-i2c.c | |
9 | * | |
10 | * This file is subject to the terms and conditions of the GNU General Public | |
11 | * License. See the file COPYING in the main directory of this archive | |
12 | * for more details. | |
13 | */ | |
14 | ||
1da177e4 LT |
15 | #include <linux/module.h> |
16 | #include <linux/kernel.h> | |
1da177e4 LT |
17 | #include <linux/delay.h> |
18 | #include <linux/pci.h> | |
19 | #include <linux/fb.h> | |
20 | #include <linux/jiffies.h> | |
21 | ||
22 | #include <asm/io.h> | |
23 | ||
24 | #include "rivafb.h" | |
25 | #include "../edid.h" | |
26 | ||
1da177e4 LT |
27 | static void riva_gpio_setscl(void* data, int state) |
28 | { | |
f4a41836 | 29 | struct riva_i2c_chan *chan = data; |
1da177e4 LT |
30 | struct riva_par *par = chan->par; |
31 | u32 val; | |
32 | ||
33 | VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); | |
34 | val = VGA_RD08(par->riva.PCIO, 0x3d5) & 0xf0; | |
35 | ||
36 | if (state) | |
37 | val |= 0x20; | |
38 | else | |
39 | val &= ~0x20; | |
40 | ||
41 | VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); | |
42 | VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1); | |
43 | } | |
44 | ||
45 | static void riva_gpio_setsda(void* data, int state) | |
46 | { | |
f4a41836 | 47 | struct riva_i2c_chan *chan = data; |
1da177e4 LT |
48 | struct riva_par *par = chan->par; |
49 | u32 val; | |
50 | ||
51 | VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); | |
52 | val = VGA_RD08(par->riva.PCIO, 0x3d5) & 0xf0; | |
53 | ||
54 | if (state) | |
55 | val |= 0x10; | |
56 | else | |
57 | val &= ~0x10; | |
58 | ||
59 | VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); | |
60 | VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1); | |
61 | } | |
62 | ||
63 | static int riva_gpio_getscl(void* data) | |
64 | { | |
f4a41836 | 65 | struct riva_i2c_chan *chan = data; |
1da177e4 LT |
66 | struct riva_par *par = chan->par; |
67 | u32 val = 0; | |
68 | ||
69 | VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base); | |
70 | if (VGA_RD08(par->riva.PCIO, 0x3d5) & 0x04) | |
71 | val = 1; | |
72 | ||
1da177e4 LT |
73 | return val; |
74 | } | |
75 | ||
76 | static int riva_gpio_getsda(void* data) | |
77 | { | |
f4a41836 | 78 | struct riva_i2c_chan *chan = data; |
1da177e4 LT |
79 | struct riva_par *par = chan->par; |
80 | u32 val = 0; | |
81 | ||
82 | VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base); | |
83 | if (VGA_RD08(par->riva.PCIO, 0x3d5) & 0x08) | |
84 | val = 1; | |
85 | ||
86 | return val; | |
87 | } | |
88 | ||
a65ff76a JD |
89 | static int __devinit riva_setup_i2c_bus(struct riva_i2c_chan *chan, |
90 | const char *name, | |
91 | unsigned int i2c_class) | |
1da177e4 LT |
92 | { |
93 | int rc; | |
94 | ||
95 | strcpy(chan->adapter.name, name); | |
96 | chan->adapter.owner = THIS_MODULE; | |
1684a984 | 97 | chan->adapter.id = I2C_HW_B_RIVA; |
1e73db25 | 98 | chan->adapter.class = i2c_class; |
1da177e4 LT |
99 | chan->adapter.algo_data = &chan->algo; |
100 | chan->adapter.dev.parent = &chan->par->pdev->dev; | |
101 | chan->algo.setsda = riva_gpio_setsda; | |
102 | chan->algo.setscl = riva_gpio_setscl; | |
103 | chan->algo.getsda = riva_gpio_getsda; | |
104 | chan->algo.getscl = riva_gpio_getscl; | |
105 | chan->algo.udelay = 40; | |
106 | chan->algo.timeout = msecs_to_jiffies(2); | |
107 | chan->algo.data = chan; | |
108 | ||
109 | i2c_set_adapdata(&chan->adapter, chan); | |
110 | ||
111 | /* Raise SCL and SDA */ | |
112 | riva_gpio_setsda(chan, 1); | |
113 | riva_gpio_setscl(chan, 1); | |
114 | udelay(20); | |
115 | ||
116 | rc = i2c_bit_add_bus(&chan->adapter); | |
117 | if (rc == 0) | |
118 | dev_dbg(&chan->par->pdev->dev, "I2C bus %s registered.\n", name); | |
119 | else { | |
120 | dev_warn(&chan->par->pdev->dev, | |
121 | "Failed to register I2C bus %s.\n", name); | |
122 | chan->par = NULL; | |
123 | } | |
124 | ||
125 | return rc; | |
126 | } | |
127 | ||
a65ff76a | 128 | void __devinit riva_create_i2c_busses(struct riva_par *par) |
1da177e4 | 129 | { |
1da177e4 LT |
130 | par->chan[0].par = par; |
131 | par->chan[1].par = par; | |
132 | par->chan[2].par = par; | |
133 | ||
04043849 AD |
134 | par->chan[0].ddc_base = 0x36; |
135 | par->chan[1].ddc_base = 0x3e; | |
1da177e4 | 136 | par->chan[2].ddc_base = 0x50; |
04043849 AD |
137 | riva_setup_i2c_bus(&par->chan[0], "BUS1", I2C_CLASS_HWMON); |
138 | riva_setup_i2c_bus(&par->chan[1], "BUS2", 0); | |
1e73db25 | 139 | riva_setup_i2c_bus(&par->chan[2], "BUS3", 0); |
1da177e4 LT |
140 | } |
141 | ||
142 | void riva_delete_i2c_busses(struct riva_par *par) | |
143 | { | |
a65ff76a | 144 | int i; |
1da177e4 | 145 | |
a65ff76a JD |
146 | for (i = 0; i < 3; i++) { |
147 | if (!par->chan[i].par) | |
148 | continue; | |
149 | i2c_del_adapter(&par->chan[i].adapter); | |
150 | par->chan[i].par = NULL; | |
151 | } | |
1da177e4 LT |
152 | } |
153 | ||
a65ff76a | 154 | int __devinit riva_probe_i2c_connector(struct riva_par *par, int conn, u8 **out_edid) |
1da177e4 LT |
155 | { |
156 | u8 *edid = NULL; | |
1da177e4 | 157 | |
a65ff76a JD |
158 | if (par->chan[conn].par) |
159 | edid = fb_ddc_read(&par->chan[conn].adapter); | |
bf5df0a2 | 160 | |
1da177e4 LT |
161 | if (out_edid) |
162 | *out_edid = edid; | |
163 | if (!edid) | |
164 | return 1; | |
165 | ||
166 | return 0; | |
167 | } | |
168 |