[mirror_ubuntu-artful-kernel.git] / drivers / video / sa1100fb.h

/*
 * linux/drivers/video/sa1100fb.h
 *    -- StrongARM 1100 LCD Controller Frame Buffer Device
 *
 *  Copyright (C) 1999 Eric A. Thomas
 *   Based on acornfb.c Copyright (C) Russell King.
 *  
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 */

/*
 * These are the bitfields for each
 * display depth that we support.
 */
struct sa1100fb_rgb {
	struct fb_bitfield	red;
	struct fb_bitfield	green;
	struct fb_bitfield	blue;
	struct fb_bitfield	transp;
};

/*
 * This structure describes the machine which we are running on.
 */
struct sa1100fb_mach_info {
	u_long		pixclock;

	u_short		xres;
	u_short		yres;

	u_char		bpp;
	u_char		hsync_len;
	u_char		left_margin;
	u_char		right_margin;

	u_char		vsync_len;
	u_char		upper_margin;
	u_char		lower_margin;
	u_char		sync;

	u_int		cmap_greyscale:1,
			cmap_inverse:1,
			cmap_static:1,
			unused:29;

	u_int		lccr0;
	u_int		lccr3;
};

/* Shadows for LCD controller registers */
struct sa1100fb_lcd_reg {
	unsigned long lccr0;
	unsigned long lccr1;
	unsigned long lccr2;
	unsigned long lccr3;
};

#define RGB_8	(0)
#define RGB_16	(1)
#define NR_RGB	2

struct sa1100fb_info {
	struct fb_info		fb;
	struct device		*dev;
	struct sa1100fb_rgb	*rgb[NR_RGB];

	u_int			max_bpp;
	u_int			max_xres;
	u_int			max_yres;

	/*
	 * These are the addresses we mapped
	 * the framebuffer memory region to.
	 */
	dma_addr_t		map_dma;
	u_char *		map_cpu;
	u_int			map_size;

	u_char *		screen_cpu;
	dma_addr_t		screen_dma;
	u16 *			palette_cpu;
	dma_addr_t		palette_dma;
	u_int			palette_size;

	dma_addr_t		dbar1;
	dma_addr_t		dbar2;

	u_int			lccr0;
	u_int			lccr3;
	u_int			cmap_inverse:1,
				cmap_static:1,
				unused:30;

	u_int			reg_lccr0;
	u_int			reg_lccr1;
	u_int			reg_lccr2;
	u_int			reg_lccr3;

	volatile u_char		state;
	volatile u_char		task_state;
	struct semaphore	ctrlr_sem;
	wait_queue_head_t	ctrlr_wait;
	struct work_struct	task;

#ifdef CONFIG_CPU_FREQ
	struct notifier_block	freq_transition;
	struct notifier_block	freq_policy;
#endif
};

#define __type_entry(ptr,type,member) ((type *)((char *)(ptr)-offsetof(type,member)))

#define TO_INF(ptr,member)	__type_entry(ptr,struct sa1100fb_info,member)

#define SA1100_PALETTE_MODE_VAL(bpp)    (((bpp) & 0x018) << 9)

/*
 * These are the actions for set_ctrlr_state
 */
#define C_DISABLE		(0)
#define C_ENABLE		(1)
#define C_DISABLE_CLKCHANGE	(2)
#define C_ENABLE_CLKCHANGE	(3)
#define C_REENABLE		(4)
#define C_DISABLE_PM		(5)
#define C_ENABLE_PM		(6)
#define C_STARTUP		(7)

#define SA1100_NAME	"SA1100"

/*
 *  Debug macros 
 */
#if DEBUG
#  define DPRINTK(fmt, args...)	printk("%s: " fmt, __FUNCTION__ , ## args)
#else
#  define DPRINTK(fmt, args...)
#endif

/*
 * Minimum X and Y resolutions
 */
#define MIN_XRES	64
#define MIN_YRES	64
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/drivers/video/sa1100fb.h
	3	* -- StrongARM 1100 LCD Controller Frame Buffer Device
	4	*
	5	* Copyright (C) 1999 Eric A. Thomas
	6	* Based on acornfb.c Copyright (C) Russell King.
	7	*
	8	* This file is subject to the terms and conditions of the GNU General Public
	9	* License. See the file COPYING in the main directory of this archive
	10	* for more details.
	11	*/
	12
	13	/*
	14	* These are the bitfields for each
	15	* display depth that we support.
	16	*/
	17	struct sa1100fb_rgb {
	18	struct fb_bitfield red;
	19	struct fb_bitfield green;
	20	struct fb_bitfield blue;
	21	struct fb_bitfield transp;
	22	};
	23
	24	/*
	25	* This structure describes the machine which we are running on.
	26	*/
	27	struct sa1100fb_mach_info {
	28	u_long pixclock;
	29
	30	u_short xres;
	31	u_short yres;
	32
	33	u_char bpp;
	34	u_char hsync_len;
	35	u_char left_margin;
	36	u_char right_margin;
	37
	38	u_char vsync_len;
	39	u_char upper_margin;
	40	u_char lower_margin;
	41	u_char sync;
	42
	43	u_int cmap_greyscale:1,
	44	cmap_inverse:1,
	45	cmap_static:1,
	46	unused:29;
	47
	48	u_int lccr0;
	49	u_int lccr3;
	50	};
	51
	52	/* Shadows for LCD controller registers */
	53	struct sa1100fb_lcd_reg {
	54	unsigned long lccr0;
	55	unsigned long lccr1;
	56	unsigned long lccr2;
	57	unsigned long lccr3;
	58	};
	59
	60	#define RGB_8 (0)
	61	#define RGB_16 (1)
	62	#define NR_RGB 2
	63
	64	struct sa1100fb_info {
65	struct fb_info fb;
66	struct device *dev;
67	struct sa1100fb_rgb *rgb[NR_RGB];
68
69	u_int max_bpp;
70	u_int max_xres;
71	u_int max_yres;
72
73	/*
74	* These are the addresses we mapped
75	* the framebuffer memory region to.
76	*/
77	dma_addr_t map_dma;
78	u_char * map_cpu;
79	u_int map_size;
80
81	u_char * screen_cpu;
82	dma_addr_t screen_dma;
83	u16 * palette_cpu;
84	dma_addr_t palette_dma;
85	u_int palette_size;
86
87	dma_addr_t dbar1;
88	dma_addr_t dbar2;
89
90	u_int lccr0;
91	u_int lccr3;
92	u_int cmap_inverse:1,
93	cmap_static:1,
94	unused:30;
95
96	u_int reg_lccr0;
97	u_int reg_lccr1;
98	u_int reg_lccr2;
99	u_int reg_lccr3;
100
101	volatile u_char state;
102	volatile u_char task_state;
103	struct semaphore ctrlr_sem;
104	wait_queue_head_t ctrlr_wait;
105	struct work_struct task;
106
107	#ifdef CONFIG_CPU_FREQ
108	struct notifier_block freq_transition;
109	struct notifier_block freq_policy;
110	#endif
111	};
112
113	#define __type_entry(ptr,type,member) ((type )((char )(ptr)-offsetof(type,member)))
114
115	#define TO_INF(ptr,member) __type_entry(ptr,struct sa1100fb_info,member)
116
117	#define SA1100_PALETTE_MODE_VAL(bpp) (((bpp) & 0x018) << 9)
118
119	/*
120	* These are the actions for set_ctrlr_state
121	*/
122	#define C_DISABLE (0)
123	#define C_ENABLE (1)
124	#define C_DISABLE_CLKCHANGE (2)
125	#define C_ENABLE_CLKCHANGE (3)
126	#define C_REENABLE (4)
127	#define C_DISABLE_PM (5)
128	#define C_ENABLE_PM (6)
129	#define C_STARTUP (7)
130
131	#define SA1100_NAME "SA1100"
132
133	/*
134	* Debug macros
135	*/
136	#if DEBUG
137	# define DPRINTK(fmt, args...) printk("%s: " fmt, __FUNCTION__ , ## args)
138	#else
139	# define DPRINTK(fmt, args...)
140	#endif
141
142	/*
143	* Minimum X and Y resolutions
144	*/
145	#define MIN_XRES 64
146	#define MIN_YRES 64
147