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1da177e4 LT |
1 | /* |
2 | * linux/drivers/video/sa1100fb.h | |
3 | * -- StrongARM 1100 LCD Controller Frame Buffer Device | |
4 | * | |
5 | * Copyright (C) 1999 Eric A. Thomas | |
6 | * Based on acornfb.c Copyright (C) Russell King. | |
7 | * | |
8 | * This file is subject to the terms and conditions of the GNU General Public | |
9 | * License. See the file COPYING in the main directory of this archive | |
10 | * for more details. | |
11 | */ | |
12 | ||
13 | /* | |
14 | * These are the bitfields for each | |
15 | * display depth that we support. | |
16 | */ | |
17 | struct sa1100fb_rgb { | |
18 | struct fb_bitfield red; | |
19 | struct fb_bitfield green; | |
20 | struct fb_bitfield blue; | |
21 | struct fb_bitfield transp; | |
22 | }; | |
23 | ||
24 | /* | |
25 | * This structure describes the machine which we are running on. | |
26 | */ | |
27 | struct sa1100fb_mach_info { | |
28 | u_long pixclock; | |
29 | ||
30 | u_short xres; | |
31 | u_short yres; | |
32 | ||
33 | u_char bpp; | |
34 | u_char hsync_len; | |
35 | u_char left_margin; | |
36 | u_char right_margin; | |
37 | ||
38 | u_char vsync_len; | |
39 | u_char upper_margin; | |
40 | u_char lower_margin; | |
41 | u_char sync; | |
42 | ||
43 | u_int cmap_greyscale:1, | |
44 | cmap_inverse:1, | |
45 | cmap_static:1, | |
46 | unused:29; | |
47 | ||
48 | u_int lccr0; | |
49 | u_int lccr3; | |
50 | }; | |
51 | ||
52 | /* Shadows for LCD controller registers */ | |
53 | struct sa1100fb_lcd_reg { | |
54 | unsigned long lccr0; | |
55 | unsigned long lccr1; | |
56 | unsigned long lccr2; | |
57 | unsigned long lccr3; | |
58 | }; | |
59 | ||
0a453480 MJ |
60 | #define RGB_4 (0) |
61 | #define RGB_8 (1) | |
62 | #define RGB_16 (2) | |
63 | #define NR_RGB 3 | |
1da177e4 LT |
64 | |
65 | struct sa1100fb_info { | |
66 | struct fb_info fb; | |
67 | struct device *dev; | |
68 | struct sa1100fb_rgb *rgb[NR_RGB]; | |
69 | ||
70 | u_int max_bpp; | |
71 | u_int max_xres; | |
72 | u_int max_yres; | |
73 | ||
74 | /* | |
75 | * These are the addresses we mapped | |
76 | * the framebuffer memory region to. | |
77 | */ | |
78 | dma_addr_t map_dma; | |
79 | u_char * map_cpu; | |
80 | u_int map_size; | |
81 | ||
82 | u_char * screen_cpu; | |
83 | dma_addr_t screen_dma; | |
84 | u16 * palette_cpu; | |
85 | dma_addr_t palette_dma; | |
86 | u_int palette_size; | |
87 | ||
88 | dma_addr_t dbar1; | |
89 | dma_addr_t dbar2; | |
90 | ||
91 | u_int lccr0; | |
92 | u_int lccr3; | |
93 | u_int cmap_inverse:1, | |
94 | cmap_static:1, | |
95 | unused:30; | |
96 | ||
97 | u_int reg_lccr0; | |
98 | u_int reg_lccr1; | |
99 | u_int reg_lccr2; | |
100 | u_int reg_lccr3; | |
101 | ||
102 | volatile u_char state; | |
103 | volatile u_char task_state; | |
7951ac91 | 104 | struct mutex ctrlr_lock; |
1da177e4 LT |
105 | wait_queue_head_t ctrlr_wait; |
106 | struct work_struct task; | |
107 | ||
108 | #ifdef CONFIG_CPU_FREQ | |
109 | struct notifier_block freq_transition; | |
110 | struct notifier_block freq_policy; | |
111 | #endif | |
112 | }; | |
113 | ||
b385a144 | 114 | #define TO_INF(ptr,member) container_of(ptr,struct sa1100fb_info,member) |
1da177e4 LT |
115 | |
116 | #define SA1100_PALETTE_MODE_VAL(bpp) (((bpp) & 0x018) << 9) | |
117 | ||
118 | /* | |
119 | * These are the actions for set_ctrlr_state | |
120 | */ | |
121 | #define C_DISABLE (0) | |
122 | #define C_ENABLE (1) | |
123 | #define C_DISABLE_CLKCHANGE (2) | |
124 | #define C_ENABLE_CLKCHANGE (3) | |
125 | #define C_REENABLE (4) | |
126 | #define C_DISABLE_PM (5) | |
127 | #define C_ENABLE_PM (6) | |
128 | #define C_STARTUP (7) | |
129 | ||
130 | #define SA1100_NAME "SA1100" | |
131 | ||
132 | /* | |
133 | * Debug macros | |
134 | */ | |
135 | #if DEBUG | |
5ae12170 | 136 | # define DPRINTK(fmt, args...) printk("%s: " fmt, __func__ , ## args) |
1da177e4 LT |
137 | #else |
138 | # define DPRINTK(fmt, args...) | |
139 | #endif | |
140 | ||
141 | /* | |
142 | * Minimum X and Y resolutions | |
143 | */ | |
144 | #define MIN_XRES 64 | |
145 | #define MIN_YRES 64 | |
146 |