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fbdev: sh_mobile_lcdc: Add sh_mobile_format_info() function
[mirror_ubuntu-hirsute-kernel.git] / drivers / video / sh_mobile_lcdcfb.c
CommitLineData
cfb4f5d1
MD
1/*
2 * SuperH Mobile LCDC Framebuffer
3 *
4 * Copyright (c) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
f1f60b5f
LP
11#include <linux/atomic.h>
12#include <linux/backlight.h>
cfb4f5d1 13#include <linux/clk.h>
f1f60b5f 14#include <linux/console.h>
cfb4f5d1 15#include <linux/dma-mapping.h>
f1f60b5f
LP
16#include <linux/delay.h>
17#include <linux/gpio.h>
18#include <linux/init.h>
8564557a 19#include <linux/interrupt.h>
40331b21 20#include <linux/ioctl.h>
f1f60b5f
LP
21#include <linux/kernel.h>
22#include <linux/mm.h>
355b200b 23#include <linux/module.h>
f1f60b5f
LP
24#include <linux/platform_device.h>
25#include <linux/pm_runtime.h>
26#include <linux/slab.h>
27#include <linux/videodev2.h>
28#include <linux/vmalloc.h>
29
225c9a8d 30#include <video/sh_mobile_lcdc.h>
8a20974f 31#include <video/sh_mobile_meram.h>
cfb4f5d1 32
6de9edd5
GL
33#include "sh_mobile_lcdcfb.h"
34
a6f15ade
PE
35#define SIDE_B_OFFSET 0x1000
36#define MIRROR_OFFSET 0x2000
cfb4f5d1 37
d2ecbab5
GL
38#define MAX_XRES 1920
39#define MAX_YRES 1080
cfb4f5d1 40
f1f60b5f
LP
41struct sh_mobile_lcdc_priv {
42 void __iomem *base;
43 int irq;
44 atomic_t hw_usecnt;
45 struct device *dev;
46 struct clk *dot_clk;
47 unsigned long lddckr;
48 struct sh_mobile_lcdc_chan ch[2];
49 struct notifier_block notifier;
50 int started;
51 int forced_fourcc; /* 2 channel LCDC must share fourcc setting */
52 struct sh_mobile_meram_info *meram_dev;
53};
54
55/* -----------------------------------------------------------------------------
56 * Registers access
57 */
58
0246c471 59static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
cfb4f5d1
MD
60 [LDDCKPAT1R] = 0x400,
61 [LDDCKPAT2R] = 0x404,
62 [LDMT1R] = 0x418,
63 [LDMT2R] = 0x41c,
64 [LDMT3R] = 0x420,
65 [LDDFR] = 0x424,
66 [LDSM1R] = 0x428,
8564557a 67 [LDSM2R] = 0x42c,
cfb4f5d1 68 [LDSA1R] = 0x430,
53b50314 69 [LDSA2R] = 0x434,
cfb4f5d1
MD
70 [LDMLSR] = 0x438,
71 [LDHCNR] = 0x448,
72 [LDHSYNR] = 0x44c,
73 [LDVLNR] = 0x450,
74 [LDVSYNR] = 0x454,
75 [LDPMR] = 0x460,
6011bdea 76 [LDHAJR] = 0x4a0,
cfb4f5d1
MD
77};
78
0246c471 79static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
cfb4f5d1
MD
80 [LDDCKPAT1R] = 0x408,
81 [LDDCKPAT2R] = 0x40c,
82 [LDMT1R] = 0x600,
83 [LDMT2R] = 0x604,
84 [LDMT3R] = 0x608,
85 [LDDFR] = 0x60c,
86 [LDSM1R] = 0x610,
8564557a 87 [LDSM2R] = 0x614,
cfb4f5d1
MD
88 [LDSA1R] = 0x618,
89 [LDMLSR] = 0x620,
90 [LDHCNR] = 0x624,
91 [LDHSYNR] = 0x628,
92 [LDVLNR] = 0x62c,
93 [LDVSYNR] = 0x630,
94 [LDPMR] = 0x63c,
95};
96
a6f15ade
PE
97static bool banked(int reg_nr)
98{
99 switch (reg_nr) {
100 case LDMT1R:
101 case LDMT2R:
102 case LDMT3R:
103 case LDDFR:
104 case LDSM1R:
105 case LDSA1R:
53b50314 106 case LDSA2R:
a6f15ade
PE
107 case LDMLSR:
108 case LDHCNR:
109 case LDHSYNR:
110 case LDVLNR:
111 case LDVSYNR:
112 return true;
113 }
114 return false;
115}
116
f1f60b5f
LP
117static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan)
118{
119 return chan->cfg.chan == LCDC_CHAN_SUBLCD;
120}
121
cfb4f5d1
MD
122static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
123 int reg_nr, unsigned long data)
124{
125 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
a6f15ade
PE
126 if (banked(reg_nr))
127 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
128 SIDE_B_OFFSET);
129}
130
131static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan,
132 int reg_nr, unsigned long data)
133{
134 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
135 MIRROR_OFFSET);
cfb4f5d1
MD
136}
137
138static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
139 int reg_nr)
140{
141 return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
142}
143
144static void lcdc_write(struct sh_mobile_lcdc_priv *priv,
145 unsigned long reg_offs, unsigned long data)
146{
147 iowrite32(data, priv->base + reg_offs);
148}
149
150static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv,
151 unsigned long reg_offs)
152{
153 return ioread32(priv->base + reg_offs);
154}
155
156static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv,
157 unsigned long reg_offs,
158 unsigned long mask, unsigned long until)
159{
160 while ((lcdc_read(priv, reg_offs) & mask) != until)
161 cpu_relax();
162}
163
f1f60b5f
LP
164/* -----------------------------------------------------------------------------
165 * Clock management
166 */
167
168static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
cfb4f5d1 169{
f1f60b5f
LP
170 if (atomic_inc_and_test(&priv->hw_usecnt)) {
171 if (priv->dot_clk)
172 clk_enable(priv->dot_clk);
173 pm_runtime_get_sync(priv->dev);
174 if (priv->meram_dev && priv->meram_dev->pdev)
175 pm_runtime_get_sync(&priv->meram_dev->pdev->dev);
176 }
cfb4f5d1
MD
177}
178
f1f60b5f
LP
179static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
180{
181 if (atomic_sub_return(1, &priv->hw_usecnt) == -1) {
182 if (priv->meram_dev && priv->meram_dev->pdev)
183 pm_runtime_put_sync(&priv->meram_dev->pdev->dev);
184 pm_runtime_put(priv->dev);
185 if (priv->dot_clk)
186 clk_disable(priv->dot_clk);
187 }
188}
189
0a7f17aa
LP
190static int sh_mobile_lcdc_setup_clocks(struct sh_mobile_lcdc_priv *priv,
191 int clock_source)
f1f60b5f 192{
4774c12a 193 struct clk *clk;
f1f60b5f
LP
194 char *str;
195
196 switch (clock_source) {
197 case LCDC_CLK_BUS:
198 str = "bus_clk";
199 priv->lddckr = LDDCKR_ICKSEL_BUS;
200 break;
201 case LCDC_CLK_PERIPHERAL:
202 str = "peripheral_clk";
203 priv->lddckr = LDDCKR_ICKSEL_MIPI;
204 break;
205 case LCDC_CLK_EXTERNAL:
206 str = NULL;
207 priv->lddckr = LDDCKR_ICKSEL_HDMI;
208 break;
209 default:
210 return -EINVAL;
211 }
212
4774c12a
LP
213 if (str == NULL)
214 return 0;
215
0a7f17aa 216 clk = clk_get(priv->dev, str);
4774c12a 217 if (IS_ERR(clk)) {
0a7f17aa 218 dev_err(priv->dev, "cannot get dot clock %s\n", str);
4774c12a 219 return PTR_ERR(clk);
f1f60b5f
LP
220 }
221
4774c12a 222 priv->dot_clk = clk;
f1f60b5f
LP
223 return 0;
224}
225
226/* -----------------------------------------------------------------------------
37c5dcc2 227 * Display, panel and deferred I/O
f1f60b5f
LP
228 */
229
cfb4f5d1
MD
230static void lcdc_sys_write_index(void *handle, unsigned long data)
231{
232 struct sh_mobile_lcdc_chan *ch = handle;
233
ce1c0b08
LP
234 lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT);
235 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
236 lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
237 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
238 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1
MD
239}
240
241static void lcdc_sys_write_data(void *handle, unsigned long data)
242{
243 struct sh_mobile_lcdc_chan *ch = handle;
244
ce1c0b08
LP
245 lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT | LDDWDxR_RSW);
246 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
247 lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
248 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
249 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1
MD
250}
251
252static unsigned long lcdc_sys_read_data(void *handle)
253{
254 struct sh_mobile_lcdc_chan *ch = handle;
255
ce1c0b08
LP
256 lcdc_write(ch->lcdc, _LDDRDR, LDDRDR_RSR);
257 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
258 lcdc_write(ch->lcdc, _LDDRAR, LDDRAR_RA |
259 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
cfb4f5d1 260 udelay(1);
ce1c0b08 261 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1 262
ce1c0b08 263 return lcdc_read(ch->lcdc, _LDDRDR) & LDDRDR_DRD_MASK;
cfb4f5d1
MD
264}
265
266struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
267 lcdc_sys_write_index,
268 lcdc_sys_write_data,
269 lcdc_sys_read_data,
270};
271
1c6a307a
PM
272static int sh_mobile_lcdc_sginit(struct fb_info *info,
273 struct list_head *pagelist)
274{
275 struct sh_mobile_lcdc_chan *ch = info->par;
276 unsigned int nr_pages_max = info->fix.smem_len >> PAGE_SHIFT;
277 struct page *page;
278 int nr_pages = 0;
279
280 sg_init_table(ch->sglist, nr_pages_max);
281
282 list_for_each_entry(page, pagelist, lru)
283 sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0);
284
285 return nr_pages;
286}
287
8564557a
MD
288static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
289 struct list_head *pagelist)
290{
291 struct sh_mobile_lcdc_chan *ch = info->par;
afaad83b 292 struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg.panel_cfg;
8564557a
MD
293
294 /* enable clocks before accessing hardware */
295 sh_mobile_lcdc_clk_on(ch->lcdc);
296
5c1a56b5
PM
297 /*
298 * It's possible to get here without anything on the pagelist via
299 * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync()
300 * invocation. In the former case, the acceleration routines are
301 * stepped in to when using the framebuffer console causing the
302 * workqueue to be scheduled without any dirty pages on the list.
303 *
304 * Despite this, a panel update is still needed given that the
305 * acceleration routines have their own methods for writing in
306 * that still need to be updated.
307 *
308 * The fsync() and empty pagelist case could be optimized for,
309 * but we don't bother, as any application exhibiting such
310 * behaviour is fundamentally broken anyways.
311 */
312 if (!list_empty(pagelist)) {
313 unsigned int nr_pages = sh_mobile_lcdc_sginit(info, pagelist);
314
315 /* trigger panel update */
316 dma_map_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
afaad83b
LP
317 if (panel->start_transfer)
318 panel->start_transfer(ch, &sh_mobile_lcdc_sys_bus_ops);
ce1c0b08 319 lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG);
5c1a56b5 320 dma_unmap_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
ef61aae4 321 } else {
afaad83b
LP
322 if (panel->start_transfer)
323 panel->start_transfer(ch, &sh_mobile_lcdc_sys_bus_ops);
ce1c0b08 324 lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG);
ef61aae4 325 }
8564557a
MD
326}
327
328static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
329{
330 struct fb_deferred_io *fbdefio = info->fbdefio;
331
332 if (fbdefio)
333 schedule_delayed_work(&info->deferred_work, fbdefio->delay);
334}
335
37c5dcc2
LP
336static void sh_mobile_lcdc_display_on(struct sh_mobile_lcdc_chan *ch)
337{
afaad83b 338 struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg.panel_cfg;
37c5dcc2 339
9a2985e7 340 if (ch->tx_dev) {
458981c3
LP
341 int ret;
342
343 ret = ch->tx_dev->ops->display_on(ch->tx_dev);
344 if (ret < 0)
9a2985e7 345 return;
458981c3
LP
346
347 if (ret == SH_MOBILE_LCDC_DISPLAY_DISCONNECTED)
348 ch->info->state = FBINFO_STATE_SUSPENDED;
9a2985e7
LP
349 }
350
37c5dcc2 351 /* HDMI must be enabled before LCDC configuration */
afaad83b
LP
352 if (panel->display_on)
353 panel->display_on();
37c5dcc2
LP
354}
355
356static void sh_mobile_lcdc_display_off(struct sh_mobile_lcdc_chan *ch)
357{
afaad83b 358 struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg.panel_cfg;
37c5dcc2 359
afaad83b
LP
360 if (panel->display_off)
361 panel->display_off();
9a2985e7
LP
362
363 if (ch->tx_dev)
364 ch->tx_dev->ops->display_off(ch->tx_dev);
37c5dcc2
LP
365}
366
ecd29947
LP
367static bool
368sh_mobile_lcdc_must_reconfigure(struct sh_mobile_lcdc_chan *ch,
e0c8601a 369 const struct fb_videomode *new_mode)
ecd29947 370{
ecd29947 371 dev_dbg(ch->info->dev, "Old %ux%u, new %ux%u\n",
2d04559d
LP
372 ch->display.mode.xres, ch->display.mode.yres,
373 new_mode->xres, new_mode->yres);
ecd29947 374
e0c8601a 375 /* It can be a different monitor with an equal video-mode */
2d04559d 376 if (fb_mode_is_equal(&ch->display.mode, new_mode))
ecd29947 377 return false;
ecd29947
LP
378
379 dev_dbg(ch->info->dev, "Switching %u -> %u lines\n",
2d04559d
LP
380 ch->display.mode.yres, new_mode->yres);
381 ch->display.mode = *new_mode;
ecd29947
LP
382
383 return true;
384}
385
386static int sh_mobile_check_var(struct fb_var_screeninfo *var,
387 struct fb_info *info);
388
389static int sh_mobile_lcdc_display_notify(struct sh_mobile_lcdc_chan *ch,
390 enum sh_mobile_lcdc_entity_event event,
e0c8601a
LP
391 const struct fb_videomode *mode,
392 const struct fb_monspecs *monspec)
ecd29947
LP
393{
394 struct fb_info *info = ch->info;
e0c8601a 395 struct fb_var_screeninfo var;
ecd29947
LP
396 int ret = 0;
397
398 switch (event) {
399 case SH_MOBILE_LCDC_EVENT_DISPLAY_CONNECT:
400 /* HDMI plug in */
401 if (lock_fb_info(info)) {
402 console_lock();
403
2d04559d
LP
404 ch->display.width = monspec->max_x * 10;
405 ch->display.height = monspec->max_y * 10;
e0c8601a
LP
406
407 if (!sh_mobile_lcdc_must_reconfigure(ch, mode) &&
ecd29947
LP
408 info->state == FBINFO_STATE_RUNNING) {
409 /* First activation with the default monitor.
410 * Just turn on, if we run a resume here, the
411 * logo disappears.
412 */
e0c8601a
LP
413 info->var.width = monspec->max_x * 10;
414 info->var.height = monspec->max_y * 10;
ecd29947
LP
415 sh_mobile_lcdc_display_on(ch);
416 } else {
417 /* New monitor or have to wake up */
418 fb_set_suspend(info, 0);
419 }
420
421 console_unlock();
422 unlock_fb_info(info);
423 }
424 break;
425
426 case SH_MOBILE_LCDC_EVENT_DISPLAY_DISCONNECT:
427 /* HDMI disconnect */
428 if (lock_fb_info(info)) {
429 console_lock();
430 fb_set_suspend(info, 1);
431 console_unlock();
432 unlock_fb_info(info);
433 }
434 break;
435
436 case SH_MOBILE_LCDC_EVENT_DISPLAY_MODE:
437 /* Validate a proposed new mode */
e0c8601a
LP
438 fb_videomode_to_var(&var, mode);
439 var.bits_per_pixel = info->var.bits_per_pixel;
440 var.grayscale = info->var.grayscale;
441 ret = sh_mobile_check_var(&var, info);
ecd29947
LP
442 break;
443 }
444
445 return ret;
446}
447
f1f60b5f
LP
448/* -----------------------------------------------------------------------------
449 * Format helpers
450 */
451
105784bb
LP
452struct sh_mobile_lcdc_format_info {
453 u32 fourcc;
454 unsigned int bpp;
455 bool yuv;
456 u32 lddfr;
457};
458
459static const struct sh_mobile_lcdc_format_info sh_mobile_format_infos[] = {
460 {
461 .fourcc = V4L2_PIX_FMT_RGB565,
462 .bpp = 16,
463 .yuv = false,
464 .lddfr = LDDFR_PKF_RGB16,
465 }, {
466 .fourcc = V4L2_PIX_FMT_BGR24,
467 .bpp = 24,
468 .yuv = false,
469 .lddfr = LDDFR_PKF_RGB24,
470 }, {
471 .fourcc = V4L2_PIX_FMT_BGR32,
472 .bpp = 32,
473 .yuv = false,
474 .lddfr = LDDFR_PKF_ARGB32,
475 }, {
476 .fourcc = V4L2_PIX_FMT_NV12,
477 .bpp = 12,
478 .yuv = true,
479 .lddfr = LDDFR_CC | LDDFR_YF_420,
480 }, {
481 .fourcc = V4L2_PIX_FMT_NV21,
482 .bpp = 12,
483 .yuv = true,
484 .lddfr = LDDFR_CC | LDDFR_YF_420,
485 }, {
486 .fourcc = V4L2_PIX_FMT_NV16,
487 .bpp = 16,
488 .yuv = true,
489 .lddfr = LDDFR_CC | LDDFR_YF_422,
490 }, {
491 .fourcc = V4L2_PIX_FMT_NV61,
492 .bpp = 16,
493 .yuv = true,
494 .lddfr = LDDFR_CC | LDDFR_YF_422,
495 }, {
496 .fourcc = V4L2_PIX_FMT_NV24,
497 .bpp = 24,
498 .yuv = true,
499 .lddfr = LDDFR_CC | LDDFR_YF_444,
500 }, {
501 .fourcc = V4L2_PIX_FMT_NV42,
502 .bpp = 24,
503 .yuv = true,
504 .lddfr = LDDFR_CC | LDDFR_YF_444,
505 },
506};
507
508static const struct sh_mobile_lcdc_format_info *
509sh_mobile_format_info(u32 fourcc)
510{
511 unsigned int i;
512
513 for (i = 0; i < ARRAY_SIZE(sh_mobile_format_infos); ++i) {
514 if (sh_mobile_format_infos[i].fourcc == fourcc)
515 return &sh_mobile_format_infos[i];
516 }
517
518 return NULL;
519}
520
f1f60b5f
LP
521static int sh_mobile_format_fourcc(const struct fb_var_screeninfo *var)
522{
523 if (var->grayscale > 1)
524 return var->grayscale;
525
526 switch (var->bits_per_pixel) {
527 case 16:
528 return V4L2_PIX_FMT_RGB565;
529 case 24:
530 return V4L2_PIX_FMT_BGR24;
531 case 32:
532 return V4L2_PIX_FMT_BGR32;
533 default:
534 return 0;
535 }
536}
537
538static int sh_mobile_format_is_fourcc(const struct fb_var_screeninfo *var)
539{
540 return var->grayscale > 1;
541}
542
543static bool sh_mobile_format_is_yuv(const struct fb_var_screeninfo *var)
544{
105784bb
LP
545 const struct sh_mobile_lcdc_format_info *format;
546
f1f60b5f
LP
547 if (var->grayscale <= 1)
548 return false;
549
105784bb
LP
550 format = sh_mobile_format_info(var->grayscale);
551 return format ? format->yuv : false;
f1f60b5f
LP
552}
553
554/* -----------------------------------------------------------------------------
555 * Start, stop and IRQ
556 */
557
8564557a
MD
558static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
559{
560 struct sh_mobile_lcdc_priv *priv = data;
2feb075a 561 struct sh_mobile_lcdc_chan *ch;
9dd38819 562 unsigned long ldintr;
2feb075a
MD
563 int is_sub;
564 int k;
8564557a 565
dc48665f
LP
566 /* Acknowledge interrupts and disable further VSYNC End IRQs. */
567 ldintr = lcdc_read(priv, _LDINTR);
568 lcdc_write(priv, _LDINTR, (ldintr ^ LDINTR_STATUS_MASK) & ~LDINTR_VEE);
8564557a 569
2feb075a 570 /* figure out if this interrupt is for main or sub lcd */
ce1c0b08 571 is_sub = (lcdc_read(priv, _LDSR) & LDSR_MSS) ? 1 : 0;
2feb075a 572
9dd38819 573 /* wake up channel and disable clocks */
2feb075a
MD
574 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
575 ch = &priv->ch[k];
576
577 if (!ch->enabled)
578 continue;
579
dc48665f 580 /* Frame End */
9dd38819
PE
581 if (ldintr & LDINTR_FS) {
582 if (is_sub == lcdc_chan_is_sublcd(ch)) {
583 ch->frame_end = 1;
584 wake_up(&ch->frame_end_wait);
2feb075a 585
9dd38819
PE
586 sh_mobile_lcdc_clk_off(priv);
587 }
588 }
589
590 /* VSYNC End */
40331b21
PE
591 if (ldintr & LDINTR_VES)
592 complete(&ch->vsync_completion);
2feb075a
MD
593 }
594
8564557a
MD
595 return IRQ_HANDLED;
596}
597
cfb4f5d1
MD
598static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
599 int start)
600{
601 unsigned long tmp = lcdc_read(priv, _LDCNT2R);
602 int k;
603
604 /* start or stop the lcdc */
605 if (start)
ce1c0b08 606 lcdc_write(priv, _LDCNT2R, tmp | LDCNT2R_DO);
cfb4f5d1 607 else
ce1c0b08 608 lcdc_write(priv, _LDCNT2R, tmp & ~LDCNT2R_DO);
cfb4f5d1
MD
609
610 /* wait until power is applied/stopped on all channels */
611 for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
612 if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled)
613 while (1) {
ce1c0b08
LP
614 tmp = lcdc_read_chan(&priv->ch[k], LDPMR)
615 & LDPMR_LPS;
616 if (start && tmp == LDPMR_LPS)
cfb4f5d1
MD
617 break;
618 if (!start && tmp == 0)
619 break;
620 cpu_relax();
621 }
622
623 if (!start)
624 lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */
625}
626
6011bdea
GL
627static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch)
628{
2d04559d
LP
629 const struct fb_var_screeninfo *var = &ch->info->var;
630 const struct fb_videomode *mode = &ch->display.mode;
1c120deb 631 unsigned long h_total, hsync_pos, display_h_total;
6011bdea
GL
632 u32 tmp;
633
634 tmp = ch->ldmt1r_value;
ce1c0b08
LP
635 tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : LDMT1R_VPOL;
636 tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : LDMT1R_HPOL;
637 tmp |= (ch->cfg.flags & LCDC_FLAGS_DWPOL) ? LDMT1R_DWPOL : 0;
638 tmp |= (ch->cfg.flags & LCDC_FLAGS_DIPOL) ? LDMT1R_DIPOL : 0;
639 tmp |= (ch->cfg.flags & LCDC_FLAGS_DAPOL) ? LDMT1R_DAPOL : 0;
640 tmp |= (ch->cfg.flags & LCDC_FLAGS_HSCNT) ? LDMT1R_HSCNT : 0;
641 tmp |= (ch->cfg.flags & LCDC_FLAGS_DWCNT) ? LDMT1R_DWCNT : 0;
6011bdea
GL
642 lcdc_write_chan(ch, LDMT1R, tmp);
643
644 /* setup SYS bus */
645 lcdc_write_chan(ch, LDMT2R, ch->cfg.sys_bus_cfg.ldmt2r);
646 lcdc_write_chan(ch, LDMT3R, ch->cfg.sys_bus_cfg.ldmt3r);
647
648 /* horizontal configuration */
2d04559d
LP
649 h_total = mode->xres + mode->hsync_len + mode->left_margin
650 + mode->right_margin;
6011bdea 651 tmp = h_total / 8; /* HTCN */
2d04559d 652 tmp |= (min(mode->xres, var->xres) / 8) << 16; /* HDCN */
6011bdea
GL
653 lcdc_write_chan(ch, LDHCNR, tmp);
654
2d04559d 655 hsync_pos = mode->xres + mode->right_margin;
6011bdea 656 tmp = hsync_pos / 8; /* HSYNP */
2d04559d 657 tmp |= (mode->hsync_len / 8) << 16; /* HSYNW */
6011bdea
GL
658 lcdc_write_chan(ch, LDHSYNR, tmp);
659
660 /* vertical configuration */
2d04559d
LP
661 tmp = mode->yres + mode->vsync_len + mode->upper_margin
662 + mode->lower_margin; /* VTLN */
663 tmp |= min(mode->yres, var->yres) << 16; /* VDLN */
6011bdea
GL
664 lcdc_write_chan(ch, LDVLNR, tmp);
665
2d04559d
LP
666 tmp = mode->yres + mode->lower_margin; /* VSYNP */
667 tmp |= mode->vsync_len << 16; /* VSYNW */
6011bdea
GL
668 lcdc_write_chan(ch, LDVSYNR, tmp);
669
670 /* Adjust horizontal synchronisation for HDMI */
2d04559d
LP
671 display_h_total = mode->xres + mode->hsync_len + mode->left_margin
672 + mode->right_margin;
673 tmp = ((mode->xres & 7) << 24) | ((display_h_total & 7) << 16)
674 | ((mode->hsync_len & 7) << 8) | (hsync_pos & 7);
6011bdea
GL
675 lcdc_write_chan(ch, LDHAJR, tmp);
676}
677
9a217e34
LP
678/*
679 * __sh_mobile_lcdc_start - Configure and tart the LCDC
680 * @priv: LCDC device
681 *
682 * Configure all enabled channels and start the LCDC device. All external
683 * devices (clocks, MERAM, panels, ...) are not touched by this function.
684 */
685static void __sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
cfb4f5d1
MD
686{
687 struct sh_mobile_lcdc_chan *ch;
cfb4f5d1 688 unsigned long tmp;
9a217e34 689 int k, m;
8564557a 690
9a217e34
LP
691 /* Enable LCDC channels. Read data from external memory, avoid using the
692 * BEU for now.
693 */
694 lcdc_write(priv, _LDCNT2R, priv->ch[0].enabled | priv->ch[1].enabled);
cfb4f5d1 695
9a217e34 696 /* Stop the LCDC first and disable all interrupts. */
cfb4f5d1 697 sh_mobile_lcdc_start_stop(priv, 0);
9a217e34 698 lcdc_write(priv, _LDINTR, 0);
cfb4f5d1 699
9a217e34 700 /* Configure power supply, dot clocks and start them. */
cfb4f5d1
MD
701 tmp = priv->lddckr;
702 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
703 ch = &priv->ch[k];
9a217e34 704 if (!ch->enabled)
cfb4f5d1
MD
705 continue;
706
9a217e34
LP
707 /* Power supply */
708 lcdc_write_chan(ch, LDPMR, 0);
709
cfb4f5d1
MD
710 m = ch->cfg.clock_divider;
711 if (!m)
712 continue;
713
505c7de5
LP
714 /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider
715 * denominator.
716 */
717 lcdc_write_chan(ch, LDDCKPAT1R, 0);
718 lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);
719
cfb4f5d1 720 if (m == 1)
ce1c0b08 721 m = LDDCKR_MOSEL;
cfb4f5d1 722 tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0);
cfb4f5d1
MD
723 }
724
725 lcdc_write(priv, _LDDCKR, tmp);
cfb4f5d1
MD
726 lcdc_write(priv, _LDDCKSTPR, 0);
727 lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0);
728
9a217e34 729 /* Setup geometry, format, frame buffer memory and operation mode. */
cfb4f5d1 730 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
105784bb
LP
731 const struct sh_mobile_lcdc_format_info *format;
732 u32 fourcc;
733
cfb4f5d1 734 ch = &priv->ch[k];
cfb4f5d1
MD
735 if (!ch->enabled)
736 continue;
737
6011bdea 738 sh_mobile_lcdc_geometry(ch);
cfb4f5d1 739
105784bb
LP
740 fourcc = sh_mobile_format_fourcc(&ch->info->var);
741 format = sh_mobile_format_info(fourcc);
742 tmp = format->lddfr;
edd153a3 743
105784bb 744 if (format->yuv) {
edd153a3
LP
745 switch (ch->info->var.colorspace) {
746 case V4L2_COLORSPACE_REC709:
747 tmp |= LDDFR_CF1;
53b50314 748 break;
edd153a3
LP
749 case V4L2_COLORSPACE_JPEG:
750 tmp |= LDDFR_CF0;
53b50314
DHG
751 break;
752 }
417d4827 753 }
7caa4342 754
9a217e34
LP
755 lcdc_write_chan(ch, LDDFR, tmp);
756 lcdc_write_chan(ch, LDMLSR, ch->pitch);
757 lcdc_write_chan(ch, LDSA1R, ch->base_addr_y);
105784bb 758 if (format->yuv)
9a217e34 759 lcdc_write_chan(ch, LDSA2R, ch->base_addr_c);
7caa4342 760
9a217e34
LP
761 /* When using deferred I/O mode, configure the LCDC for one-shot
762 * operation and enable the frame end interrupt. Otherwise use
763 * continuous read mode.
764 */
765 if (ch->ldmt1r_value & LDMT1R_IFM &&
766 ch->cfg.sys_bus_cfg.deferred_io_msec) {
767 lcdc_write_chan(ch, LDSM1R, LDSM1R_OS);
768 lcdc_write(priv, _LDINTR, LDINTR_FE);
769 } else {
770 lcdc_write_chan(ch, LDSM1R, 0);
771 }
772 }
7caa4342 773
9a217e34 774 /* Word and long word swap. */
edd153a3
LP
775 switch (sh_mobile_format_fourcc(&priv->ch[0].info->var)) {
776 case V4L2_PIX_FMT_RGB565:
777 case V4L2_PIX_FMT_NV21:
778 case V4L2_PIX_FMT_NV61:
779 case V4L2_PIX_FMT_NV42:
780 tmp = LDDDSR_LS | LDDDSR_WS;
781 break;
782 case V4L2_PIX_FMT_BGR24:
783 case V4L2_PIX_FMT_NV12:
784 case V4L2_PIX_FMT_NV16:
785 case V4L2_PIX_FMT_NV24:
9a217e34 786 tmp = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS;
edd153a3
LP
787 break;
788 case V4L2_PIX_FMT_BGR32:
789 default:
790 tmp = LDDDSR_LS;
791 break;
9a217e34
LP
792 }
793 lcdc_write(priv, _LDDDSR, tmp);
7caa4342 794
9a217e34
LP
795 /* Enable the display output. */
796 lcdc_write(priv, _LDCNT1R, LDCNT1R_DE);
797 sh_mobile_lcdc_start_stop(priv, 1);
798 priv->started = 1;
799}
cfb4f5d1 800
9a217e34
LP
801static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
802{
803 struct sh_mobile_meram_info *mdev = priv->meram_dev;
9a217e34
LP
804 struct sh_mobile_lcdc_chan *ch;
805 unsigned long tmp;
806 int ret;
807 int k;
cfb4f5d1 808
9a217e34
LP
809 /* enable clocks before accessing the hardware */
810 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
811 if (priv->ch[k].enabled)
812 sh_mobile_lcdc_clk_on(priv);
813 }
8564557a 814
9a217e34
LP
815 /* reset */
816 lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LDCNT2R_BR);
817 lcdc_wait_bit(priv, _LDCNT2R, LDCNT2R_BR, 0);
8564557a 818
9a217e34 819 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
afaad83b 820 struct sh_mobile_lcdc_panel_cfg *panel;
8564557a 821
37c5dcc2 822 ch = &priv->ch[k];
9a217e34
LP
823 if (!ch->enabled)
824 continue;
825
afaad83b
LP
826 panel = &ch->cfg.panel_cfg;
827 if (panel->setup_sys) {
828 ret = panel->setup_sys(ch, &sh_mobile_lcdc_sys_bus_ops);
9a217e34
LP
829 if (ret)
830 return ret;
8564557a 831 }
cfb4f5d1
MD
832 }
833
9a217e34
LP
834 /* Compute frame buffer base address and pitch for each channel. */
835 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
836 struct sh_mobile_meram_cfg *cfg;
837 int pixelformat;
cfb4f5d1 838
9a217e34
LP
839 ch = &priv->ch[k];
840 if (!ch->enabled)
841 continue;
cfb4f5d1 842
9a217e34
LP
843 ch->base_addr_y = ch->info->fix.smem_start;
844 ch->base_addr_c = ch->base_addr_y
845 + ch->info->var.xres
846 * ch->info->var.yres_virtual;
847 ch->pitch = ch->info->fix.line_length;
848
849 /* Enable MERAM if possible. */
850 cfg = ch->cfg.meram_cfg;
851 if (mdev == NULL || mdev->ops == NULL || cfg == NULL)
852 continue;
853
854 /* we need to de-init configured ICBs before we can
855 * re-initialize them.
856 */
857 if (ch->meram_enabled) {
858 mdev->ops->meram_unregister(mdev, cfg);
859 ch->meram_enabled = 0;
860 }
861
edd153a3
LP
862 switch (sh_mobile_format_fourcc(&ch->info->var)) {
863 case V4L2_PIX_FMT_NV12:
864 case V4L2_PIX_FMT_NV21:
865 case V4L2_PIX_FMT_NV16:
866 case V4L2_PIX_FMT_NV61:
9a217e34 867 pixelformat = SH_MOBILE_MERAM_PF_NV;
edd153a3
LP
868 break;
869 case V4L2_PIX_FMT_NV24:
870 case V4L2_PIX_FMT_NV42:
871 pixelformat = SH_MOBILE_MERAM_PF_NV24;
872 break;
873 case V4L2_PIX_FMT_RGB565:
874 case V4L2_PIX_FMT_BGR24:
875 case V4L2_PIX_FMT_BGR32:
876 default:
877 pixelformat = SH_MOBILE_MERAM_PF_RGB;
878 break;
879 }
9a217e34
LP
880
881 ret = mdev->ops->meram_register(mdev, cfg, ch->pitch,
882 ch->info->var.yres, pixelformat,
883 ch->base_addr_y, ch->base_addr_c,
884 &ch->base_addr_y, &ch->base_addr_c,
885 &ch->pitch);
886 if (!ret)
887 ch->meram_enabled = 1;
888 }
889
890 /* Start the LCDC. */
891 __sh_mobile_lcdc_start(priv);
892
893 /* Setup deferred I/O, tell the board code to enable the panels, and
894 * turn backlight on.
895 */
cfb4f5d1
MD
896 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
897 ch = &priv->ch[k];
21bc1f02
MD
898 if (!ch->enabled)
899 continue;
900
9a217e34
LP
901 tmp = ch->cfg.sys_bus_cfg.deferred_io_msec;
902 if (ch->ldmt1r_value & LDMT1R_IFM && tmp) {
903 ch->defio.deferred_io = sh_mobile_lcdc_deferred_io;
904 ch->defio.delay = msecs_to_jiffies(tmp);
905 ch->info->fbdefio = &ch->defio;
906 fb_deferred_io_init(ch->info);
907 }
908
37c5dcc2 909 sh_mobile_lcdc_display_on(ch);
3b0fd9d7
AC
910
911 if (ch->bl) {
912 ch->bl->props.power = FB_BLANK_UNBLANK;
913 backlight_update_status(ch->bl);
914 }
cfb4f5d1
MD
915 }
916
917 return 0;
918}
919
920static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
921{
922 struct sh_mobile_lcdc_chan *ch;
cfb4f5d1
MD
923 int k;
924
2feb075a 925 /* clean up deferred io and ask board code to disable panel */
cfb4f5d1
MD
926 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
927 ch = &priv->ch[k];
21bc1f02
MD
928 if (!ch->enabled)
929 continue;
8564557a 930
2feb075a
MD
931 /* deferred io mode:
932 * flush frame, and wait for frame end interrupt
933 * clean up deferred io and enable clock
934 */
5ef6b505 935 if (ch->info && ch->info->fbdefio) {
2feb075a 936 ch->frame_end = 0;
e33afddc 937 schedule_delayed_work(&ch->info->deferred_work, 0);
2feb075a 938 wait_event(ch->frame_end_wait, ch->frame_end);
e33afddc
PM
939 fb_deferred_io_cleanup(ch->info);
940 ch->info->fbdefio = NULL;
2feb075a 941 sh_mobile_lcdc_clk_on(priv);
8564557a 942 }
2feb075a 943
3b0fd9d7
AC
944 if (ch->bl) {
945 ch->bl->props.power = FB_BLANK_POWERDOWN;
946 backlight_update_status(ch->bl);
947 }
948
37c5dcc2 949 sh_mobile_lcdc_display_off(ch);
7caa4342
DHG
950
951 /* disable the meram */
952 if (ch->meram_enabled) {
953 struct sh_mobile_meram_cfg *cfg;
954 struct sh_mobile_meram_info *mdev;
955 cfg = ch->cfg.meram_cfg;
956 mdev = priv->meram_dev;
957 mdev->ops->meram_unregister(mdev, cfg);
958 ch->meram_enabled = 0;
959 }
960
cfb4f5d1
MD
961 }
962
963 /* stop the lcdc */
8e9bb19e
MD
964 if (priv->started) {
965 sh_mobile_lcdc_start_stop(priv, 0);
966 priv->started = 0;
967 }
b51339ff 968
8564557a
MD
969 /* stop clocks */
970 for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
971 if (priv->ch[k].enabled)
972 sh_mobile_lcdc_clk_off(priv);
cfb4f5d1
MD
973}
974
f1f60b5f
LP
975/* -----------------------------------------------------------------------------
976 * Frame buffer operations
977 */
cfb4f5d1
MD
978
979static int sh_mobile_lcdc_setcolreg(u_int regno,
980 u_int red, u_int green, u_int blue,
981 u_int transp, struct fb_info *info)
982{
983 u32 *palette = info->pseudo_palette;
984
985 if (regno >= PALETTE_NR)
986 return -EINVAL;
987
988 /* only FB_VISUAL_TRUECOLOR supported */
989
990 red >>= 16 - info->var.red.length;
991 green >>= 16 - info->var.green.length;
992 blue >>= 16 - info->var.blue.length;
993 transp >>= 16 - info->var.transp.length;
994
995 palette[regno] = (red << info->var.red.offset) |
996 (green << info->var.green.offset) |
997 (blue << info->var.blue.offset) |
998 (transp << info->var.transp.offset);
999
1000 return 0;
1001}
1002
1003static struct fb_fix_screeninfo sh_mobile_lcdc_fix = {
1004 .id = "SH Mobile LCDC",
1005 .type = FB_TYPE_PACKED_PIXELS,
1006 .visual = FB_VISUAL_TRUECOLOR,
1007 .accel = FB_ACCEL_NONE,
9dd38819
PE
1008 .xpanstep = 0,
1009 .ypanstep = 1,
1010 .ywrapstep = 0,
edd153a3 1011 .capabilities = FB_CAP_FOURCC,
cfb4f5d1
MD
1012};
1013
8564557a
MD
1014static void sh_mobile_lcdc_fillrect(struct fb_info *info,
1015 const struct fb_fillrect *rect)
1016{
1017 sys_fillrect(info, rect);
1018 sh_mobile_lcdc_deferred_io_touch(info);
1019}
1020
1021static void sh_mobile_lcdc_copyarea(struct fb_info *info,
1022 const struct fb_copyarea *area)
1023{
1024 sys_copyarea(info, area);
1025 sh_mobile_lcdc_deferred_io_touch(info);
1026}
1027
1028static void sh_mobile_lcdc_imageblit(struct fb_info *info,
1029 const struct fb_image *image)
1030{
1031 sys_imageblit(info, image);
1032 sh_mobile_lcdc_deferred_io_touch(info);
1033}
1034
9dd38819
PE
1035static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var,
1036 struct fb_info *info)
1037{
1038 struct sh_mobile_lcdc_chan *ch = info->par;
92e1f9a7
PE
1039 struct sh_mobile_lcdc_priv *priv = ch->lcdc;
1040 unsigned long ldrcntr;
1041 unsigned long new_pan_offset;
53b50314
DHG
1042 unsigned long base_addr_y, base_addr_c;
1043 unsigned long c_offset;
edd153a3 1044 bool yuv = sh_mobile_format_is_yuv(&info->var);
92e1f9a7 1045
edd153a3 1046 if (!yuv)
dc1d5ada
LP
1047 new_pan_offset = var->yoffset * info->fix.line_length
1048 + var->xoffset * (info->var.bits_per_pixel / 8);
53b50314 1049 else
dc1d5ada
LP
1050 new_pan_offset = var->yoffset * info->fix.line_length
1051 + var->xoffset;
9dd38819 1052
92e1f9a7 1053 if (new_pan_offset == ch->pan_offset)
9dd38819
PE
1054 return 0; /* No change, do nothing */
1055
92e1f9a7 1056 ldrcntr = lcdc_read(priv, _LDRCNTR);
9dd38819 1057
92e1f9a7 1058 /* Set the source address for the next refresh */
53b50314 1059 base_addr_y = ch->dma_handle + new_pan_offset;
edd153a3 1060 if (yuv) {
53b50314 1061 /* Set y offset */
dc1d5ada
LP
1062 c_offset = var->yoffset * info->fix.line_length
1063 * (info->var.bits_per_pixel - 8) / 8;
1064 base_addr_c = ch->dma_handle
1065 + info->var.xres * info->var.yres_virtual
1066 + c_offset;
53b50314 1067 /* Set x offset */
edd153a3 1068 if (sh_mobile_format_fourcc(&info->var) == V4L2_PIX_FMT_NV24)
53b50314
DHG
1069 base_addr_c += 2 * var->xoffset;
1070 else
1071 base_addr_c += var->xoffset;
49d79ba2 1072 }
53b50314 1073
49d79ba2 1074 if (ch->meram_enabled) {
7caa4342
DHG
1075 struct sh_mobile_meram_cfg *cfg;
1076 struct sh_mobile_meram_info *mdev;
7caa4342
DHG
1077 int ret;
1078
1079 cfg = ch->cfg.meram_cfg;
1080 mdev = priv->meram_dev;
1081 ret = mdev->ops->meram_update(mdev, cfg,
1082 base_addr_y, base_addr_c,
49d79ba2 1083 &base_addr_y, &base_addr_c);
7caa4342
DHG
1084 if (ret)
1085 return ret;
49d79ba2 1086 }
7caa4342 1087
49d79ba2
LP
1088 ch->base_addr_y = base_addr_y;
1089 ch->base_addr_c = base_addr_c;
7caa4342 1090
49d79ba2 1091 lcdc_write_chan_mirror(ch, LDSA1R, base_addr_y);
edd153a3 1092 if (yuv)
49d79ba2 1093 lcdc_write_chan_mirror(ch, LDSA2R, base_addr_c);
53b50314 1094
92e1f9a7
PE
1095 if (lcdc_chan_is_sublcd(ch))
1096 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS);
1097 else
1098 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS);
1099
1100 ch->pan_offset = new_pan_offset;
1101
1102 sh_mobile_lcdc_deferred_io_touch(info);
9dd38819
PE
1103
1104 return 0;
1105}
1106
40331b21
PE
1107static int sh_mobile_wait_for_vsync(struct fb_info *info)
1108{
1109 struct sh_mobile_lcdc_chan *ch = info->par;
1110 unsigned long ldintr;
1111 int ret;
1112
dc48665f
LP
1113 /* Enable VSync End interrupt and be careful not to acknowledge any
1114 * pending interrupt.
1115 */
40331b21 1116 ldintr = lcdc_read(ch->lcdc, _LDINTR);
dc48665f 1117 ldintr |= LDINTR_VEE | LDINTR_STATUS_MASK;
40331b21
PE
1118 lcdc_write(ch->lcdc, _LDINTR, ldintr);
1119
1120 ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion,
1121 msecs_to_jiffies(100));
1122 if (!ret)
1123 return -ETIMEDOUT;
1124
1125 return 0;
1126}
1127
1128static int sh_mobile_ioctl(struct fb_info *info, unsigned int cmd,
1129 unsigned long arg)
1130{
1131 int retval;
1132
1133 switch (cmd) {
1134 case FBIO_WAITFORVSYNC:
1135 retval = sh_mobile_wait_for_vsync(info);
1136 break;
1137
1138 default:
1139 retval = -ENOIOCTLCMD;
1140 break;
1141 }
1142 return retval;
1143}
1144
dd210503
GL
1145static void sh_mobile_fb_reconfig(struct fb_info *info)
1146{
1147 struct sh_mobile_lcdc_chan *ch = info->par;
2d04559d
LP
1148 struct fb_var_screeninfo var;
1149 struct fb_videomode mode;
dd210503
GL
1150 struct fb_event event;
1151 int evnt = FB_EVENT_MODE_CHANGE_ALL;
1152
1153 if (ch->use_count > 1 || (ch->use_count == 1 && !info->fbcon_par))
1154 /* More framebuffer users are active */
1155 return;
1156
2d04559d 1157 fb_var_to_videomode(&mode, &info->var);
dd210503 1158
2d04559d 1159 if (fb_mode_is_equal(&ch->display.mode, &mode))
dd210503
GL
1160 return;
1161
1162 /* Display has been re-plugged, framebuffer is free now, reconfigure */
2d04559d
LP
1163 var = info->var;
1164 fb_videomode_to_var(&var, &ch->display.mode);
1165 var.width = ch->display.width;
1166 var.height = ch->display.height;
1167 var.activate = FB_ACTIVATE_NOW;
1168
1169 if (fb_set_var(info, &var) < 0)
dd210503
GL
1170 /* Couldn't reconfigure, hopefully, can continue as before */
1171 return;
1172
dd210503
GL
1173 /*
1174 * fb_set_var() calls the notifier change internally, only if
1175 * FBINFO_MISC_USEREVENT flag is set. Since we do not want to fake a
1176 * user event, we have to call the chain ourselves.
1177 */
1178 event.info = info;
2d04559d 1179 event.data = &ch->display.mode;
dd210503
GL
1180 fb_notifier_call_chain(evnt, &event);
1181}
1182
1183/*
1184 * Locking: both .fb_release() and .fb_open() are called with info->lock held if
1185 * user == 1, or with console sem held, if user == 0.
1186 */
1187static int sh_mobile_release(struct fb_info *info, int user)
1188{
1189 struct sh_mobile_lcdc_chan *ch = info->par;
1190
1191 mutex_lock(&ch->open_lock);
1192 dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
1193
1194 ch->use_count--;
1195
1196 /* Nothing to reconfigure, when called from fbcon */
1197 if (user) {
ac751efa 1198 console_lock();
dd210503 1199 sh_mobile_fb_reconfig(info);
ac751efa 1200 console_unlock();
dd210503
GL
1201 }
1202
1203 mutex_unlock(&ch->open_lock);
1204
1205 return 0;
1206}
1207
1208static int sh_mobile_open(struct fb_info *info, int user)
1209{
1210 struct sh_mobile_lcdc_chan *ch = info->par;
1211
1212 mutex_lock(&ch->open_lock);
1213 ch->use_count++;
1214
1215 dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
1216 mutex_unlock(&ch->open_lock);
1217
1218 return 0;
1219}
1220
1221static int sh_mobile_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
1222{
1223 struct sh_mobile_lcdc_chan *ch = info->par;
417d4827 1224 struct sh_mobile_lcdc_priv *p = ch->lcdc;
03862194
LP
1225 unsigned int best_dist = (unsigned int)-1;
1226 unsigned int best_xres = 0;
1227 unsigned int best_yres = 0;
1228 unsigned int i;
dd210503 1229
03862194 1230 if (var->xres > MAX_XRES || var->yres > MAX_YRES)
dd210503 1231 return -EINVAL;
03862194
LP
1232
1233 /* If board code provides us with a list of available modes, make sure
1234 * we use one of them. Find the mode closest to the requested one. The
1235 * distance between two modes is defined as the size of the
1236 * non-overlapping parts of the two rectangles.
1237 */
93ff2598
LP
1238 for (i = 0; i < ch->cfg.num_modes; ++i) {
1239 const struct fb_videomode *mode = &ch->cfg.lcd_modes[i];
03862194
LP
1240 unsigned int dist;
1241
1242 /* We can only round up. */
1243 if (var->xres > mode->xres || var->yres > mode->yres)
1244 continue;
1245
1246 dist = var->xres * var->yres + mode->xres * mode->yres
1247 - 2 * min(var->xres, mode->xres)
1248 * min(var->yres, mode->yres);
1249
1250 if (dist < best_dist) {
1251 best_xres = mode->xres;
1252 best_yres = mode->yres;
1253 best_dist = dist;
1254 }
dd210503 1255 }
417d4827 1256
03862194 1257 /* If no available mode can be used, return an error. */
93ff2598 1258 if (ch->cfg.num_modes != 0) {
03862194
LP
1259 if (best_dist == (unsigned int)-1)
1260 return -EINVAL;
1261
1262 var->xres = best_xres;
1263 var->yres = best_yres;
1264 }
1265
1266 /* Make sure the virtual resolution is at least as big as the visible
1267 * resolution.
1268 */
1269 if (var->xres_virtual < var->xres)
1270 var->xres_virtual = var->xres;
1271 if (var->yres_virtual < var->yres)
1272 var->yres_virtual = var->yres;
1273
edd153a3 1274 if (sh_mobile_format_is_fourcc(var)) {
105784bb
LP
1275 const struct sh_mobile_lcdc_format_info *format;
1276
1277 format = sh_mobile_format_info(var->grayscale);
1278 if (format == NULL)
edd153a3 1279 return -EINVAL;
105784bb 1280 var->bits_per_pixel = format->bpp;
edd153a3
LP
1281
1282 /* Default to RGB and JPEG color-spaces for RGB and YUV formats
1283 * respectively.
1284 */
105784bb 1285 if (!format->yuv)
edd153a3
LP
1286 var->colorspace = V4L2_COLORSPACE_SRGB;
1287 else if (var->colorspace != V4L2_COLORSPACE_REC709)
1288 var->colorspace = V4L2_COLORSPACE_JPEG;
1289 } else {
1290 if (var->bits_per_pixel <= 16) { /* RGB 565 */
1291 var->bits_per_pixel = 16;
1292 var->red.offset = 11;
1293 var->red.length = 5;
1294 var->green.offset = 5;
1295 var->green.length = 6;
1296 var->blue.offset = 0;
1297 var->blue.length = 5;
1298 var->transp.offset = 0;
1299 var->transp.length = 0;
1300 } else if (var->bits_per_pixel <= 24) { /* RGB 888 */
1301 var->bits_per_pixel = 24;
1302 var->red.offset = 16;
1303 var->red.length = 8;
1304 var->green.offset = 8;
1305 var->green.length = 8;
1306 var->blue.offset = 0;
1307 var->blue.length = 8;
1308 var->transp.offset = 0;
1309 var->transp.length = 0;
1310 } else if (var->bits_per_pixel <= 32) { /* RGBA 888 */
1311 var->bits_per_pixel = 32;
1312 var->red.offset = 16;
1313 var->red.length = 8;
1314 var->green.offset = 8;
1315 var->green.length = 8;
1316 var->blue.offset = 0;
1317 var->blue.length = 8;
1318 var->transp.offset = 24;
1319 var->transp.length = 8;
1320 } else
1321 return -EINVAL;
417d4827 1322
edd153a3
LP
1323 var->red.msb_right = 0;
1324 var->green.msb_right = 0;
1325 var->blue.msb_right = 0;
1326 var->transp.msb_right = 0;
1327 }
03862194
LP
1328
1329 /* Make sure we don't exceed our allocated memory. */
1330 if (var->xres_virtual * var->yres_virtual * var->bits_per_pixel / 8 >
1331 info->fix.smem_len)
1332 return -EINVAL;
1333
edd153a3
LP
1334 /* only accept the forced_fourcc for dual channel configurations */
1335 if (p->forced_fourcc &&
1336 p->forced_fourcc != sh_mobile_format_fourcc(var))
417d4827 1337 return -EINVAL;
417d4827 1338
dd210503
GL
1339 return 0;
1340}
40331b21 1341
ed5bebf2
LP
1342static int sh_mobile_set_par(struct fb_info *info)
1343{
1344 struct sh_mobile_lcdc_chan *ch = info->par;
91fba48d 1345 u32 line_length = info->fix.line_length;
ed5bebf2
LP
1346 int ret;
1347
1348 sh_mobile_lcdc_stop(ch->lcdc);
91fba48d 1349
edd153a3 1350 if (sh_mobile_format_is_yuv(&info->var))
91fba48d
LP
1351 info->fix.line_length = info->var.xres;
1352 else
1353 info->fix.line_length = info->var.xres
1354 * info->var.bits_per_pixel / 8;
1355
ed5bebf2 1356 ret = sh_mobile_lcdc_start(ch->lcdc);
91fba48d 1357 if (ret < 0) {
ed5bebf2 1358 dev_err(info->dev, "%s: unable to restart LCDC\n", __func__);
91fba48d
LP
1359 info->fix.line_length = line_length;
1360 }
ed5bebf2 1361
edd153a3
LP
1362 if (sh_mobile_format_is_fourcc(&info->var)) {
1363 info->fix.type = FB_TYPE_FOURCC;
1364 info->fix.visual = FB_VISUAL_FOURCC;
1365 } else {
1366 info->fix.type = FB_TYPE_PACKED_PIXELS;
1367 info->fix.visual = FB_VISUAL_TRUECOLOR;
1368 }
1369
ed5bebf2
LP
1370 return ret;
1371}
1372
8857b9aa
AC
1373/*
1374 * Screen blanking. Behavior is as follows:
1375 * FB_BLANK_UNBLANK: screen unblanked, clocks enabled
1376 * FB_BLANK_NORMAL: screen blanked, clocks enabled
1377 * FB_BLANK_VSYNC,
1378 * FB_BLANK_HSYNC,
1379 * FB_BLANK_POWEROFF: screen blanked, clocks disabled
1380 */
1381static int sh_mobile_lcdc_blank(int blank, struct fb_info *info)
1382{
1383 struct sh_mobile_lcdc_chan *ch = info->par;
1384 struct sh_mobile_lcdc_priv *p = ch->lcdc;
1385
1386 /* blank the screen? */
1387 if (blank > FB_BLANK_UNBLANK && ch->blank_status == FB_BLANK_UNBLANK) {
1388 struct fb_fillrect rect = {
1389 .width = info->var.xres,
1390 .height = info->var.yres,
1391 };
1392 sh_mobile_lcdc_fillrect(info, &rect);
1393 }
1394 /* turn clocks on? */
1395 if (blank <= FB_BLANK_NORMAL && ch->blank_status > FB_BLANK_NORMAL) {
1396 sh_mobile_lcdc_clk_on(p);
1397 }
1398 /* turn clocks off? */
1399 if (blank > FB_BLANK_NORMAL && ch->blank_status <= FB_BLANK_NORMAL) {
1400 /* make sure the screen is updated with the black fill before
1401 * switching the clocks off. one vsync is not enough since
1402 * blanking may occur in the middle of a refresh. deferred io
1403 * mode will reenable the clocks and update the screen in time,
1404 * so it does not need this. */
1405 if (!info->fbdefio) {
1406 sh_mobile_wait_for_vsync(info);
1407 sh_mobile_wait_for_vsync(info);
1408 }
1409 sh_mobile_lcdc_clk_off(p);
1410 }
1411
1412 ch->blank_status = blank;
1413 return 0;
1414}
1415
cfb4f5d1 1416static struct fb_ops sh_mobile_lcdc_ops = {
9dd38819 1417 .owner = THIS_MODULE,
cfb4f5d1 1418 .fb_setcolreg = sh_mobile_lcdc_setcolreg,
2540c111
MD
1419 .fb_read = fb_sys_read,
1420 .fb_write = fb_sys_write,
8564557a
MD
1421 .fb_fillrect = sh_mobile_lcdc_fillrect,
1422 .fb_copyarea = sh_mobile_lcdc_copyarea,
1423 .fb_imageblit = sh_mobile_lcdc_imageblit,
8857b9aa 1424 .fb_blank = sh_mobile_lcdc_blank,
9dd38819 1425 .fb_pan_display = sh_mobile_fb_pan_display,
40331b21 1426 .fb_ioctl = sh_mobile_ioctl,
dd210503
GL
1427 .fb_open = sh_mobile_open,
1428 .fb_release = sh_mobile_release,
1429 .fb_check_var = sh_mobile_check_var,
ed5bebf2 1430 .fb_set_par = sh_mobile_set_par,
cfb4f5d1
MD
1431};
1432
f1f60b5f
LP
1433/* -----------------------------------------------------------------------------
1434 * Backlight
1435 */
1436
3b0fd9d7
AC
1437static int sh_mobile_lcdc_update_bl(struct backlight_device *bdev)
1438{
1439 struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
3b0fd9d7
AC
1440 int brightness = bdev->props.brightness;
1441
1442 if (bdev->props.power != FB_BLANK_UNBLANK ||
1443 bdev->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
1444 brightness = 0;
1445
43059b0f 1446 return ch->cfg.bl_info.set_brightness(brightness);
3b0fd9d7
AC
1447}
1448
1449static int sh_mobile_lcdc_get_brightness(struct backlight_device *bdev)
1450{
1451 struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
3b0fd9d7 1452
43059b0f 1453 return ch->cfg.bl_info.get_brightness();
3b0fd9d7
AC
1454}
1455
1456static int sh_mobile_lcdc_check_fb(struct backlight_device *bdev,
1457 struct fb_info *info)
1458{
1459 return (info->bl_dev == bdev);
1460}
1461
1462static struct backlight_ops sh_mobile_lcdc_bl_ops = {
1463 .options = BL_CORE_SUSPENDRESUME,
1464 .update_status = sh_mobile_lcdc_update_bl,
1465 .get_brightness = sh_mobile_lcdc_get_brightness,
1466 .check_fb = sh_mobile_lcdc_check_fb,
1467};
1468
1469static struct backlight_device *sh_mobile_lcdc_bl_probe(struct device *parent,
1470 struct sh_mobile_lcdc_chan *ch)
1471{
1472 struct backlight_device *bl;
1473
1474 bl = backlight_device_register(ch->cfg.bl_info.name, parent, ch,
1475 &sh_mobile_lcdc_bl_ops, NULL);
beee1f20
DC
1476 if (IS_ERR(bl)) {
1477 dev_err(parent, "unable to register backlight device: %ld\n",
1478 PTR_ERR(bl));
3b0fd9d7
AC
1479 return NULL;
1480 }
1481
1482 bl->props.max_brightness = ch->cfg.bl_info.max_brightness;
1483 bl->props.brightness = bl->props.max_brightness;
1484 backlight_update_status(bl);
1485
1486 return bl;
1487}
1488
1489static void sh_mobile_lcdc_bl_remove(struct backlight_device *bdev)
1490{
1491 backlight_device_unregister(bdev);
1492}
1493
f1f60b5f
LP
1494/* -----------------------------------------------------------------------------
1495 * Power management
1496 */
1497
2feb075a
MD
1498static int sh_mobile_lcdc_suspend(struct device *dev)
1499{
1500 struct platform_device *pdev = to_platform_device(dev);
1501
1502 sh_mobile_lcdc_stop(platform_get_drvdata(pdev));
1503 return 0;
1504}
1505
1506static int sh_mobile_lcdc_resume(struct device *dev)
1507{
1508 struct platform_device *pdev = to_platform_device(dev);
1509
1510 return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
1511}
1512
0246c471
MD
1513static int sh_mobile_lcdc_runtime_suspend(struct device *dev)
1514{
1515 struct platform_device *pdev = to_platform_device(dev);
2427bb24 1516 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
0246c471
MD
1517
1518 /* turn off LCDC hardware */
2427bb24
LP
1519 lcdc_write(priv, _LDCNT1R, 0);
1520
0246c471
MD
1521 return 0;
1522}
1523
1524static int sh_mobile_lcdc_runtime_resume(struct device *dev)
1525{
1526 struct platform_device *pdev = to_platform_device(dev);
2427bb24 1527 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
0246c471 1528
2427bb24 1529 __sh_mobile_lcdc_start(priv);
0246c471
MD
1530
1531 return 0;
1532}
1533
47145210 1534static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
2feb075a
MD
1535 .suspend = sh_mobile_lcdc_suspend,
1536 .resume = sh_mobile_lcdc_resume,
0246c471
MD
1537 .runtime_suspend = sh_mobile_lcdc_runtime_suspend,
1538 .runtime_resume = sh_mobile_lcdc_runtime_resume,
2feb075a
MD
1539};
1540
f1f60b5f
LP
1541/* -----------------------------------------------------------------------------
1542 * Framebuffer notifier
1543 */
1544
6de9edd5 1545/* locking: called with info->lock held */
6011bdea
GL
1546static int sh_mobile_lcdc_notify(struct notifier_block *nb,
1547 unsigned long action, void *data)
1548{
1549 struct fb_event *event = data;
1550 struct fb_info *info = event->info;
1551 struct sh_mobile_lcdc_chan *ch = info->par;
6011bdea
GL
1552
1553 if (&ch->lcdc->notifier != nb)
baf16374 1554 return NOTIFY_DONE;
6011bdea
GL
1555
1556 dev_dbg(info->dev, "%s(): action = %lu, data = %p\n",
1557 __func__, action, event->data);
1558
1559 switch(action) {
1560 case FB_EVENT_SUSPEND:
37c5dcc2 1561 sh_mobile_lcdc_display_off(ch);
afe417c0 1562 sh_mobile_lcdc_stop(ch->lcdc);
6011bdea
GL
1563 break;
1564 case FB_EVENT_RESUME:
dd210503
GL
1565 mutex_lock(&ch->open_lock);
1566 sh_mobile_fb_reconfig(info);
1567 mutex_unlock(&ch->open_lock);
6011bdea 1568
37c5dcc2 1569 sh_mobile_lcdc_display_on(ch);
ebe5e12d 1570 sh_mobile_lcdc_start(ch->lcdc);
6011bdea
GL
1571 }
1572
baf16374 1573 return NOTIFY_OK;
6011bdea
GL
1574}
1575
f1f60b5f
LP
1576/* -----------------------------------------------------------------------------
1577 * Probe/remove and driver init/exit
1578 */
1579
217e9c43 1580static const struct fb_videomode default_720p __devinitconst = {
f1f60b5f
LP
1581 .name = "HDMI 720p",
1582 .xres = 1280,
1583 .yres = 720,
1584
1585 .left_margin = 220,
1586 .right_margin = 110,
1587 .hsync_len = 40,
1588
1589 .upper_margin = 20,
1590 .lower_margin = 5,
1591 .vsync_len = 5,
1592
1593 .pixclock = 13468,
1594 .refresh = 60,
1595 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
1596};
1597
b4bee692
LP
1598static int sh_mobile_lcdc_remove(struct platform_device *pdev)
1599{
1600 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
1601 struct fb_info *info;
1602 int i;
1603
1604 fb_unregister_client(&priv->notifier);
1605
1606 for (i = 0; i < ARRAY_SIZE(priv->ch); i++)
1607 if (priv->ch[i].info && priv->ch[i].info->dev)
1608 unregister_framebuffer(priv->ch[i].info);
1609
1610 sh_mobile_lcdc_stop(priv);
1611
1612 for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
9a2985e7 1613 struct sh_mobile_lcdc_chan *ch = &priv->ch[i];
b4bee692 1614
9a2985e7 1615 info = ch->info;
b4bee692
LP
1616 if (!info || !info->device)
1617 continue;
1618
e34d0bbb
LP
1619 if (ch->tx_dev) {
1620 ch->tx_dev->lcdc = NULL;
9a2985e7 1621 module_put(ch->cfg.tx_dev->dev.driver->owner);
e34d0bbb 1622 }
9a2985e7
LP
1623
1624 if (ch->sglist)
1625 vfree(ch->sglist);
b4bee692
LP
1626
1627 if (info->screen_base)
1628 dma_free_coherent(&pdev->dev, info->fix.smem_len,
9a2985e7 1629 info->screen_base, ch->dma_handle);
b4bee692
LP
1630 fb_dealloc_cmap(&info->cmap);
1631 framebuffer_release(info);
1632 }
1633
1634 for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
1635 if (priv->ch[i].bl)
1636 sh_mobile_lcdc_bl_remove(priv->ch[i].bl);
1637 }
1638
4774c12a
LP
1639 if (priv->dot_clk) {
1640 pm_runtime_disable(&pdev->dev);
b4bee692 1641 clk_put(priv->dot_clk);
4774c12a 1642 }
b4bee692
LP
1643
1644 if (priv->base)
1645 iounmap(priv->base);
1646
1647 if (priv->irq)
1648 free_irq(priv->irq, priv);
1649 kfree(priv);
1650 return 0;
1651}
cfb4f5d1 1652
217e9c43 1653static int __devinit sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
f1f60b5f
LP
1654{
1655 int interface_type = ch->cfg.interface_type;
1656
1657 switch (interface_type) {
1658 case RGB8:
1659 case RGB9:
1660 case RGB12A:
1661 case RGB12B:
1662 case RGB16:
1663 case RGB18:
1664 case RGB24:
1665 case SYS8A:
1666 case SYS8B:
1667 case SYS8C:
1668 case SYS8D:
1669 case SYS9:
1670 case SYS12:
1671 case SYS16A:
1672 case SYS16B:
1673 case SYS16C:
1674 case SYS18:
1675 case SYS24:
1676 break;
1677 default:
1678 return -EINVAL;
1679 }
1680
1681 /* SUBLCD only supports SYS interface */
1682 if (lcdc_chan_is_sublcd(ch)) {
1683 if (!(interface_type & LDMT1R_IFM))
1684 return -EINVAL;
1685
1686 interface_type &= ~LDMT1R_IFM;
1687 }
1688
1689 ch->ldmt1r_value = interface_type;
1690 return 0;
1691}
1692
0a7f17aa
LP
1693static int __devinit
1694sh_mobile_lcdc_channel_init(struct sh_mobile_lcdc_priv *priv,
1695 struct sh_mobile_lcdc_chan *ch)
cfb4f5d1 1696{
105784bb 1697 const struct sh_mobile_lcdc_format_info *format;
3ce05599
LP
1698 struct sh_mobile_lcdc_chan_cfg *cfg = &ch->cfg;
1699 const struct fb_videomode *max_mode;
1700 const struct fb_videomode *mode;
1701 struct fb_var_screeninfo *var;
cfb4f5d1 1702 struct fb_info *info;
3ce05599 1703 unsigned int max_size;
93ff2598 1704 int num_modes;
3ce05599
LP
1705 void *buf;
1706 int ret;
1707 int i;
1708
a67472ad 1709 mutex_init(&ch->open_lock);
ecd29947 1710 ch->notify = sh_mobile_lcdc_display_notify;
a67472ad 1711
105784bb
LP
1712 /* Validate the format. */
1713 format = sh_mobile_format_info(cfg->fourcc);
1714 if (format == NULL) {
1715 dev_err(priv->dev, "Invalid FOURCC %08x.\n", cfg->fourcc);
1716 return -EINVAL;
1717 }
1718
a67472ad 1719 /* Allocate the frame buffer device. */
0a7f17aa 1720 ch->info = framebuffer_alloc(0, priv->dev);
3ce05599 1721 if (!ch->info) {
0a7f17aa 1722 dev_err(priv->dev, "unable to allocate fb_info\n");
3ce05599
LP
1723 return -ENOMEM;
1724 }
1725
1726 info = ch->info;
3ce05599
LP
1727 info->fbops = &sh_mobile_lcdc_ops;
1728 info->par = ch;
a67472ad
LP
1729 info->pseudo_palette = &ch->pseudo_palette;
1730 info->flags = FBINFO_FLAG_DEFAULT;
3ce05599
LP
1731
1732 /* Iterate through the modes to validate them and find the highest
1733 * resolution.
1734 */
1735 max_mode = NULL;
1736 max_size = 0;
1737
93ff2598 1738 for (i = 0, mode = cfg->lcd_modes; i < cfg->num_modes; i++, mode++) {
3ce05599
LP
1739 unsigned int size = mode->yres * mode->xres;
1740
edd153a3
LP
1741 /* NV12/NV21 buffers must have even number of lines */
1742 if ((cfg->fourcc == V4L2_PIX_FMT_NV12 ||
1743 cfg->fourcc == V4L2_PIX_FMT_NV21) && (mode->yres & 0x1)) {
0a7f17aa
LP
1744 dev_err(priv->dev, "yres must be multiple of 2 for "
1745 "YCbCr420 mode.\n");
3ce05599
LP
1746 return -EINVAL;
1747 }
1748
1749 if (size > max_size) {
1750 max_mode = mode;
1751 max_size = size;
1752 }
1753 }
1754
1755 if (!max_size)
1756 max_size = MAX_XRES * MAX_YRES;
1757 else
0a7f17aa 1758 dev_dbg(priv->dev, "Found largest videomode %ux%u\n",
3ce05599
LP
1759 max_mode->xres, max_mode->yres);
1760
a67472ad 1761 /* Create the mode list. */
93ff2598 1762 if (cfg->lcd_modes == NULL) {
3ce05599 1763 mode = &default_720p;
93ff2598 1764 num_modes = 1;
3ce05599 1765 } else {
93ff2598
LP
1766 mode = cfg->lcd_modes;
1767 num_modes = cfg->num_modes;
3ce05599
LP
1768 }
1769
93ff2598 1770 fb_videomode_to_modelist(mode, num_modes, &info->modelist);
3ce05599 1771
13f80eea
LP
1772 /* Initialize the transmitter device if present. */
1773 if (cfg->tx_dev) {
1774 if (!cfg->tx_dev->dev.driver ||
1775 !try_module_get(cfg->tx_dev->dev.driver->owner)) {
1776 dev_warn(priv->dev,
1777 "unable to get transmitter device\n");
1778 return -EINVAL;
1779 }
1780 ch->tx_dev = platform_get_drvdata(cfg->tx_dev);
1781 ch->tx_dev->lcdc = ch;
1782 ch->tx_dev->def_mode = *mode;
1783 }
1784
a67472ad
LP
1785 /* Initialize variable screen information using the first mode as
1786 * default. The default Y virtual resolution is twice the panel size to
1787 * allow for double-buffering.
1788 */
1789 var = &info->var;
3ce05599 1790 fb_videomode_to_var(var, mode);
afaad83b
LP
1791 var->width = cfg->panel_cfg.width;
1792 var->height = cfg->panel_cfg.height;
3ce05599
LP
1793 var->yres_virtual = var->yres * 2;
1794 var->activate = FB_ACTIVATE_NOW;
1795
105784bb
LP
1796 /* Use the legacy API by default for RGB formats, and the FOURCC API
1797 * for YUV formats.
1798 */
1799 if (!format->yuv)
1800 var->bits_per_pixel = format->bpp;
1801 else
edd153a3 1802 var->grayscale = cfg->fourcc;
edd153a3
LP
1803
1804 /* Make sure the memory size check won't fail. smem_len is initialized
1805 * later based on var.
1806 */
1807 info->fix.smem_len = UINT_MAX;
a67472ad 1808 ret = sh_mobile_check_var(var, info);
3ce05599
LP
1809 if (ret)
1810 return ret;
1811
edd153a3
LP
1812 max_size = max_size * var->bits_per_pixel / 8 * 2;
1813
a67472ad 1814 /* Allocate frame buffer memory and color map. */
0a7f17aa
LP
1815 buf = dma_alloc_coherent(priv->dev, max_size, &ch->dma_handle,
1816 GFP_KERNEL);
3ce05599 1817 if (!buf) {
0a7f17aa 1818 dev_err(priv->dev, "unable to allocate buffer\n");
3ce05599
LP
1819 return -ENOMEM;
1820 }
1821
3ce05599
LP
1822 ret = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0);
1823 if (ret < 0) {
0a7f17aa
LP
1824 dev_err(priv->dev, "unable to allocate cmap\n");
1825 dma_free_coherent(priv->dev, max_size, buf, ch->dma_handle);
3ce05599
LP
1826 return ret;
1827 }
1828
edd153a3
LP
1829 /* Initialize fixed screen information. Restrict pan to 2 lines steps
1830 * for NV12 and NV21.
1831 */
1832 info->fix = sh_mobile_lcdc_fix;
3ce05599 1833 info->fix.smem_start = ch->dma_handle;
edd153a3
LP
1834 info->fix.smem_len = max_size;
1835 if (cfg->fourcc == V4L2_PIX_FMT_NV12 ||
1836 cfg->fourcc == V4L2_PIX_FMT_NV21)
1837 info->fix.ypanstep = 2;
1838
105784bb 1839 if (format->yuv) {
3ce05599 1840 info->fix.line_length = var->xres;
edd153a3
LP
1841 info->fix.visual = FB_VISUAL_FOURCC;
1842 } else {
1843 info->fix.line_length = var->xres * var->bits_per_pixel / 8;
1844 info->fix.visual = FB_VISUAL_TRUECOLOR;
1845 }
3ce05599
LP
1846
1847 info->screen_base = buf;
0a7f17aa 1848 info->device = priv->dev;
2d04559d
LP
1849
1850 ch->display.width = cfg->panel_cfg.width;
1851 ch->display.height = cfg->panel_cfg.height;
1852 ch->display.mode = *mode;
3ce05599
LP
1853
1854 return 0;
1855}
1856
1857static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
1858{
01ac25b5 1859 struct sh_mobile_lcdc_info *pdata = pdev->dev.platform_data;
3ce05599 1860 struct sh_mobile_lcdc_priv *priv;
cfb4f5d1 1861 struct resource *res;
3ce05599 1862 int num_channels;
cfb4f5d1 1863 int error;
3ce05599 1864 int i;
cfb4f5d1 1865
01ac25b5 1866 if (!pdata) {
cfb4f5d1 1867 dev_err(&pdev->dev, "no platform data defined\n");
8bed9055 1868 return -EINVAL;
cfb4f5d1
MD
1869 }
1870
1871 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
8564557a
MD
1872 i = platform_get_irq(pdev, 0);
1873 if (!res || i < 0) {
1874 dev_err(&pdev->dev, "cannot get platform resources\n");
8bed9055 1875 return -ENOENT;
cfb4f5d1
MD
1876 }
1877
1878 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1879 if (!priv) {
1880 dev_err(&pdev->dev, "cannot allocate device data\n");
8bed9055 1881 return -ENOMEM;
cfb4f5d1
MD
1882 }
1883
4774c12a
LP
1884 priv->dev = &pdev->dev;
1885 priv->meram_dev = pdata->meram_dev;
8bed9055
GL
1886 platform_set_drvdata(pdev, priv);
1887
f8798ccb 1888 error = request_irq(i, sh_mobile_lcdc_irq, 0,
7ad33e74 1889 dev_name(&pdev->dev), priv);
8564557a
MD
1890 if (error) {
1891 dev_err(&pdev->dev, "unable to request irq\n");
1892 goto err1;
1893 }
1894
1895 priv->irq = i;
5ef6b505 1896 atomic_set(&priv->hw_usecnt, -1);
cfb4f5d1 1897
3ce05599
LP
1898 for (i = 0, num_channels = 0; i < ARRAY_SIZE(pdata->ch); i++) {
1899 struct sh_mobile_lcdc_chan *ch = priv->ch + num_channels;
cfb4f5d1 1900
01ac25b5
GL
1901 ch->lcdc = priv;
1902 memcpy(&ch->cfg, &pdata->ch[i], sizeof(pdata->ch[i]));
cfb4f5d1 1903
01ac25b5 1904 error = sh_mobile_lcdc_check_interface(ch);
cfb4f5d1
MD
1905 if (error) {
1906 dev_err(&pdev->dev, "unsupported interface type\n");
1907 goto err1;
1908 }
01ac25b5
GL
1909 init_waitqueue_head(&ch->frame_end_wait);
1910 init_completion(&ch->vsync_completion);
1911 ch->pan_offset = 0;
cfb4f5d1 1912
3b0fd9d7
AC
1913 /* probe the backlight is there is one defined */
1914 if (ch->cfg.bl_info.max_brightness)
1915 ch->bl = sh_mobile_lcdc_bl_probe(&pdev->dev, ch);
1916
cfb4f5d1
MD
1917 switch (pdata->ch[i].chan) {
1918 case LCDC_CHAN_MAINLCD:
ce1c0b08 1919 ch->enabled = LDCNT2R_ME;
01ac25b5 1920 ch->reg_offs = lcdc_offs_mainlcd;
3ce05599 1921 num_channels++;
cfb4f5d1
MD
1922 break;
1923 case LCDC_CHAN_SUBLCD:
ce1c0b08 1924 ch->enabled = LDCNT2R_SE;
01ac25b5 1925 ch->reg_offs = lcdc_offs_sublcd;
3ce05599 1926 num_channels++;
cfb4f5d1
MD
1927 break;
1928 }
1929 }
1930
3ce05599 1931 if (!num_channels) {
cfb4f5d1
MD
1932 dev_err(&pdev->dev, "no channels defined\n");
1933 error = -EINVAL;
1934 goto err1;
1935 }
1936
edd153a3 1937 /* for dual channel LCDC (MAIN + SUB) force shared format setting */
3ce05599 1938 if (num_channels == 2)
edd153a3 1939 priv->forced_fourcc = pdata->ch[0].fourcc;
417d4827 1940
dba6f385
GL
1941 priv->base = ioremap_nocache(res->start, resource_size(res));
1942 if (!priv->base)
1943 goto err1;
1944
0a7f17aa 1945 error = sh_mobile_lcdc_setup_clocks(priv, pdata->clock_source);
cfb4f5d1
MD
1946 if (error) {
1947 dev_err(&pdev->dev, "unable to setup clocks\n");
1948 goto err1;
1949 }
1950
4774c12a
LP
1951 /* Enable runtime PM. */
1952 pm_runtime_enable(&pdev->dev);
7caa4342 1953
3ce05599 1954 for (i = 0; i < num_channels; i++) {
01ac25b5 1955 struct sh_mobile_lcdc_chan *ch = priv->ch + i;
c44f9f76 1956
0a7f17aa 1957 error = sh_mobile_lcdc_channel_init(priv, ch);
cfb4f5d1 1958 if (error)
3ce05599 1959 goto err1;
cfb4f5d1
MD
1960 }
1961
cfb4f5d1
MD
1962 error = sh_mobile_lcdc_start(priv);
1963 if (error) {
1964 dev_err(&pdev->dev, "unable to start hardware\n");
1965 goto err1;
1966 }
1967
3ce05599 1968 for (i = 0; i < num_channels; i++) {
1c6a307a 1969 struct sh_mobile_lcdc_chan *ch = priv->ch + i;
3ce05599 1970 struct fb_info *info = ch->info;
1c6a307a
PM
1971
1972 if (info->fbdefio) {
8bed9055 1973 ch->sglist = vmalloc(sizeof(struct scatterlist) *
1c6a307a 1974 info->fix.smem_len >> PAGE_SHIFT);
8bed9055 1975 if (!ch->sglist) {
1c6a307a
PM
1976 dev_err(&pdev->dev, "cannot allocate sglist\n");
1977 goto err1;
1978 }
1979 }
1980
3b0fd9d7
AC
1981 info->bl_dev = ch->bl;
1982
1c6a307a 1983 error = register_framebuffer(info);
cfb4f5d1
MD
1984 if (error < 0)
1985 goto err1;
cfb4f5d1 1986
0a7f17aa 1987 dev_info(&pdev->dev, "registered %s/%s as %dx%d %dbpp.\n",
edd153a3
LP
1988 pdev->name, (ch->cfg.chan == LCDC_CHAN_MAINLCD) ?
1989 "mainlcd" : "sublcd", info->var.xres, info->var.yres,
1990 info->var.bits_per_pixel);
8564557a
MD
1991
1992 /* deferred io mode: disable clock to save power */
6011bdea 1993 if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED)
8564557a 1994 sh_mobile_lcdc_clk_off(priv);
cfb4f5d1
MD
1995 }
1996
6011bdea
GL
1997 /* Failure ignored */
1998 priv->notifier.notifier_call = sh_mobile_lcdc_notify;
1999 fb_register_client(&priv->notifier);
2000
cfb4f5d1 2001 return 0;
8bed9055 2002err1:
cfb4f5d1 2003 sh_mobile_lcdc_remove(pdev);
8bed9055 2004
cfb4f5d1
MD
2005 return error;
2006}
2007
cfb4f5d1
MD
2008static struct platform_driver sh_mobile_lcdc_driver = {
2009 .driver = {
2010 .name = "sh_mobile_lcdc_fb",
2011 .owner = THIS_MODULE,
2feb075a 2012 .pm = &sh_mobile_lcdc_dev_pm_ops,
cfb4f5d1
MD
2013 },
2014 .probe = sh_mobile_lcdc_probe,
2015 .remove = sh_mobile_lcdc_remove,
2016};
2017
4277f2c4 2018module_platform_driver(sh_mobile_lcdc_driver);
cfb4f5d1
MD
2019
2020MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver");
2021MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
2022MODULE_LICENSE("GPL v2");