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Commit | Line | Data |
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cfb4f5d1 MD |
1 | /* |
2 | * SuperH Mobile LCDC Framebuffer | |
3 | * | |
4 | * Copyright (c) 2008 Magnus Damm | |
5 | * | |
6 | * This file is subject to the terms and conditions of the GNU General Public | |
7 | * License. See the file "COPYING" in the main directory of this archive | |
8 | * for more details. | |
9 | */ | |
10 | ||
f1f60b5f LP |
11 | #include <linux/atomic.h> |
12 | #include <linux/backlight.h> | |
cfb4f5d1 | 13 | #include <linux/clk.h> |
f1f60b5f | 14 | #include <linux/console.h> |
cfb4f5d1 | 15 | #include <linux/dma-mapping.h> |
f1f60b5f LP |
16 | #include <linux/delay.h> |
17 | #include <linux/gpio.h> | |
18 | #include <linux/init.h> | |
8564557a | 19 | #include <linux/interrupt.h> |
40331b21 | 20 | #include <linux/ioctl.h> |
f1f60b5f LP |
21 | #include <linux/kernel.h> |
22 | #include <linux/mm.h> | |
355b200b | 23 | #include <linux/module.h> |
f1f60b5f LP |
24 | #include <linux/platform_device.h> |
25 | #include <linux/pm_runtime.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/videodev2.h> | |
28 | #include <linux/vmalloc.h> | |
29 | ||
225c9a8d | 30 | #include <video/sh_mobile_lcdc.h> |
8a20974f | 31 | #include <video/sh_mobile_meram.h> |
cfb4f5d1 | 32 | |
6de9edd5 GL |
33 | #include "sh_mobile_lcdcfb.h" |
34 | ||
a6f15ade PE |
35 | #define SIDE_B_OFFSET 0x1000 |
36 | #define MIRROR_OFFSET 0x2000 | |
cfb4f5d1 | 37 | |
d2ecbab5 GL |
38 | #define MAX_XRES 1920 |
39 | #define MAX_YRES 1080 | |
cfb4f5d1 | 40 | |
f1f60b5f LP |
41 | struct sh_mobile_lcdc_priv { |
42 | void __iomem *base; | |
43 | int irq; | |
44 | atomic_t hw_usecnt; | |
45 | struct device *dev; | |
46 | struct clk *dot_clk; | |
47 | unsigned long lddckr; | |
48 | struct sh_mobile_lcdc_chan ch[2]; | |
49 | struct notifier_block notifier; | |
50 | int started; | |
51 | int forced_fourcc; /* 2 channel LCDC must share fourcc setting */ | |
52 | struct sh_mobile_meram_info *meram_dev; | |
53 | }; | |
54 | ||
55 | /* ----------------------------------------------------------------------------- | |
56 | * Registers access | |
57 | */ | |
58 | ||
0246c471 | 59 | static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = { |
cfb4f5d1 MD |
60 | [LDDCKPAT1R] = 0x400, |
61 | [LDDCKPAT2R] = 0x404, | |
62 | [LDMT1R] = 0x418, | |
63 | [LDMT2R] = 0x41c, | |
64 | [LDMT3R] = 0x420, | |
65 | [LDDFR] = 0x424, | |
66 | [LDSM1R] = 0x428, | |
8564557a | 67 | [LDSM2R] = 0x42c, |
cfb4f5d1 | 68 | [LDSA1R] = 0x430, |
53b50314 | 69 | [LDSA2R] = 0x434, |
cfb4f5d1 MD |
70 | [LDMLSR] = 0x438, |
71 | [LDHCNR] = 0x448, | |
72 | [LDHSYNR] = 0x44c, | |
73 | [LDVLNR] = 0x450, | |
74 | [LDVSYNR] = 0x454, | |
75 | [LDPMR] = 0x460, | |
6011bdea | 76 | [LDHAJR] = 0x4a0, |
cfb4f5d1 MD |
77 | }; |
78 | ||
0246c471 | 79 | static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = { |
cfb4f5d1 MD |
80 | [LDDCKPAT1R] = 0x408, |
81 | [LDDCKPAT2R] = 0x40c, | |
82 | [LDMT1R] = 0x600, | |
83 | [LDMT2R] = 0x604, | |
84 | [LDMT3R] = 0x608, | |
85 | [LDDFR] = 0x60c, | |
86 | [LDSM1R] = 0x610, | |
8564557a | 87 | [LDSM2R] = 0x614, |
cfb4f5d1 MD |
88 | [LDSA1R] = 0x618, |
89 | [LDMLSR] = 0x620, | |
90 | [LDHCNR] = 0x624, | |
91 | [LDHSYNR] = 0x628, | |
92 | [LDVLNR] = 0x62c, | |
93 | [LDVSYNR] = 0x630, | |
94 | [LDPMR] = 0x63c, | |
95 | }; | |
96 | ||
a6f15ade PE |
97 | static bool banked(int reg_nr) |
98 | { | |
99 | switch (reg_nr) { | |
100 | case LDMT1R: | |
101 | case LDMT2R: | |
102 | case LDMT3R: | |
103 | case LDDFR: | |
104 | case LDSM1R: | |
105 | case LDSA1R: | |
53b50314 | 106 | case LDSA2R: |
a6f15ade PE |
107 | case LDMLSR: |
108 | case LDHCNR: | |
109 | case LDHSYNR: | |
110 | case LDVLNR: | |
111 | case LDVSYNR: | |
112 | return true; | |
113 | } | |
114 | return false; | |
115 | } | |
116 | ||
f1f60b5f LP |
117 | static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan) |
118 | { | |
119 | return chan->cfg.chan == LCDC_CHAN_SUBLCD; | |
120 | } | |
121 | ||
cfb4f5d1 MD |
122 | static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan, |
123 | int reg_nr, unsigned long data) | |
124 | { | |
125 | iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]); | |
a6f15ade PE |
126 | if (banked(reg_nr)) |
127 | iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] + | |
128 | SIDE_B_OFFSET); | |
129 | } | |
130 | ||
131 | static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan, | |
132 | int reg_nr, unsigned long data) | |
133 | { | |
134 | iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] + | |
135 | MIRROR_OFFSET); | |
cfb4f5d1 MD |
136 | } |
137 | ||
138 | static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan, | |
139 | int reg_nr) | |
140 | { | |
141 | return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]); | |
142 | } | |
143 | ||
144 | static void lcdc_write(struct sh_mobile_lcdc_priv *priv, | |
145 | unsigned long reg_offs, unsigned long data) | |
146 | { | |
147 | iowrite32(data, priv->base + reg_offs); | |
148 | } | |
149 | ||
150 | static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv, | |
151 | unsigned long reg_offs) | |
152 | { | |
153 | return ioread32(priv->base + reg_offs); | |
154 | } | |
155 | ||
156 | static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv, | |
157 | unsigned long reg_offs, | |
158 | unsigned long mask, unsigned long until) | |
159 | { | |
160 | while ((lcdc_read(priv, reg_offs) & mask) != until) | |
161 | cpu_relax(); | |
162 | } | |
163 | ||
f1f60b5f LP |
164 | /* ----------------------------------------------------------------------------- |
165 | * Clock management | |
166 | */ | |
167 | ||
168 | static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv) | |
cfb4f5d1 | 169 | { |
f1f60b5f LP |
170 | if (atomic_inc_and_test(&priv->hw_usecnt)) { |
171 | if (priv->dot_clk) | |
172 | clk_enable(priv->dot_clk); | |
173 | pm_runtime_get_sync(priv->dev); | |
174 | if (priv->meram_dev && priv->meram_dev->pdev) | |
175 | pm_runtime_get_sync(&priv->meram_dev->pdev->dev); | |
176 | } | |
cfb4f5d1 MD |
177 | } |
178 | ||
f1f60b5f LP |
179 | static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv) |
180 | { | |
181 | if (atomic_sub_return(1, &priv->hw_usecnt) == -1) { | |
182 | if (priv->meram_dev && priv->meram_dev->pdev) | |
183 | pm_runtime_put_sync(&priv->meram_dev->pdev->dev); | |
184 | pm_runtime_put(priv->dev); | |
185 | if (priv->dot_clk) | |
186 | clk_disable(priv->dot_clk); | |
187 | } | |
188 | } | |
189 | ||
0a7f17aa LP |
190 | static int sh_mobile_lcdc_setup_clocks(struct sh_mobile_lcdc_priv *priv, |
191 | int clock_source) | |
f1f60b5f | 192 | { |
4774c12a | 193 | struct clk *clk; |
f1f60b5f LP |
194 | char *str; |
195 | ||
196 | switch (clock_source) { | |
197 | case LCDC_CLK_BUS: | |
198 | str = "bus_clk"; | |
199 | priv->lddckr = LDDCKR_ICKSEL_BUS; | |
200 | break; | |
201 | case LCDC_CLK_PERIPHERAL: | |
202 | str = "peripheral_clk"; | |
203 | priv->lddckr = LDDCKR_ICKSEL_MIPI; | |
204 | break; | |
205 | case LCDC_CLK_EXTERNAL: | |
206 | str = NULL; | |
207 | priv->lddckr = LDDCKR_ICKSEL_HDMI; | |
208 | break; | |
209 | default: | |
210 | return -EINVAL; | |
211 | } | |
212 | ||
4774c12a LP |
213 | if (str == NULL) |
214 | return 0; | |
215 | ||
0a7f17aa | 216 | clk = clk_get(priv->dev, str); |
4774c12a | 217 | if (IS_ERR(clk)) { |
0a7f17aa | 218 | dev_err(priv->dev, "cannot get dot clock %s\n", str); |
4774c12a | 219 | return PTR_ERR(clk); |
f1f60b5f LP |
220 | } |
221 | ||
4774c12a | 222 | priv->dot_clk = clk; |
f1f60b5f LP |
223 | return 0; |
224 | } | |
225 | ||
226 | /* ----------------------------------------------------------------------------- | |
37c5dcc2 | 227 | * Display, panel and deferred I/O |
f1f60b5f LP |
228 | */ |
229 | ||
cfb4f5d1 MD |
230 | static void lcdc_sys_write_index(void *handle, unsigned long data) |
231 | { | |
232 | struct sh_mobile_lcdc_chan *ch = handle; | |
233 | ||
ce1c0b08 LP |
234 | lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT); |
235 | lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0); | |
236 | lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA | | |
237 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); | |
238 | lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0); | |
cfb4f5d1 MD |
239 | } |
240 | ||
241 | static void lcdc_sys_write_data(void *handle, unsigned long data) | |
242 | { | |
243 | struct sh_mobile_lcdc_chan *ch = handle; | |
244 | ||
ce1c0b08 LP |
245 | lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT | LDDWDxR_RSW); |
246 | lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0); | |
247 | lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA | | |
248 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); | |
249 | lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0); | |
cfb4f5d1 MD |
250 | } |
251 | ||
252 | static unsigned long lcdc_sys_read_data(void *handle) | |
253 | { | |
254 | struct sh_mobile_lcdc_chan *ch = handle; | |
255 | ||
ce1c0b08 LP |
256 | lcdc_write(ch->lcdc, _LDDRDR, LDDRDR_RSR); |
257 | lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0); | |
258 | lcdc_write(ch->lcdc, _LDDRAR, LDDRAR_RA | | |
259 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); | |
cfb4f5d1 | 260 | udelay(1); |
ce1c0b08 | 261 | lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0); |
cfb4f5d1 | 262 | |
ce1c0b08 | 263 | return lcdc_read(ch->lcdc, _LDDRDR) & LDDRDR_DRD_MASK; |
cfb4f5d1 MD |
264 | } |
265 | ||
266 | struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = { | |
267 | lcdc_sys_write_index, | |
268 | lcdc_sys_write_data, | |
269 | lcdc_sys_read_data, | |
270 | }; | |
271 | ||
1c6a307a PM |
272 | static int sh_mobile_lcdc_sginit(struct fb_info *info, |
273 | struct list_head *pagelist) | |
274 | { | |
275 | struct sh_mobile_lcdc_chan *ch = info->par; | |
276 | unsigned int nr_pages_max = info->fix.smem_len >> PAGE_SHIFT; | |
277 | struct page *page; | |
278 | int nr_pages = 0; | |
279 | ||
280 | sg_init_table(ch->sglist, nr_pages_max); | |
281 | ||
282 | list_for_each_entry(page, pagelist, lru) | |
283 | sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0); | |
284 | ||
285 | return nr_pages; | |
286 | } | |
287 | ||
8564557a MD |
288 | static void sh_mobile_lcdc_deferred_io(struct fb_info *info, |
289 | struct list_head *pagelist) | |
290 | { | |
291 | struct sh_mobile_lcdc_chan *ch = info->par; | |
afaad83b | 292 | struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg.panel_cfg; |
8564557a MD |
293 | |
294 | /* enable clocks before accessing hardware */ | |
295 | sh_mobile_lcdc_clk_on(ch->lcdc); | |
296 | ||
5c1a56b5 PM |
297 | /* |
298 | * It's possible to get here without anything on the pagelist via | |
299 | * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync() | |
300 | * invocation. In the former case, the acceleration routines are | |
301 | * stepped in to when using the framebuffer console causing the | |
302 | * workqueue to be scheduled without any dirty pages on the list. | |
303 | * | |
304 | * Despite this, a panel update is still needed given that the | |
305 | * acceleration routines have their own methods for writing in | |
306 | * that still need to be updated. | |
307 | * | |
308 | * The fsync() and empty pagelist case could be optimized for, | |
309 | * but we don't bother, as any application exhibiting such | |
310 | * behaviour is fundamentally broken anyways. | |
311 | */ | |
312 | if (!list_empty(pagelist)) { | |
313 | unsigned int nr_pages = sh_mobile_lcdc_sginit(info, pagelist); | |
314 | ||
315 | /* trigger panel update */ | |
316 | dma_map_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE); | |
afaad83b LP |
317 | if (panel->start_transfer) |
318 | panel->start_transfer(ch, &sh_mobile_lcdc_sys_bus_ops); | |
ce1c0b08 | 319 | lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG); |
5c1a56b5 | 320 | dma_unmap_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE); |
ef61aae4 | 321 | } else { |
afaad83b LP |
322 | if (panel->start_transfer) |
323 | panel->start_transfer(ch, &sh_mobile_lcdc_sys_bus_ops); | |
ce1c0b08 | 324 | lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG); |
ef61aae4 | 325 | } |
8564557a MD |
326 | } |
327 | ||
328 | static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info) | |
329 | { | |
330 | struct fb_deferred_io *fbdefio = info->fbdefio; | |
331 | ||
332 | if (fbdefio) | |
333 | schedule_delayed_work(&info->deferred_work, fbdefio->delay); | |
334 | } | |
335 | ||
37c5dcc2 LP |
336 | static void sh_mobile_lcdc_display_on(struct sh_mobile_lcdc_chan *ch) |
337 | { | |
afaad83b | 338 | struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg.panel_cfg; |
37c5dcc2 | 339 | |
9a2985e7 | 340 | if (ch->tx_dev) { |
458981c3 LP |
341 | int ret; |
342 | ||
343 | ret = ch->tx_dev->ops->display_on(ch->tx_dev); | |
344 | if (ret < 0) | |
9a2985e7 | 345 | return; |
458981c3 LP |
346 | |
347 | if (ret == SH_MOBILE_LCDC_DISPLAY_DISCONNECTED) | |
348 | ch->info->state = FBINFO_STATE_SUSPENDED; | |
9a2985e7 LP |
349 | } |
350 | ||
37c5dcc2 | 351 | /* HDMI must be enabled before LCDC configuration */ |
afaad83b LP |
352 | if (panel->display_on) |
353 | panel->display_on(); | |
37c5dcc2 LP |
354 | } |
355 | ||
356 | static void sh_mobile_lcdc_display_off(struct sh_mobile_lcdc_chan *ch) | |
357 | { | |
afaad83b | 358 | struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg.panel_cfg; |
37c5dcc2 | 359 | |
afaad83b LP |
360 | if (panel->display_off) |
361 | panel->display_off(); | |
9a2985e7 LP |
362 | |
363 | if (ch->tx_dev) | |
364 | ch->tx_dev->ops->display_off(ch->tx_dev); | |
37c5dcc2 LP |
365 | } |
366 | ||
ecd29947 LP |
367 | static bool |
368 | sh_mobile_lcdc_must_reconfigure(struct sh_mobile_lcdc_chan *ch, | |
e0c8601a | 369 | const struct fb_videomode *new_mode) |
ecd29947 LP |
370 | { |
371 | struct fb_var_screeninfo *old_var = &ch->display_var; | |
372 | struct fb_videomode old_mode; | |
ecd29947 LP |
373 | |
374 | fb_var_to_videomode(&old_mode, old_var); | |
ecd29947 LP |
375 | |
376 | dev_dbg(ch->info->dev, "Old %ux%u, new %ux%u\n", | |
e0c8601a | 377 | old_mode.xres, old_mode.yres, new_mode->xres, new_mode->yres); |
ecd29947 | 378 | |
e0c8601a LP |
379 | /* It can be a different monitor with an equal video-mode */ |
380 | if (fb_mode_is_equal(&old_mode, new_mode)) | |
ecd29947 | 381 | return false; |
ecd29947 LP |
382 | |
383 | dev_dbg(ch->info->dev, "Switching %u -> %u lines\n", | |
e0c8601a LP |
384 | old_mode.yres, new_mode->yres); |
385 | fb_videomode_to_var(old_var, new_mode); | |
ecd29947 LP |
386 | |
387 | return true; | |
388 | } | |
389 | ||
390 | static int sh_mobile_check_var(struct fb_var_screeninfo *var, | |
391 | struct fb_info *info); | |
392 | ||
393 | static int sh_mobile_lcdc_display_notify(struct sh_mobile_lcdc_chan *ch, | |
394 | enum sh_mobile_lcdc_entity_event event, | |
e0c8601a LP |
395 | const struct fb_videomode *mode, |
396 | const struct fb_monspecs *monspec) | |
ecd29947 LP |
397 | { |
398 | struct fb_info *info = ch->info; | |
e0c8601a | 399 | struct fb_var_screeninfo var; |
ecd29947 LP |
400 | int ret = 0; |
401 | ||
402 | switch (event) { | |
403 | case SH_MOBILE_LCDC_EVENT_DISPLAY_CONNECT: | |
404 | /* HDMI plug in */ | |
405 | if (lock_fb_info(info)) { | |
406 | console_lock(); | |
407 | ||
e0c8601a LP |
408 | ch->display_var.width = monspec->max_x * 10; |
409 | ch->display_var.height = monspec->max_y * 10; | |
410 | ||
411 | if (!sh_mobile_lcdc_must_reconfigure(ch, mode) && | |
ecd29947 LP |
412 | info->state == FBINFO_STATE_RUNNING) { |
413 | /* First activation with the default monitor. | |
414 | * Just turn on, if we run a resume here, the | |
415 | * logo disappears. | |
416 | */ | |
e0c8601a LP |
417 | info->var.width = monspec->max_x * 10; |
418 | info->var.height = monspec->max_y * 10; | |
ecd29947 LP |
419 | sh_mobile_lcdc_display_on(ch); |
420 | } else { | |
421 | /* New monitor or have to wake up */ | |
422 | fb_set_suspend(info, 0); | |
423 | } | |
424 | ||
425 | console_unlock(); | |
426 | unlock_fb_info(info); | |
427 | } | |
428 | break; | |
429 | ||
430 | case SH_MOBILE_LCDC_EVENT_DISPLAY_DISCONNECT: | |
431 | /* HDMI disconnect */ | |
432 | if (lock_fb_info(info)) { | |
433 | console_lock(); | |
434 | fb_set_suspend(info, 1); | |
435 | console_unlock(); | |
436 | unlock_fb_info(info); | |
437 | } | |
438 | break; | |
439 | ||
440 | case SH_MOBILE_LCDC_EVENT_DISPLAY_MODE: | |
441 | /* Validate a proposed new mode */ | |
e0c8601a LP |
442 | fb_videomode_to_var(&var, mode); |
443 | var.bits_per_pixel = info->var.bits_per_pixel; | |
444 | var.grayscale = info->var.grayscale; | |
445 | ret = sh_mobile_check_var(&var, info); | |
ecd29947 LP |
446 | break; |
447 | } | |
448 | ||
449 | return ret; | |
450 | } | |
451 | ||
f1f60b5f LP |
452 | /* ----------------------------------------------------------------------------- |
453 | * Format helpers | |
454 | */ | |
455 | ||
456 | static int sh_mobile_format_fourcc(const struct fb_var_screeninfo *var) | |
457 | { | |
458 | if (var->grayscale > 1) | |
459 | return var->grayscale; | |
460 | ||
461 | switch (var->bits_per_pixel) { | |
462 | case 16: | |
463 | return V4L2_PIX_FMT_RGB565; | |
464 | case 24: | |
465 | return V4L2_PIX_FMT_BGR24; | |
466 | case 32: | |
467 | return V4L2_PIX_FMT_BGR32; | |
468 | default: | |
469 | return 0; | |
470 | } | |
471 | } | |
472 | ||
473 | static int sh_mobile_format_is_fourcc(const struct fb_var_screeninfo *var) | |
474 | { | |
475 | return var->grayscale > 1; | |
476 | } | |
477 | ||
478 | static bool sh_mobile_format_is_yuv(const struct fb_var_screeninfo *var) | |
479 | { | |
480 | if (var->grayscale <= 1) | |
481 | return false; | |
482 | ||
483 | switch (var->grayscale) { | |
484 | case V4L2_PIX_FMT_NV12: | |
485 | case V4L2_PIX_FMT_NV21: | |
486 | case V4L2_PIX_FMT_NV16: | |
487 | case V4L2_PIX_FMT_NV61: | |
488 | case V4L2_PIX_FMT_NV24: | |
489 | case V4L2_PIX_FMT_NV42: | |
490 | return true; | |
491 | ||
492 | default: | |
493 | return false; | |
494 | } | |
495 | } | |
496 | ||
497 | /* ----------------------------------------------------------------------------- | |
498 | * Start, stop and IRQ | |
499 | */ | |
500 | ||
8564557a MD |
501 | static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data) |
502 | { | |
503 | struct sh_mobile_lcdc_priv *priv = data; | |
2feb075a | 504 | struct sh_mobile_lcdc_chan *ch; |
9dd38819 | 505 | unsigned long ldintr; |
2feb075a MD |
506 | int is_sub; |
507 | int k; | |
8564557a | 508 | |
dc48665f LP |
509 | /* Acknowledge interrupts and disable further VSYNC End IRQs. */ |
510 | ldintr = lcdc_read(priv, _LDINTR); | |
511 | lcdc_write(priv, _LDINTR, (ldintr ^ LDINTR_STATUS_MASK) & ~LDINTR_VEE); | |
8564557a | 512 | |
2feb075a | 513 | /* figure out if this interrupt is for main or sub lcd */ |
ce1c0b08 | 514 | is_sub = (lcdc_read(priv, _LDSR) & LDSR_MSS) ? 1 : 0; |
2feb075a | 515 | |
9dd38819 | 516 | /* wake up channel and disable clocks */ |
2feb075a MD |
517 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { |
518 | ch = &priv->ch[k]; | |
519 | ||
520 | if (!ch->enabled) | |
521 | continue; | |
522 | ||
dc48665f | 523 | /* Frame End */ |
9dd38819 PE |
524 | if (ldintr & LDINTR_FS) { |
525 | if (is_sub == lcdc_chan_is_sublcd(ch)) { | |
526 | ch->frame_end = 1; | |
527 | wake_up(&ch->frame_end_wait); | |
2feb075a | 528 | |
9dd38819 PE |
529 | sh_mobile_lcdc_clk_off(priv); |
530 | } | |
531 | } | |
532 | ||
533 | /* VSYNC End */ | |
40331b21 PE |
534 | if (ldintr & LDINTR_VES) |
535 | complete(&ch->vsync_completion); | |
2feb075a MD |
536 | } |
537 | ||
8564557a MD |
538 | return IRQ_HANDLED; |
539 | } | |
540 | ||
cfb4f5d1 MD |
541 | static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv, |
542 | int start) | |
543 | { | |
544 | unsigned long tmp = lcdc_read(priv, _LDCNT2R); | |
545 | int k; | |
546 | ||
547 | /* start or stop the lcdc */ | |
548 | if (start) | |
ce1c0b08 | 549 | lcdc_write(priv, _LDCNT2R, tmp | LDCNT2R_DO); |
cfb4f5d1 | 550 | else |
ce1c0b08 | 551 | lcdc_write(priv, _LDCNT2R, tmp & ~LDCNT2R_DO); |
cfb4f5d1 MD |
552 | |
553 | /* wait until power is applied/stopped on all channels */ | |
554 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) | |
555 | if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled) | |
556 | while (1) { | |
ce1c0b08 LP |
557 | tmp = lcdc_read_chan(&priv->ch[k], LDPMR) |
558 | & LDPMR_LPS; | |
559 | if (start && tmp == LDPMR_LPS) | |
cfb4f5d1 MD |
560 | break; |
561 | if (!start && tmp == 0) | |
562 | break; | |
563 | cpu_relax(); | |
564 | } | |
565 | ||
566 | if (!start) | |
567 | lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */ | |
568 | } | |
569 | ||
6011bdea GL |
570 | static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch) |
571 | { | |
1c120deb GL |
572 | struct fb_var_screeninfo *var = &ch->info->var, *display_var = &ch->display_var; |
573 | unsigned long h_total, hsync_pos, display_h_total; | |
6011bdea GL |
574 | u32 tmp; |
575 | ||
576 | tmp = ch->ldmt1r_value; | |
ce1c0b08 LP |
577 | tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : LDMT1R_VPOL; |
578 | tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : LDMT1R_HPOL; | |
579 | tmp |= (ch->cfg.flags & LCDC_FLAGS_DWPOL) ? LDMT1R_DWPOL : 0; | |
580 | tmp |= (ch->cfg.flags & LCDC_FLAGS_DIPOL) ? LDMT1R_DIPOL : 0; | |
581 | tmp |= (ch->cfg.flags & LCDC_FLAGS_DAPOL) ? LDMT1R_DAPOL : 0; | |
582 | tmp |= (ch->cfg.flags & LCDC_FLAGS_HSCNT) ? LDMT1R_HSCNT : 0; | |
583 | tmp |= (ch->cfg.flags & LCDC_FLAGS_DWCNT) ? LDMT1R_DWCNT : 0; | |
6011bdea GL |
584 | lcdc_write_chan(ch, LDMT1R, tmp); |
585 | ||
586 | /* setup SYS bus */ | |
587 | lcdc_write_chan(ch, LDMT2R, ch->cfg.sys_bus_cfg.ldmt2r); | |
588 | lcdc_write_chan(ch, LDMT3R, ch->cfg.sys_bus_cfg.ldmt3r); | |
589 | ||
590 | /* horizontal configuration */ | |
1c120deb GL |
591 | h_total = display_var->xres + display_var->hsync_len + |
592 | display_var->left_margin + display_var->right_margin; | |
6011bdea | 593 | tmp = h_total / 8; /* HTCN */ |
1c120deb | 594 | tmp |= (min(display_var->xres, var->xres) / 8) << 16; /* HDCN */ |
6011bdea GL |
595 | lcdc_write_chan(ch, LDHCNR, tmp); |
596 | ||
1c120deb | 597 | hsync_pos = display_var->xres + display_var->right_margin; |
6011bdea | 598 | tmp = hsync_pos / 8; /* HSYNP */ |
1c120deb | 599 | tmp |= (display_var->hsync_len / 8) << 16; /* HSYNW */ |
6011bdea GL |
600 | lcdc_write_chan(ch, LDHSYNR, tmp); |
601 | ||
602 | /* vertical configuration */ | |
1c120deb GL |
603 | tmp = display_var->yres + display_var->vsync_len + |
604 | display_var->upper_margin + display_var->lower_margin; /* VTLN */ | |
605 | tmp |= min(display_var->yres, var->yres) << 16; /* VDLN */ | |
6011bdea GL |
606 | lcdc_write_chan(ch, LDVLNR, tmp); |
607 | ||
1c120deb GL |
608 | tmp = display_var->yres + display_var->lower_margin; /* VSYNP */ |
609 | tmp |= display_var->vsync_len << 16; /* VSYNW */ | |
6011bdea GL |
610 | lcdc_write_chan(ch, LDVSYNR, tmp); |
611 | ||
612 | /* Adjust horizontal synchronisation for HDMI */ | |
1c120deb GL |
613 | display_h_total = display_var->xres + display_var->hsync_len + |
614 | display_var->left_margin + display_var->right_margin; | |
615 | tmp = ((display_var->xres & 7) << 24) | | |
616 | ((display_h_total & 7) << 16) | | |
617 | ((display_var->hsync_len & 7) << 8) | | |
41e583c2 | 618 | (hsync_pos & 7); |
6011bdea GL |
619 | lcdc_write_chan(ch, LDHAJR, tmp); |
620 | } | |
621 | ||
9a217e34 LP |
622 | /* |
623 | * __sh_mobile_lcdc_start - Configure and tart the LCDC | |
624 | * @priv: LCDC device | |
625 | * | |
626 | * Configure all enabled channels and start the LCDC device. All external | |
627 | * devices (clocks, MERAM, panels, ...) are not touched by this function. | |
628 | */ | |
629 | static void __sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv) | |
cfb4f5d1 MD |
630 | { |
631 | struct sh_mobile_lcdc_chan *ch; | |
cfb4f5d1 | 632 | unsigned long tmp; |
9a217e34 | 633 | int k, m; |
8564557a | 634 | |
9a217e34 LP |
635 | /* Enable LCDC channels. Read data from external memory, avoid using the |
636 | * BEU for now. | |
637 | */ | |
638 | lcdc_write(priv, _LDCNT2R, priv->ch[0].enabled | priv->ch[1].enabled); | |
cfb4f5d1 | 639 | |
9a217e34 | 640 | /* Stop the LCDC first and disable all interrupts. */ |
cfb4f5d1 | 641 | sh_mobile_lcdc_start_stop(priv, 0); |
9a217e34 | 642 | lcdc_write(priv, _LDINTR, 0); |
cfb4f5d1 | 643 | |
9a217e34 | 644 | /* Configure power supply, dot clocks and start them. */ |
cfb4f5d1 MD |
645 | tmp = priv->lddckr; |
646 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { | |
647 | ch = &priv->ch[k]; | |
9a217e34 | 648 | if (!ch->enabled) |
cfb4f5d1 MD |
649 | continue; |
650 | ||
9a217e34 LP |
651 | /* Power supply */ |
652 | lcdc_write_chan(ch, LDPMR, 0); | |
653 | ||
cfb4f5d1 MD |
654 | m = ch->cfg.clock_divider; |
655 | if (!m) | |
656 | continue; | |
657 | ||
505c7de5 LP |
658 | /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider |
659 | * denominator. | |
660 | */ | |
661 | lcdc_write_chan(ch, LDDCKPAT1R, 0); | |
662 | lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1); | |
663 | ||
cfb4f5d1 | 664 | if (m == 1) |
ce1c0b08 | 665 | m = LDDCKR_MOSEL; |
cfb4f5d1 | 666 | tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0); |
cfb4f5d1 MD |
667 | } |
668 | ||
669 | lcdc_write(priv, _LDDCKR, tmp); | |
cfb4f5d1 MD |
670 | lcdc_write(priv, _LDDCKSTPR, 0); |
671 | lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0); | |
672 | ||
9a217e34 | 673 | /* Setup geometry, format, frame buffer memory and operation mode. */ |
cfb4f5d1 MD |
674 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { |
675 | ch = &priv->ch[k]; | |
cfb4f5d1 MD |
676 | if (!ch->enabled) |
677 | continue; | |
678 | ||
6011bdea | 679 | sh_mobile_lcdc_geometry(ch); |
cfb4f5d1 | 680 | |
edd153a3 LP |
681 | switch (sh_mobile_format_fourcc(&ch->info->var)) { |
682 | case V4L2_PIX_FMT_RGB565: | |
683 | tmp = LDDFR_PKF_RGB16; | |
684 | break; | |
685 | case V4L2_PIX_FMT_BGR24: | |
686 | tmp = LDDFR_PKF_RGB24; | |
687 | break; | |
688 | case V4L2_PIX_FMT_BGR32: | |
689 | tmp = LDDFR_PKF_ARGB32; | |
690 | break; | |
691 | case V4L2_PIX_FMT_NV12: | |
692 | case V4L2_PIX_FMT_NV21: | |
693 | tmp = LDDFR_CC | LDDFR_YF_420; | |
694 | break; | |
695 | case V4L2_PIX_FMT_NV16: | |
696 | case V4L2_PIX_FMT_NV61: | |
697 | tmp = LDDFR_CC | LDDFR_YF_422; | |
698 | break; | |
699 | case V4L2_PIX_FMT_NV24: | |
700 | case V4L2_PIX_FMT_NV42: | |
701 | tmp = LDDFR_CC | LDDFR_YF_444; | |
702 | break; | |
703 | } | |
704 | ||
705 | if (sh_mobile_format_is_yuv(&ch->info->var)) { | |
706 | switch (ch->info->var.colorspace) { | |
707 | case V4L2_COLORSPACE_REC709: | |
708 | tmp |= LDDFR_CF1; | |
53b50314 | 709 | break; |
edd153a3 LP |
710 | case V4L2_COLORSPACE_JPEG: |
711 | tmp |= LDDFR_CF0; | |
53b50314 DHG |
712 | break; |
713 | } | |
417d4827 | 714 | } |
7caa4342 | 715 | |
9a217e34 LP |
716 | lcdc_write_chan(ch, LDDFR, tmp); |
717 | lcdc_write_chan(ch, LDMLSR, ch->pitch); | |
718 | lcdc_write_chan(ch, LDSA1R, ch->base_addr_y); | |
edd153a3 | 719 | if (sh_mobile_format_is_yuv(&ch->info->var)) |
9a217e34 | 720 | lcdc_write_chan(ch, LDSA2R, ch->base_addr_c); |
7caa4342 | 721 | |
9a217e34 LP |
722 | /* When using deferred I/O mode, configure the LCDC for one-shot |
723 | * operation and enable the frame end interrupt. Otherwise use | |
724 | * continuous read mode. | |
725 | */ | |
726 | if (ch->ldmt1r_value & LDMT1R_IFM && | |
727 | ch->cfg.sys_bus_cfg.deferred_io_msec) { | |
728 | lcdc_write_chan(ch, LDSM1R, LDSM1R_OS); | |
729 | lcdc_write(priv, _LDINTR, LDINTR_FE); | |
730 | } else { | |
731 | lcdc_write_chan(ch, LDSM1R, 0); | |
732 | } | |
733 | } | |
7caa4342 | 734 | |
9a217e34 | 735 | /* Word and long word swap. */ |
edd153a3 LP |
736 | switch (sh_mobile_format_fourcc(&priv->ch[0].info->var)) { |
737 | case V4L2_PIX_FMT_RGB565: | |
738 | case V4L2_PIX_FMT_NV21: | |
739 | case V4L2_PIX_FMT_NV61: | |
740 | case V4L2_PIX_FMT_NV42: | |
741 | tmp = LDDDSR_LS | LDDDSR_WS; | |
742 | break; | |
743 | case V4L2_PIX_FMT_BGR24: | |
744 | case V4L2_PIX_FMT_NV12: | |
745 | case V4L2_PIX_FMT_NV16: | |
746 | case V4L2_PIX_FMT_NV24: | |
9a217e34 | 747 | tmp = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS; |
edd153a3 LP |
748 | break; |
749 | case V4L2_PIX_FMT_BGR32: | |
750 | default: | |
751 | tmp = LDDDSR_LS; | |
752 | break; | |
9a217e34 LP |
753 | } |
754 | lcdc_write(priv, _LDDDSR, tmp); | |
7caa4342 | 755 | |
9a217e34 LP |
756 | /* Enable the display output. */ |
757 | lcdc_write(priv, _LDCNT1R, LDCNT1R_DE); | |
758 | sh_mobile_lcdc_start_stop(priv, 1); | |
759 | priv->started = 1; | |
760 | } | |
cfb4f5d1 | 761 | |
9a217e34 LP |
762 | static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv) |
763 | { | |
764 | struct sh_mobile_meram_info *mdev = priv->meram_dev; | |
9a217e34 LP |
765 | struct sh_mobile_lcdc_chan *ch; |
766 | unsigned long tmp; | |
767 | int ret; | |
768 | int k; | |
cfb4f5d1 | 769 | |
9a217e34 LP |
770 | /* enable clocks before accessing the hardware */ |
771 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { | |
772 | if (priv->ch[k].enabled) | |
773 | sh_mobile_lcdc_clk_on(priv); | |
774 | } | |
8564557a | 775 | |
9a217e34 LP |
776 | /* reset */ |
777 | lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LDCNT2R_BR); | |
778 | lcdc_wait_bit(priv, _LDCNT2R, LDCNT2R_BR, 0); | |
8564557a | 779 | |
9a217e34 | 780 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { |
afaad83b | 781 | struct sh_mobile_lcdc_panel_cfg *panel; |
8564557a | 782 | |
37c5dcc2 | 783 | ch = &priv->ch[k]; |
9a217e34 LP |
784 | if (!ch->enabled) |
785 | continue; | |
786 | ||
afaad83b LP |
787 | panel = &ch->cfg.panel_cfg; |
788 | if (panel->setup_sys) { | |
789 | ret = panel->setup_sys(ch, &sh_mobile_lcdc_sys_bus_ops); | |
9a217e34 LP |
790 | if (ret) |
791 | return ret; | |
8564557a | 792 | } |
cfb4f5d1 MD |
793 | } |
794 | ||
9a217e34 LP |
795 | /* Compute frame buffer base address and pitch for each channel. */ |
796 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { | |
797 | struct sh_mobile_meram_cfg *cfg; | |
798 | int pixelformat; | |
cfb4f5d1 | 799 | |
9a217e34 LP |
800 | ch = &priv->ch[k]; |
801 | if (!ch->enabled) | |
802 | continue; | |
cfb4f5d1 | 803 | |
9a217e34 LP |
804 | ch->base_addr_y = ch->info->fix.smem_start; |
805 | ch->base_addr_c = ch->base_addr_y | |
806 | + ch->info->var.xres | |
807 | * ch->info->var.yres_virtual; | |
808 | ch->pitch = ch->info->fix.line_length; | |
809 | ||
810 | /* Enable MERAM if possible. */ | |
811 | cfg = ch->cfg.meram_cfg; | |
812 | if (mdev == NULL || mdev->ops == NULL || cfg == NULL) | |
813 | continue; | |
814 | ||
815 | /* we need to de-init configured ICBs before we can | |
816 | * re-initialize them. | |
817 | */ | |
818 | if (ch->meram_enabled) { | |
819 | mdev->ops->meram_unregister(mdev, cfg); | |
820 | ch->meram_enabled = 0; | |
821 | } | |
822 | ||
edd153a3 LP |
823 | switch (sh_mobile_format_fourcc(&ch->info->var)) { |
824 | case V4L2_PIX_FMT_NV12: | |
825 | case V4L2_PIX_FMT_NV21: | |
826 | case V4L2_PIX_FMT_NV16: | |
827 | case V4L2_PIX_FMT_NV61: | |
9a217e34 | 828 | pixelformat = SH_MOBILE_MERAM_PF_NV; |
edd153a3 LP |
829 | break; |
830 | case V4L2_PIX_FMT_NV24: | |
831 | case V4L2_PIX_FMT_NV42: | |
832 | pixelformat = SH_MOBILE_MERAM_PF_NV24; | |
833 | break; | |
834 | case V4L2_PIX_FMT_RGB565: | |
835 | case V4L2_PIX_FMT_BGR24: | |
836 | case V4L2_PIX_FMT_BGR32: | |
837 | default: | |
838 | pixelformat = SH_MOBILE_MERAM_PF_RGB; | |
839 | break; | |
840 | } | |
9a217e34 LP |
841 | |
842 | ret = mdev->ops->meram_register(mdev, cfg, ch->pitch, | |
843 | ch->info->var.yres, pixelformat, | |
844 | ch->base_addr_y, ch->base_addr_c, | |
845 | &ch->base_addr_y, &ch->base_addr_c, | |
846 | &ch->pitch); | |
847 | if (!ret) | |
848 | ch->meram_enabled = 1; | |
849 | } | |
850 | ||
851 | /* Start the LCDC. */ | |
852 | __sh_mobile_lcdc_start(priv); | |
853 | ||
854 | /* Setup deferred I/O, tell the board code to enable the panels, and | |
855 | * turn backlight on. | |
856 | */ | |
cfb4f5d1 MD |
857 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { |
858 | ch = &priv->ch[k]; | |
21bc1f02 MD |
859 | if (!ch->enabled) |
860 | continue; | |
861 | ||
9a217e34 LP |
862 | tmp = ch->cfg.sys_bus_cfg.deferred_io_msec; |
863 | if (ch->ldmt1r_value & LDMT1R_IFM && tmp) { | |
864 | ch->defio.deferred_io = sh_mobile_lcdc_deferred_io; | |
865 | ch->defio.delay = msecs_to_jiffies(tmp); | |
866 | ch->info->fbdefio = &ch->defio; | |
867 | fb_deferred_io_init(ch->info); | |
868 | } | |
869 | ||
37c5dcc2 | 870 | sh_mobile_lcdc_display_on(ch); |
3b0fd9d7 AC |
871 | |
872 | if (ch->bl) { | |
873 | ch->bl->props.power = FB_BLANK_UNBLANK; | |
874 | backlight_update_status(ch->bl); | |
875 | } | |
cfb4f5d1 MD |
876 | } |
877 | ||
878 | return 0; | |
879 | } | |
880 | ||
881 | static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv) | |
882 | { | |
883 | struct sh_mobile_lcdc_chan *ch; | |
cfb4f5d1 MD |
884 | int k; |
885 | ||
2feb075a | 886 | /* clean up deferred io and ask board code to disable panel */ |
cfb4f5d1 MD |
887 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { |
888 | ch = &priv->ch[k]; | |
21bc1f02 MD |
889 | if (!ch->enabled) |
890 | continue; | |
8564557a | 891 | |
2feb075a MD |
892 | /* deferred io mode: |
893 | * flush frame, and wait for frame end interrupt | |
894 | * clean up deferred io and enable clock | |
895 | */ | |
5ef6b505 | 896 | if (ch->info && ch->info->fbdefio) { |
2feb075a | 897 | ch->frame_end = 0; |
e33afddc | 898 | schedule_delayed_work(&ch->info->deferred_work, 0); |
2feb075a | 899 | wait_event(ch->frame_end_wait, ch->frame_end); |
e33afddc PM |
900 | fb_deferred_io_cleanup(ch->info); |
901 | ch->info->fbdefio = NULL; | |
2feb075a | 902 | sh_mobile_lcdc_clk_on(priv); |
8564557a | 903 | } |
2feb075a | 904 | |
3b0fd9d7 AC |
905 | if (ch->bl) { |
906 | ch->bl->props.power = FB_BLANK_POWERDOWN; | |
907 | backlight_update_status(ch->bl); | |
908 | } | |
909 | ||
37c5dcc2 | 910 | sh_mobile_lcdc_display_off(ch); |
7caa4342 DHG |
911 | |
912 | /* disable the meram */ | |
913 | if (ch->meram_enabled) { | |
914 | struct sh_mobile_meram_cfg *cfg; | |
915 | struct sh_mobile_meram_info *mdev; | |
916 | cfg = ch->cfg.meram_cfg; | |
917 | mdev = priv->meram_dev; | |
918 | mdev->ops->meram_unregister(mdev, cfg); | |
919 | ch->meram_enabled = 0; | |
920 | } | |
921 | ||
cfb4f5d1 MD |
922 | } |
923 | ||
924 | /* stop the lcdc */ | |
8e9bb19e MD |
925 | if (priv->started) { |
926 | sh_mobile_lcdc_start_stop(priv, 0); | |
927 | priv->started = 0; | |
928 | } | |
b51339ff | 929 | |
8564557a MD |
930 | /* stop clocks */ |
931 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) | |
932 | if (priv->ch[k].enabled) | |
933 | sh_mobile_lcdc_clk_off(priv); | |
cfb4f5d1 MD |
934 | } |
935 | ||
f1f60b5f LP |
936 | /* ----------------------------------------------------------------------------- |
937 | * Frame buffer operations | |
938 | */ | |
cfb4f5d1 MD |
939 | |
940 | static int sh_mobile_lcdc_setcolreg(u_int regno, | |
941 | u_int red, u_int green, u_int blue, | |
942 | u_int transp, struct fb_info *info) | |
943 | { | |
944 | u32 *palette = info->pseudo_palette; | |
945 | ||
946 | if (regno >= PALETTE_NR) | |
947 | return -EINVAL; | |
948 | ||
949 | /* only FB_VISUAL_TRUECOLOR supported */ | |
950 | ||
951 | red >>= 16 - info->var.red.length; | |
952 | green >>= 16 - info->var.green.length; | |
953 | blue >>= 16 - info->var.blue.length; | |
954 | transp >>= 16 - info->var.transp.length; | |
955 | ||
956 | palette[regno] = (red << info->var.red.offset) | | |
957 | (green << info->var.green.offset) | | |
958 | (blue << info->var.blue.offset) | | |
959 | (transp << info->var.transp.offset); | |
960 | ||
961 | return 0; | |
962 | } | |
963 | ||
964 | static struct fb_fix_screeninfo sh_mobile_lcdc_fix = { | |
965 | .id = "SH Mobile LCDC", | |
966 | .type = FB_TYPE_PACKED_PIXELS, | |
967 | .visual = FB_VISUAL_TRUECOLOR, | |
968 | .accel = FB_ACCEL_NONE, | |
9dd38819 PE |
969 | .xpanstep = 0, |
970 | .ypanstep = 1, | |
971 | .ywrapstep = 0, | |
edd153a3 | 972 | .capabilities = FB_CAP_FOURCC, |
cfb4f5d1 MD |
973 | }; |
974 | ||
8564557a MD |
975 | static void sh_mobile_lcdc_fillrect(struct fb_info *info, |
976 | const struct fb_fillrect *rect) | |
977 | { | |
978 | sys_fillrect(info, rect); | |
979 | sh_mobile_lcdc_deferred_io_touch(info); | |
980 | } | |
981 | ||
982 | static void sh_mobile_lcdc_copyarea(struct fb_info *info, | |
983 | const struct fb_copyarea *area) | |
984 | { | |
985 | sys_copyarea(info, area); | |
986 | sh_mobile_lcdc_deferred_io_touch(info); | |
987 | } | |
988 | ||
989 | static void sh_mobile_lcdc_imageblit(struct fb_info *info, | |
990 | const struct fb_image *image) | |
991 | { | |
992 | sys_imageblit(info, image); | |
993 | sh_mobile_lcdc_deferred_io_touch(info); | |
994 | } | |
995 | ||
9dd38819 PE |
996 | static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var, |
997 | struct fb_info *info) | |
998 | { | |
999 | struct sh_mobile_lcdc_chan *ch = info->par; | |
92e1f9a7 PE |
1000 | struct sh_mobile_lcdc_priv *priv = ch->lcdc; |
1001 | unsigned long ldrcntr; | |
1002 | unsigned long new_pan_offset; | |
53b50314 DHG |
1003 | unsigned long base_addr_y, base_addr_c; |
1004 | unsigned long c_offset; | |
edd153a3 | 1005 | bool yuv = sh_mobile_format_is_yuv(&info->var); |
92e1f9a7 | 1006 | |
edd153a3 | 1007 | if (!yuv) |
dc1d5ada LP |
1008 | new_pan_offset = var->yoffset * info->fix.line_length |
1009 | + var->xoffset * (info->var.bits_per_pixel / 8); | |
53b50314 | 1010 | else |
dc1d5ada LP |
1011 | new_pan_offset = var->yoffset * info->fix.line_length |
1012 | + var->xoffset; | |
9dd38819 | 1013 | |
92e1f9a7 | 1014 | if (new_pan_offset == ch->pan_offset) |
9dd38819 PE |
1015 | return 0; /* No change, do nothing */ |
1016 | ||
92e1f9a7 | 1017 | ldrcntr = lcdc_read(priv, _LDRCNTR); |
9dd38819 | 1018 | |
92e1f9a7 | 1019 | /* Set the source address for the next refresh */ |
53b50314 | 1020 | base_addr_y = ch->dma_handle + new_pan_offset; |
edd153a3 | 1021 | if (yuv) { |
53b50314 | 1022 | /* Set y offset */ |
dc1d5ada LP |
1023 | c_offset = var->yoffset * info->fix.line_length |
1024 | * (info->var.bits_per_pixel - 8) / 8; | |
1025 | base_addr_c = ch->dma_handle | |
1026 | + info->var.xres * info->var.yres_virtual | |
1027 | + c_offset; | |
53b50314 | 1028 | /* Set x offset */ |
edd153a3 | 1029 | if (sh_mobile_format_fourcc(&info->var) == V4L2_PIX_FMT_NV24) |
53b50314 DHG |
1030 | base_addr_c += 2 * var->xoffset; |
1031 | else | |
1032 | base_addr_c += var->xoffset; | |
49d79ba2 | 1033 | } |
53b50314 | 1034 | |
49d79ba2 | 1035 | if (ch->meram_enabled) { |
7caa4342 DHG |
1036 | struct sh_mobile_meram_cfg *cfg; |
1037 | struct sh_mobile_meram_info *mdev; | |
7caa4342 DHG |
1038 | int ret; |
1039 | ||
1040 | cfg = ch->cfg.meram_cfg; | |
1041 | mdev = priv->meram_dev; | |
1042 | ret = mdev->ops->meram_update(mdev, cfg, | |
1043 | base_addr_y, base_addr_c, | |
49d79ba2 | 1044 | &base_addr_y, &base_addr_c); |
7caa4342 DHG |
1045 | if (ret) |
1046 | return ret; | |
49d79ba2 | 1047 | } |
7caa4342 | 1048 | |
49d79ba2 LP |
1049 | ch->base_addr_y = base_addr_y; |
1050 | ch->base_addr_c = base_addr_c; | |
7caa4342 | 1051 | |
49d79ba2 | 1052 | lcdc_write_chan_mirror(ch, LDSA1R, base_addr_y); |
edd153a3 | 1053 | if (yuv) |
49d79ba2 | 1054 | lcdc_write_chan_mirror(ch, LDSA2R, base_addr_c); |
53b50314 | 1055 | |
92e1f9a7 PE |
1056 | if (lcdc_chan_is_sublcd(ch)) |
1057 | lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS); | |
1058 | else | |
1059 | lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS); | |
1060 | ||
1061 | ch->pan_offset = new_pan_offset; | |
1062 | ||
1063 | sh_mobile_lcdc_deferred_io_touch(info); | |
9dd38819 PE |
1064 | |
1065 | return 0; | |
1066 | } | |
1067 | ||
40331b21 PE |
1068 | static int sh_mobile_wait_for_vsync(struct fb_info *info) |
1069 | { | |
1070 | struct sh_mobile_lcdc_chan *ch = info->par; | |
1071 | unsigned long ldintr; | |
1072 | int ret; | |
1073 | ||
dc48665f LP |
1074 | /* Enable VSync End interrupt and be careful not to acknowledge any |
1075 | * pending interrupt. | |
1076 | */ | |
40331b21 | 1077 | ldintr = lcdc_read(ch->lcdc, _LDINTR); |
dc48665f | 1078 | ldintr |= LDINTR_VEE | LDINTR_STATUS_MASK; |
40331b21 PE |
1079 | lcdc_write(ch->lcdc, _LDINTR, ldintr); |
1080 | ||
1081 | ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion, | |
1082 | msecs_to_jiffies(100)); | |
1083 | if (!ret) | |
1084 | return -ETIMEDOUT; | |
1085 | ||
1086 | return 0; | |
1087 | } | |
1088 | ||
1089 | static int sh_mobile_ioctl(struct fb_info *info, unsigned int cmd, | |
1090 | unsigned long arg) | |
1091 | { | |
1092 | int retval; | |
1093 | ||
1094 | switch (cmd) { | |
1095 | case FBIO_WAITFORVSYNC: | |
1096 | retval = sh_mobile_wait_for_vsync(info); | |
1097 | break; | |
1098 | ||
1099 | default: | |
1100 | retval = -ENOIOCTLCMD; | |
1101 | break; | |
1102 | } | |
1103 | return retval; | |
1104 | } | |
1105 | ||
dd210503 GL |
1106 | static void sh_mobile_fb_reconfig(struct fb_info *info) |
1107 | { | |
1108 | struct sh_mobile_lcdc_chan *ch = info->par; | |
1109 | struct fb_videomode mode1, mode2; | |
1110 | struct fb_event event; | |
1111 | int evnt = FB_EVENT_MODE_CHANGE_ALL; | |
1112 | ||
1113 | if (ch->use_count > 1 || (ch->use_count == 1 && !info->fbcon_par)) | |
1114 | /* More framebuffer users are active */ | |
1115 | return; | |
1116 | ||
1117 | fb_var_to_videomode(&mode1, &ch->display_var); | |
1118 | fb_var_to_videomode(&mode2, &info->var); | |
1119 | ||
1120 | if (fb_mode_is_equal(&mode1, &mode2)) | |
1121 | return; | |
1122 | ||
1123 | /* Display has been re-plugged, framebuffer is free now, reconfigure */ | |
1124 | if (fb_set_var(info, &ch->display_var) < 0) | |
1125 | /* Couldn't reconfigure, hopefully, can continue as before */ | |
1126 | return; | |
1127 | ||
dd210503 GL |
1128 | /* |
1129 | * fb_set_var() calls the notifier change internally, only if | |
1130 | * FBINFO_MISC_USEREVENT flag is set. Since we do not want to fake a | |
1131 | * user event, we have to call the chain ourselves. | |
1132 | */ | |
1133 | event.info = info; | |
cc267ec5 | 1134 | event.data = &mode1; |
dd210503 GL |
1135 | fb_notifier_call_chain(evnt, &event); |
1136 | } | |
1137 | ||
1138 | /* | |
1139 | * Locking: both .fb_release() and .fb_open() are called with info->lock held if | |
1140 | * user == 1, or with console sem held, if user == 0. | |
1141 | */ | |
1142 | static int sh_mobile_release(struct fb_info *info, int user) | |
1143 | { | |
1144 | struct sh_mobile_lcdc_chan *ch = info->par; | |
1145 | ||
1146 | mutex_lock(&ch->open_lock); | |
1147 | dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count); | |
1148 | ||
1149 | ch->use_count--; | |
1150 | ||
1151 | /* Nothing to reconfigure, when called from fbcon */ | |
1152 | if (user) { | |
ac751efa | 1153 | console_lock(); |
dd210503 | 1154 | sh_mobile_fb_reconfig(info); |
ac751efa | 1155 | console_unlock(); |
dd210503 GL |
1156 | } |
1157 | ||
1158 | mutex_unlock(&ch->open_lock); | |
1159 | ||
1160 | return 0; | |
1161 | } | |
1162 | ||
1163 | static int sh_mobile_open(struct fb_info *info, int user) | |
1164 | { | |
1165 | struct sh_mobile_lcdc_chan *ch = info->par; | |
1166 | ||
1167 | mutex_lock(&ch->open_lock); | |
1168 | ch->use_count++; | |
1169 | ||
1170 | dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count); | |
1171 | mutex_unlock(&ch->open_lock); | |
1172 | ||
1173 | return 0; | |
1174 | } | |
1175 | ||
1176 | static int sh_mobile_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | |
1177 | { | |
1178 | struct sh_mobile_lcdc_chan *ch = info->par; | |
417d4827 | 1179 | struct sh_mobile_lcdc_priv *p = ch->lcdc; |
03862194 LP |
1180 | unsigned int best_dist = (unsigned int)-1; |
1181 | unsigned int best_xres = 0; | |
1182 | unsigned int best_yres = 0; | |
1183 | unsigned int i; | |
dd210503 | 1184 | |
03862194 | 1185 | if (var->xres > MAX_XRES || var->yres > MAX_YRES) |
dd210503 | 1186 | return -EINVAL; |
03862194 LP |
1187 | |
1188 | /* If board code provides us with a list of available modes, make sure | |
1189 | * we use one of them. Find the mode closest to the requested one. The | |
1190 | * distance between two modes is defined as the size of the | |
1191 | * non-overlapping parts of the two rectangles. | |
1192 | */ | |
1193 | for (i = 0; i < ch->cfg.num_cfg; ++i) { | |
1194 | const struct fb_videomode *mode = &ch->cfg.lcd_cfg[i]; | |
1195 | unsigned int dist; | |
1196 | ||
1197 | /* We can only round up. */ | |
1198 | if (var->xres > mode->xres || var->yres > mode->yres) | |
1199 | continue; | |
1200 | ||
1201 | dist = var->xres * var->yres + mode->xres * mode->yres | |
1202 | - 2 * min(var->xres, mode->xres) | |
1203 | * min(var->yres, mode->yres); | |
1204 | ||
1205 | if (dist < best_dist) { | |
1206 | best_xres = mode->xres; | |
1207 | best_yres = mode->yres; | |
1208 | best_dist = dist; | |
1209 | } | |
dd210503 | 1210 | } |
417d4827 | 1211 | |
03862194 LP |
1212 | /* If no available mode can be used, return an error. */ |
1213 | if (ch->cfg.num_cfg != 0) { | |
1214 | if (best_dist == (unsigned int)-1) | |
1215 | return -EINVAL; | |
1216 | ||
1217 | var->xres = best_xres; | |
1218 | var->yres = best_yres; | |
1219 | } | |
1220 | ||
1221 | /* Make sure the virtual resolution is at least as big as the visible | |
1222 | * resolution. | |
1223 | */ | |
1224 | if (var->xres_virtual < var->xres) | |
1225 | var->xres_virtual = var->xres; | |
1226 | if (var->yres_virtual < var->yres) | |
1227 | var->yres_virtual = var->yres; | |
1228 | ||
edd153a3 LP |
1229 | if (sh_mobile_format_is_fourcc(var)) { |
1230 | switch (var->grayscale) { | |
1231 | case V4L2_PIX_FMT_NV12: | |
1232 | case V4L2_PIX_FMT_NV21: | |
1233 | var->bits_per_pixel = 12; | |
1234 | break; | |
1235 | case V4L2_PIX_FMT_RGB565: | |
1236 | case V4L2_PIX_FMT_NV16: | |
1237 | case V4L2_PIX_FMT_NV61: | |
1238 | var->bits_per_pixel = 16; | |
1239 | break; | |
1240 | case V4L2_PIX_FMT_BGR24: | |
1241 | case V4L2_PIX_FMT_NV24: | |
1242 | case V4L2_PIX_FMT_NV42: | |
1243 | var->bits_per_pixel = 24; | |
1244 | break; | |
1245 | case V4L2_PIX_FMT_BGR32: | |
1246 | var->bits_per_pixel = 32; | |
1247 | break; | |
1248 | default: | |
1249 | return -EINVAL; | |
1250 | } | |
1251 | ||
1252 | /* Default to RGB and JPEG color-spaces for RGB and YUV formats | |
1253 | * respectively. | |
1254 | */ | |
1255 | if (!sh_mobile_format_is_yuv(var)) | |
1256 | var->colorspace = V4L2_COLORSPACE_SRGB; | |
1257 | else if (var->colorspace != V4L2_COLORSPACE_REC709) | |
1258 | var->colorspace = V4L2_COLORSPACE_JPEG; | |
1259 | } else { | |
1260 | if (var->bits_per_pixel <= 16) { /* RGB 565 */ | |
1261 | var->bits_per_pixel = 16; | |
1262 | var->red.offset = 11; | |
1263 | var->red.length = 5; | |
1264 | var->green.offset = 5; | |
1265 | var->green.length = 6; | |
1266 | var->blue.offset = 0; | |
1267 | var->blue.length = 5; | |
1268 | var->transp.offset = 0; | |
1269 | var->transp.length = 0; | |
1270 | } else if (var->bits_per_pixel <= 24) { /* RGB 888 */ | |
1271 | var->bits_per_pixel = 24; | |
1272 | var->red.offset = 16; | |
1273 | var->red.length = 8; | |
1274 | var->green.offset = 8; | |
1275 | var->green.length = 8; | |
1276 | var->blue.offset = 0; | |
1277 | var->blue.length = 8; | |
1278 | var->transp.offset = 0; | |
1279 | var->transp.length = 0; | |
1280 | } else if (var->bits_per_pixel <= 32) { /* RGBA 888 */ | |
1281 | var->bits_per_pixel = 32; | |
1282 | var->red.offset = 16; | |
1283 | var->red.length = 8; | |
1284 | var->green.offset = 8; | |
1285 | var->green.length = 8; | |
1286 | var->blue.offset = 0; | |
1287 | var->blue.length = 8; | |
1288 | var->transp.offset = 24; | |
1289 | var->transp.length = 8; | |
1290 | } else | |
1291 | return -EINVAL; | |
417d4827 | 1292 | |
edd153a3 LP |
1293 | var->red.msb_right = 0; |
1294 | var->green.msb_right = 0; | |
1295 | var->blue.msb_right = 0; | |
1296 | var->transp.msb_right = 0; | |
1297 | } | |
03862194 LP |
1298 | |
1299 | /* Make sure we don't exceed our allocated memory. */ | |
1300 | if (var->xres_virtual * var->yres_virtual * var->bits_per_pixel / 8 > | |
1301 | info->fix.smem_len) | |
1302 | return -EINVAL; | |
1303 | ||
edd153a3 LP |
1304 | /* only accept the forced_fourcc for dual channel configurations */ |
1305 | if (p->forced_fourcc && | |
1306 | p->forced_fourcc != sh_mobile_format_fourcc(var)) | |
417d4827 | 1307 | return -EINVAL; |
417d4827 | 1308 | |
dd210503 GL |
1309 | return 0; |
1310 | } | |
40331b21 | 1311 | |
ed5bebf2 LP |
1312 | static int sh_mobile_set_par(struct fb_info *info) |
1313 | { | |
1314 | struct sh_mobile_lcdc_chan *ch = info->par; | |
91fba48d | 1315 | u32 line_length = info->fix.line_length; |
ed5bebf2 LP |
1316 | int ret; |
1317 | ||
1318 | sh_mobile_lcdc_stop(ch->lcdc); | |
91fba48d | 1319 | |
edd153a3 | 1320 | if (sh_mobile_format_is_yuv(&info->var)) |
91fba48d LP |
1321 | info->fix.line_length = info->var.xres; |
1322 | else | |
1323 | info->fix.line_length = info->var.xres | |
1324 | * info->var.bits_per_pixel / 8; | |
1325 | ||
ed5bebf2 | 1326 | ret = sh_mobile_lcdc_start(ch->lcdc); |
91fba48d | 1327 | if (ret < 0) { |
ed5bebf2 | 1328 | dev_err(info->dev, "%s: unable to restart LCDC\n", __func__); |
91fba48d LP |
1329 | info->fix.line_length = line_length; |
1330 | } | |
ed5bebf2 | 1331 | |
edd153a3 LP |
1332 | if (sh_mobile_format_is_fourcc(&info->var)) { |
1333 | info->fix.type = FB_TYPE_FOURCC; | |
1334 | info->fix.visual = FB_VISUAL_FOURCC; | |
1335 | } else { | |
1336 | info->fix.type = FB_TYPE_PACKED_PIXELS; | |
1337 | info->fix.visual = FB_VISUAL_TRUECOLOR; | |
1338 | } | |
1339 | ||
ed5bebf2 LP |
1340 | return ret; |
1341 | } | |
1342 | ||
8857b9aa AC |
1343 | /* |
1344 | * Screen blanking. Behavior is as follows: | |
1345 | * FB_BLANK_UNBLANK: screen unblanked, clocks enabled | |
1346 | * FB_BLANK_NORMAL: screen blanked, clocks enabled | |
1347 | * FB_BLANK_VSYNC, | |
1348 | * FB_BLANK_HSYNC, | |
1349 | * FB_BLANK_POWEROFF: screen blanked, clocks disabled | |
1350 | */ | |
1351 | static int sh_mobile_lcdc_blank(int blank, struct fb_info *info) | |
1352 | { | |
1353 | struct sh_mobile_lcdc_chan *ch = info->par; | |
1354 | struct sh_mobile_lcdc_priv *p = ch->lcdc; | |
1355 | ||
1356 | /* blank the screen? */ | |
1357 | if (blank > FB_BLANK_UNBLANK && ch->blank_status == FB_BLANK_UNBLANK) { | |
1358 | struct fb_fillrect rect = { | |
1359 | .width = info->var.xres, | |
1360 | .height = info->var.yres, | |
1361 | }; | |
1362 | sh_mobile_lcdc_fillrect(info, &rect); | |
1363 | } | |
1364 | /* turn clocks on? */ | |
1365 | if (blank <= FB_BLANK_NORMAL && ch->blank_status > FB_BLANK_NORMAL) { | |
1366 | sh_mobile_lcdc_clk_on(p); | |
1367 | } | |
1368 | /* turn clocks off? */ | |
1369 | if (blank > FB_BLANK_NORMAL && ch->blank_status <= FB_BLANK_NORMAL) { | |
1370 | /* make sure the screen is updated with the black fill before | |
1371 | * switching the clocks off. one vsync is not enough since | |
1372 | * blanking may occur in the middle of a refresh. deferred io | |
1373 | * mode will reenable the clocks and update the screen in time, | |
1374 | * so it does not need this. */ | |
1375 | if (!info->fbdefio) { | |
1376 | sh_mobile_wait_for_vsync(info); | |
1377 | sh_mobile_wait_for_vsync(info); | |
1378 | } | |
1379 | sh_mobile_lcdc_clk_off(p); | |
1380 | } | |
1381 | ||
1382 | ch->blank_status = blank; | |
1383 | return 0; | |
1384 | } | |
1385 | ||
cfb4f5d1 | 1386 | static struct fb_ops sh_mobile_lcdc_ops = { |
9dd38819 | 1387 | .owner = THIS_MODULE, |
cfb4f5d1 | 1388 | .fb_setcolreg = sh_mobile_lcdc_setcolreg, |
2540c111 MD |
1389 | .fb_read = fb_sys_read, |
1390 | .fb_write = fb_sys_write, | |
8564557a MD |
1391 | .fb_fillrect = sh_mobile_lcdc_fillrect, |
1392 | .fb_copyarea = sh_mobile_lcdc_copyarea, | |
1393 | .fb_imageblit = sh_mobile_lcdc_imageblit, | |
8857b9aa | 1394 | .fb_blank = sh_mobile_lcdc_blank, |
9dd38819 | 1395 | .fb_pan_display = sh_mobile_fb_pan_display, |
40331b21 | 1396 | .fb_ioctl = sh_mobile_ioctl, |
dd210503 GL |
1397 | .fb_open = sh_mobile_open, |
1398 | .fb_release = sh_mobile_release, | |
1399 | .fb_check_var = sh_mobile_check_var, | |
ed5bebf2 | 1400 | .fb_set_par = sh_mobile_set_par, |
cfb4f5d1 MD |
1401 | }; |
1402 | ||
f1f60b5f LP |
1403 | /* ----------------------------------------------------------------------------- |
1404 | * Backlight | |
1405 | */ | |
1406 | ||
3b0fd9d7 AC |
1407 | static int sh_mobile_lcdc_update_bl(struct backlight_device *bdev) |
1408 | { | |
1409 | struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev); | |
3b0fd9d7 AC |
1410 | int brightness = bdev->props.brightness; |
1411 | ||
1412 | if (bdev->props.power != FB_BLANK_UNBLANK || | |
1413 | bdev->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK)) | |
1414 | brightness = 0; | |
1415 | ||
43059b0f | 1416 | return ch->cfg.bl_info.set_brightness(brightness); |
3b0fd9d7 AC |
1417 | } |
1418 | ||
1419 | static int sh_mobile_lcdc_get_brightness(struct backlight_device *bdev) | |
1420 | { | |
1421 | struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev); | |
3b0fd9d7 | 1422 | |
43059b0f | 1423 | return ch->cfg.bl_info.get_brightness(); |
3b0fd9d7 AC |
1424 | } |
1425 | ||
1426 | static int sh_mobile_lcdc_check_fb(struct backlight_device *bdev, | |
1427 | struct fb_info *info) | |
1428 | { | |
1429 | return (info->bl_dev == bdev); | |
1430 | } | |
1431 | ||
1432 | static struct backlight_ops sh_mobile_lcdc_bl_ops = { | |
1433 | .options = BL_CORE_SUSPENDRESUME, | |
1434 | .update_status = sh_mobile_lcdc_update_bl, | |
1435 | .get_brightness = sh_mobile_lcdc_get_brightness, | |
1436 | .check_fb = sh_mobile_lcdc_check_fb, | |
1437 | }; | |
1438 | ||
1439 | static struct backlight_device *sh_mobile_lcdc_bl_probe(struct device *parent, | |
1440 | struct sh_mobile_lcdc_chan *ch) | |
1441 | { | |
1442 | struct backlight_device *bl; | |
1443 | ||
1444 | bl = backlight_device_register(ch->cfg.bl_info.name, parent, ch, | |
1445 | &sh_mobile_lcdc_bl_ops, NULL); | |
beee1f20 DC |
1446 | if (IS_ERR(bl)) { |
1447 | dev_err(parent, "unable to register backlight device: %ld\n", | |
1448 | PTR_ERR(bl)); | |
3b0fd9d7 AC |
1449 | return NULL; |
1450 | } | |
1451 | ||
1452 | bl->props.max_brightness = ch->cfg.bl_info.max_brightness; | |
1453 | bl->props.brightness = bl->props.max_brightness; | |
1454 | backlight_update_status(bl); | |
1455 | ||
1456 | return bl; | |
1457 | } | |
1458 | ||
1459 | static void sh_mobile_lcdc_bl_remove(struct backlight_device *bdev) | |
1460 | { | |
1461 | backlight_device_unregister(bdev); | |
1462 | } | |
1463 | ||
f1f60b5f LP |
1464 | /* ----------------------------------------------------------------------------- |
1465 | * Power management | |
1466 | */ | |
1467 | ||
2feb075a MD |
1468 | static int sh_mobile_lcdc_suspend(struct device *dev) |
1469 | { | |
1470 | struct platform_device *pdev = to_platform_device(dev); | |
1471 | ||
1472 | sh_mobile_lcdc_stop(platform_get_drvdata(pdev)); | |
1473 | return 0; | |
1474 | } | |
1475 | ||
1476 | static int sh_mobile_lcdc_resume(struct device *dev) | |
1477 | { | |
1478 | struct platform_device *pdev = to_platform_device(dev); | |
1479 | ||
1480 | return sh_mobile_lcdc_start(platform_get_drvdata(pdev)); | |
1481 | } | |
1482 | ||
0246c471 MD |
1483 | static int sh_mobile_lcdc_runtime_suspend(struct device *dev) |
1484 | { | |
1485 | struct platform_device *pdev = to_platform_device(dev); | |
2427bb24 | 1486 | struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev); |
0246c471 MD |
1487 | |
1488 | /* turn off LCDC hardware */ | |
2427bb24 LP |
1489 | lcdc_write(priv, _LDCNT1R, 0); |
1490 | ||
0246c471 MD |
1491 | return 0; |
1492 | } | |
1493 | ||
1494 | static int sh_mobile_lcdc_runtime_resume(struct device *dev) | |
1495 | { | |
1496 | struct platform_device *pdev = to_platform_device(dev); | |
2427bb24 | 1497 | struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev); |
0246c471 | 1498 | |
2427bb24 | 1499 | __sh_mobile_lcdc_start(priv); |
0246c471 MD |
1500 | |
1501 | return 0; | |
1502 | } | |
1503 | ||
47145210 | 1504 | static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = { |
2feb075a MD |
1505 | .suspend = sh_mobile_lcdc_suspend, |
1506 | .resume = sh_mobile_lcdc_resume, | |
0246c471 MD |
1507 | .runtime_suspend = sh_mobile_lcdc_runtime_suspend, |
1508 | .runtime_resume = sh_mobile_lcdc_runtime_resume, | |
2feb075a MD |
1509 | }; |
1510 | ||
f1f60b5f LP |
1511 | /* ----------------------------------------------------------------------------- |
1512 | * Framebuffer notifier | |
1513 | */ | |
1514 | ||
6de9edd5 | 1515 | /* locking: called with info->lock held */ |
6011bdea GL |
1516 | static int sh_mobile_lcdc_notify(struct notifier_block *nb, |
1517 | unsigned long action, void *data) | |
1518 | { | |
1519 | struct fb_event *event = data; | |
1520 | struct fb_info *info = event->info; | |
1521 | struct sh_mobile_lcdc_chan *ch = info->par; | |
6011bdea GL |
1522 | |
1523 | if (&ch->lcdc->notifier != nb) | |
baf16374 | 1524 | return NOTIFY_DONE; |
6011bdea GL |
1525 | |
1526 | dev_dbg(info->dev, "%s(): action = %lu, data = %p\n", | |
1527 | __func__, action, event->data); | |
1528 | ||
1529 | switch(action) { | |
1530 | case FB_EVENT_SUSPEND: | |
37c5dcc2 | 1531 | sh_mobile_lcdc_display_off(ch); |
afe417c0 | 1532 | sh_mobile_lcdc_stop(ch->lcdc); |
6011bdea GL |
1533 | break; |
1534 | case FB_EVENT_RESUME: | |
dd210503 GL |
1535 | mutex_lock(&ch->open_lock); |
1536 | sh_mobile_fb_reconfig(info); | |
1537 | mutex_unlock(&ch->open_lock); | |
6011bdea | 1538 | |
37c5dcc2 | 1539 | sh_mobile_lcdc_display_on(ch); |
ebe5e12d | 1540 | sh_mobile_lcdc_start(ch->lcdc); |
6011bdea GL |
1541 | } |
1542 | ||
baf16374 | 1543 | return NOTIFY_OK; |
6011bdea GL |
1544 | } |
1545 | ||
f1f60b5f LP |
1546 | /* ----------------------------------------------------------------------------- |
1547 | * Probe/remove and driver init/exit | |
1548 | */ | |
1549 | ||
217e9c43 | 1550 | static const struct fb_videomode default_720p __devinitconst = { |
f1f60b5f LP |
1551 | .name = "HDMI 720p", |
1552 | .xres = 1280, | |
1553 | .yres = 720, | |
1554 | ||
1555 | .left_margin = 220, | |
1556 | .right_margin = 110, | |
1557 | .hsync_len = 40, | |
1558 | ||
1559 | .upper_margin = 20, | |
1560 | .lower_margin = 5, | |
1561 | .vsync_len = 5, | |
1562 | ||
1563 | .pixclock = 13468, | |
1564 | .refresh = 60, | |
1565 | .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT, | |
1566 | }; | |
1567 | ||
b4bee692 LP |
1568 | static int sh_mobile_lcdc_remove(struct platform_device *pdev) |
1569 | { | |
1570 | struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev); | |
1571 | struct fb_info *info; | |
1572 | int i; | |
1573 | ||
1574 | fb_unregister_client(&priv->notifier); | |
1575 | ||
1576 | for (i = 0; i < ARRAY_SIZE(priv->ch); i++) | |
1577 | if (priv->ch[i].info && priv->ch[i].info->dev) | |
1578 | unregister_framebuffer(priv->ch[i].info); | |
1579 | ||
1580 | sh_mobile_lcdc_stop(priv); | |
1581 | ||
1582 | for (i = 0; i < ARRAY_SIZE(priv->ch); i++) { | |
9a2985e7 | 1583 | struct sh_mobile_lcdc_chan *ch = &priv->ch[i]; |
b4bee692 | 1584 | |
9a2985e7 | 1585 | info = ch->info; |
b4bee692 LP |
1586 | if (!info || !info->device) |
1587 | continue; | |
1588 | ||
e34d0bbb LP |
1589 | if (ch->tx_dev) { |
1590 | ch->tx_dev->lcdc = NULL; | |
9a2985e7 | 1591 | module_put(ch->cfg.tx_dev->dev.driver->owner); |
e34d0bbb | 1592 | } |
9a2985e7 LP |
1593 | |
1594 | if (ch->sglist) | |
1595 | vfree(ch->sglist); | |
b4bee692 LP |
1596 | |
1597 | if (info->screen_base) | |
1598 | dma_free_coherent(&pdev->dev, info->fix.smem_len, | |
9a2985e7 | 1599 | info->screen_base, ch->dma_handle); |
b4bee692 LP |
1600 | fb_dealloc_cmap(&info->cmap); |
1601 | framebuffer_release(info); | |
1602 | } | |
1603 | ||
1604 | for (i = 0; i < ARRAY_SIZE(priv->ch); i++) { | |
1605 | if (priv->ch[i].bl) | |
1606 | sh_mobile_lcdc_bl_remove(priv->ch[i].bl); | |
1607 | } | |
1608 | ||
4774c12a LP |
1609 | if (priv->dot_clk) { |
1610 | pm_runtime_disable(&pdev->dev); | |
b4bee692 | 1611 | clk_put(priv->dot_clk); |
4774c12a | 1612 | } |
b4bee692 LP |
1613 | |
1614 | if (priv->base) | |
1615 | iounmap(priv->base); | |
1616 | ||
1617 | if (priv->irq) | |
1618 | free_irq(priv->irq, priv); | |
1619 | kfree(priv); | |
1620 | return 0; | |
1621 | } | |
cfb4f5d1 | 1622 | |
217e9c43 | 1623 | static int __devinit sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch) |
f1f60b5f LP |
1624 | { |
1625 | int interface_type = ch->cfg.interface_type; | |
1626 | ||
1627 | switch (interface_type) { | |
1628 | case RGB8: | |
1629 | case RGB9: | |
1630 | case RGB12A: | |
1631 | case RGB12B: | |
1632 | case RGB16: | |
1633 | case RGB18: | |
1634 | case RGB24: | |
1635 | case SYS8A: | |
1636 | case SYS8B: | |
1637 | case SYS8C: | |
1638 | case SYS8D: | |
1639 | case SYS9: | |
1640 | case SYS12: | |
1641 | case SYS16A: | |
1642 | case SYS16B: | |
1643 | case SYS16C: | |
1644 | case SYS18: | |
1645 | case SYS24: | |
1646 | break; | |
1647 | default: | |
1648 | return -EINVAL; | |
1649 | } | |
1650 | ||
1651 | /* SUBLCD only supports SYS interface */ | |
1652 | if (lcdc_chan_is_sublcd(ch)) { | |
1653 | if (!(interface_type & LDMT1R_IFM)) | |
1654 | return -EINVAL; | |
1655 | ||
1656 | interface_type &= ~LDMT1R_IFM; | |
1657 | } | |
1658 | ||
1659 | ch->ldmt1r_value = interface_type; | |
1660 | return 0; | |
1661 | } | |
1662 | ||
0a7f17aa LP |
1663 | static int __devinit |
1664 | sh_mobile_lcdc_channel_init(struct sh_mobile_lcdc_priv *priv, | |
1665 | struct sh_mobile_lcdc_chan *ch) | |
cfb4f5d1 | 1666 | { |
3ce05599 LP |
1667 | struct sh_mobile_lcdc_chan_cfg *cfg = &ch->cfg; |
1668 | const struct fb_videomode *max_mode; | |
1669 | const struct fb_videomode *mode; | |
1670 | struct fb_var_screeninfo *var; | |
cfb4f5d1 | 1671 | struct fb_info *info; |
3ce05599 LP |
1672 | unsigned int max_size; |
1673 | int num_cfg; | |
1674 | void *buf; | |
1675 | int ret; | |
1676 | int i; | |
1677 | ||
a67472ad | 1678 | mutex_init(&ch->open_lock); |
ecd29947 | 1679 | ch->notify = sh_mobile_lcdc_display_notify; |
a67472ad LP |
1680 | |
1681 | /* Allocate the frame buffer device. */ | |
0a7f17aa | 1682 | ch->info = framebuffer_alloc(0, priv->dev); |
3ce05599 | 1683 | if (!ch->info) { |
0a7f17aa | 1684 | dev_err(priv->dev, "unable to allocate fb_info\n"); |
3ce05599 LP |
1685 | return -ENOMEM; |
1686 | } | |
1687 | ||
1688 | info = ch->info; | |
3ce05599 LP |
1689 | info->fbops = &sh_mobile_lcdc_ops; |
1690 | info->par = ch; | |
a67472ad LP |
1691 | info->pseudo_palette = &ch->pseudo_palette; |
1692 | info->flags = FBINFO_FLAG_DEFAULT; | |
3ce05599 LP |
1693 | |
1694 | /* Iterate through the modes to validate them and find the highest | |
1695 | * resolution. | |
1696 | */ | |
1697 | max_mode = NULL; | |
1698 | max_size = 0; | |
1699 | ||
1700 | for (i = 0, mode = cfg->lcd_cfg; i < cfg->num_cfg; i++, mode++) { | |
1701 | unsigned int size = mode->yres * mode->xres; | |
1702 | ||
edd153a3 LP |
1703 | /* NV12/NV21 buffers must have even number of lines */ |
1704 | if ((cfg->fourcc == V4L2_PIX_FMT_NV12 || | |
1705 | cfg->fourcc == V4L2_PIX_FMT_NV21) && (mode->yres & 0x1)) { | |
0a7f17aa LP |
1706 | dev_err(priv->dev, "yres must be multiple of 2 for " |
1707 | "YCbCr420 mode.\n"); | |
3ce05599 LP |
1708 | return -EINVAL; |
1709 | } | |
1710 | ||
1711 | if (size > max_size) { | |
1712 | max_mode = mode; | |
1713 | max_size = size; | |
1714 | } | |
1715 | } | |
1716 | ||
1717 | if (!max_size) | |
1718 | max_size = MAX_XRES * MAX_YRES; | |
1719 | else | |
0a7f17aa | 1720 | dev_dbg(priv->dev, "Found largest videomode %ux%u\n", |
3ce05599 LP |
1721 | max_mode->xres, max_mode->yres); |
1722 | ||
a67472ad | 1723 | /* Create the mode list. */ |
3ce05599 LP |
1724 | if (cfg->lcd_cfg == NULL) { |
1725 | mode = &default_720p; | |
1726 | num_cfg = 1; | |
1727 | } else { | |
1728 | mode = cfg->lcd_cfg; | |
1729 | num_cfg = cfg->num_cfg; | |
1730 | } | |
1731 | ||
1732 | fb_videomode_to_modelist(mode, num_cfg, &info->modelist); | |
1733 | ||
13f80eea LP |
1734 | /* Initialize the transmitter device if present. */ |
1735 | if (cfg->tx_dev) { | |
1736 | if (!cfg->tx_dev->dev.driver || | |
1737 | !try_module_get(cfg->tx_dev->dev.driver->owner)) { | |
1738 | dev_warn(priv->dev, | |
1739 | "unable to get transmitter device\n"); | |
1740 | return -EINVAL; | |
1741 | } | |
1742 | ch->tx_dev = platform_get_drvdata(cfg->tx_dev); | |
1743 | ch->tx_dev->lcdc = ch; | |
1744 | ch->tx_dev->def_mode = *mode; | |
1745 | } | |
1746 | ||
a67472ad LP |
1747 | /* Initialize variable screen information using the first mode as |
1748 | * default. The default Y virtual resolution is twice the panel size to | |
1749 | * allow for double-buffering. | |
1750 | */ | |
1751 | var = &info->var; | |
3ce05599 | 1752 | fb_videomode_to_var(var, mode); |
afaad83b LP |
1753 | var->width = cfg->panel_cfg.width; |
1754 | var->height = cfg->panel_cfg.height; | |
3ce05599 LP |
1755 | var->yres_virtual = var->yres * 2; |
1756 | var->activate = FB_ACTIVATE_NOW; | |
1757 | ||
edd153a3 LP |
1758 | switch (cfg->fourcc) { |
1759 | case V4L2_PIX_FMT_RGB565: | |
1760 | var->bits_per_pixel = 16; | |
1761 | break; | |
1762 | case V4L2_PIX_FMT_BGR24: | |
1763 | var->bits_per_pixel = 24; | |
1764 | break; | |
1765 | case V4L2_PIX_FMT_BGR32: | |
1766 | var->bits_per_pixel = 32; | |
1767 | break; | |
1768 | default: | |
1769 | var->grayscale = cfg->fourcc; | |
1770 | break; | |
1771 | } | |
1772 | ||
1773 | /* Make sure the memory size check won't fail. smem_len is initialized | |
1774 | * later based on var. | |
1775 | */ | |
1776 | info->fix.smem_len = UINT_MAX; | |
a67472ad | 1777 | ret = sh_mobile_check_var(var, info); |
3ce05599 LP |
1778 | if (ret) |
1779 | return ret; | |
1780 | ||
edd153a3 LP |
1781 | max_size = max_size * var->bits_per_pixel / 8 * 2; |
1782 | ||
a67472ad | 1783 | /* Allocate frame buffer memory and color map. */ |
0a7f17aa LP |
1784 | buf = dma_alloc_coherent(priv->dev, max_size, &ch->dma_handle, |
1785 | GFP_KERNEL); | |
3ce05599 | 1786 | if (!buf) { |
0a7f17aa | 1787 | dev_err(priv->dev, "unable to allocate buffer\n"); |
3ce05599 LP |
1788 | return -ENOMEM; |
1789 | } | |
1790 | ||
3ce05599 LP |
1791 | ret = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0); |
1792 | if (ret < 0) { | |
0a7f17aa LP |
1793 | dev_err(priv->dev, "unable to allocate cmap\n"); |
1794 | dma_free_coherent(priv->dev, max_size, buf, ch->dma_handle); | |
3ce05599 LP |
1795 | return ret; |
1796 | } | |
1797 | ||
edd153a3 LP |
1798 | /* Initialize fixed screen information. Restrict pan to 2 lines steps |
1799 | * for NV12 and NV21. | |
1800 | */ | |
1801 | info->fix = sh_mobile_lcdc_fix; | |
3ce05599 | 1802 | info->fix.smem_start = ch->dma_handle; |
edd153a3 LP |
1803 | info->fix.smem_len = max_size; |
1804 | if (cfg->fourcc == V4L2_PIX_FMT_NV12 || | |
1805 | cfg->fourcc == V4L2_PIX_FMT_NV21) | |
1806 | info->fix.ypanstep = 2; | |
1807 | ||
1808 | if (sh_mobile_format_is_yuv(var)) { | |
3ce05599 | 1809 | info->fix.line_length = var->xres; |
edd153a3 LP |
1810 | info->fix.visual = FB_VISUAL_FOURCC; |
1811 | } else { | |
1812 | info->fix.line_length = var->xres * var->bits_per_pixel / 8; | |
1813 | info->fix.visual = FB_VISUAL_TRUECOLOR; | |
1814 | } | |
3ce05599 LP |
1815 | |
1816 | info->screen_base = buf; | |
0a7f17aa | 1817 | info->device = priv->dev; |
3ce05599 LP |
1818 | ch->display_var = *var; |
1819 | ||
1820 | return 0; | |
1821 | } | |
1822 | ||
1823 | static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev) | |
1824 | { | |
01ac25b5 | 1825 | struct sh_mobile_lcdc_info *pdata = pdev->dev.platform_data; |
3ce05599 | 1826 | struct sh_mobile_lcdc_priv *priv; |
cfb4f5d1 | 1827 | struct resource *res; |
3ce05599 | 1828 | int num_channels; |
cfb4f5d1 | 1829 | int error; |
3ce05599 | 1830 | int i; |
cfb4f5d1 | 1831 | |
01ac25b5 | 1832 | if (!pdata) { |
cfb4f5d1 | 1833 | dev_err(&pdev->dev, "no platform data defined\n"); |
8bed9055 | 1834 | return -EINVAL; |
cfb4f5d1 MD |
1835 | } |
1836 | ||
1837 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
8564557a MD |
1838 | i = platform_get_irq(pdev, 0); |
1839 | if (!res || i < 0) { | |
1840 | dev_err(&pdev->dev, "cannot get platform resources\n"); | |
8bed9055 | 1841 | return -ENOENT; |
cfb4f5d1 MD |
1842 | } |
1843 | ||
1844 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); | |
1845 | if (!priv) { | |
1846 | dev_err(&pdev->dev, "cannot allocate device data\n"); | |
8bed9055 | 1847 | return -ENOMEM; |
cfb4f5d1 MD |
1848 | } |
1849 | ||
4774c12a LP |
1850 | priv->dev = &pdev->dev; |
1851 | priv->meram_dev = pdata->meram_dev; | |
8bed9055 GL |
1852 | platform_set_drvdata(pdev, priv); |
1853 | ||
f8798ccb | 1854 | error = request_irq(i, sh_mobile_lcdc_irq, 0, |
7ad33e74 | 1855 | dev_name(&pdev->dev), priv); |
8564557a MD |
1856 | if (error) { |
1857 | dev_err(&pdev->dev, "unable to request irq\n"); | |
1858 | goto err1; | |
1859 | } | |
1860 | ||
1861 | priv->irq = i; | |
5ef6b505 | 1862 | atomic_set(&priv->hw_usecnt, -1); |
cfb4f5d1 | 1863 | |
3ce05599 LP |
1864 | for (i = 0, num_channels = 0; i < ARRAY_SIZE(pdata->ch); i++) { |
1865 | struct sh_mobile_lcdc_chan *ch = priv->ch + num_channels; | |
cfb4f5d1 | 1866 | |
01ac25b5 GL |
1867 | ch->lcdc = priv; |
1868 | memcpy(&ch->cfg, &pdata->ch[i], sizeof(pdata->ch[i])); | |
cfb4f5d1 | 1869 | |
01ac25b5 | 1870 | error = sh_mobile_lcdc_check_interface(ch); |
cfb4f5d1 MD |
1871 | if (error) { |
1872 | dev_err(&pdev->dev, "unsupported interface type\n"); | |
1873 | goto err1; | |
1874 | } | |
01ac25b5 GL |
1875 | init_waitqueue_head(&ch->frame_end_wait); |
1876 | init_completion(&ch->vsync_completion); | |
1877 | ch->pan_offset = 0; | |
cfb4f5d1 | 1878 | |
3b0fd9d7 AC |
1879 | /* probe the backlight is there is one defined */ |
1880 | if (ch->cfg.bl_info.max_brightness) | |
1881 | ch->bl = sh_mobile_lcdc_bl_probe(&pdev->dev, ch); | |
1882 | ||
cfb4f5d1 MD |
1883 | switch (pdata->ch[i].chan) { |
1884 | case LCDC_CHAN_MAINLCD: | |
ce1c0b08 | 1885 | ch->enabled = LDCNT2R_ME; |
01ac25b5 | 1886 | ch->reg_offs = lcdc_offs_mainlcd; |
3ce05599 | 1887 | num_channels++; |
cfb4f5d1 MD |
1888 | break; |
1889 | case LCDC_CHAN_SUBLCD: | |
ce1c0b08 | 1890 | ch->enabled = LDCNT2R_SE; |
01ac25b5 | 1891 | ch->reg_offs = lcdc_offs_sublcd; |
3ce05599 | 1892 | num_channels++; |
cfb4f5d1 MD |
1893 | break; |
1894 | } | |
1895 | } | |
1896 | ||
3ce05599 | 1897 | if (!num_channels) { |
cfb4f5d1 MD |
1898 | dev_err(&pdev->dev, "no channels defined\n"); |
1899 | error = -EINVAL; | |
1900 | goto err1; | |
1901 | } | |
1902 | ||
edd153a3 | 1903 | /* for dual channel LCDC (MAIN + SUB) force shared format setting */ |
3ce05599 | 1904 | if (num_channels == 2) |
edd153a3 | 1905 | priv->forced_fourcc = pdata->ch[0].fourcc; |
417d4827 | 1906 | |
dba6f385 GL |
1907 | priv->base = ioremap_nocache(res->start, resource_size(res)); |
1908 | if (!priv->base) | |
1909 | goto err1; | |
1910 | ||
0a7f17aa | 1911 | error = sh_mobile_lcdc_setup_clocks(priv, pdata->clock_source); |
cfb4f5d1 MD |
1912 | if (error) { |
1913 | dev_err(&pdev->dev, "unable to setup clocks\n"); | |
1914 | goto err1; | |
1915 | } | |
1916 | ||
4774c12a LP |
1917 | /* Enable runtime PM. */ |
1918 | pm_runtime_enable(&pdev->dev); | |
7caa4342 | 1919 | |
3ce05599 | 1920 | for (i = 0; i < num_channels; i++) { |
01ac25b5 | 1921 | struct sh_mobile_lcdc_chan *ch = priv->ch + i; |
c44f9f76 | 1922 | |
0a7f17aa | 1923 | error = sh_mobile_lcdc_channel_init(priv, ch); |
cfb4f5d1 | 1924 | if (error) |
3ce05599 | 1925 | goto err1; |
cfb4f5d1 MD |
1926 | } |
1927 | ||
cfb4f5d1 MD |
1928 | error = sh_mobile_lcdc_start(priv); |
1929 | if (error) { | |
1930 | dev_err(&pdev->dev, "unable to start hardware\n"); | |
1931 | goto err1; | |
1932 | } | |
1933 | ||
3ce05599 | 1934 | for (i = 0; i < num_channels; i++) { |
1c6a307a | 1935 | struct sh_mobile_lcdc_chan *ch = priv->ch + i; |
3ce05599 | 1936 | struct fb_info *info = ch->info; |
1c6a307a PM |
1937 | |
1938 | if (info->fbdefio) { | |
8bed9055 | 1939 | ch->sglist = vmalloc(sizeof(struct scatterlist) * |
1c6a307a | 1940 | info->fix.smem_len >> PAGE_SHIFT); |
8bed9055 | 1941 | if (!ch->sglist) { |
1c6a307a PM |
1942 | dev_err(&pdev->dev, "cannot allocate sglist\n"); |
1943 | goto err1; | |
1944 | } | |
1945 | } | |
1946 | ||
3b0fd9d7 AC |
1947 | info->bl_dev = ch->bl; |
1948 | ||
1c6a307a | 1949 | error = register_framebuffer(info); |
cfb4f5d1 MD |
1950 | if (error < 0) |
1951 | goto err1; | |
cfb4f5d1 | 1952 | |
0a7f17aa | 1953 | dev_info(&pdev->dev, "registered %s/%s as %dx%d %dbpp.\n", |
edd153a3 LP |
1954 | pdev->name, (ch->cfg.chan == LCDC_CHAN_MAINLCD) ? |
1955 | "mainlcd" : "sublcd", info->var.xres, info->var.yres, | |
1956 | info->var.bits_per_pixel); | |
8564557a MD |
1957 | |
1958 | /* deferred io mode: disable clock to save power */ | |
6011bdea | 1959 | if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED) |
8564557a | 1960 | sh_mobile_lcdc_clk_off(priv); |
cfb4f5d1 MD |
1961 | } |
1962 | ||
6011bdea GL |
1963 | /* Failure ignored */ |
1964 | priv->notifier.notifier_call = sh_mobile_lcdc_notify; | |
1965 | fb_register_client(&priv->notifier); | |
1966 | ||
cfb4f5d1 | 1967 | return 0; |
8bed9055 | 1968 | err1: |
cfb4f5d1 | 1969 | sh_mobile_lcdc_remove(pdev); |
8bed9055 | 1970 | |
cfb4f5d1 MD |
1971 | return error; |
1972 | } | |
1973 | ||
cfb4f5d1 MD |
1974 | static struct platform_driver sh_mobile_lcdc_driver = { |
1975 | .driver = { | |
1976 | .name = "sh_mobile_lcdc_fb", | |
1977 | .owner = THIS_MODULE, | |
2feb075a | 1978 | .pm = &sh_mobile_lcdc_dev_pm_ops, |
cfb4f5d1 MD |
1979 | }, |
1980 | .probe = sh_mobile_lcdc_probe, | |
1981 | .remove = sh_mobile_lcdc_remove, | |
1982 | }; | |
1983 | ||
4277f2c4 | 1984 | module_platform_driver(sh_mobile_lcdc_driver); |
cfb4f5d1 MD |
1985 | |
1986 | MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver"); | |
1987 | MODULE_AUTHOR("Magnus Damm <damm@opensource.se>"); | |
1988 | MODULE_LICENSE("GPL v2"); |