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fbdev: sh_mobile_lcdc: Split channel initialization from probe function
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CommitLineData
cfb4f5d1
MD
1/*
2 * SuperH Mobile LCDC Framebuffer
3 *
4 * Copyright (c) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/delay.h>
14#include <linux/mm.h>
cfb4f5d1 15#include <linux/clk.h>
0246c471 16#include <linux/pm_runtime.h>
cfb4f5d1
MD
17#include <linux/platform_device.h>
18#include <linux/dma-mapping.h>
8564557a 19#include <linux/interrupt.h>
1c6a307a 20#include <linux/vmalloc.h>
40331b21 21#include <linux/ioctl.h>
5a0e3ad6 22#include <linux/slab.h>
dd210503 23#include <linux/console.h>
3b0fd9d7
AC
24#include <linux/backlight.h>
25#include <linux/gpio.h>
225c9a8d 26#include <video/sh_mobile_lcdc.h>
8a20974f 27#include <video/sh_mobile_meram.h>
60063497 28#include <linux/atomic.h>
cfb4f5d1 29
6de9edd5
GL
30#include "sh_mobile_lcdcfb.h"
31
a6f15ade
PE
32#define SIDE_B_OFFSET 0x1000
33#define MIRROR_OFFSET 0x2000
cfb4f5d1 34
d2ecbab5
GL
35#define MAX_XRES 1920
36#define MAX_YRES 1080
cfb4f5d1 37
0246c471 38static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
cfb4f5d1
MD
39 [LDDCKPAT1R] = 0x400,
40 [LDDCKPAT2R] = 0x404,
41 [LDMT1R] = 0x418,
42 [LDMT2R] = 0x41c,
43 [LDMT3R] = 0x420,
44 [LDDFR] = 0x424,
45 [LDSM1R] = 0x428,
8564557a 46 [LDSM2R] = 0x42c,
cfb4f5d1 47 [LDSA1R] = 0x430,
53b50314 48 [LDSA2R] = 0x434,
cfb4f5d1
MD
49 [LDMLSR] = 0x438,
50 [LDHCNR] = 0x448,
51 [LDHSYNR] = 0x44c,
52 [LDVLNR] = 0x450,
53 [LDVSYNR] = 0x454,
54 [LDPMR] = 0x460,
6011bdea 55 [LDHAJR] = 0x4a0,
cfb4f5d1
MD
56};
57
0246c471 58static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
cfb4f5d1
MD
59 [LDDCKPAT1R] = 0x408,
60 [LDDCKPAT2R] = 0x40c,
61 [LDMT1R] = 0x600,
62 [LDMT2R] = 0x604,
63 [LDMT3R] = 0x608,
64 [LDDFR] = 0x60c,
65 [LDSM1R] = 0x610,
8564557a 66 [LDSM2R] = 0x614,
cfb4f5d1
MD
67 [LDSA1R] = 0x618,
68 [LDMLSR] = 0x620,
69 [LDHCNR] = 0x624,
70 [LDHSYNR] = 0x628,
71 [LDVLNR] = 0x62c,
72 [LDVSYNR] = 0x630,
73 [LDPMR] = 0x63c,
74};
75
c44f9f76
GL
76static const struct fb_videomode default_720p = {
77 .name = "HDMI 720p",
78 .xres = 1280,
79 .yres = 720,
80
5ae0cf82
GL
81 .left_margin = 220,
82 .right_margin = 110,
83 .hsync_len = 40,
c44f9f76
GL
84
85 .upper_margin = 20,
86 .lower_margin = 5,
87 .vsync_len = 5,
88
89 .pixclock = 13468,
5ae0cf82 90 .refresh = 60,
c44f9f76 91 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
0246c471
MD
92};
93
94struct sh_mobile_lcdc_priv {
95 void __iomem *base;
96 int irq;
97 atomic_t hw_usecnt;
98 struct device *dev;
99 struct clk *dot_clk;
100 unsigned long lddckr;
101 struct sh_mobile_lcdc_chan ch[2];
6011bdea 102 struct notifier_block notifier;
0246c471 103 int started;
417d4827 104 int forced_bpp; /* 2 channel LCDC must share bpp setting */
7caa4342 105 struct sh_mobile_meram_info *meram_dev;
0246c471
MD
106};
107
a6f15ade
PE
108static bool banked(int reg_nr)
109{
110 switch (reg_nr) {
111 case LDMT1R:
112 case LDMT2R:
113 case LDMT3R:
114 case LDDFR:
115 case LDSM1R:
116 case LDSA1R:
53b50314 117 case LDSA2R:
a6f15ade
PE
118 case LDMLSR:
119 case LDHCNR:
120 case LDHSYNR:
121 case LDVLNR:
122 case LDVSYNR:
123 return true;
124 }
125 return false;
126}
127
cfb4f5d1
MD
128static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
129 int reg_nr, unsigned long data)
130{
131 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
a6f15ade
PE
132 if (banked(reg_nr))
133 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
134 SIDE_B_OFFSET);
135}
136
137static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan,
138 int reg_nr, unsigned long data)
139{
140 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
141 MIRROR_OFFSET);
cfb4f5d1
MD
142}
143
144static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
145 int reg_nr)
146{
147 return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
148}
149
150static void lcdc_write(struct sh_mobile_lcdc_priv *priv,
151 unsigned long reg_offs, unsigned long data)
152{
153 iowrite32(data, priv->base + reg_offs);
154}
155
156static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv,
157 unsigned long reg_offs)
158{
159 return ioread32(priv->base + reg_offs);
160}
161
162static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv,
163 unsigned long reg_offs,
164 unsigned long mask, unsigned long until)
165{
166 while ((lcdc_read(priv, reg_offs) & mask) != until)
167 cpu_relax();
168}
169
170static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan)
171{
172 return chan->cfg.chan == LCDC_CHAN_SUBLCD;
173}
174
175static void lcdc_sys_write_index(void *handle, unsigned long data)
176{
177 struct sh_mobile_lcdc_chan *ch = handle;
178
ce1c0b08
LP
179 lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT);
180 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
181 lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
182 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
183 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1
MD
184}
185
186static void lcdc_sys_write_data(void *handle, unsigned long data)
187{
188 struct sh_mobile_lcdc_chan *ch = handle;
189
ce1c0b08
LP
190 lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT | LDDWDxR_RSW);
191 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
192 lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
193 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
194 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1
MD
195}
196
197static unsigned long lcdc_sys_read_data(void *handle)
198{
199 struct sh_mobile_lcdc_chan *ch = handle;
200
ce1c0b08
LP
201 lcdc_write(ch->lcdc, _LDDRDR, LDDRDR_RSR);
202 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
203 lcdc_write(ch->lcdc, _LDDRAR, LDDRAR_RA |
204 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
cfb4f5d1 205 udelay(1);
ce1c0b08 206 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1 207
ce1c0b08 208 return lcdc_read(ch->lcdc, _LDDRDR) & LDDRDR_DRD_MASK;
cfb4f5d1
MD
209}
210
211struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
212 lcdc_sys_write_index,
213 lcdc_sys_write_data,
214 lcdc_sys_read_data,
215};
216
8564557a
MD
217static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
218{
0246c471 219 if (atomic_inc_and_test(&priv->hw_usecnt)) {
8564557a
MD
220 if (priv->dot_clk)
221 clk_enable(priv->dot_clk);
f1ad90da 222 pm_runtime_get_sync(priv->dev);
ec19b9e0
DHG
223 if (priv->meram_dev && priv->meram_dev->pdev)
224 pm_runtime_get_sync(&priv->meram_dev->pdev->dev);
8564557a
MD
225 }
226}
227
228static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
229{
0246c471 230 if (atomic_sub_return(1, &priv->hw_usecnt) == -1) {
ec19b9e0
DHG
231 if (priv->meram_dev && priv->meram_dev->pdev)
232 pm_runtime_put_sync(&priv->meram_dev->pdev->dev);
0246c471 233 pm_runtime_put(priv->dev);
f1ad90da
LP
234 if (priv->dot_clk)
235 clk_disable(priv->dot_clk);
8564557a
MD
236 }
237}
8564557a 238
1c6a307a
PM
239static int sh_mobile_lcdc_sginit(struct fb_info *info,
240 struct list_head *pagelist)
241{
242 struct sh_mobile_lcdc_chan *ch = info->par;
243 unsigned int nr_pages_max = info->fix.smem_len >> PAGE_SHIFT;
244 struct page *page;
245 int nr_pages = 0;
246
247 sg_init_table(ch->sglist, nr_pages_max);
248
249 list_for_each_entry(page, pagelist, lru)
250 sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0);
251
252 return nr_pages;
253}
254
8564557a
MD
255static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
256 struct list_head *pagelist)
257{
258 struct sh_mobile_lcdc_chan *ch = info->par;
ef61aae4 259 struct sh_mobile_lcdc_board_cfg *bcfg = &ch->cfg.board_cfg;
8564557a
MD
260
261 /* enable clocks before accessing hardware */
262 sh_mobile_lcdc_clk_on(ch->lcdc);
263
5c1a56b5
PM
264 /*
265 * It's possible to get here without anything on the pagelist via
266 * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync()
267 * invocation. In the former case, the acceleration routines are
268 * stepped in to when using the framebuffer console causing the
269 * workqueue to be scheduled without any dirty pages on the list.
270 *
271 * Despite this, a panel update is still needed given that the
272 * acceleration routines have their own methods for writing in
273 * that still need to be updated.
274 *
275 * The fsync() and empty pagelist case could be optimized for,
276 * but we don't bother, as any application exhibiting such
277 * behaviour is fundamentally broken anyways.
278 */
279 if (!list_empty(pagelist)) {
280 unsigned int nr_pages = sh_mobile_lcdc_sginit(info, pagelist);
281
282 /* trigger panel update */
283 dma_map_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
ef61aae4
MD
284 if (bcfg->start_transfer)
285 bcfg->start_transfer(bcfg->board_data, ch,
286 &sh_mobile_lcdc_sys_bus_ops);
ce1c0b08 287 lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG);
5c1a56b5 288 dma_unmap_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
ef61aae4
MD
289 } else {
290 if (bcfg->start_transfer)
291 bcfg->start_transfer(bcfg->board_data, ch,
292 &sh_mobile_lcdc_sys_bus_ops);
ce1c0b08 293 lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG);
ef61aae4 294 }
8564557a
MD
295}
296
297static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
298{
299 struct fb_deferred_io *fbdefio = info->fbdefio;
300
301 if (fbdefio)
302 schedule_delayed_work(&info->deferred_work, fbdefio->delay);
303}
304
305static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
306{
307 struct sh_mobile_lcdc_priv *priv = data;
2feb075a 308 struct sh_mobile_lcdc_chan *ch;
9dd38819 309 unsigned long ldintr;
2feb075a
MD
310 int is_sub;
311 int k;
8564557a 312
dc48665f
LP
313 /* Acknowledge interrupts and disable further VSYNC End IRQs. */
314 ldintr = lcdc_read(priv, _LDINTR);
315 lcdc_write(priv, _LDINTR, (ldintr ^ LDINTR_STATUS_MASK) & ~LDINTR_VEE);
8564557a 316
2feb075a 317 /* figure out if this interrupt is for main or sub lcd */
ce1c0b08 318 is_sub = (lcdc_read(priv, _LDSR) & LDSR_MSS) ? 1 : 0;
2feb075a 319
9dd38819 320 /* wake up channel and disable clocks */
2feb075a
MD
321 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
322 ch = &priv->ch[k];
323
324 if (!ch->enabled)
325 continue;
326
dc48665f 327 /* Frame End */
9dd38819
PE
328 if (ldintr & LDINTR_FS) {
329 if (is_sub == lcdc_chan_is_sublcd(ch)) {
330 ch->frame_end = 1;
331 wake_up(&ch->frame_end_wait);
2feb075a 332
9dd38819
PE
333 sh_mobile_lcdc_clk_off(priv);
334 }
335 }
336
337 /* VSYNC End */
40331b21
PE
338 if (ldintr & LDINTR_VES)
339 complete(&ch->vsync_completion);
2feb075a
MD
340 }
341
8564557a
MD
342 return IRQ_HANDLED;
343}
344
cfb4f5d1
MD
345static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
346 int start)
347{
348 unsigned long tmp = lcdc_read(priv, _LDCNT2R);
349 int k;
350
351 /* start or stop the lcdc */
352 if (start)
ce1c0b08 353 lcdc_write(priv, _LDCNT2R, tmp | LDCNT2R_DO);
cfb4f5d1 354 else
ce1c0b08 355 lcdc_write(priv, _LDCNT2R, tmp & ~LDCNT2R_DO);
cfb4f5d1
MD
356
357 /* wait until power is applied/stopped on all channels */
358 for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
359 if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled)
360 while (1) {
ce1c0b08
LP
361 tmp = lcdc_read_chan(&priv->ch[k], LDPMR)
362 & LDPMR_LPS;
363 if (start && tmp == LDPMR_LPS)
cfb4f5d1
MD
364 break;
365 if (!start && tmp == 0)
366 break;
367 cpu_relax();
368 }
369
370 if (!start)
371 lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */
372}
373
6011bdea
GL
374static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch)
375{
1c120deb
GL
376 struct fb_var_screeninfo *var = &ch->info->var, *display_var = &ch->display_var;
377 unsigned long h_total, hsync_pos, display_h_total;
6011bdea
GL
378 u32 tmp;
379
380 tmp = ch->ldmt1r_value;
ce1c0b08
LP
381 tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : LDMT1R_VPOL;
382 tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : LDMT1R_HPOL;
383 tmp |= (ch->cfg.flags & LCDC_FLAGS_DWPOL) ? LDMT1R_DWPOL : 0;
384 tmp |= (ch->cfg.flags & LCDC_FLAGS_DIPOL) ? LDMT1R_DIPOL : 0;
385 tmp |= (ch->cfg.flags & LCDC_FLAGS_DAPOL) ? LDMT1R_DAPOL : 0;
386 tmp |= (ch->cfg.flags & LCDC_FLAGS_HSCNT) ? LDMT1R_HSCNT : 0;
387 tmp |= (ch->cfg.flags & LCDC_FLAGS_DWCNT) ? LDMT1R_DWCNT : 0;
6011bdea
GL
388 lcdc_write_chan(ch, LDMT1R, tmp);
389
390 /* setup SYS bus */
391 lcdc_write_chan(ch, LDMT2R, ch->cfg.sys_bus_cfg.ldmt2r);
392 lcdc_write_chan(ch, LDMT3R, ch->cfg.sys_bus_cfg.ldmt3r);
393
394 /* horizontal configuration */
1c120deb
GL
395 h_total = display_var->xres + display_var->hsync_len +
396 display_var->left_margin + display_var->right_margin;
6011bdea 397 tmp = h_total / 8; /* HTCN */
1c120deb 398 tmp |= (min(display_var->xres, var->xres) / 8) << 16; /* HDCN */
6011bdea
GL
399 lcdc_write_chan(ch, LDHCNR, tmp);
400
1c120deb 401 hsync_pos = display_var->xres + display_var->right_margin;
6011bdea 402 tmp = hsync_pos / 8; /* HSYNP */
1c120deb 403 tmp |= (display_var->hsync_len / 8) << 16; /* HSYNW */
6011bdea
GL
404 lcdc_write_chan(ch, LDHSYNR, tmp);
405
406 /* vertical configuration */
1c120deb
GL
407 tmp = display_var->yres + display_var->vsync_len +
408 display_var->upper_margin + display_var->lower_margin; /* VTLN */
409 tmp |= min(display_var->yres, var->yres) << 16; /* VDLN */
6011bdea
GL
410 lcdc_write_chan(ch, LDVLNR, tmp);
411
1c120deb
GL
412 tmp = display_var->yres + display_var->lower_margin; /* VSYNP */
413 tmp |= display_var->vsync_len << 16; /* VSYNW */
6011bdea
GL
414 lcdc_write_chan(ch, LDVSYNR, tmp);
415
416 /* Adjust horizontal synchronisation for HDMI */
1c120deb
GL
417 display_h_total = display_var->xres + display_var->hsync_len +
418 display_var->left_margin + display_var->right_margin;
419 tmp = ((display_var->xres & 7) << 24) |
420 ((display_h_total & 7) << 16) |
421 ((display_var->hsync_len & 7) << 8) |
6011bdea
GL
422 hsync_pos;
423 lcdc_write_chan(ch, LDHAJR, tmp);
424}
425
9a217e34
LP
426/*
427 * __sh_mobile_lcdc_start - Configure and tart the LCDC
428 * @priv: LCDC device
429 *
430 * Configure all enabled channels and start the LCDC device. All external
431 * devices (clocks, MERAM, panels, ...) are not touched by this function.
432 */
433static void __sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
cfb4f5d1
MD
434{
435 struct sh_mobile_lcdc_chan *ch;
cfb4f5d1 436 unsigned long tmp;
417d4827 437 int bpp = 0;
9a217e34 438 int k, m;
8564557a 439
9a217e34
LP
440 /* Enable LCDC channels. Read data from external memory, avoid using the
441 * BEU for now.
442 */
443 lcdc_write(priv, _LDCNT2R, priv->ch[0].enabled | priv->ch[1].enabled);
cfb4f5d1 444
9a217e34 445 /* Stop the LCDC first and disable all interrupts. */
cfb4f5d1 446 sh_mobile_lcdc_start_stop(priv, 0);
9a217e34 447 lcdc_write(priv, _LDINTR, 0);
cfb4f5d1 448
9a217e34 449 /* Configure power supply, dot clocks and start them. */
cfb4f5d1
MD
450 tmp = priv->lddckr;
451 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
452 ch = &priv->ch[k];
9a217e34 453 if (!ch->enabled)
cfb4f5d1
MD
454 continue;
455
9a217e34
LP
456 if (!bpp)
457 bpp = ch->info->var.bits_per_pixel;
458
459 /* Power supply */
460 lcdc_write_chan(ch, LDPMR, 0);
461
cfb4f5d1
MD
462 m = ch->cfg.clock_divider;
463 if (!m)
464 continue;
465
505c7de5
LP
466 /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider
467 * denominator.
468 */
469 lcdc_write_chan(ch, LDDCKPAT1R, 0);
470 lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);
471
cfb4f5d1 472 if (m == 1)
ce1c0b08 473 m = LDDCKR_MOSEL;
cfb4f5d1 474 tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0);
cfb4f5d1
MD
475 }
476
477 lcdc_write(priv, _LDDCKR, tmp);
cfb4f5d1
MD
478 lcdc_write(priv, _LDDCKSTPR, 0);
479 lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0);
480
9a217e34 481 /* Setup geometry, format, frame buffer memory and operation mode. */
cfb4f5d1
MD
482 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
483 ch = &priv->ch[k];
cfb4f5d1
MD
484 if (!ch->enabled)
485 continue;
486
6011bdea 487 sh_mobile_lcdc_geometry(ch);
cfb4f5d1 488
53b50314 489 if (ch->info->var.nonstd) {
9a217e34 490 tmp = (ch->info->var.nonstd << 16);
53b50314
DHG
491 switch (ch->info->var.bits_per_pixel) {
492 case 12:
9a217e34 493 tmp |= LDDFR_YF_420;
53b50314
DHG
494 break;
495 case 16:
ce1c0b08 496 tmp |= LDDFR_YF_422;
53b50314
DHG
497 break;
498 case 24:
9a217e34 499 default:
ce1c0b08 500 tmp |= LDDFR_YF_444;
53b50314
DHG
501 break;
502 }
503 } else {
504 switch (ch->info->var.bits_per_pixel) {
505 case 16:
9a217e34 506 tmp = LDDFR_PKF_RGB16;
53b50314
DHG
507 break;
508 case 24:
9a217e34 509 tmp = LDDFR_PKF_RGB24;
53b50314
DHG
510 break;
511 case 32:
9a217e34
LP
512 default:
513 tmp = LDDFR_PKF_ARGB32;
53b50314
DHG
514 break;
515 }
417d4827 516 }
7caa4342 517
9a217e34
LP
518 lcdc_write_chan(ch, LDDFR, tmp);
519 lcdc_write_chan(ch, LDMLSR, ch->pitch);
520 lcdc_write_chan(ch, LDSA1R, ch->base_addr_y);
521 if (ch->info->var.nonstd)
522 lcdc_write_chan(ch, LDSA2R, ch->base_addr_c);
7caa4342 523
9a217e34
LP
524 /* When using deferred I/O mode, configure the LCDC for one-shot
525 * operation and enable the frame end interrupt. Otherwise use
526 * continuous read mode.
527 */
528 if (ch->ldmt1r_value & LDMT1R_IFM &&
529 ch->cfg.sys_bus_cfg.deferred_io_msec) {
530 lcdc_write_chan(ch, LDSM1R, LDSM1R_OS);
531 lcdc_write(priv, _LDINTR, LDINTR_FE);
532 } else {
533 lcdc_write_chan(ch, LDSM1R, 0);
534 }
535 }
7caa4342 536
9a217e34
LP
537 /* Word and long word swap. */
538 if (priv->ch[0].info->var.nonstd)
539 tmp = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS;
540 else {
541 switch (bpp) {
542 case 16:
543 tmp = LDDDSR_LS | LDDDSR_WS;
544 break;
545 case 24:
546 tmp = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS;
547 break;
548 case 32:
549 default:
550 tmp = LDDDSR_LS;
551 break;
7caa4342 552 }
9a217e34
LP
553 }
554 lcdc_write(priv, _LDDDSR, tmp);
7caa4342 555
9a217e34
LP
556 /* Enable the display output. */
557 lcdc_write(priv, _LDCNT1R, LDCNT1R_DE);
558 sh_mobile_lcdc_start_stop(priv, 1);
559 priv->started = 1;
560}
cfb4f5d1 561
9a217e34
LP
562static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
563{
564 struct sh_mobile_meram_info *mdev = priv->meram_dev;
565 struct sh_mobile_lcdc_board_cfg *board_cfg;
566 struct sh_mobile_lcdc_chan *ch;
567 unsigned long tmp;
568 int ret;
569 int k;
cfb4f5d1 570
9a217e34
LP
571 /* enable clocks before accessing the hardware */
572 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
573 if (priv->ch[k].enabled)
574 sh_mobile_lcdc_clk_on(priv);
575 }
8564557a 576
9a217e34
LP
577 /* reset */
578 lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LDCNT2R_BR);
579 lcdc_wait_bit(priv, _LDCNT2R, LDCNT2R_BR, 0);
8564557a 580
9a217e34
LP
581 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
582 ch = &priv->ch[k];
8564557a 583
9a217e34
LP
584 if (!ch->enabled)
585 continue;
586
587 board_cfg = &ch->cfg.board_cfg;
588 if (board_cfg->setup_sys) {
589 ret = board_cfg->setup_sys(board_cfg->board_data, ch,
590 &sh_mobile_lcdc_sys_bus_ops);
591 if (ret)
592 return ret;
8564557a 593 }
cfb4f5d1
MD
594 }
595
9a217e34
LP
596 /* Compute frame buffer base address and pitch for each channel. */
597 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
598 struct sh_mobile_meram_cfg *cfg;
599 int pixelformat;
cfb4f5d1 600
9a217e34
LP
601 ch = &priv->ch[k];
602 if (!ch->enabled)
603 continue;
cfb4f5d1 604
9a217e34
LP
605 ch->base_addr_y = ch->info->fix.smem_start;
606 ch->base_addr_c = ch->base_addr_y
607 + ch->info->var.xres
608 * ch->info->var.yres_virtual;
609 ch->pitch = ch->info->fix.line_length;
610
611 /* Enable MERAM if possible. */
612 cfg = ch->cfg.meram_cfg;
613 if (mdev == NULL || mdev->ops == NULL || cfg == NULL)
614 continue;
615
616 /* we need to de-init configured ICBs before we can
617 * re-initialize them.
618 */
619 if (ch->meram_enabled) {
620 mdev->ops->meram_unregister(mdev, cfg);
621 ch->meram_enabled = 0;
622 }
623
624 if (!ch->info->var.nonstd)
625 pixelformat = SH_MOBILE_MERAM_PF_RGB;
626 else if (ch->info->var.bits_per_pixel == 24)
627 pixelformat = SH_MOBILE_MERAM_PF_NV24;
628 else
629 pixelformat = SH_MOBILE_MERAM_PF_NV;
630
631 ret = mdev->ops->meram_register(mdev, cfg, ch->pitch,
632 ch->info->var.yres, pixelformat,
633 ch->base_addr_y, ch->base_addr_c,
634 &ch->base_addr_y, &ch->base_addr_c,
635 &ch->pitch);
636 if (!ret)
637 ch->meram_enabled = 1;
638 }
639
640 /* Start the LCDC. */
641 __sh_mobile_lcdc_start(priv);
642
643 /* Setup deferred I/O, tell the board code to enable the panels, and
644 * turn backlight on.
645 */
cfb4f5d1
MD
646 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
647 ch = &priv->ch[k];
21bc1f02
MD
648 if (!ch->enabled)
649 continue;
650
9a217e34
LP
651 tmp = ch->cfg.sys_bus_cfg.deferred_io_msec;
652 if (ch->ldmt1r_value & LDMT1R_IFM && tmp) {
653 ch->defio.deferred_io = sh_mobile_lcdc_deferred_io;
654 ch->defio.delay = msecs_to_jiffies(tmp);
655 ch->info->fbdefio = &ch->defio;
656 fb_deferred_io_init(ch->info);
657 }
658
cfb4f5d1 659 board_cfg = &ch->cfg.board_cfg;
247f9938 660 if (board_cfg->display_on && try_module_get(board_cfg->owner)) {
c2439398 661 board_cfg->display_on(board_cfg->board_data, ch->info);
6de9edd5
GL
662 module_put(board_cfg->owner);
663 }
3b0fd9d7
AC
664
665 if (ch->bl) {
666 ch->bl->props.power = FB_BLANK_UNBLANK;
667 backlight_update_status(ch->bl);
668 }
cfb4f5d1
MD
669 }
670
671 return 0;
672}
673
674static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
675{
676 struct sh_mobile_lcdc_chan *ch;
677 struct sh_mobile_lcdc_board_cfg *board_cfg;
678 int k;
679
2feb075a 680 /* clean up deferred io and ask board code to disable panel */
cfb4f5d1
MD
681 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
682 ch = &priv->ch[k];
21bc1f02
MD
683 if (!ch->enabled)
684 continue;
8564557a 685
2feb075a
MD
686 /* deferred io mode:
687 * flush frame, and wait for frame end interrupt
688 * clean up deferred io and enable clock
689 */
5ef6b505 690 if (ch->info && ch->info->fbdefio) {
2feb075a 691 ch->frame_end = 0;
e33afddc 692 schedule_delayed_work(&ch->info->deferred_work, 0);
2feb075a 693 wait_event(ch->frame_end_wait, ch->frame_end);
e33afddc
PM
694 fb_deferred_io_cleanup(ch->info);
695 ch->info->fbdefio = NULL;
2feb075a 696 sh_mobile_lcdc_clk_on(priv);
8564557a 697 }
2feb075a 698
3b0fd9d7
AC
699 if (ch->bl) {
700 ch->bl->props.power = FB_BLANK_POWERDOWN;
701 backlight_update_status(ch->bl);
702 }
703
2feb075a 704 board_cfg = &ch->cfg.board_cfg;
247f9938 705 if (board_cfg->display_off && try_module_get(board_cfg->owner)) {
2feb075a 706 board_cfg->display_off(board_cfg->board_data);
6de9edd5
GL
707 module_put(board_cfg->owner);
708 }
7caa4342
DHG
709
710 /* disable the meram */
711 if (ch->meram_enabled) {
712 struct sh_mobile_meram_cfg *cfg;
713 struct sh_mobile_meram_info *mdev;
714 cfg = ch->cfg.meram_cfg;
715 mdev = priv->meram_dev;
716 mdev->ops->meram_unregister(mdev, cfg);
717 ch->meram_enabled = 0;
718 }
719
cfb4f5d1
MD
720 }
721
722 /* stop the lcdc */
8e9bb19e
MD
723 if (priv->started) {
724 sh_mobile_lcdc_start_stop(priv, 0);
725 priv->started = 0;
726 }
b51339ff 727
8564557a
MD
728 /* stop clocks */
729 for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
730 if (priv->ch[k].enabled)
731 sh_mobile_lcdc_clk_off(priv);
cfb4f5d1
MD
732}
733
734static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
735{
ce1c0b08
LP
736 int interface_type = ch->cfg.interface_type;
737
738 switch (interface_type) {
739 case RGB8:
740 case RGB9:
741 case RGB12A:
742 case RGB12B:
743 case RGB16:
744 case RGB18:
745 case RGB24:
746 case SYS8A:
747 case SYS8B:
748 case SYS8C:
749 case SYS8D:
750 case SYS9:
751 case SYS12:
752 case SYS16A:
753 case SYS16B:
754 case SYS16C:
755 case SYS18:
756 case SYS24:
757 break;
758 default:
759 return -EINVAL;
cfb4f5d1
MD
760 }
761
762 /* SUBLCD only supports SYS interface */
763 if (lcdc_chan_is_sublcd(ch)) {
ce1c0b08
LP
764 if (!(interface_type & LDMT1R_IFM))
765 return -EINVAL;
766
767 interface_type &= ~LDMT1R_IFM;
cfb4f5d1
MD
768 }
769
ce1c0b08 770 ch->ldmt1r_value = interface_type;
cfb4f5d1 771 return 0;
cfb4f5d1
MD
772}
773
b51339ff
MD
774static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
775 int clock_source,
cfb4f5d1
MD
776 struct sh_mobile_lcdc_priv *priv)
777{
778 char *str;
cfb4f5d1
MD
779
780 switch (clock_source) {
ce1c0b08
LP
781 case LCDC_CLK_BUS:
782 str = "bus_clk";
783 priv->lddckr = LDDCKR_ICKSEL_BUS;
784 break;
785 case LCDC_CLK_PERIPHERAL:
786 str = "peripheral_clk";
787 priv->lddckr = LDDCKR_ICKSEL_MIPI;
788 break;
789 case LCDC_CLK_EXTERNAL:
790 str = NULL;
791 priv->lddckr = LDDCKR_ICKSEL_HDMI;
792 break;
cfb4f5d1
MD
793 default:
794 return -EINVAL;
795 }
796
cfb4f5d1 797 if (str) {
b51339ff
MD
798 priv->dot_clk = clk_get(&pdev->dev, str);
799 if (IS_ERR(priv->dot_clk)) {
800 dev_err(&pdev->dev, "cannot get dot clock %s\n", str);
b51339ff 801 return PTR_ERR(priv->dot_clk);
cfb4f5d1 802 }
cfb4f5d1 803 }
0246c471
MD
804
805 /* Runtime PM support involves two step for this driver:
806 * 1) Enable Runtime PM
807 * 2) Force Runtime PM Resume since hardware is accessed from probe()
808 */
8bed9055 809 priv->dev = &pdev->dev;
0246c471
MD
810 pm_runtime_enable(priv->dev);
811 pm_runtime_resume(priv->dev);
cfb4f5d1
MD
812 return 0;
813}
814
815static int sh_mobile_lcdc_setcolreg(u_int regno,
816 u_int red, u_int green, u_int blue,
817 u_int transp, struct fb_info *info)
818{
819 u32 *palette = info->pseudo_palette;
820
821 if (regno >= PALETTE_NR)
822 return -EINVAL;
823
824 /* only FB_VISUAL_TRUECOLOR supported */
825
826 red >>= 16 - info->var.red.length;
827 green >>= 16 - info->var.green.length;
828 blue >>= 16 - info->var.blue.length;
829 transp >>= 16 - info->var.transp.length;
830
831 palette[regno] = (red << info->var.red.offset) |
832 (green << info->var.green.offset) |
833 (blue << info->var.blue.offset) |
834 (transp << info->var.transp.offset);
835
836 return 0;
837}
838
839static struct fb_fix_screeninfo sh_mobile_lcdc_fix = {
840 .id = "SH Mobile LCDC",
841 .type = FB_TYPE_PACKED_PIXELS,
842 .visual = FB_VISUAL_TRUECOLOR,
843 .accel = FB_ACCEL_NONE,
9dd38819
PE
844 .xpanstep = 0,
845 .ypanstep = 1,
846 .ywrapstep = 0,
cfb4f5d1
MD
847};
848
8564557a
MD
849static void sh_mobile_lcdc_fillrect(struct fb_info *info,
850 const struct fb_fillrect *rect)
851{
852 sys_fillrect(info, rect);
853 sh_mobile_lcdc_deferred_io_touch(info);
854}
855
856static void sh_mobile_lcdc_copyarea(struct fb_info *info,
857 const struct fb_copyarea *area)
858{
859 sys_copyarea(info, area);
860 sh_mobile_lcdc_deferred_io_touch(info);
861}
862
863static void sh_mobile_lcdc_imageblit(struct fb_info *info,
864 const struct fb_image *image)
865{
866 sys_imageblit(info, image);
867 sh_mobile_lcdc_deferred_io_touch(info);
868}
869
9dd38819
PE
870static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var,
871 struct fb_info *info)
872{
873 struct sh_mobile_lcdc_chan *ch = info->par;
92e1f9a7
PE
874 struct sh_mobile_lcdc_priv *priv = ch->lcdc;
875 unsigned long ldrcntr;
876 unsigned long new_pan_offset;
53b50314
DHG
877 unsigned long base_addr_y, base_addr_c;
878 unsigned long c_offset;
92e1f9a7 879
dc1d5ada
LP
880 if (!info->var.nonstd)
881 new_pan_offset = var->yoffset * info->fix.line_length
882 + var->xoffset * (info->var.bits_per_pixel / 8);
53b50314 883 else
dc1d5ada
LP
884 new_pan_offset = var->yoffset * info->fix.line_length
885 + var->xoffset;
9dd38819 886
92e1f9a7 887 if (new_pan_offset == ch->pan_offset)
9dd38819
PE
888 return 0; /* No change, do nothing */
889
92e1f9a7 890 ldrcntr = lcdc_read(priv, _LDRCNTR);
9dd38819 891
92e1f9a7 892 /* Set the source address for the next refresh */
53b50314 893 base_addr_y = ch->dma_handle + new_pan_offset;
dc1d5ada 894 if (info->var.nonstd) {
53b50314 895 /* Set y offset */
dc1d5ada
LP
896 c_offset = var->yoffset * info->fix.line_length
897 * (info->var.bits_per_pixel - 8) / 8;
898 base_addr_c = ch->dma_handle
899 + info->var.xres * info->var.yres_virtual
900 + c_offset;
53b50314
DHG
901 /* Set x offset */
902 if (info->var.bits_per_pixel == 24)
903 base_addr_c += 2 * var->xoffset;
904 else
905 base_addr_c += var->xoffset;
49d79ba2 906 }
53b50314 907
49d79ba2 908 if (ch->meram_enabled) {
7caa4342
DHG
909 struct sh_mobile_meram_cfg *cfg;
910 struct sh_mobile_meram_info *mdev;
7caa4342
DHG
911 int ret;
912
913 cfg = ch->cfg.meram_cfg;
914 mdev = priv->meram_dev;
915 ret = mdev->ops->meram_update(mdev, cfg,
916 base_addr_y, base_addr_c,
49d79ba2 917 &base_addr_y, &base_addr_c);
7caa4342
DHG
918 if (ret)
919 return ret;
49d79ba2 920 }
7caa4342 921
49d79ba2
LP
922 ch->base_addr_y = base_addr_y;
923 ch->base_addr_c = base_addr_c;
7caa4342 924
49d79ba2 925 lcdc_write_chan_mirror(ch, LDSA1R, base_addr_y);
dc1d5ada 926 if (info->var.nonstd)
49d79ba2 927 lcdc_write_chan_mirror(ch, LDSA2R, base_addr_c);
53b50314 928
92e1f9a7
PE
929 if (lcdc_chan_is_sublcd(ch))
930 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS);
931 else
932 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS);
933
934 ch->pan_offset = new_pan_offset;
935
936 sh_mobile_lcdc_deferred_io_touch(info);
9dd38819
PE
937
938 return 0;
939}
940
40331b21
PE
941static int sh_mobile_wait_for_vsync(struct fb_info *info)
942{
943 struct sh_mobile_lcdc_chan *ch = info->par;
944 unsigned long ldintr;
945 int ret;
946
dc48665f
LP
947 /* Enable VSync End interrupt and be careful not to acknowledge any
948 * pending interrupt.
949 */
40331b21 950 ldintr = lcdc_read(ch->lcdc, _LDINTR);
dc48665f 951 ldintr |= LDINTR_VEE | LDINTR_STATUS_MASK;
40331b21
PE
952 lcdc_write(ch->lcdc, _LDINTR, ldintr);
953
954 ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion,
955 msecs_to_jiffies(100));
956 if (!ret)
957 return -ETIMEDOUT;
958
959 return 0;
960}
961
962static int sh_mobile_ioctl(struct fb_info *info, unsigned int cmd,
963 unsigned long arg)
964{
965 int retval;
966
967 switch (cmd) {
968 case FBIO_WAITFORVSYNC:
969 retval = sh_mobile_wait_for_vsync(info);
970 break;
971
972 default:
973 retval = -ENOIOCTLCMD;
974 break;
975 }
976 return retval;
977}
978
dd210503
GL
979static void sh_mobile_fb_reconfig(struct fb_info *info)
980{
981 struct sh_mobile_lcdc_chan *ch = info->par;
982 struct fb_videomode mode1, mode2;
983 struct fb_event event;
984 int evnt = FB_EVENT_MODE_CHANGE_ALL;
985
986 if (ch->use_count > 1 || (ch->use_count == 1 && !info->fbcon_par))
987 /* More framebuffer users are active */
988 return;
989
990 fb_var_to_videomode(&mode1, &ch->display_var);
991 fb_var_to_videomode(&mode2, &info->var);
992
993 if (fb_mode_is_equal(&mode1, &mode2))
994 return;
995
996 /* Display has been re-plugged, framebuffer is free now, reconfigure */
997 if (fb_set_var(info, &ch->display_var) < 0)
998 /* Couldn't reconfigure, hopefully, can continue as before */
999 return;
1000
dd210503
GL
1001 /*
1002 * fb_set_var() calls the notifier change internally, only if
1003 * FBINFO_MISC_USEREVENT flag is set. Since we do not want to fake a
1004 * user event, we have to call the chain ourselves.
1005 */
1006 event.info = info;
cc267ec5 1007 event.data = &mode1;
dd210503
GL
1008 fb_notifier_call_chain(evnt, &event);
1009}
1010
1011/*
1012 * Locking: both .fb_release() and .fb_open() are called with info->lock held if
1013 * user == 1, or with console sem held, if user == 0.
1014 */
1015static int sh_mobile_release(struct fb_info *info, int user)
1016{
1017 struct sh_mobile_lcdc_chan *ch = info->par;
1018
1019 mutex_lock(&ch->open_lock);
1020 dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
1021
1022 ch->use_count--;
1023
1024 /* Nothing to reconfigure, when called from fbcon */
1025 if (user) {
ac751efa 1026 console_lock();
dd210503 1027 sh_mobile_fb_reconfig(info);
ac751efa 1028 console_unlock();
dd210503
GL
1029 }
1030
1031 mutex_unlock(&ch->open_lock);
1032
1033 return 0;
1034}
1035
1036static int sh_mobile_open(struct fb_info *info, int user)
1037{
1038 struct sh_mobile_lcdc_chan *ch = info->par;
1039
1040 mutex_lock(&ch->open_lock);
1041 ch->use_count++;
1042
1043 dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
1044 mutex_unlock(&ch->open_lock);
1045
1046 return 0;
1047}
1048
1049static int sh_mobile_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
1050{
1051 struct sh_mobile_lcdc_chan *ch = info->par;
417d4827 1052 struct sh_mobile_lcdc_priv *p = ch->lcdc;
03862194
LP
1053 unsigned int best_dist = (unsigned int)-1;
1054 unsigned int best_xres = 0;
1055 unsigned int best_yres = 0;
1056 unsigned int i;
dd210503 1057
03862194 1058 if (var->xres > MAX_XRES || var->yres > MAX_YRES)
dd210503 1059 return -EINVAL;
03862194
LP
1060
1061 /* If board code provides us with a list of available modes, make sure
1062 * we use one of them. Find the mode closest to the requested one. The
1063 * distance between two modes is defined as the size of the
1064 * non-overlapping parts of the two rectangles.
1065 */
1066 for (i = 0; i < ch->cfg.num_cfg; ++i) {
1067 const struct fb_videomode *mode = &ch->cfg.lcd_cfg[i];
1068 unsigned int dist;
1069
1070 /* We can only round up. */
1071 if (var->xres > mode->xres || var->yres > mode->yres)
1072 continue;
1073
1074 dist = var->xres * var->yres + mode->xres * mode->yres
1075 - 2 * min(var->xres, mode->xres)
1076 * min(var->yres, mode->yres);
1077
1078 if (dist < best_dist) {
1079 best_xres = mode->xres;
1080 best_yres = mode->yres;
1081 best_dist = dist;
1082 }
dd210503 1083 }
417d4827 1084
03862194
LP
1085 /* If no available mode can be used, return an error. */
1086 if (ch->cfg.num_cfg != 0) {
1087 if (best_dist == (unsigned int)-1)
1088 return -EINVAL;
1089
1090 var->xres = best_xres;
1091 var->yres = best_yres;
1092 }
1093
1094 /* Make sure the virtual resolution is at least as big as the visible
1095 * resolution.
1096 */
1097 if (var->xres_virtual < var->xres)
1098 var->xres_virtual = var->xres;
1099 if (var->yres_virtual < var->yres)
1100 var->yres_virtual = var->yres;
1101
1102 if (var->bits_per_pixel <= 16) { /* RGB 565 */
1103 var->bits_per_pixel = 16;
1104 var->red.offset = 11;
1105 var->red.length = 5;
1106 var->green.offset = 5;
1107 var->green.length = 6;
1108 var->blue.offset = 0;
1109 var->blue.length = 5;
1110 var->transp.offset = 0;
1111 var->transp.length = 0;
1112 } else if (var->bits_per_pixel <= 24) { /* RGB 888 */
1113 var->bits_per_pixel = 24;
1114 var->red.offset = 16;
1115 var->red.length = 8;
1116 var->green.offset = 8;
1117 var->green.length = 8;
1118 var->blue.offset = 0;
1119 var->blue.length = 8;
1120 var->transp.offset = 0;
1121 var->transp.length = 0;
1122 } else if (var->bits_per_pixel <= 32) { /* RGBA 888 */
1123 var->bits_per_pixel = 32;
1124 var->red.offset = 16;
1125 var->red.length = 8;
1126 var->green.offset = 8;
1127 var->green.length = 8;
1128 var->blue.offset = 0;
1129 var->blue.length = 8;
1130 var->transp.offset = 24;
1131 var->transp.length = 8;
1132 } else
417d4827
MD
1133 return -EINVAL;
1134
03862194
LP
1135 var->red.msb_right = 0;
1136 var->green.msb_right = 0;
1137 var->blue.msb_right = 0;
1138 var->transp.msb_right = 0;
1139
1140 /* Make sure we don't exceed our allocated memory. */
1141 if (var->xres_virtual * var->yres_virtual * var->bits_per_pixel / 8 >
1142 info->fix.smem_len)
1143 return -EINVAL;
1144
1145 /* only accept the forced_bpp for dual channel configurations */
1146 if (p->forced_bpp && p->forced_bpp != var->bits_per_pixel)
417d4827 1147 return -EINVAL;
417d4827 1148
dd210503
GL
1149 return 0;
1150}
40331b21 1151
ed5bebf2
LP
1152static int sh_mobile_set_par(struct fb_info *info)
1153{
1154 struct sh_mobile_lcdc_chan *ch = info->par;
91fba48d 1155 u32 line_length = info->fix.line_length;
ed5bebf2
LP
1156 int ret;
1157
1158 sh_mobile_lcdc_stop(ch->lcdc);
91fba48d
LP
1159
1160 if (info->var.nonstd)
1161 info->fix.line_length = info->var.xres;
1162 else
1163 info->fix.line_length = info->var.xres
1164 * info->var.bits_per_pixel / 8;
1165
ed5bebf2 1166 ret = sh_mobile_lcdc_start(ch->lcdc);
91fba48d 1167 if (ret < 0) {
ed5bebf2 1168 dev_err(info->dev, "%s: unable to restart LCDC\n", __func__);
91fba48d
LP
1169 info->fix.line_length = line_length;
1170 }
ed5bebf2
LP
1171
1172 return ret;
1173}
1174
8857b9aa
AC
1175/*
1176 * Screen blanking. Behavior is as follows:
1177 * FB_BLANK_UNBLANK: screen unblanked, clocks enabled
1178 * FB_BLANK_NORMAL: screen blanked, clocks enabled
1179 * FB_BLANK_VSYNC,
1180 * FB_BLANK_HSYNC,
1181 * FB_BLANK_POWEROFF: screen blanked, clocks disabled
1182 */
1183static int sh_mobile_lcdc_blank(int blank, struct fb_info *info)
1184{
1185 struct sh_mobile_lcdc_chan *ch = info->par;
1186 struct sh_mobile_lcdc_priv *p = ch->lcdc;
1187
1188 /* blank the screen? */
1189 if (blank > FB_BLANK_UNBLANK && ch->blank_status == FB_BLANK_UNBLANK) {
1190 struct fb_fillrect rect = {
1191 .width = info->var.xres,
1192 .height = info->var.yres,
1193 };
1194 sh_mobile_lcdc_fillrect(info, &rect);
1195 }
1196 /* turn clocks on? */
1197 if (blank <= FB_BLANK_NORMAL && ch->blank_status > FB_BLANK_NORMAL) {
1198 sh_mobile_lcdc_clk_on(p);
1199 }
1200 /* turn clocks off? */
1201 if (blank > FB_BLANK_NORMAL && ch->blank_status <= FB_BLANK_NORMAL) {
1202 /* make sure the screen is updated with the black fill before
1203 * switching the clocks off. one vsync is not enough since
1204 * blanking may occur in the middle of a refresh. deferred io
1205 * mode will reenable the clocks and update the screen in time,
1206 * so it does not need this. */
1207 if (!info->fbdefio) {
1208 sh_mobile_wait_for_vsync(info);
1209 sh_mobile_wait_for_vsync(info);
1210 }
1211 sh_mobile_lcdc_clk_off(p);
1212 }
1213
1214 ch->blank_status = blank;
1215 return 0;
1216}
1217
cfb4f5d1 1218static struct fb_ops sh_mobile_lcdc_ops = {
9dd38819 1219 .owner = THIS_MODULE,
cfb4f5d1 1220 .fb_setcolreg = sh_mobile_lcdc_setcolreg,
2540c111
MD
1221 .fb_read = fb_sys_read,
1222 .fb_write = fb_sys_write,
8564557a
MD
1223 .fb_fillrect = sh_mobile_lcdc_fillrect,
1224 .fb_copyarea = sh_mobile_lcdc_copyarea,
1225 .fb_imageblit = sh_mobile_lcdc_imageblit,
8857b9aa 1226 .fb_blank = sh_mobile_lcdc_blank,
9dd38819 1227 .fb_pan_display = sh_mobile_fb_pan_display,
40331b21 1228 .fb_ioctl = sh_mobile_ioctl,
dd210503
GL
1229 .fb_open = sh_mobile_open,
1230 .fb_release = sh_mobile_release,
1231 .fb_check_var = sh_mobile_check_var,
ed5bebf2 1232 .fb_set_par = sh_mobile_set_par,
cfb4f5d1
MD
1233};
1234
3b0fd9d7
AC
1235static int sh_mobile_lcdc_update_bl(struct backlight_device *bdev)
1236{
1237 struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
1238 struct sh_mobile_lcdc_board_cfg *cfg = &ch->cfg.board_cfg;
1239 int brightness = bdev->props.brightness;
1240
1241 if (bdev->props.power != FB_BLANK_UNBLANK ||
1242 bdev->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
1243 brightness = 0;
1244
1245 return cfg->set_brightness(cfg->board_data, brightness);
1246}
1247
1248static int sh_mobile_lcdc_get_brightness(struct backlight_device *bdev)
1249{
1250 struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
1251 struct sh_mobile_lcdc_board_cfg *cfg = &ch->cfg.board_cfg;
1252
1253 return cfg->get_brightness(cfg->board_data);
1254}
1255
1256static int sh_mobile_lcdc_check_fb(struct backlight_device *bdev,
1257 struct fb_info *info)
1258{
1259 return (info->bl_dev == bdev);
1260}
1261
1262static struct backlight_ops sh_mobile_lcdc_bl_ops = {
1263 .options = BL_CORE_SUSPENDRESUME,
1264 .update_status = sh_mobile_lcdc_update_bl,
1265 .get_brightness = sh_mobile_lcdc_get_brightness,
1266 .check_fb = sh_mobile_lcdc_check_fb,
1267};
1268
1269static struct backlight_device *sh_mobile_lcdc_bl_probe(struct device *parent,
1270 struct sh_mobile_lcdc_chan *ch)
1271{
1272 struct backlight_device *bl;
1273
1274 bl = backlight_device_register(ch->cfg.bl_info.name, parent, ch,
1275 &sh_mobile_lcdc_bl_ops, NULL);
beee1f20
DC
1276 if (IS_ERR(bl)) {
1277 dev_err(parent, "unable to register backlight device: %ld\n",
1278 PTR_ERR(bl));
3b0fd9d7
AC
1279 return NULL;
1280 }
1281
1282 bl->props.max_brightness = ch->cfg.bl_info.max_brightness;
1283 bl->props.brightness = bl->props.max_brightness;
1284 backlight_update_status(bl);
1285
1286 return bl;
1287}
1288
1289static void sh_mobile_lcdc_bl_remove(struct backlight_device *bdev)
1290{
1291 backlight_device_unregister(bdev);
1292}
1293
53b50314
DHG
1294static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp,
1295 int nonstd)
cfb4f5d1 1296{
53b50314
DHG
1297 if (nonstd) {
1298 switch (bpp) {
1299 case 12:
1300 case 16:
1301 case 24:
1302 var->bits_per_pixel = bpp;
1303 var->nonstd = nonstd;
1304 return 0;
1305 default:
1306 return -EINVAL;
1307 }
1308 }
1309
cfb4f5d1
MD
1310 switch (bpp) {
1311 case 16: /* PKF[4:0] = 00011 - RGB 565 */
1312 var->red.offset = 11;
1313 var->red.length = 5;
1314 var->green.offset = 5;
1315 var->green.length = 6;
1316 var->blue.offset = 0;
1317 var->blue.length = 5;
1318 var->transp.offset = 0;
1319 var->transp.length = 0;
1320 break;
1321
417d4827
MD
1322 case 24: /* PKF[4:0] = 01011 - RGB 888 */
1323 var->red.offset = 16;
cfb4f5d1 1324 var->red.length = 8;
417d4827 1325 var->green.offset = 8;
cfb4f5d1 1326 var->green.length = 8;
417d4827 1327 var->blue.offset = 0;
cfb4f5d1
MD
1328 var->blue.length = 8;
1329 var->transp.offset = 0;
1330 var->transp.length = 0;
1331 break;
417d4827
MD
1332
1333 case 32: /* PKF[4:0] = 00000 - RGBA 888 */
1334 var->red.offset = 16;
1335 var->red.length = 8;
1336 var->green.offset = 8;
1337 var->green.length = 8;
1338 var->blue.offset = 0;
1339 var->blue.length = 8;
1340 var->transp.offset = 24;
1341 var->transp.length = 8;
1342 break;
cfb4f5d1
MD
1343 default:
1344 return -EINVAL;
1345 }
1346 var->bits_per_pixel = bpp;
1347 var->red.msb_right = 0;
1348 var->green.msb_right = 0;
1349 var->blue.msb_right = 0;
1350 var->transp.msb_right = 0;
1351 return 0;
1352}
1353
2feb075a
MD
1354static int sh_mobile_lcdc_suspend(struct device *dev)
1355{
1356 struct platform_device *pdev = to_platform_device(dev);
1357
1358 sh_mobile_lcdc_stop(platform_get_drvdata(pdev));
1359 return 0;
1360}
1361
1362static int sh_mobile_lcdc_resume(struct device *dev)
1363{
1364 struct platform_device *pdev = to_platform_device(dev);
1365
1366 return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
1367}
1368
0246c471
MD
1369static int sh_mobile_lcdc_runtime_suspend(struct device *dev)
1370{
1371 struct platform_device *pdev = to_platform_device(dev);
2427bb24 1372 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
0246c471
MD
1373
1374 /* turn off LCDC hardware */
2427bb24
LP
1375 lcdc_write(priv, _LDCNT1R, 0);
1376
0246c471
MD
1377 return 0;
1378}
1379
1380static int sh_mobile_lcdc_runtime_resume(struct device *dev)
1381{
1382 struct platform_device *pdev = to_platform_device(dev);
2427bb24 1383 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
0246c471 1384
2427bb24 1385 __sh_mobile_lcdc_start(priv);
0246c471
MD
1386
1387 return 0;
1388}
1389
47145210 1390static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
2feb075a
MD
1391 .suspend = sh_mobile_lcdc_suspend,
1392 .resume = sh_mobile_lcdc_resume,
0246c471
MD
1393 .runtime_suspend = sh_mobile_lcdc_runtime_suspend,
1394 .runtime_resume = sh_mobile_lcdc_runtime_resume,
2feb075a
MD
1395};
1396
6de9edd5 1397/* locking: called with info->lock held */
6011bdea
GL
1398static int sh_mobile_lcdc_notify(struct notifier_block *nb,
1399 unsigned long action, void *data)
1400{
1401 struct fb_event *event = data;
1402 struct fb_info *info = event->info;
1403 struct sh_mobile_lcdc_chan *ch = info->par;
1404 struct sh_mobile_lcdc_board_cfg *board_cfg = &ch->cfg.board_cfg;
6011bdea
GL
1405
1406 if (&ch->lcdc->notifier != nb)
baf16374 1407 return NOTIFY_DONE;
6011bdea
GL
1408
1409 dev_dbg(info->dev, "%s(): action = %lu, data = %p\n",
1410 __func__, action, event->data);
1411
1412 switch(action) {
1413 case FB_EVENT_SUSPEND:
247f9938 1414 if (board_cfg->display_off && try_module_get(board_cfg->owner)) {
6011bdea 1415 board_cfg->display_off(board_cfg->board_data);
6de9edd5
GL
1416 module_put(board_cfg->owner);
1417 }
afe417c0 1418 sh_mobile_lcdc_stop(ch->lcdc);
6011bdea
GL
1419 break;
1420 case FB_EVENT_RESUME:
dd210503
GL
1421 mutex_lock(&ch->open_lock);
1422 sh_mobile_fb_reconfig(info);
1423 mutex_unlock(&ch->open_lock);
6011bdea
GL
1424
1425 /* HDMI must be enabled before LCDC configuration */
247f9938 1426 if (board_cfg->display_on && try_module_get(board_cfg->owner)) {
dd210503 1427 board_cfg->display_on(board_cfg->board_data, info);
6de9edd5 1428 module_put(board_cfg->owner);
6011bdea
GL
1429 }
1430
ebe5e12d 1431 sh_mobile_lcdc_start(ch->lcdc);
6011bdea
GL
1432 }
1433
baf16374 1434 return NOTIFY_OK;
6011bdea
GL
1435}
1436
b4bee692
LP
1437static int sh_mobile_lcdc_remove(struct platform_device *pdev)
1438{
1439 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
1440 struct fb_info *info;
1441 int i;
1442
1443 fb_unregister_client(&priv->notifier);
1444
1445 for (i = 0; i < ARRAY_SIZE(priv->ch); i++)
1446 if (priv->ch[i].info && priv->ch[i].info->dev)
1447 unregister_framebuffer(priv->ch[i].info);
1448
1449 sh_mobile_lcdc_stop(priv);
1450
1451 for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
1452 info = priv->ch[i].info;
1453
1454 if (!info || !info->device)
1455 continue;
1456
1457 if (priv->ch[i].sglist)
1458 vfree(priv->ch[i].sglist);
1459
1460 if (info->screen_base)
1461 dma_free_coherent(&pdev->dev, info->fix.smem_len,
1462 info->screen_base,
1463 priv->ch[i].dma_handle);
1464 fb_dealloc_cmap(&info->cmap);
1465 framebuffer_release(info);
1466 }
1467
1468 for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
1469 if (priv->ch[i].bl)
1470 sh_mobile_lcdc_bl_remove(priv->ch[i].bl);
1471 }
1472
1473 if (priv->dot_clk)
1474 clk_put(priv->dot_clk);
1475
1476 if (priv->dev)
1477 pm_runtime_disable(priv->dev);
1478
1479 if (priv->base)
1480 iounmap(priv->base);
1481
1482 if (priv->irq)
1483 free_irq(priv->irq, priv);
1484 kfree(priv);
1485 return 0;
1486}
cfb4f5d1 1487
3ce05599
LP
1488static int __devinit sh_mobile_lcdc_channel_init(struct sh_mobile_lcdc_chan *ch,
1489 struct device *dev)
cfb4f5d1 1490{
3ce05599
LP
1491 struct sh_mobile_lcdc_chan_cfg *cfg = &ch->cfg;
1492 const struct fb_videomode *max_mode;
1493 const struct fb_videomode *mode;
1494 struct fb_var_screeninfo *var;
cfb4f5d1 1495 struct fb_info *info;
3ce05599
LP
1496 unsigned int max_size;
1497 int num_cfg;
1498 void *buf;
1499 int ret;
1500 int i;
1501
1502 ch->info = framebuffer_alloc(0, dev);
1503 if (!ch->info) {
1504 dev_err(dev, "unable to allocate fb_info\n");
1505 return -ENOMEM;
1506 }
1507
1508 info = ch->info;
1509 var = &info->var;
1510 info->fbops = &sh_mobile_lcdc_ops;
1511 info->par = ch;
1512
1513 mutex_init(&ch->open_lock);
1514
1515 /* Iterate through the modes to validate them and find the highest
1516 * resolution.
1517 */
1518 max_mode = NULL;
1519 max_size = 0;
1520
1521 for (i = 0, mode = cfg->lcd_cfg; i < cfg->num_cfg; i++, mode++) {
1522 unsigned int size = mode->yres * mode->xres;
1523
1524 /* NV12 buffers must have even number of lines */
1525 if ((cfg->nonstd) && cfg->bpp == 12 &&
1526 (mode->yres & 0x1)) {
1527 dev_err(dev, "yres must be multiple of 2 for YCbCr420 "
1528 "mode.\n");
1529 return -EINVAL;
1530 }
1531
1532 if (size > max_size) {
1533 max_mode = mode;
1534 max_size = size;
1535 }
1536 }
1537
1538 if (!max_size)
1539 max_size = MAX_XRES * MAX_YRES;
1540 else
1541 dev_dbg(dev, "Found largest videomode %ux%u\n",
1542 max_mode->xres, max_mode->yres);
1543
1544 info->fix = sh_mobile_lcdc_fix;
1545 info->fix.smem_len = max_size * 2 * cfg->bpp / 8;
1546
1547 /* Only pan in 2 line steps for NV12 */
1548 if (cfg->nonstd && cfg->bpp == 12)
1549 info->fix.ypanstep = 2;
1550
1551 if (cfg->lcd_cfg == NULL) {
1552 mode = &default_720p;
1553 num_cfg = 1;
1554 } else {
1555 mode = cfg->lcd_cfg;
1556 num_cfg = cfg->num_cfg;
1557 }
1558
1559 fb_videomode_to_modelist(mode, num_cfg, &info->modelist);
1560
1561 fb_videomode_to_var(var, mode);
1562 var->width = cfg->lcd_size_cfg.width;
1563 var->height = cfg->lcd_size_cfg.height;
1564 /* Default Y virtual resolution is 2x panel size */
1565 var->yres_virtual = var->yres * 2;
1566 var->activate = FB_ACTIVATE_NOW;
1567
1568 ret = sh_mobile_lcdc_set_bpp(var, cfg->bpp, cfg->nonstd);
1569 if (ret)
1570 return ret;
1571
1572 buf = dma_alloc_coherent(dev, info->fix.smem_len, &ch->dma_handle,
1573 GFP_KERNEL);
1574 if (!buf) {
1575 dev_err(dev, "unable to allocate buffer\n");
1576 return -ENOMEM;
1577 }
1578
1579 info->pseudo_palette = &ch->pseudo_palette;
1580 info->flags = FBINFO_FLAG_DEFAULT;
1581
1582 ret = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0);
1583 if (ret < 0) {
1584 dev_err(dev, "unable to allocate cmap\n");
1585 dma_free_coherent(dev, info->fix.smem_len,
1586 buf, ch->dma_handle);
1587 return ret;
1588 }
1589
1590 info->fix.smem_start = ch->dma_handle;
1591 if (var->nonstd)
1592 info->fix.line_length = var->xres;
1593 else
1594 info->fix.line_length = var->xres * (cfg->bpp / 8);
1595
1596 info->screen_base = buf;
1597 info->device = dev;
1598 ch->display_var = *var;
1599
1600 return 0;
1601}
1602
1603static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
1604{
01ac25b5 1605 struct sh_mobile_lcdc_info *pdata = pdev->dev.platform_data;
3ce05599 1606 struct sh_mobile_lcdc_priv *priv;
cfb4f5d1 1607 struct resource *res;
3ce05599 1608 int num_channels;
cfb4f5d1 1609 int error;
3ce05599 1610 int i;
cfb4f5d1 1611
01ac25b5 1612 if (!pdata) {
cfb4f5d1 1613 dev_err(&pdev->dev, "no platform data defined\n");
8bed9055 1614 return -EINVAL;
cfb4f5d1
MD
1615 }
1616
1617 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
8564557a
MD
1618 i = platform_get_irq(pdev, 0);
1619 if (!res || i < 0) {
1620 dev_err(&pdev->dev, "cannot get platform resources\n");
8bed9055 1621 return -ENOENT;
cfb4f5d1
MD
1622 }
1623
1624 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1625 if (!priv) {
1626 dev_err(&pdev->dev, "cannot allocate device data\n");
8bed9055 1627 return -ENOMEM;
cfb4f5d1
MD
1628 }
1629
8bed9055
GL
1630 platform_set_drvdata(pdev, priv);
1631
8564557a 1632 error = request_irq(i, sh_mobile_lcdc_irq, IRQF_DISABLED,
7ad33e74 1633 dev_name(&pdev->dev), priv);
8564557a
MD
1634 if (error) {
1635 dev_err(&pdev->dev, "unable to request irq\n");
1636 goto err1;
1637 }
1638
1639 priv->irq = i;
5ef6b505 1640 atomic_set(&priv->hw_usecnt, -1);
cfb4f5d1 1641
3ce05599
LP
1642 for (i = 0, num_channels = 0; i < ARRAY_SIZE(pdata->ch); i++) {
1643 struct sh_mobile_lcdc_chan *ch = priv->ch + num_channels;
cfb4f5d1 1644
01ac25b5
GL
1645 ch->lcdc = priv;
1646 memcpy(&ch->cfg, &pdata->ch[i], sizeof(pdata->ch[i]));
cfb4f5d1 1647
01ac25b5 1648 error = sh_mobile_lcdc_check_interface(ch);
cfb4f5d1
MD
1649 if (error) {
1650 dev_err(&pdev->dev, "unsupported interface type\n");
1651 goto err1;
1652 }
01ac25b5
GL
1653 init_waitqueue_head(&ch->frame_end_wait);
1654 init_completion(&ch->vsync_completion);
1655 ch->pan_offset = 0;
cfb4f5d1 1656
3b0fd9d7
AC
1657 /* probe the backlight is there is one defined */
1658 if (ch->cfg.bl_info.max_brightness)
1659 ch->bl = sh_mobile_lcdc_bl_probe(&pdev->dev, ch);
1660
cfb4f5d1
MD
1661 switch (pdata->ch[i].chan) {
1662 case LCDC_CHAN_MAINLCD:
ce1c0b08 1663 ch->enabled = LDCNT2R_ME;
01ac25b5 1664 ch->reg_offs = lcdc_offs_mainlcd;
3ce05599 1665 num_channels++;
cfb4f5d1
MD
1666 break;
1667 case LCDC_CHAN_SUBLCD:
ce1c0b08 1668 ch->enabled = LDCNT2R_SE;
01ac25b5 1669 ch->reg_offs = lcdc_offs_sublcd;
3ce05599 1670 num_channels++;
cfb4f5d1
MD
1671 break;
1672 }
1673 }
1674
3ce05599 1675 if (!num_channels) {
cfb4f5d1
MD
1676 dev_err(&pdev->dev, "no channels defined\n");
1677 error = -EINVAL;
1678 goto err1;
1679 }
1680
417d4827 1681 /* for dual channel LCDC (MAIN + SUB) force shared bpp setting */
3ce05599 1682 if (num_channels == 2)
417d4827
MD
1683 priv->forced_bpp = pdata->ch[0].bpp;
1684
dba6f385
GL
1685 priv->base = ioremap_nocache(res->start, resource_size(res));
1686 if (!priv->base)
1687 goto err1;
1688
b51339ff 1689 error = sh_mobile_lcdc_setup_clocks(pdev, pdata->clock_source, priv);
cfb4f5d1
MD
1690 if (error) {
1691 dev_err(&pdev->dev, "unable to setup clocks\n");
1692 goto err1;
1693 }
1694
7caa4342
DHG
1695 priv->meram_dev = pdata->meram_dev;
1696
3ce05599 1697 for (i = 0; i < num_channels; i++) {
01ac25b5 1698 struct sh_mobile_lcdc_chan *ch = priv->ch + i;
c44f9f76 1699
3ce05599 1700 error = sh_mobile_lcdc_channel_init(ch, &pdev->dev);
cfb4f5d1 1701 if (error)
3ce05599 1702 goto err1;
cfb4f5d1
MD
1703 }
1704
cfb4f5d1
MD
1705 error = sh_mobile_lcdc_start(priv);
1706 if (error) {
1707 dev_err(&pdev->dev, "unable to start hardware\n");
1708 goto err1;
1709 }
1710
3ce05599 1711 for (i = 0; i < num_channels; i++) {
1c6a307a 1712 struct sh_mobile_lcdc_chan *ch = priv->ch + i;
3ce05599 1713 struct fb_info *info = ch->info;
1c6a307a
PM
1714
1715 if (info->fbdefio) {
8bed9055 1716 ch->sglist = vmalloc(sizeof(struct scatterlist) *
1c6a307a 1717 info->fix.smem_len >> PAGE_SHIFT);
8bed9055 1718 if (!ch->sglist) {
1c6a307a
PM
1719 dev_err(&pdev->dev, "cannot allocate sglist\n");
1720 goto err1;
1721 }
1722 }
1723
3b0fd9d7
AC
1724 info->bl_dev = ch->bl;
1725
1c6a307a 1726 error = register_framebuffer(info);
cfb4f5d1
MD
1727 if (error < 0)
1728 goto err1;
cfb4f5d1 1729
cfb4f5d1
MD
1730 dev_info(info->dev,
1731 "registered %s/%s as %dx%d %dbpp.\n",
1732 pdev->name,
1c6a307a 1733 (ch->cfg.chan == LCDC_CHAN_MAINLCD) ?
cfb4f5d1 1734 "mainlcd" : "sublcd",
c44f9f76 1735 info->var.xres, info->var.yres,
1c6a307a 1736 ch->cfg.bpp);
8564557a
MD
1737
1738 /* deferred io mode: disable clock to save power */
6011bdea 1739 if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED)
8564557a 1740 sh_mobile_lcdc_clk_off(priv);
cfb4f5d1
MD
1741 }
1742
6011bdea
GL
1743 /* Failure ignored */
1744 priv->notifier.notifier_call = sh_mobile_lcdc_notify;
1745 fb_register_client(&priv->notifier);
1746
cfb4f5d1 1747 return 0;
8bed9055 1748err1:
cfb4f5d1 1749 sh_mobile_lcdc_remove(pdev);
8bed9055 1750
cfb4f5d1
MD
1751 return error;
1752}
1753
cfb4f5d1
MD
1754static struct platform_driver sh_mobile_lcdc_driver = {
1755 .driver = {
1756 .name = "sh_mobile_lcdc_fb",
1757 .owner = THIS_MODULE,
2feb075a 1758 .pm = &sh_mobile_lcdc_dev_pm_ops,
cfb4f5d1
MD
1759 },
1760 .probe = sh_mobile_lcdc_probe,
1761 .remove = sh_mobile_lcdc_remove,
1762};
1763
1764static int __init sh_mobile_lcdc_init(void)
1765{
1766 return platform_driver_register(&sh_mobile_lcdc_driver);
1767}
1768
1769static void __exit sh_mobile_lcdc_exit(void)
1770{
1771 platform_driver_unregister(&sh_mobile_lcdc_driver);
1772}
1773
1774module_init(sh_mobile_lcdc_init);
1775module_exit(sh_mobile_lcdc_exit);
1776
1777MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver");
1778MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
1779MODULE_LICENSE("GPL v2");