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fbdev: sh_mobile_lcdc: Pass physical device pointer to DMA functions
[mirror_ubuntu-zesty-kernel.git] / drivers / video / sh_mobile_lcdcfb.c
CommitLineData
cfb4f5d1
MD
1/*
2 * SuperH Mobile LCDC Framebuffer
3 *
4 * Copyright (c) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
f1f60b5f
LP
11#include <linux/atomic.h>
12#include <linux/backlight.h>
cfb4f5d1 13#include <linux/clk.h>
f1f60b5f 14#include <linux/console.h>
cfb4f5d1 15#include <linux/dma-mapping.h>
f1f60b5f
LP
16#include <linux/delay.h>
17#include <linux/gpio.h>
18#include <linux/init.h>
8564557a 19#include <linux/interrupt.h>
40331b21 20#include <linux/ioctl.h>
f1f60b5f
LP
21#include <linux/kernel.h>
22#include <linux/mm.h>
355b200b 23#include <linux/module.h>
f1f60b5f
LP
24#include <linux/platform_device.h>
25#include <linux/pm_runtime.h>
26#include <linux/slab.h>
27#include <linux/videodev2.h>
28#include <linux/vmalloc.h>
29
225c9a8d 30#include <video/sh_mobile_lcdc.h>
8a20974f 31#include <video/sh_mobile_meram.h>
cfb4f5d1 32
6de9edd5
GL
33#include "sh_mobile_lcdcfb.h"
34
a6f15ade
PE
35#define SIDE_B_OFFSET 0x1000
36#define MIRROR_OFFSET 0x2000
cfb4f5d1 37
d2ecbab5
GL
38#define MAX_XRES 1920
39#define MAX_YRES 1080
cfb4f5d1 40
f1f60b5f
LP
41struct sh_mobile_lcdc_priv {
42 void __iomem *base;
43 int irq;
44 atomic_t hw_usecnt;
45 struct device *dev;
46 struct clk *dot_clk;
47 unsigned long lddckr;
48 struct sh_mobile_lcdc_chan ch[2];
49 struct notifier_block notifier;
50 int started;
51 int forced_fourcc; /* 2 channel LCDC must share fourcc setting */
52 struct sh_mobile_meram_info *meram_dev;
53};
54
55/* -----------------------------------------------------------------------------
56 * Registers access
57 */
58
0246c471 59static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
cfb4f5d1
MD
60 [LDDCKPAT1R] = 0x400,
61 [LDDCKPAT2R] = 0x404,
62 [LDMT1R] = 0x418,
63 [LDMT2R] = 0x41c,
64 [LDMT3R] = 0x420,
65 [LDDFR] = 0x424,
66 [LDSM1R] = 0x428,
8564557a 67 [LDSM2R] = 0x42c,
cfb4f5d1 68 [LDSA1R] = 0x430,
53b50314 69 [LDSA2R] = 0x434,
cfb4f5d1
MD
70 [LDMLSR] = 0x438,
71 [LDHCNR] = 0x448,
72 [LDHSYNR] = 0x44c,
73 [LDVLNR] = 0x450,
74 [LDVSYNR] = 0x454,
75 [LDPMR] = 0x460,
6011bdea 76 [LDHAJR] = 0x4a0,
cfb4f5d1
MD
77};
78
0246c471 79static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
cfb4f5d1
MD
80 [LDDCKPAT1R] = 0x408,
81 [LDDCKPAT2R] = 0x40c,
82 [LDMT1R] = 0x600,
83 [LDMT2R] = 0x604,
84 [LDMT3R] = 0x608,
85 [LDDFR] = 0x60c,
86 [LDSM1R] = 0x610,
8564557a 87 [LDSM2R] = 0x614,
cfb4f5d1
MD
88 [LDSA1R] = 0x618,
89 [LDMLSR] = 0x620,
90 [LDHCNR] = 0x624,
91 [LDHSYNR] = 0x628,
92 [LDVLNR] = 0x62c,
93 [LDVSYNR] = 0x630,
94 [LDPMR] = 0x63c,
95};
96
a6f15ade
PE
97static bool banked(int reg_nr)
98{
99 switch (reg_nr) {
100 case LDMT1R:
101 case LDMT2R:
102 case LDMT3R:
103 case LDDFR:
104 case LDSM1R:
105 case LDSA1R:
53b50314 106 case LDSA2R:
a6f15ade
PE
107 case LDMLSR:
108 case LDHCNR:
109 case LDHSYNR:
110 case LDVLNR:
111 case LDVSYNR:
112 return true;
113 }
114 return false;
115}
116
f1f60b5f
LP
117static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan)
118{
119 return chan->cfg.chan == LCDC_CHAN_SUBLCD;
120}
121
cfb4f5d1
MD
122static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
123 int reg_nr, unsigned long data)
124{
125 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
a6f15ade
PE
126 if (banked(reg_nr))
127 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
128 SIDE_B_OFFSET);
129}
130
131static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan,
132 int reg_nr, unsigned long data)
133{
134 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
135 MIRROR_OFFSET);
cfb4f5d1
MD
136}
137
138static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
139 int reg_nr)
140{
141 return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
142}
143
144static void lcdc_write(struct sh_mobile_lcdc_priv *priv,
145 unsigned long reg_offs, unsigned long data)
146{
147 iowrite32(data, priv->base + reg_offs);
148}
149
150static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv,
151 unsigned long reg_offs)
152{
153 return ioread32(priv->base + reg_offs);
154}
155
156static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv,
157 unsigned long reg_offs,
158 unsigned long mask, unsigned long until)
159{
160 while ((lcdc_read(priv, reg_offs) & mask) != until)
161 cpu_relax();
162}
163
f1f60b5f
LP
164/* -----------------------------------------------------------------------------
165 * Clock management
166 */
167
168static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
cfb4f5d1 169{
f1f60b5f
LP
170 if (atomic_inc_and_test(&priv->hw_usecnt)) {
171 if (priv->dot_clk)
172 clk_enable(priv->dot_clk);
173 pm_runtime_get_sync(priv->dev);
174 if (priv->meram_dev && priv->meram_dev->pdev)
175 pm_runtime_get_sync(&priv->meram_dev->pdev->dev);
176 }
cfb4f5d1
MD
177}
178
f1f60b5f
LP
179static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
180{
181 if (atomic_sub_return(1, &priv->hw_usecnt) == -1) {
182 if (priv->meram_dev && priv->meram_dev->pdev)
183 pm_runtime_put_sync(&priv->meram_dev->pdev->dev);
184 pm_runtime_put(priv->dev);
185 if (priv->dot_clk)
186 clk_disable(priv->dot_clk);
187 }
188}
189
0a7f17aa
LP
190static int sh_mobile_lcdc_setup_clocks(struct sh_mobile_lcdc_priv *priv,
191 int clock_source)
f1f60b5f 192{
4774c12a 193 struct clk *clk;
f1f60b5f
LP
194 char *str;
195
196 switch (clock_source) {
197 case LCDC_CLK_BUS:
198 str = "bus_clk";
199 priv->lddckr = LDDCKR_ICKSEL_BUS;
200 break;
201 case LCDC_CLK_PERIPHERAL:
202 str = "peripheral_clk";
203 priv->lddckr = LDDCKR_ICKSEL_MIPI;
204 break;
205 case LCDC_CLK_EXTERNAL:
206 str = NULL;
207 priv->lddckr = LDDCKR_ICKSEL_HDMI;
208 break;
209 default:
210 return -EINVAL;
211 }
212
4774c12a
LP
213 if (str == NULL)
214 return 0;
215
0a7f17aa 216 clk = clk_get(priv->dev, str);
4774c12a 217 if (IS_ERR(clk)) {
0a7f17aa 218 dev_err(priv->dev, "cannot get dot clock %s\n", str);
4774c12a 219 return PTR_ERR(clk);
f1f60b5f
LP
220 }
221
4774c12a 222 priv->dot_clk = clk;
f1f60b5f
LP
223 return 0;
224}
225
226/* -----------------------------------------------------------------------------
37c5dcc2 227 * Display, panel and deferred I/O
f1f60b5f
LP
228 */
229
cfb4f5d1
MD
230static void lcdc_sys_write_index(void *handle, unsigned long data)
231{
232 struct sh_mobile_lcdc_chan *ch = handle;
233
ce1c0b08
LP
234 lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT);
235 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
236 lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
237 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
238 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1
MD
239}
240
241static void lcdc_sys_write_data(void *handle, unsigned long data)
242{
243 struct sh_mobile_lcdc_chan *ch = handle;
244
ce1c0b08
LP
245 lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT | LDDWDxR_RSW);
246 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
247 lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
248 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
249 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1
MD
250}
251
252static unsigned long lcdc_sys_read_data(void *handle)
253{
254 struct sh_mobile_lcdc_chan *ch = handle;
255
ce1c0b08
LP
256 lcdc_write(ch->lcdc, _LDDRDR, LDDRDR_RSR);
257 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
258 lcdc_write(ch->lcdc, _LDDRAR, LDDRAR_RA |
259 (lcdc_chan_is_sublcd(ch) ? 2 : 0));
cfb4f5d1 260 udelay(1);
ce1c0b08 261 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
cfb4f5d1 262
ce1c0b08 263 return lcdc_read(ch->lcdc, _LDDRDR) & LDDRDR_DRD_MASK;
cfb4f5d1
MD
264}
265
266struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
267 lcdc_sys_write_index,
268 lcdc_sys_write_data,
269 lcdc_sys_read_data,
270};
271
1c6a307a
PM
272static int sh_mobile_lcdc_sginit(struct fb_info *info,
273 struct list_head *pagelist)
274{
275 struct sh_mobile_lcdc_chan *ch = info->par;
276 unsigned int nr_pages_max = info->fix.smem_len >> PAGE_SHIFT;
277 struct page *page;
278 int nr_pages = 0;
279
280 sg_init_table(ch->sglist, nr_pages_max);
281
282 list_for_each_entry(page, pagelist, lru)
283 sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0);
284
285 return nr_pages;
286}
287
8564557a
MD
288static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
289 struct list_head *pagelist)
290{
291 struct sh_mobile_lcdc_chan *ch = info->par;
afaad83b 292 struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg.panel_cfg;
8564557a
MD
293
294 /* enable clocks before accessing hardware */
295 sh_mobile_lcdc_clk_on(ch->lcdc);
296
5c1a56b5
PM
297 /*
298 * It's possible to get here without anything on the pagelist via
299 * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync()
300 * invocation. In the former case, the acceleration routines are
301 * stepped in to when using the framebuffer console causing the
302 * workqueue to be scheduled without any dirty pages on the list.
303 *
304 * Despite this, a panel update is still needed given that the
305 * acceleration routines have their own methods for writing in
306 * that still need to be updated.
307 *
308 * The fsync() and empty pagelist case could be optimized for,
309 * but we don't bother, as any application exhibiting such
310 * behaviour is fundamentally broken anyways.
311 */
312 if (!list_empty(pagelist)) {
313 unsigned int nr_pages = sh_mobile_lcdc_sginit(info, pagelist);
314
315 /* trigger panel update */
e8363140 316 dma_map_sg(ch->lcdc->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
afaad83b
LP
317 if (panel->start_transfer)
318 panel->start_transfer(ch, &sh_mobile_lcdc_sys_bus_ops);
ce1c0b08 319 lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG);
e8363140
LP
320 dma_unmap_sg(ch->lcdc->dev, ch->sglist, nr_pages,
321 DMA_TO_DEVICE);
ef61aae4 322 } else {
afaad83b
LP
323 if (panel->start_transfer)
324 panel->start_transfer(ch, &sh_mobile_lcdc_sys_bus_ops);
ce1c0b08 325 lcdc_write_chan(ch, LDSM2R, LDSM2R_OSTRG);
ef61aae4 326 }
8564557a
MD
327}
328
329static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
330{
331 struct fb_deferred_io *fbdefio = info->fbdefio;
332
333 if (fbdefio)
334 schedule_delayed_work(&info->deferred_work, fbdefio->delay);
335}
336
37c5dcc2
LP
337static void sh_mobile_lcdc_display_on(struct sh_mobile_lcdc_chan *ch)
338{
afaad83b 339 struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg.panel_cfg;
37c5dcc2 340
9a2985e7 341 if (ch->tx_dev) {
458981c3
LP
342 int ret;
343
344 ret = ch->tx_dev->ops->display_on(ch->tx_dev);
345 if (ret < 0)
9a2985e7 346 return;
458981c3
LP
347
348 if (ret == SH_MOBILE_LCDC_DISPLAY_DISCONNECTED)
349 ch->info->state = FBINFO_STATE_SUSPENDED;
9a2985e7
LP
350 }
351
37c5dcc2 352 /* HDMI must be enabled before LCDC configuration */
afaad83b
LP
353 if (panel->display_on)
354 panel->display_on();
37c5dcc2
LP
355}
356
357static void sh_mobile_lcdc_display_off(struct sh_mobile_lcdc_chan *ch)
358{
afaad83b 359 struct sh_mobile_lcdc_panel_cfg *panel = &ch->cfg.panel_cfg;
37c5dcc2 360
afaad83b
LP
361 if (panel->display_off)
362 panel->display_off();
9a2985e7
LP
363
364 if (ch->tx_dev)
365 ch->tx_dev->ops->display_off(ch->tx_dev);
37c5dcc2
LP
366}
367
ecd29947
LP
368static bool
369sh_mobile_lcdc_must_reconfigure(struct sh_mobile_lcdc_chan *ch,
e0c8601a 370 const struct fb_videomode *new_mode)
ecd29947 371{
ecd29947 372 dev_dbg(ch->info->dev, "Old %ux%u, new %ux%u\n",
2d04559d
LP
373 ch->display.mode.xres, ch->display.mode.yres,
374 new_mode->xres, new_mode->yres);
ecd29947 375
e0c8601a 376 /* It can be a different monitor with an equal video-mode */
2d04559d 377 if (fb_mode_is_equal(&ch->display.mode, new_mode))
ecd29947 378 return false;
ecd29947
LP
379
380 dev_dbg(ch->info->dev, "Switching %u -> %u lines\n",
2d04559d
LP
381 ch->display.mode.yres, new_mode->yres);
382 ch->display.mode = *new_mode;
ecd29947
LP
383
384 return true;
385}
386
387static int sh_mobile_check_var(struct fb_var_screeninfo *var,
388 struct fb_info *info);
389
390static int sh_mobile_lcdc_display_notify(struct sh_mobile_lcdc_chan *ch,
391 enum sh_mobile_lcdc_entity_event event,
e0c8601a
LP
392 const struct fb_videomode *mode,
393 const struct fb_monspecs *monspec)
ecd29947
LP
394{
395 struct fb_info *info = ch->info;
e0c8601a 396 struct fb_var_screeninfo var;
ecd29947
LP
397 int ret = 0;
398
399 switch (event) {
400 case SH_MOBILE_LCDC_EVENT_DISPLAY_CONNECT:
401 /* HDMI plug in */
402 if (lock_fb_info(info)) {
403 console_lock();
404
2d04559d
LP
405 ch->display.width = monspec->max_x * 10;
406 ch->display.height = monspec->max_y * 10;
e0c8601a
LP
407
408 if (!sh_mobile_lcdc_must_reconfigure(ch, mode) &&
ecd29947
LP
409 info->state == FBINFO_STATE_RUNNING) {
410 /* First activation with the default monitor.
411 * Just turn on, if we run a resume here, the
412 * logo disappears.
413 */
e0c8601a
LP
414 info->var.width = monspec->max_x * 10;
415 info->var.height = monspec->max_y * 10;
ecd29947
LP
416 sh_mobile_lcdc_display_on(ch);
417 } else {
418 /* New monitor or have to wake up */
419 fb_set_suspend(info, 0);
420 }
421
422 console_unlock();
423 unlock_fb_info(info);
424 }
425 break;
426
427 case SH_MOBILE_LCDC_EVENT_DISPLAY_DISCONNECT:
428 /* HDMI disconnect */
429 if (lock_fb_info(info)) {
430 console_lock();
431 fb_set_suspend(info, 1);
432 console_unlock();
433 unlock_fb_info(info);
434 }
435 break;
436
437 case SH_MOBILE_LCDC_EVENT_DISPLAY_MODE:
438 /* Validate a proposed new mode */
e0c8601a
LP
439 fb_videomode_to_var(&var, mode);
440 var.bits_per_pixel = info->var.bits_per_pixel;
441 var.grayscale = info->var.grayscale;
442 ret = sh_mobile_check_var(&var, info);
ecd29947
LP
443 break;
444 }
445
446 return ret;
447}
448
f1f60b5f
LP
449/* -----------------------------------------------------------------------------
450 * Format helpers
451 */
452
105784bb
LP
453struct sh_mobile_lcdc_format_info {
454 u32 fourcc;
455 unsigned int bpp;
456 bool yuv;
457 u32 lddfr;
458};
459
460static const struct sh_mobile_lcdc_format_info sh_mobile_format_infos[] = {
461 {
462 .fourcc = V4L2_PIX_FMT_RGB565,
463 .bpp = 16,
464 .yuv = false,
465 .lddfr = LDDFR_PKF_RGB16,
466 }, {
467 .fourcc = V4L2_PIX_FMT_BGR24,
468 .bpp = 24,
469 .yuv = false,
470 .lddfr = LDDFR_PKF_RGB24,
471 }, {
472 .fourcc = V4L2_PIX_FMT_BGR32,
473 .bpp = 32,
474 .yuv = false,
475 .lddfr = LDDFR_PKF_ARGB32,
476 }, {
477 .fourcc = V4L2_PIX_FMT_NV12,
478 .bpp = 12,
479 .yuv = true,
480 .lddfr = LDDFR_CC | LDDFR_YF_420,
481 }, {
482 .fourcc = V4L2_PIX_FMT_NV21,
483 .bpp = 12,
484 .yuv = true,
485 .lddfr = LDDFR_CC | LDDFR_YF_420,
486 }, {
487 .fourcc = V4L2_PIX_FMT_NV16,
488 .bpp = 16,
489 .yuv = true,
490 .lddfr = LDDFR_CC | LDDFR_YF_422,
491 }, {
492 .fourcc = V4L2_PIX_FMT_NV61,
493 .bpp = 16,
494 .yuv = true,
495 .lddfr = LDDFR_CC | LDDFR_YF_422,
496 }, {
497 .fourcc = V4L2_PIX_FMT_NV24,
498 .bpp = 24,
499 .yuv = true,
500 .lddfr = LDDFR_CC | LDDFR_YF_444,
501 }, {
502 .fourcc = V4L2_PIX_FMT_NV42,
503 .bpp = 24,
504 .yuv = true,
505 .lddfr = LDDFR_CC | LDDFR_YF_444,
506 },
507};
508
509static const struct sh_mobile_lcdc_format_info *
510sh_mobile_format_info(u32 fourcc)
511{
512 unsigned int i;
513
514 for (i = 0; i < ARRAY_SIZE(sh_mobile_format_infos); ++i) {
515 if (sh_mobile_format_infos[i].fourcc == fourcc)
516 return &sh_mobile_format_infos[i];
517 }
518
519 return NULL;
520}
521
f1f60b5f
LP
522static int sh_mobile_format_fourcc(const struct fb_var_screeninfo *var)
523{
524 if (var->grayscale > 1)
525 return var->grayscale;
526
527 switch (var->bits_per_pixel) {
528 case 16:
529 return V4L2_PIX_FMT_RGB565;
530 case 24:
531 return V4L2_PIX_FMT_BGR24;
532 case 32:
533 return V4L2_PIX_FMT_BGR32;
534 default:
535 return 0;
536 }
537}
538
539static int sh_mobile_format_is_fourcc(const struct fb_var_screeninfo *var)
540{
541 return var->grayscale > 1;
542}
543
544static bool sh_mobile_format_is_yuv(const struct fb_var_screeninfo *var)
545{
105784bb
LP
546 const struct sh_mobile_lcdc_format_info *format;
547
f1f60b5f
LP
548 if (var->grayscale <= 1)
549 return false;
550
105784bb
LP
551 format = sh_mobile_format_info(var->grayscale);
552 return format ? format->yuv : false;
f1f60b5f
LP
553}
554
555/* -----------------------------------------------------------------------------
556 * Start, stop and IRQ
557 */
558
8564557a
MD
559static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
560{
561 struct sh_mobile_lcdc_priv *priv = data;
2feb075a 562 struct sh_mobile_lcdc_chan *ch;
9dd38819 563 unsigned long ldintr;
2feb075a
MD
564 int is_sub;
565 int k;
8564557a 566
dc48665f
LP
567 /* Acknowledge interrupts and disable further VSYNC End IRQs. */
568 ldintr = lcdc_read(priv, _LDINTR);
569 lcdc_write(priv, _LDINTR, (ldintr ^ LDINTR_STATUS_MASK) & ~LDINTR_VEE);
8564557a 570
2feb075a 571 /* figure out if this interrupt is for main or sub lcd */
ce1c0b08 572 is_sub = (lcdc_read(priv, _LDSR) & LDSR_MSS) ? 1 : 0;
2feb075a 573
9dd38819 574 /* wake up channel and disable clocks */
2feb075a
MD
575 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
576 ch = &priv->ch[k];
577
578 if (!ch->enabled)
579 continue;
580
dc48665f 581 /* Frame End */
9dd38819
PE
582 if (ldintr & LDINTR_FS) {
583 if (is_sub == lcdc_chan_is_sublcd(ch)) {
584 ch->frame_end = 1;
585 wake_up(&ch->frame_end_wait);
2feb075a 586
9dd38819
PE
587 sh_mobile_lcdc_clk_off(priv);
588 }
589 }
590
591 /* VSYNC End */
40331b21
PE
592 if (ldintr & LDINTR_VES)
593 complete(&ch->vsync_completion);
2feb075a
MD
594 }
595
8564557a
MD
596 return IRQ_HANDLED;
597}
598
cfb4f5d1
MD
599static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
600 int start)
601{
602 unsigned long tmp = lcdc_read(priv, _LDCNT2R);
603 int k;
604
605 /* start or stop the lcdc */
606 if (start)
ce1c0b08 607 lcdc_write(priv, _LDCNT2R, tmp | LDCNT2R_DO);
cfb4f5d1 608 else
ce1c0b08 609 lcdc_write(priv, _LDCNT2R, tmp & ~LDCNT2R_DO);
cfb4f5d1
MD
610
611 /* wait until power is applied/stopped on all channels */
612 for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
613 if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled)
614 while (1) {
ce1c0b08
LP
615 tmp = lcdc_read_chan(&priv->ch[k], LDPMR)
616 & LDPMR_LPS;
617 if (start && tmp == LDPMR_LPS)
cfb4f5d1
MD
618 break;
619 if (!start && tmp == 0)
620 break;
621 cpu_relax();
622 }
623
624 if (!start)
625 lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */
626}
627
6011bdea
GL
628static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch)
629{
2d04559d
LP
630 const struct fb_var_screeninfo *var = &ch->info->var;
631 const struct fb_videomode *mode = &ch->display.mode;
1c120deb 632 unsigned long h_total, hsync_pos, display_h_total;
6011bdea
GL
633 u32 tmp;
634
635 tmp = ch->ldmt1r_value;
ce1c0b08
LP
636 tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : LDMT1R_VPOL;
637 tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : LDMT1R_HPOL;
638 tmp |= (ch->cfg.flags & LCDC_FLAGS_DWPOL) ? LDMT1R_DWPOL : 0;
639 tmp |= (ch->cfg.flags & LCDC_FLAGS_DIPOL) ? LDMT1R_DIPOL : 0;
640 tmp |= (ch->cfg.flags & LCDC_FLAGS_DAPOL) ? LDMT1R_DAPOL : 0;
641 tmp |= (ch->cfg.flags & LCDC_FLAGS_HSCNT) ? LDMT1R_HSCNT : 0;
642 tmp |= (ch->cfg.flags & LCDC_FLAGS_DWCNT) ? LDMT1R_DWCNT : 0;
6011bdea
GL
643 lcdc_write_chan(ch, LDMT1R, tmp);
644
645 /* setup SYS bus */
646 lcdc_write_chan(ch, LDMT2R, ch->cfg.sys_bus_cfg.ldmt2r);
647 lcdc_write_chan(ch, LDMT3R, ch->cfg.sys_bus_cfg.ldmt3r);
648
649 /* horizontal configuration */
2d04559d
LP
650 h_total = mode->xres + mode->hsync_len + mode->left_margin
651 + mode->right_margin;
6011bdea 652 tmp = h_total / 8; /* HTCN */
2d04559d 653 tmp |= (min(mode->xres, var->xres) / 8) << 16; /* HDCN */
6011bdea
GL
654 lcdc_write_chan(ch, LDHCNR, tmp);
655
2d04559d 656 hsync_pos = mode->xres + mode->right_margin;
6011bdea 657 tmp = hsync_pos / 8; /* HSYNP */
2d04559d 658 tmp |= (mode->hsync_len / 8) << 16; /* HSYNW */
6011bdea
GL
659 lcdc_write_chan(ch, LDHSYNR, tmp);
660
661 /* vertical configuration */
2d04559d
LP
662 tmp = mode->yres + mode->vsync_len + mode->upper_margin
663 + mode->lower_margin; /* VTLN */
664 tmp |= min(mode->yres, var->yres) << 16; /* VDLN */
6011bdea
GL
665 lcdc_write_chan(ch, LDVLNR, tmp);
666
2d04559d
LP
667 tmp = mode->yres + mode->lower_margin; /* VSYNP */
668 tmp |= mode->vsync_len << 16; /* VSYNW */
6011bdea
GL
669 lcdc_write_chan(ch, LDVSYNR, tmp);
670
671 /* Adjust horizontal synchronisation for HDMI */
2d04559d
LP
672 display_h_total = mode->xres + mode->hsync_len + mode->left_margin
673 + mode->right_margin;
674 tmp = ((mode->xres & 7) << 24) | ((display_h_total & 7) << 16)
675 | ((mode->hsync_len & 7) << 8) | (hsync_pos & 7);
6011bdea
GL
676 lcdc_write_chan(ch, LDHAJR, tmp);
677}
678
9a217e34
LP
679/*
680 * __sh_mobile_lcdc_start - Configure and tart the LCDC
681 * @priv: LCDC device
682 *
683 * Configure all enabled channels and start the LCDC device. All external
684 * devices (clocks, MERAM, panels, ...) are not touched by this function.
685 */
686static void __sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
cfb4f5d1
MD
687{
688 struct sh_mobile_lcdc_chan *ch;
cfb4f5d1 689 unsigned long tmp;
9a217e34 690 int k, m;
8564557a 691
9a217e34
LP
692 /* Enable LCDC channels. Read data from external memory, avoid using the
693 * BEU for now.
694 */
695 lcdc_write(priv, _LDCNT2R, priv->ch[0].enabled | priv->ch[1].enabled);
cfb4f5d1 696
9a217e34 697 /* Stop the LCDC first and disable all interrupts. */
cfb4f5d1 698 sh_mobile_lcdc_start_stop(priv, 0);
9a217e34 699 lcdc_write(priv, _LDINTR, 0);
cfb4f5d1 700
9a217e34 701 /* Configure power supply, dot clocks and start them. */
cfb4f5d1
MD
702 tmp = priv->lddckr;
703 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
704 ch = &priv->ch[k];
9a217e34 705 if (!ch->enabled)
cfb4f5d1
MD
706 continue;
707
9a217e34
LP
708 /* Power supply */
709 lcdc_write_chan(ch, LDPMR, 0);
710
cfb4f5d1
MD
711 m = ch->cfg.clock_divider;
712 if (!m)
713 continue;
714
505c7de5
LP
715 /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider
716 * denominator.
717 */
718 lcdc_write_chan(ch, LDDCKPAT1R, 0);
719 lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);
720
cfb4f5d1 721 if (m == 1)
ce1c0b08 722 m = LDDCKR_MOSEL;
cfb4f5d1 723 tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0);
cfb4f5d1
MD
724 }
725
726 lcdc_write(priv, _LDDCKR, tmp);
cfb4f5d1
MD
727 lcdc_write(priv, _LDDCKSTPR, 0);
728 lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0);
729
9a217e34 730 /* Setup geometry, format, frame buffer memory and operation mode. */
cfb4f5d1
MD
731 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
732 ch = &priv->ch[k];
cfb4f5d1
MD
733 if (!ch->enabled)
734 continue;
735
6011bdea 736 sh_mobile_lcdc_geometry(ch);
cfb4f5d1 737
fc9e78e6 738 tmp = ch->format->lddfr;
edd153a3 739
fc9e78e6 740 if (ch->format->yuv) {
edd153a3
LP
741 switch (ch->info->var.colorspace) {
742 case V4L2_COLORSPACE_REC709:
743 tmp |= LDDFR_CF1;
53b50314 744 break;
edd153a3
LP
745 case V4L2_COLORSPACE_JPEG:
746 tmp |= LDDFR_CF0;
53b50314
DHG
747 break;
748 }
417d4827 749 }
7caa4342 750
9a217e34
LP
751 lcdc_write_chan(ch, LDDFR, tmp);
752 lcdc_write_chan(ch, LDMLSR, ch->pitch);
753 lcdc_write_chan(ch, LDSA1R, ch->base_addr_y);
fc9e78e6 754 if (ch->format->yuv)
9a217e34 755 lcdc_write_chan(ch, LDSA2R, ch->base_addr_c);
7caa4342 756
9a217e34
LP
757 /* When using deferred I/O mode, configure the LCDC for one-shot
758 * operation and enable the frame end interrupt. Otherwise use
759 * continuous read mode.
760 */
761 if (ch->ldmt1r_value & LDMT1R_IFM &&
762 ch->cfg.sys_bus_cfg.deferred_io_msec) {
763 lcdc_write_chan(ch, LDSM1R, LDSM1R_OS);
764 lcdc_write(priv, _LDINTR, LDINTR_FE);
765 } else {
766 lcdc_write_chan(ch, LDSM1R, 0);
767 }
768 }
7caa4342 769
9a217e34 770 /* Word and long word swap. */
fc9e78e6 771 switch (priv->ch[0].format->fourcc) {
edd153a3
LP
772 case V4L2_PIX_FMT_RGB565:
773 case V4L2_PIX_FMT_NV21:
774 case V4L2_PIX_FMT_NV61:
775 case V4L2_PIX_FMT_NV42:
776 tmp = LDDDSR_LS | LDDDSR_WS;
777 break;
778 case V4L2_PIX_FMT_BGR24:
779 case V4L2_PIX_FMT_NV12:
780 case V4L2_PIX_FMT_NV16:
781 case V4L2_PIX_FMT_NV24:
9a217e34 782 tmp = LDDDSR_LS | LDDDSR_WS | LDDDSR_BS;
edd153a3
LP
783 break;
784 case V4L2_PIX_FMT_BGR32:
785 default:
786 tmp = LDDDSR_LS;
787 break;
9a217e34
LP
788 }
789 lcdc_write(priv, _LDDDSR, tmp);
7caa4342 790
9a217e34
LP
791 /* Enable the display output. */
792 lcdc_write(priv, _LDCNT1R, LDCNT1R_DE);
793 sh_mobile_lcdc_start_stop(priv, 1);
794 priv->started = 1;
795}
cfb4f5d1 796
9a217e34
LP
797static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
798{
799 struct sh_mobile_meram_info *mdev = priv->meram_dev;
9a217e34
LP
800 struct sh_mobile_lcdc_chan *ch;
801 unsigned long tmp;
802 int ret;
803 int k;
cfb4f5d1 804
9a217e34
LP
805 /* enable clocks before accessing the hardware */
806 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
807 if (priv->ch[k].enabled)
808 sh_mobile_lcdc_clk_on(priv);
809 }
8564557a 810
9a217e34
LP
811 /* reset */
812 lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LDCNT2R_BR);
813 lcdc_wait_bit(priv, _LDCNT2R, LDCNT2R_BR, 0);
8564557a 814
9a217e34 815 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
afaad83b 816 struct sh_mobile_lcdc_panel_cfg *panel;
8564557a 817
37c5dcc2 818 ch = &priv->ch[k];
9a217e34
LP
819 if (!ch->enabled)
820 continue;
821
afaad83b
LP
822 panel = &ch->cfg.panel_cfg;
823 if (panel->setup_sys) {
824 ret = panel->setup_sys(ch, &sh_mobile_lcdc_sys_bus_ops);
9a217e34
LP
825 if (ret)
826 return ret;
8564557a 827 }
cfb4f5d1
MD
828 }
829
9a217e34
LP
830 /* Compute frame buffer base address and pitch for each channel. */
831 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
832 struct sh_mobile_meram_cfg *cfg;
833 int pixelformat;
cfb4f5d1 834
9a217e34
LP
835 ch = &priv->ch[k];
836 if (!ch->enabled)
837 continue;
cfb4f5d1 838
9a217e34
LP
839 ch->base_addr_y = ch->info->fix.smem_start;
840 ch->base_addr_c = ch->base_addr_y
841 + ch->info->var.xres
842 * ch->info->var.yres_virtual;
843 ch->pitch = ch->info->fix.line_length;
844
845 /* Enable MERAM if possible. */
846 cfg = ch->cfg.meram_cfg;
847 if (mdev == NULL || mdev->ops == NULL || cfg == NULL)
848 continue;
849
850 /* we need to de-init configured ICBs before we can
851 * re-initialize them.
852 */
853 if (ch->meram_enabled) {
854 mdev->ops->meram_unregister(mdev, cfg);
855 ch->meram_enabled = 0;
856 }
857
fc9e78e6 858 switch (ch->format->fourcc) {
edd153a3
LP
859 case V4L2_PIX_FMT_NV12:
860 case V4L2_PIX_FMT_NV21:
861 case V4L2_PIX_FMT_NV16:
862 case V4L2_PIX_FMT_NV61:
9a217e34 863 pixelformat = SH_MOBILE_MERAM_PF_NV;
edd153a3
LP
864 break;
865 case V4L2_PIX_FMT_NV24:
866 case V4L2_PIX_FMT_NV42:
867 pixelformat = SH_MOBILE_MERAM_PF_NV24;
868 break;
869 case V4L2_PIX_FMT_RGB565:
870 case V4L2_PIX_FMT_BGR24:
871 case V4L2_PIX_FMT_BGR32:
872 default:
873 pixelformat = SH_MOBILE_MERAM_PF_RGB;
874 break;
875 }
9a217e34
LP
876
877 ret = mdev->ops->meram_register(mdev, cfg, ch->pitch,
878 ch->info->var.yres, pixelformat,
879 ch->base_addr_y, ch->base_addr_c,
880 &ch->base_addr_y, &ch->base_addr_c,
881 &ch->pitch);
882 if (!ret)
883 ch->meram_enabled = 1;
884 }
885
886 /* Start the LCDC. */
887 __sh_mobile_lcdc_start(priv);
888
889 /* Setup deferred I/O, tell the board code to enable the panels, and
890 * turn backlight on.
891 */
cfb4f5d1
MD
892 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
893 ch = &priv->ch[k];
21bc1f02
MD
894 if (!ch->enabled)
895 continue;
896
9a217e34
LP
897 tmp = ch->cfg.sys_bus_cfg.deferred_io_msec;
898 if (ch->ldmt1r_value & LDMT1R_IFM && tmp) {
899 ch->defio.deferred_io = sh_mobile_lcdc_deferred_io;
900 ch->defio.delay = msecs_to_jiffies(tmp);
901 ch->info->fbdefio = &ch->defio;
902 fb_deferred_io_init(ch->info);
903 }
904
37c5dcc2 905 sh_mobile_lcdc_display_on(ch);
3b0fd9d7
AC
906
907 if (ch->bl) {
908 ch->bl->props.power = FB_BLANK_UNBLANK;
909 backlight_update_status(ch->bl);
910 }
cfb4f5d1
MD
911 }
912
913 return 0;
914}
915
916static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
917{
918 struct sh_mobile_lcdc_chan *ch;
cfb4f5d1
MD
919 int k;
920
2feb075a 921 /* clean up deferred io and ask board code to disable panel */
cfb4f5d1
MD
922 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
923 ch = &priv->ch[k];
21bc1f02
MD
924 if (!ch->enabled)
925 continue;
8564557a 926
2feb075a
MD
927 /* deferred io mode:
928 * flush frame, and wait for frame end interrupt
929 * clean up deferred io and enable clock
930 */
5ef6b505 931 if (ch->info && ch->info->fbdefio) {
2feb075a 932 ch->frame_end = 0;
e33afddc 933 schedule_delayed_work(&ch->info->deferred_work, 0);
2feb075a 934 wait_event(ch->frame_end_wait, ch->frame_end);
e33afddc
PM
935 fb_deferred_io_cleanup(ch->info);
936 ch->info->fbdefio = NULL;
2feb075a 937 sh_mobile_lcdc_clk_on(priv);
8564557a 938 }
2feb075a 939
3b0fd9d7
AC
940 if (ch->bl) {
941 ch->bl->props.power = FB_BLANK_POWERDOWN;
942 backlight_update_status(ch->bl);
943 }
944
37c5dcc2 945 sh_mobile_lcdc_display_off(ch);
7caa4342
DHG
946
947 /* disable the meram */
948 if (ch->meram_enabled) {
949 struct sh_mobile_meram_cfg *cfg;
950 struct sh_mobile_meram_info *mdev;
951 cfg = ch->cfg.meram_cfg;
952 mdev = priv->meram_dev;
953 mdev->ops->meram_unregister(mdev, cfg);
954 ch->meram_enabled = 0;
955 }
956
cfb4f5d1
MD
957 }
958
959 /* stop the lcdc */
8e9bb19e
MD
960 if (priv->started) {
961 sh_mobile_lcdc_start_stop(priv, 0);
962 priv->started = 0;
963 }
b51339ff 964
8564557a
MD
965 /* stop clocks */
966 for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
967 if (priv->ch[k].enabled)
968 sh_mobile_lcdc_clk_off(priv);
cfb4f5d1
MD
969}
970
f1f60b5f
LP
971/* -----------------------------------------------------------------------------
972 * Frame buffer operations
973 */
cfb4f5d1
MD
974
975static int sh_mobile_lcdc_setcolreg(u_int regno,
976 u_int red, u_int green, u_int blue,
977 u_int transp, struct fb_info *info)
978{
979 u32 *palette = info->pseudo_palette;
980
981 if (regno >= PALETTE_NR)
982 return -EINVAL;
983
984 /* only FB_VISUAL_TRUECOLOR supported */
985
986 red >>= 16 - info->var.red.length;
987 green >>= 16 - info->var.green.length;
988 blue >>= 16 - info->var.blue.length;
989 transp >>= 16 - info->var.transp.length;
990
991 palette[regno] = (red << info->var.red.offset) |
992 (green << info->var.green.offset) |
993 (blue << info->var.blue.offset) |
994 (transp << info->var.transp.offset);
995
996 return 0;
997}
998
999static struct fb_fix_screeninfo sh_mobile_lcdc_fix = {
1000 .id = "SH Mobile LCDC",
1001 .type = FB_TYPE_PACKED_PIXELS,
1002 .visual = FB_VISUAL_TRUECOLOR,
1003 .accel = FB_ACCEL_NONE,
9dd38819
PE
1004 .xpanstep = 0,
1005 .ypanstep = 1,
1006 .ywrapstep = 0,
edd153a3 1007 .capabilities = FB_CAP_FOURCC,
cfb4f5d1
MD
1008};
1009
8564557a
MD
1010static void sh_mobile_lcdc_fillrect(struct fb_info *info,
1011 const struct fb_fillrect *rect)
1012{
1013 sys_fillrect(info, rect);
1014 sh_mobile_lcdc_deferred_io_touch(info);
1015}
1016
1017static void sh_mobile_lcdc_copyarea(struct fb_info *info,
1018 const struct fb_copyarea *area)
1019{
1020 sys_copyarea(info, area);
1021 sh_mobile_lcdc_deferred_io_touch(info);
1022}
1023
1024static void sh_mobile_lcdc_imageblit(struct fb_info *info,
1025 const struct fb_image *image)
1026{
1027 sys_imageblit(info, image);
1028 sh_mobile_lcdc_deferred_io_touch(info);
1029}
1030
9dd38819
PE
1031static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var,
1032 struct fb_info *info)
1033{
1034 struct sh_mobile_lcdc_chan *ch = info->par;
92e1f9a7
PE
1035 struct sh_mobile_lcdc_priv *priv = ch->lcdc;
1036 unsigned long ldrcntr;
1037 unsigned long new_pan_offset;
53b50314
DHG
1038 unsigned long base_addr_y, base_addr_c;
1039 unsigned long c_offset;
edd153a3 1040 bool yuv = sh_mobile_format_is_yuv(&info->var);
92e1f9a7 1041
edd153a3 1042 if (!yuv)
dc1d5ada
LP
1043 new_pan_offset = var->yoffset * info->fix.line_length
1044 + var->xoffset * (info->var.bits_per_pixel / 8);
53b50314 1045 else
dc1d5ada
LP
1046 new_pan_offset = var->yoffset * info->fix.line_length
1047 + var->xoffset;
9dd38819 1048
92e1f9a7 1049 if (new_pan_offset == ch->pan_offset)
9dd38819
PE
1050 return 0; /* No change, do nothing */
1051
92e1f9a7 1052 ldrcntr = lcdc_read(priv, _LDRCNTR);
9dd38819 1053
92e1f9a7 1054 /* Set the source address for the next refresh */
53b50314 1055 base_addr_y = ch->dma_handle + new_pan_offset;
edd153a3 1056 if (yuv) {
53b50314 1057 /* Set y offset */
dc1d5ada
LP
1058 c_offset = var->yoffset * info->fix.line_length
1059 * (info->var.bits_per_pixel - 8) / 8;
1060 base_addr_c = ch->dma_handle
1061 + info->var.xres * info->var.yres_virtual
1062 + c_offset;
53b50314 1063 /* Set x offset */
fc9e78e6 1064 if (ch->format->fourcc == V4L2_PIX_FMT_NV24)
53b50314
DHG
1065 base_addr_c += 2 * var->xoffset;
1066 else
1067 base_addr_c += var->xoffset;
49d79ba2 1068 }
53b50314 1069
49d79ba2 1070 if (ch->meram_enabled) {
7caa4342
DHG
1071 struct sh_mobile_meram_cfg *cfg;
1072 struct sh_mobile_meram_info *mdev;
7caa4342
DHG
1073 int ret;
1074
1075 cfg = ch->cfg.meram_cfg;
1076 mdev = priv->meram_dev;
1077 ret = mdev->ops->meram_update(mdev, cfg,
1078 base_addr_y, base_addr_c,
49d79ba2 1079 &base_addr_y, &base_addr_c);
7caa4342
DHG
1080 if (ret)
1081 return ret;
49d79ba2 1082 }
7caa4342 1083
49d79ba2
LP
1084 ch->base_addr_y = base_addr_y;
1085 ch->base_addr_c = base_addr_c;
7caa4342 1086
49d79ba2 1087 lcdc_write_chan_mirror(ch, LDSA1R, base_addr_y);
edd153a3 1088 if (yuv)
49d79ba2 1089 lcdc_write_chan_mirror(ch, LDSA2R, base_addr_c);
53b50314 1090
92e1f9a7
PE
1091 if (lcdc_chan_is_sublcd(ch))
1092 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS);
1093 else
1094 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS);
1095
1096 ch->pan_offset = new_pan_offset;
1097
1098 sh_mobile_lcdc_deferred_io_touch(info);
9dd38819
PE
1099
1100 return 0;
1101}
1102
40331b21
PE
1103static int sh_mobile_wait_for_vsync(struct fb_info *info)
1104{
1105 struct sh_mobile_lcdc_chan *ch = info->par;
1106 unsigned long ldintr;
1107 int ret;
1108
dc48665f
LP
1109 /* Enable VSync End interrupt and be careful not to acknowledge any
1110 * pending interrupt.
1111 */
40331b21 1112 ldintr = lcdc_read(ch->lcdc, _LDINTR);
dc48665f 1113 ldintr |= LDINTR_VEE | LDINTR_STATUS_MASK;
40331b21
PE
1114 lcdc_write(ch->lcdc, _LDINTR, ldintr);
1115
1116 ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion,
1117 msecs_to_jiffies(100));
1118 if (!ret)
1119 return -ETIMEDOUT;
1120
1121 return 0;
1122}
1123
1124static int sh_mobile_ioctl(struct fb_info *info, unsigned int cmd,
1125 unsigned long arg)
1126{
1127 int retval;
1128
1129 switch (cmd) {
1130 case FBIO_WAITFORVSYNC:
1131 retval = sh_mobile_wait_for_vsync(info);
1132 break;
1133
1134 default:
1135 retval = -ENOIOCTLCMD;
1136 break;
1137 }
1138 return retval;
1139}
1140
dd210503
GL
1141static void sh_mobile_fb_reconfig(struct fb_info *info)
1142{
1143 struct sh_mobile_lcdc_chan *ch = info->par;
2d04559d
LP
1144 struct fb_var_screeninfo var;
1145 struct fb_videomode mode;
dd210503
GL
1146 struct fb_event event;
1147 int evnt = FB_EVENT_MODE_CHANGE_ALL;
1148
1149 if (ch->use_count > 1 || (ch->use_count == 1 && !info->fbcon_par))
1150 /* More framebuffer users are active */
1151 return;
1152
2d04559d 1153 fb_var_to_videomode(&mode, &info->var);
dd210503 1154
2d04559d 1155 if (fb_mode_is_equal(&ch->display.mode, &mode))
dd210503
GL
1156 return;
1157
1158 /* Display has been re-plugged, framebuffer is free now, reconfigure */
2d04559d
LP
1159 var = info->var;
1160 fb_videomode_to_var(&var, &ch->display.mode);
1161 var.width = ch->display.width;
1162 var.height = ch->display.height;
1163 var.activate = FB_ACTIVATE_NOW;
1164
1165 if (fb_set_var(info, &var) < 0)
dd210503
GL
1166 /* Couldn't reconfigure, hopefully, can continue as before */
1167 return;
1168
dd210503
GL
1169 /*
1170 * fb_set_var() calls the notifier change internally, only if
1171 * FBINFO_MISC_USEREVENT flag is set. Since we do not want to fake a
1172 * user event, we have to call the chain ourselves.
1173 */
1174 event.info = info;
2d04559d 1175 event.data = &ch->display.mode;
dd210503
GL
1176 fb_notifier_call_chain(evnt, &event);
1177}
1178
1179/*
1180 * Locking: both .fb_release() and .fb_open() are called with info->lock held if
1181 * user == 1, or with console sem held, if user == 0.
1182 */
1183static int sh_mobile_release(struct fb_info *info, int user)
1184{
1185 struct sh_mobile_lcdc_chan *ch = info->par;
1186
1187 mutex_lock(&ch->open_lock);
1188 dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
1189
1190 ch->use_count--;
1191
1192 /* Nothing to reconfigure, when called from fbcon */
1193 if (user) {
ac751efa 1194 console_lock();
dd210503 1195 sh_mobile_fb_reconfig(info);
ac751efa 1196 console_unlock();
dd210503
GL
1197 }
1198
1199 mutex_unlock(&ch->open_lock);
1200
1201 return 0;
1202}
1203
1204static int sh_mobile_open(struct fb_info *info, int user)
1205{
1206 struct sh_mobile_lcdc_chan *ch = info->par;
1207
1208 mutex_lock(&ch->open_lock);
1209 ch->use_count++;
1210
1211 dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
1212 mutex_unlock(&ch->open_lock);
1213
1214 return 0;
1215}
1216
1217static int sh_mobile_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
1218{
1219 struct sh_mobile_lcdc_chan *ch = info->par;
417d4827 1220 struct sh_mobile_lcdc_priv *p = ch->lcdc;
03862194
LP
1221 unsigned int best_dist = (unsigned int)-1;
1222 unsigned int best_xres = 0;
1223 unsigned int best_yres = 0;
1224 unsigned int i;
dd210503 1225
03862194 1226 if (var->xres > MAX_XRES || var->yres > MAX_YRES)
dd210503 1227 return -EINVAL;
03862194
LP
1228
1229 /* If board code provides us with a list of available modes, make sure
1230 * we use one of them. Find the mode closest to the requested one. The
1231 * distance between two modes is defined as the size of the
1232 * non-overlapping parts of the two rectangles.
1233 */
93ff2598
LP
1234 for (i = 0; i < ch->cfg.num_modes; ++i) {
1235 const struct fb_videomode *mode = &ch->cfg.lcd_modes[i];
03862194
LP
1236 unsigned int dist;
1237
1238 /* We can only round up. */
1239 if (var->xres > mode->xres || var->yres > mode->yres)
1240 continue;
1241
1242 dist = var->xres * var->yres + mode->xres * mode->yres
1243 - 2 * min(var->xres, mode->xres)
1244 * min(var->yres, mode->yres);
1245
1246 if (dist < best_dist) {
1247 best_xres = mode->xres;
1248 best_yres = mode->yres;
1249 best_dist = dist;
1250 }
dd210503 1251 }
417d4827 1252
03862194 1253 /* If no available mode can be used, return an error. */
93ff2598 1254 if (ch->cfg.num_modes != 0) {
03862194
LP
1255 if (best_dist == (unsigned int)-1)
1256 return -EINVAL;
1257
1258 var->xres = best_xres;
1259 var->yres = best_yres;
1260 }
1261
1262 /* Make sure the virtual resolution is at least as big as the visible
1263 * resolution.
1264 */
1265 if (var->xres_virtual < var->xres)
1266 var->xres_virtual = var->xres;
1267 if (var->yres_virtual < var->yres)
1268 var->yres_virtual = var->yres;
1269
edd153a3 1270 if (sh_mobile_format_is_fourcc(var)) {
105784bb
LP
1271 const struct sh_mobile_lcdc_format_info *format;
1272
1273 format = sh_mobile_format_info(var->grayscale);
1274 if (format == NULL)
edd153a3 1275 return -EINVAL;
105784bb 1276 var->bits_per_pixel = format->bpp;
edd153a3
LP
1277
1278 /* Default to RGB and JPEG color-spaces for RGB and YUV formats
1279 * respectively.
1280 */
105784bb 1281 if (!format->yuv)
edd153a3
LP
1282 var->colorspace = V4L2_COLORSPACE_SRGB;
1283 else if (var->colorspace != V4L2_COLORSPACE_REC709)
1284 var->colorspace = V4L2_COLORSPACE_JPEG;
1285 } else {
1286 if (var->bits_per_pixel <= 16) { /* RGB 565 */
1287 var->bits_per_pixel = 16;
1288 var->red.offset = 11;
1289 var->red.length = 5;
1290 var->green.offset = 5;
1291 var->green.length = 6;
1292 var->blue.offset = 0;
1293 var->blue.length = 5;
1294 var->transp.offset = 0;
1295 var->transp.length = 0;
1296 } else if (var->bits_per_pixel <= 24) { /* RGB 888 */
1297 var->bits_per_pixel = 24;
1298 var->red.offset = 16;
1299 var->red.length = 8;
1300 var->green.offset = 8;
1301 var->green.length = 8;
1302 var->blue.offset = 0;
1303 var->blue.length = 8;
1304 var->transp.offset = 0;
1305 var->transp.length = 0;
1306 } else if (var->bits_per_pixel <= 32) { /* RGBA 888 */
1307 var->bits_per_pixel = 32;
1308 var->red.offset = 16;
1309 var->red.length = 8;
1310 var->green.offset = 8;
1311 var->green.length = 8;
1312 var->blue.offset = 0;
1313 var->blue.length = 8;
1314 var->transp.offset = 24;
1315 var->transp.length = 8;
1316 } else
1317 return -EINVAL;
417d4827 1318
edd153a3
LP
1319 var->red.msb_right = 0;
1320 var->green.msb_right = 0;
1321 var->blue.msb_right = 0;
1322 var->transp.msb_right = 0;
1323 }
03862194
LP
1324
1325 /* Make sure we don't exceed our allocated memory. */
1326 if (var->xres_virtual * var->yres_virtual * var->bits_per_pixel / 8 >
1327 info->fix.smem_len)
1328 return -EINVAL;
1329
edd153a3
LP
1330 /* only accept the forced_fourcc for dual channel configurations */
1331 if (p->forced_fourcc &&
1332 p->forced_fourcc != sh_mobile_format_fourcc(var))
417d4827 1333 return -EINVAL;
417d4827 1334
dd210503
GL
1335 return 0;
1336}
40331b21 1337
ed5bebf2
LP
1338static int sh_mobile_set_par(struct fb_info *info)
1339{
1340 struct sh_mobile_lcdc_chan *ch = info->par;
91fba48d 1341 u32 line_length = info->fix.line_length;
ed5bebf2
LP
1342 int ret;
1343
1344 sh_mobile_lcdc_stop(ch->lcdc);
91fba48d 1345
edd153a3 1346 if (sh_mobile_format_is_yuv(&info->var))
91fba48d
LP
1347 info->fix.line_length = info->var.xres;
1348 else
1349 info->fix.line_length = info->var.xres
1350 * info->var.bits_per_pixel / 8;
1351
fc9e78e6
LP
1352 ch->format = sh_mobile_format_info(sh_mobile_format_fourcc(&info->var));
1353
ed5bebf2 1354 ret = sh_mobile_lcdc_start(ch->lcdc);
91fba48d 1355 if (ret < 0) {
ed5bebf2 1356 dev_err(info->dev, "%s: unable to restart LCDC\n", __func__);
91fba48d
LP
1357 info->fix.line_length = line_length;
1358 }
ed5bebf2 1359
edd153a3
LP
1360 if (sh_mobile_format_is_fourcc(&info->var)) {
1361 info->fix.type = FB_TYPE_FOURCC;
1362 info->fix.visual = FB_VISUAL_FOURCC;
1363 } else {
1364 info->fix.type = FB_TYPE_PACKED_PIXELS;
1365 info->fix.visual = FB_VISUAL_TRUECOLOR;
1366 }
1367
ed5bebf2
LP
1368 return ret;
1369}
1370
8857b9aa
AC
1371/*
1372 * Screen blanking. Behavior is as follows:
1373 * FB_BLANK_UNBLANK: screen unblanked, clocks enabled
1374 * FB_BLANK_NORMAL: screen blanked, clocks enabled
1375 * FB_BLANK_VSYNC,
1376 * FB_BLANK_HSYNC,
1377 * FB_BLANK_POWEROFF: screen blanked, clocks disabled
1378 */
1379static int sh_mobile_lcdc_blank(int blank, struct fb_info *info)
1380{
1381 struct sh_mobile_lcdc_chan *ch = info->par;
1382 struct sh_mobile_lcdc_priv *p = ch->lcdc;
1383
1384 /* blank the screen? */
1385 if (blank > FB_BLANK_UNBLANK && ch->blank_status == FB_BLANK_UNBLANK) {
1386 struct fb_fillrect rect = {
1387 .width = info->var.xres,
1388 .height = info->var.yres,
1389 };
1390 sh_mobile_lcdc_fillrect(info, &rect);
1391 }
1392 /* turn clocks on? */
1393 if (blank <= FB_BLANK_NORMAL && ch->blank_status > FB_BLANK_NORMAL) {
1394 sh_mobile_lcdc_clk_on(p);
1395 }
1396 /* turn clocks off? */
1397 if (blank > FB_BLANK_NORMAL && ch->blank_status <= FB_BLANK_NORMAL) {
1398 /* make sure the screen is updated with the black fill before
1399 * switching the clocks off. one vsync is not enough since
1400 * blanking may occur in the middle of a refresh. deferred io
1401 * mode will reenable the clocks and update the screen in time,
1402 * so it does not need this. */
1403 if (!info->fbdefio) {
1404 sh_mobile_wait_for_vsync(info);
1405 sh_mobile_wait_for_vsync(info);
1406 }
1407 sh_mobile_lcdc_clk_off(p);
1408 }
1409
1410 ch->blank_status = blank;
1411 return 0;
1412}
1413
cfb4f5d1 1414static struct fb_ops sh_mobile_lcdc_ops = {
9dd38819 1415 .owner = THIS_MODULE,
cfb4f5d1 1416 .fb_setcolreg = sh_mobile_lcdc_setcolreg,
2540c111
MD
1417 .fb_read = fb_sys_read,
1418 .fb_write = fb_sys_write,
8564557a
MD
1419 .fb_fillrect = sh_mobile_lcdc_fillrect,
1420 .fb_copyarea = sh_mobile_lcdc_copyarea,
1421 .fb_imageblit = sh_mobile_lcdc_imageblit,
8857b9aa 1422 .fb_blank = sh_mobile_lcdc_blank,
9dd38819 1423 .fb_pan_display = sh_mobile_fb_pan_display,
40331b21 1424 .fb_ioctl = sh_mobile_ioctl,
dd210503
GL
1425 .fb_open = sh_mobile_open,
1426 .fb_release = sh_mobile_release,
1427 .fb_check_var = sh_mobile_check_var,
ed5bebf2 1428 .fb_set_par = sh_mobile_set_par,
cfb4f5d1
MD
1429};
1430
a67f379d
LP
1431static void
1432sh_mobile_lcdc_channel_fb_unregister(struct sh_mobile_lcdc_chan *ch)
1433{
1434 if (ch->info && ch->info->dev)
1435 unregister_framebuffer(ch->info);
1436}
1437
1438static int __devinit
1439sh_mobile_lcdc_channel_fb_register(struct sh_mobile_lcdc_chan *ch)
1440{
1441 struct fb_info *info = ch->info;
1442 int ret;
1443
1444 if (info->fbdefio) {
1445 ch->sglist = vmalloc(sizeof(struct scatterlist) *
1446 ch->fb_size >> PAGE_SHIFT);
1447 if (!ch->sglist) {
1448 dev_err(ch->lcdc->dev, "cannot allocate sglist\n");
1449 return -ENOMEM;
1450 }
1451 }
1452
1453 info->bl_dev = ch->bl;
1454
1455 ret = register_framebuffer(info);
1456 if (ret < 0)
1457 return ret;
1458
1459 dev_info(ch->lcdc->dev, "registered %s/%s as %dx%d %dbpp.\n",
1460 dev_name(ch->lcdc->dev), (ch->cfg.chan == LCDC_CHAN_MAINLCD) ?
1461 "mainlcd" : "sublcd", info->var.xres, info->var.yres,
1462 info->var.bits_per_pixel);
1463
1464 /* deferred io mode: disable clock to save power */
1465 if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED)
1466 sh_mobile_lcdc_clk_off(ch->lcdc);
1467
1468 return ret;
1469}
1470
1471static void
1472sh_mobile_lcdc_channel_fb_cleanup(struct sh_mobile_lcdc_chan *ch)
1473{
1474 struct fb_info *info = ch->info;
1475
1476 if (!info || !info->device)
1477 return;
1478
1479 if (ch->sglist)
1480 vfree(ch->sglist);
1481
1482 fb_dealloc_cmap(&info->cmap);
1483 framebuffer_release(info);
1484}
1485
1486static int __devinit
1487sh_mobile_lcdc_channel_fb_init(struct sh_mobile_lcdc_chan *ch,
1488 const struct fb_videomode *mode,
1489 unsigned int num_modes)
1490{
1491 struct sh_mobile_lcdc_priv *priv = ch->lcdc;
1492 struct fb_var_screeninfo *var;
1493 struct fb_info *info;
1494 int ret;
1495
1496 /* Allocate and initialize the frame buffer device. Create the modes
1497 * list and allocate the color map.
1498 */
1499 info = framebuffer_alloc(0, priv->dev);
1500 if (info == NULL) {
1501 dev_err(priv->dev, "unable to allocate fb_info\n");
1502 return -ENOMEM;
1503 }
1504
1505 ch->info = info;
1506
1507 info->flags = FBINFO_FLAG_DEFAULT;
1508 info->fbops = &sh_mobile_lcdc_ops;
1509 info->device = priv->dev;
1510 info->screen_base = ch->fb_mem;
1511 info->pseudo_palette = &ch->pseudo_palette;
1512 info->par = ch;
1513
1514 fb_videomode_to_modelist(mode, num_modes, &info->modelist);
1515
1516 ret = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0);
1517 if (ret < 0) {
1518 dev_err(priv->dev, "unable to allocate cmap\n");
1519 return ret;
1520 }
1521
1522 /* Initialize fixed screen information. Restrict pan to 2 lines steps
1523 * for NV12 and NV21.
1524 */
1525 info->fix = sh_mobile_lcdc_fix;
1526 info->fix.smem_start = ch->dma_handle;
1527 info->fix.smem_len = ch->fb_size;
1528 if (ch->format->fourcc == V4L2_PIX_FMT_NV12 ||
1529 ch->format->fourcc == V4L2_PIX_FMT_NV21)
1530 info->fix.ypanstep = 2;
1531
1532 /* Initialize variable screen information using the first mode as
1533 * default. The default Y virtual resolution is twice the panel size to
1534 * allow for double-buffering.
1535 */
1536 var = &info->var;
1537 fb_videomode_to_var(var, mode);
1538 var->width = ch->cfg.panel_cfg.width;
1539 var->height = ch->cfg.panel_cfg.height;
1540 var->yres_virtual = var->yres * 2;
1541 var->activate = FB_ACTIVATE_NOW;
1542
1543 /* Use the legacy API by default for RGB formats, and the FOURCC API
1544 * for YUV formats.
1545 */
1546 if (!ch->format->yuv)
1547 var->bits_per_pixel = ch->format->bpp;
1548 else
1549 var->grayscale = ch->format->fourcc;
1550
1551 ret = sh_mobile_check_var(var, info);
1552 if (ret)
1553 return ret;
1554
1555 if (ch->format->yuv) {
1556 info->fix.line_length = var->xres;
1557 info->fix.visual = FB_VISUAL_FOURCC;
1558 } else {
1559 info->fix.line_length = var->xres * ch->format->bpp / 8;
1560 info->fix.visual = FB_VISUAL_TRUECOLOR;
1561 }
1562
1563 return 0;
1564}
1565
f1f60b5f
LP
1566/* -----------------------------------------------------------------------------
1567 * Backlight
1568 */
1569
3b0fd9d7
AC
1570static int sh_mobile_lcdc_update_bl(struct backlight_device *bdev)
1571{
1572 struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
3b0fd9d7
AC
1573 int brightness = bdev->props.brightness;
1574
1575 if (bdev->props.power != FB_BLANK_UNBLANK ||
1576 bdev->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
1577 brightness = 0;
1578
43059b0f 1579 return ch->cfg.bl_info.set_brightness(brightness);
3b0fd9d7
AC
1580}
1581
1582static int sh_mobile_lcdc_get_brightness(struct backlight_device *bdev)
1583{
1584 struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev);
3b0fd9d7 1585
43059b0f 1586 return ch->cfg.bl_info.get_brightness();
3b0fd9d7
AC
1587}
1588
1589static int sh_mobile_lcdc_check_fb(struct backlight_device *bdev,
1590 struct fb_info *info)
1591{
1592 return (info->bl_dev == bdev);
1593}
1594
1595static struct backlight_ops sh_mobile_lcdc_bl_ops = {
1596 .options = BL_CORE_SUSPENDRESUME,
1597 .update_status = sh_mobile_lcdc_update_bl,
1598 .get_brightness = sh_mobile_lcdc_get_brightness,
1599 .check_fb = sh_mobile_lcdc_check_fb,
1600};
1601
1602static struct backlight_device *sh_mobile_lcdc_bl_probe(struct device *parent,
1603 struct sh_mobile_lcdc_chan *ch)
1604{
1605 struct backlight_device *bl;
1606
1607 bl = backlight_device_register(ch->cfg.bl_info.name, parent, ch,
1608 &sh_mobile_lcdc_bl_ops, NULL);
beee1f20
DC
1609 if (IS_ERR(bl)) {
1610 dev_err(parent, "unable to register backlight device: %ld\n",
1611 PTR_ERR(bl));
3b0fd9d7
AC
1612 return NULL;
1613 }
1614
1615 bl->props.max_brightness = ch->cfg.bl_info.max_brightness;
1616 bl->props.brightness = bl->props.max_brightness;
1617 backlight_update_status(bl);
1618
1619 return bl;
1620}
1621
1622static void sh_mobile_lcdc_bl_remove(struct backlight_device *bdev)
1623{
1624 backlight_device_unregister(bdev);
1625}
1626
f1f60b5f
LP
1627/* -----------------------------------------------------------------------------
1628 * Power management
1629 */
1630
2feb075a
MD
1631static int sh_mobile_lcdc_suspend(struct device *dev)
1632{
1633 struct platform_device *pdev = to_platform_device(dev);
1634
1635 sh_mobile_lcdc_stop(platform_get_drvdata(pdev));
1636 return 0;
1637}
1638
1639static int sh_mobile_lcdc_resume(struct device *dev)
1640{
1641 struct platform_device *pdev = to_platform_device(dev);
1642
1643 return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
1644}
1645
0246c471
MD
1646static int sh_mobile_lcdc_runtime_suspend(struct device *dev)
1647{
1648 struct platform_device *pdev = to_platform_device(dev);
2427bb24 1649 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
0246c471
MD
1650
1651 /* turn off LCDC hardware */
2427bb24
LP
1652 lcdc_write(priv, _LDCNT1R, 0);
1653
0246c471
MD
1654 return 0;
1655}
1656
1657static int sh_mobile_lcdc_runtime_resume(struct device *dev)
1658{
1659 struct platform_device *pdev = to_platform_device(dev);
2427bb24 1660 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
0246c471 1661
2427bb24 1662 __sh_mobile_lcdc_start(priv);
0246c471
MD
1663
1664 return 0;
1665}
1666
47145210 1667static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
2feb075a
MD
1668 .suspend = sh_mobile_lcdc_suspend,
1669 .resume = sh_mobile_lcdc_resume,
0246c471
MD
1670 .runtime_suspend = sh_mobile_lcdc_runtime_suspend,
1671 .runtime_resume = sh_mobile_lcdc_runtime_resume,
2feb075a
MD
1672};
1673
f1f60b5f
LP
1674/* -----------------------------------------------------------------------------
1675 * Framebuffer notifier
1676 */
1677
6de9edd5 1678/* locking: called with info->lock held */
6011bdea
GL
1679static int sh_mobile_lcdc_notify(struct notifier_block *nb,
1680 unsigned long action, void *data)
1681{
1682 struct fb_event *event = data;
1683 struct fb_info *info = event->info;
1684 struct sh_mobile_lcdc_chan *ch = info->par;
6011bdea
GL
1685
1686 if (&ch->lcdc->notifier != nb)
baf16374 1687 return NOTIFY_DONE;
6011bdea
GL
1688
1689 dev_dbg(info->dev, "%s(): action = %lu, data = %p\n",
1690 __func__, action, event->data);
1691
1692 switch(action) {
1693 case FB_EVENT_SUSPEND:
37c5dcc2 1694 sh_mobile_lcdc_display_off(ch);
afe417c0 1695 sh_mobile_lcdc_stop(ch->lcdc);
6011bdea
GL
1696 break;
1697 case FB_EVENT_RESUME:
dd210503
GL
1698 mutex_lock(&ch->open_lock);
1699 sh_mobile_fb_reconfig(info);
1700 mutex_unlock(&ch->open_lock);
6011bdea 1701
37c5dcc2 1702 sh_mobile_lcdc_display_on(ch);
ebe5e12d 1703 sh_mobile_lcdc_start(ch->lcdc);
6011bdea
GL
1704 }
1705
baf16374 1706 return NOTIFY_OK;
6011bdea
GL
1707}
1708
f1f60b5f
LP
1709/* -----------------------------------------------------------------------------
1710 * Probe/remove and driver init/exit
1711 */
1712
217e9c43 1713static const struct fb_videomode default_720p __devinitconst = {
f1f60b5f
LP
1714 .name = "HDMI 720p",
1715 .xres = 1280,
1716 .yres = 720,
1717
1718 .left_margin = 220,
1719 .right_margin = 110,
1720 .hsync_len = 40,
1721
1722 .upper_margin = 20,
1723 .lower_margin = 5,
1724 .vsync_len = 5,
1725
1726 .pixclock = 13468,
1727 .refresh = 60,
1728 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
1729};
1730
b4bee692
LP
1731static int sh_mobile_lcdc_remove(struct platform_device *pdev)
1732{
1733 struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
b4bee692
LP
1734 int i;
1735
1736 fb_unregister_client(&priv->notifier);
1737
1738 for (i = 0; i < ARRAY_SIZE(priv->ch); i++)
a67f379d 1739 sh_mobile_lcdc_channel_fb_unregister(&priv->ch[i]);
b4bee692
LP
1740
1741 sh_mobile_lcdc_stop(priv);
1742
1743 for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
9a2985e7 1744 struct sh_mobile_lcdc_chan *ch = &priv->ch[i];
b4bee692 1745
e34d0bbb
LP
1746 if (ch->tx_dev) {
1747 ch->tx_dev->lcdc = NULL;
9a2985e7 1748 module_put(ch->cfg.tx_dev->dev.driver->owner);
e34d0bbb 1749 }
9a2985e7 1750
a67f379d 1751 sh_mobile_lcdc_channel_fb_cleanup(ch);
b4bee692 1752
a67f379d
LP
1753 if (ch->fb_mem)
1754 dma_free_coherent(&pdev->dev, ch->fb_size,
1755 ch->fb_mem, ch->dma_handle);
b4bee692
LP
1756 }
1757
1758 for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
1759 if (priv->ch[i].bl)
1760 sh_mobile_lcdc_bl_remove(priv->ch[i].bl);
1761 }
1762
4774c12a
LP
1763 if (priv->dot_clk) {
1764 pm_runtime_disable(&pdev->dev);
b4bee692 1765 clk_put(priv->dot_clk);
4774c12a 1766 }
b4bee692
LP
1767
1768 if (priv->base)
1769 iounmap(priv->base);
1770
1771 if (priv->irq)
1772 free_irq(priv->irq, priv);
1773 kfree(priv);
1774 return 0;
1775}
cfb4f5d1 1776
217e9c43 1777static int __devinit sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
f1f60b5f
LP
1778{
1779 int interface_type = ch->cfg.interface_type;
1780
1781 switch (interface_type) {
1782 case RGB8:
1783 case RGB9:
1784 case RGB12A:
1785 case RGB12B:
1786 case RGB16:
1787 case RGB18:
1788 case RGB24:
1789 case SYS8A:
1790 case SYS8B:
1791 case SYS8C:
1792 case SYS8D:
1793 case SYS9:
1794 case SYS12:
1795 case SYS16A:
1796 case SYS16B:
1797 case SYS16C:
1798 case SYS18:
1799 case SYS24:
1800 break;
1801 default:
1802 return -EINVAL;
1803 }
1804
1805 /* SUBLCD only supports SYS interface */
1806 if (lcdc_chan_is_sublcd(ch)) {
1807 if (!(interface_type & LDMT1R_IFM))
1808 return -EINVAL;
1809
1810 interface_type &= ~LDMT1R_IFM;
1811 }
1812
1813 ch->ldmt1r_value = interface_type;
1814 return 0;
1815}
1816
0a7f17aa
LP
1817static int __devinit
1818sh_mobile_lcdc_channel_init(struct sh_mobile_lcdc_priv *priv,
1819 struct sh_mobile_lcdc_chan *ch)
cfb4f5d1 1820{
105784bb 1821 const struct sh_mobile_lcdc_format_info *format;
3ce05599
LP
1822 struct sh_mobile_lcdc_chan_cfg *cfg = &ch->cfg;
1823 const struct fb_videomode *max_mode;
1824 const struct fb_videomode *mode;
a67f379d 1825 unsigned int num_modes;
3ce05599 1826 unsigned int max_size;
a67f379d 1827 unsigned int i;
3ce05599 1828
a67472ad 1829 mutex_init(&ch->open_lock);
ecd29947 1830 ch->notify = sh_mobile_lcdc_display_notify;
a67472ad 1831
105784bb
LP
1832 /* Validate the format. */
1833 format = sh_mobile_format_info(cfg->fourcc);
1834 if (format == NULL) {
1835 dev_err(priv->dev, "Invalid FOURCC %08x.\n", cfg->fourcc);
1836 return -EINVAL;
1837 }
1838
fc9e78e6
LP
1839 ch->format = format;
1840
3ce05599
LP
1841 /* Iterate through the modes to validate them and find the highest
1842 * resolution.
1843 */
1844 max_mode = NULL;
1845 max_size = 0;
1846
93ff2598 1847 for (i = 0, mode = cfg->lcd_modes; i < cfg->num_modes; i++, mode++) {
3ce05599
LP
1848 unsigned int size = mode->yres * mode->xres;
1849
edd153a3
LP
1850 /* NV12/NV21 buffers must have even number of lines */
1851 if ((cfg->fourcc == V4L2_PIX_FMT_NV12 ||
1852 cfg->fourcc == V4L2_PIX_FMT_NV21) && (mode->yres & 0x1)) {
0a7f17aa
LP
1853 dev_err(priv->dev, "yres must be multiple of 2 for "
1854 "YCbCr420 mode.\n");
3ce05599
LP
1855 return -EINVAL;
1856 }
1857
1858 if (size > max_size) {
1859 max_mode = mode;
1860 max_size = size;
1861 }
1862 }
1863
1864 if (!max_size)
1865 max_size = MAX_XRES * MAX_YRES;
1866 else
0a7f17aa 1867 dev_dbg(priv->dev, "Found largest videomode %ux%u\n",
3ce05599
LP
1868 max_mode->xres, max_mode->yres);
1869
93ff2598 1870 if (cfg->lcd_modes == NULL) {
3ce05599 1871 mode = &default_720p;
93ff2598 1872 num_modes = 1;
3ce05599 1873 } else {
93ff2598
LP
1874 mode = cfg->lcd_modes;
1875 num_modes = cfg->num_modes;
3ce05599
LP
1876 }
1877
a67f379d
LP
1878 ch->display.width = cfg->panel_cfg.width;
1879 ch->display.height = cfg->panel_cfg.height;
1880 ch->display.mode = *mode;
1881
1882 /* Allocate frame buffer memory. */
1883 ch->fb_size = max_size * format->bpp / 8 * 2;
1884 ch->fb_mem = dma_alloc_coherent(priv->dev, ch->fb_size, &ch->dma_handle,
1885 GFP_KERNEL);
1886 if (ch->fb_mem == NULL) {
1887 dev_err(priv->dev, "unable to allocate buffer\n");
1888 return -ENOMEM;
1889 }
3ce05599 1890
13f80eea
LP
1891 /* Initialize the transmitter device if present. */
1892 if (cfg->tx_dev) {
1893 if (!cfg->tx_dev->dev.driver ||
1894 !try_module_get(cfg->tx_dev->dev.driver->owner)) {
1895 dev_warn(priv->dev,
1896 "unable to get transmitter device\n");
1897 return -EINVAL;
1898 }
1899 ch->tx_dev = platform_get_drvdata(cfg->tx_dev);
1900 ch->tx_dev->lcdc = ch;
1901 ch->tx_dev->def_mode = *mode;
1902 }
1903
a67f379d 1904 return sh_mobile_lcdc_channel_fb_init(ch, mode, num_modes);
3ce05599
LP
1905}
1906
1907static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
1908{
01ac25b5 1909 struct sh_mobile_lcdc_info *pdata = pdev->dev.platform_data;
3ce05599 1910 struct sh_mobile_lcdc_priv *priv;
cfb4f5d1 1911 struct resource *res;
3ce05599 1912 int num_channels;
cfb4f5d1 1913 int error;
3ce05599 1914 int i;
cfb4f5d1 1915
01ac25b5 1916 if (!pdata) {
cfb4f5d1 1917 dev_err(&pdev->dev, "no platform data defined\n");
8bed9055 1918 return -EINVAL;
cfb4f5d1
MD
1919 }
1920
1921 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
8564557a
MD
1922 i = platform_get_irq(pdev, 0);
1923 if (!res || i < 0) {
1924 dev_err(&pdev->dev, "cannot get platform resources\n");
8bed9055 1925 return -ENOENT;
cfb4f5d1
MD
1926 }
1927
1928 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1929 if (!priv) {
1930 dev_err(&pdev->dev, "cannot allocate device data\n");
8bed9055 1931 return -ENOMEM;
cfb4f5d1
MD
1932 }
1933
4774c12a
LP
1934 priv->dev = &pdev->dev;
1935 priv->meram_dev = pdata->meram_dev;
8bed9055
GL
1936 platform_set_drvdata(pdev, priv);
1937
f8798ccb 1938 error = request_irq(i, sh_mobile_lcdc_irq, 0,
7ad33e74 1939 dev_name(&pdev->dev), priv);
8564557a
MD
1940 if (error) {
1941 dev_err(&pdev->dev, "unable to request irq\n");
1942 goto err1;
1943 }
1944
1945 priv->irq = i;
5ef6b505 1946 atomic_set(&priv->hw_usecnt, -1);
cfb4f5d1 1947
3ce05599
LP
1948 for (i = 0, num_channels = 0; i < ARRAY_SIZE(pdata->ch); i++) {
1949 struct sh_mobile_lcdc_chan *ch = priv->ch + num_channels;
cfb4f5d1 1950
01ac25b5
GL
1951 ch->lcdc = priv;
1952 memcpy(&ch->cfg, &pdata->ch[i], sizeof(pdata->ch[i]));
cfb4f5d1 1953
01ac25b5 1954 error = sh_mobile_lcdc_check_interface(ch);
cfb4f5d1
MD
1955 if (error) {
1956 dev_err(&pdev->dev, "unsupported interface type\n");
1957 goto err1;
1958 }
01ac25b5
GL
1959 init_waitqueue_head(&ch->frame_end_wait);
1960 init_completion(&ch->vsync_completion);
1961 ch->pan_offset = 0;
cfb4f5d1 1962
3b0fd9d7
AC
1963 /* probe the backlight is there is one defined */
1964 if (ch->cfg.bl_info.max_brightness)
1965 ch->bl = sh_mobile_lcdc_bl_probe(&pdev->dev, ch);
1966
cfb4f5d1
MD
1967 switch (pdata->ch[i].chan) {
1968 case LCDC_CHAN_MAINLCD:
ce1c0b08 1969 ch->enabled = LDCNT2R_ME;
01ac25b5 1970 ch->reg_offs = lcdc_offs_mainlcd;
3ce05599 1971 num_channels++;
cfb4f5d1
MD
1972 break;
1973 case LCDC_CHAN_SUBLCD:
ce1c0b08 1974 ch->enabled = LDCNT2R_SE;
01ac25b5 1975 ch->reg_offs = lcdc_offs_sublcd;
3ce05599 1976 num_channels++;
cfb4f5d1
MD
1977 break;
1978 }
1979 }
1980
3ce05599 1981 if (!num_channels) {
cfb4f5d1
MD
1982 dev_err(&pdev->dev, "no channels defined\n");
1983 error = -EINVAL;
1984 goto err1;
1985 }
1986
edd153a3 1987 /* for dual channel LCDC (MAIN + SUB) force shared format setting */
3ce05599 1988 if (num_channels == 2)
edd153a3 1989 priv->forced_fourcc = pdata->ch[0].fourcc;
417d4827 1990
dba6f385
GL
1991 priv->base = ioremap_nocache(res->start, resource_size(res));
1992 if (!priv->base)
1993 goto err1;
1994
0a7f17aa 1995 error = sh_mobile_lcdc_setup_clocks(priv, pdata->clock_source);
cfb4f5d1
MD
1996 if (error) {
1997 dev_err(&pdev->dev, "unable to setup clocks\n");
1998 goto err1;
1999 }
2000
4774c12a
LP
2001 /* Enable runtime PM. */
2002 pm_runtime_enable(&pdev->dev);
7caa4342 2003
3ce05599 2004 for (i = 0; i < num_channels; i++) {
01ac25b5 2005 struct sh_mobile_lcdc_chan *ch = priv->ch + i;
c44f9f76 2006
0a7f17aa 2007 error = sh_mobile_lcdc_channel_init(priv, ch);
cfb4f5d1 2008 if (error)
3ce05599 2009 goto err1;
cfb4f5d1
MD
2010 }
2011
cfb4f5d1
MD
2012 error = sh_mobile_lcdc_start(priv);
2013 if (error) {
2014 dev_err(&pdev->dev, "unable to start hardware\n");
2015 goto err1;
2016 }
2017
3ce05599 2018 for (i = 0; i < num_channels; i++) {
1c6a307a 2019 struct sh_mobile_lcdc_chan *ch = priv->ch + i;
1c6a307a 2020
a67f379d
LP
2021 error = sh_mobile_lcdc_channel_fb_register(ch);
2022 if (error)
cfb4f5d1 2023 goto err1;
cfb4f5d1
MD
2024 }
2025
6011bdea
GL
2026 /* Failure ignored */
2027 priv->notifier.notifier_call = sh_mobile_lcdc_notify;
2028 fb_register_client(&priv->notifier);
2029
cfb4f5d1 2030 return 0;
8bed9055 2031err1:
cfb4f5d1 2032 sh_mobile_lcdc_remove(pdev);
8bed9055 2033
cfb4f5d1
MD
2034 return error;
2035}
2036
cfb4f5d1
MD
2037static struct platform_driver sh_mobile_lcdc_driver = {
2038 .driver = {
2039 .name = "sh_mobile_lcdc_fb",
2040 .owner = THIS_MODULE,
2feb075a 2041 .pm = &sh_mobile_lcdc_dev_pm_ops,
cfb4f5d1
MD
2042 },
2043 .probe = sh_mobile_lcdc_probe,
2044 .remove = sh_mobile_lcdc_remove,
2045};
2046
4277f2c4 2047module_platform_driver(sh_mobile_lcdc_driver);
cfb4f5d1
MD
2048
2049MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver");
2050MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
2051MODULE_LICENSE("GPL v2");