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1da177e4 LT |
1 | /* |
2 | * SiS 300/630/730/540/315/550/[M]650/651/[M]661[FM]X/740/[M]741[GX]/330/[M]760[GX] | |
3 | * frame buffer driver for Linux kernels >=2.4.14 and >=2.6.3 | |
4 | * | |
5 | * Copyright (C) 2001-2004 Thomas Winischhofer, Vienna, Austria. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the named License, | |
10 | * or any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA | |
20 | */ | |
21 | ||
22 | #ifndef _SIS_H | |
23 | #define _SIS_H | |
24 | ||
25 | #include <linux/config.h> | |
26 | #include <linux/version.h> | |
27 | ||
28 | #include "osdef.h" | |
29 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) | |
30 | #include <video/sisfb.h> | |
31 | #else | |
32 | #include <linux/sisfb.h> | |
33 | #endif | |
34 | ||
35 | #include "vgatypes.h" | |
36 | #include "vstruct.h" | |
37 | ||
38 | #define VER_MAJOR 1 | |
39 | #define VER_MINOR 7 | |
40 | #define VER_LEVEL 17 | |
41 | ||
42 | #undef SIS_CONFIG_COMPAT | |
43 | ||
44 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) | |
45 | #include <linux/spinlock.h> | |
46 | #ifdef CONFIG_COMPAT | |
47 | #include <linux/ioctl32.h> | |
48 | #define SIS_CONFIG_COMPAT | |
49 | #endif | |
50 | #elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,19) | |
51 | #ifdef __x86_64__ | |
52 | /* Shouldn't we check for CONFIG_IA32_EMULATION here? */ | |
53 | #include <asm/ioctl32.h> | |
54 | #define SIS_CONFIG_COMPAT | |
55 | #endif | |
56 | #endif | |
57 | ||
58 | #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,8) | |
59 | #define SIS_IOTYPE1 void __iomem | |
60 | #define SIS_IOTYPE2 __iomem | |
61 | #define SISINITSTATIC static | |
62 | #else | |
63 | #define SIS_IOTYPE1 unsigned char | |
64 | #define SIS_IOTYPE2 | |
65 | #define SISINITSTATIC | |
66 | #endif | |
67 | ||
68 | #undef SISFBDEBUG | |
69 | ||
70 | #ifdef SISFBDEBUG | |
71 | #define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args) | |
72 | #define TWDEBUG(x) printk(KERN_INFO x "\n"); | |
73 | #else | |
74 | #define DPRINTK(fmt, args...) | |
75 | #define TWDEBUG(x) | |
76 | #endif | |
77 | ||
78 | #define SISFAIL(x) do { printk(x "\n"); return -EINVAL; } while(0) | |
79 | ||
80 | /* To be included in pci_ids.h */ | |
81 | #ifndef PCI_DEVICE_ID_SI_650_VGA | |
82 | #define PCI_DEVICE_ID_SI_650_VGA 0x6325 | |
83 | #endif | |
84 | #ifndef PCI_DEVICE_ID_SI_650 | |
85 | #define PCI_DEVICE_ID_SI_650 0x0650 | |
86 | #endif | |
87 | #ifndef PCI_DEVICE_ID_SI_651 | |
88 | #define PCI_DEVICE_ID_SI_651 0x0651 | |
89 | #endif | |
90 | #ifndef PCI_DEVICE_ID_SI_740 | |
91 | #define PCI_DEVICE_ID_SI_740 0x0740 | |
92 | #endif | |
93 | #ifndef PCI_DEVICE_ID_SI_330 | |
94 | #define PCI_DEVICE_ID_SI_330 0x0330 | |
95 | #endif | |
96 | #ifndef PCI_DEVICE_ID_SI_660_VGA | |
97 | #define PCI_DEVICE_ID_SI_660_VGA 0x6330 | |
98 | #endif | |
99 | #ifndef PCI_DEVICE_ID_SI_661 | |
100 | #define PCI_DEVICE_ID_SI_661 0x0661 | |
101 | #endif | |
102 | #ifndef PCI_DEVICE_ID_SI_741 | |
103 | #define PCI_DEVICE_ID_SI_741 0x0741 | |
104 | #endif | |
105 | #ifndef PCI_DEVICE_ID_SI_660 | |
106 | #define PCI_DEVICE_ID_SI_660 0x0660 | |
107 | #endif | |
108 | #ifndef PCI_DEVICE_ID_SI_760 | |
109 | #define PCI_DEVICE_ID_SI_760 0x0760 | |
110 | #endif | |
111 | ||
112 | /* To be included in fb.h */ | |
113 | #ifndef FB_ACCEL_SIS_GLAMOUR_2 | |
114 | #define FB_ACCEL_SIS_GLAMOUR_2 40 /* SiS 315, 65x, 740, 661, 741 */ | |
115 | #endif | |
116 | #ifndef FB_ACCEL_SIS_XABRE | |
117 | #define FB_ACCEL_SIS_XABRE 41 /* SiS 330 ("Xabre"), 760 */ | |
118 | #endif | |
119 | ||
120 | #define MAX_ROM_SCAN 0x10000 | |
121 | ||
122 | /* ivideo->caps */ | |
123 | #define HW_CURSOR_CAP 0x80 | |
124 | #define TURBO_QUEUE_CAP 0x40 | |
125 | #define AGP_CMD_QUEUE_CAP 0x20 | |
126 | #define VM_CMD_QUEUE_CAP 0x10 | |
127 | #define MMIO_CMD_QUEUE_CAP 0x08 | |
128 | ||
129 | /* For 300 series */ | |
130 | #define TURBO_QUEUE_AREA_SIZE 0x80000 /* 512K */ | |
131 | #define HW_CURSOR_AREA_SIZE_300 0x1000 /* 4K */ | |
132 | ||
133 | /* For 315/Xabre series */ | |
134 | #define COMMAND_QUEUE_AREA_SIZE 0x80000 /* 512K */ | |
135 | #define COMMAND_QUEUE_THRESHOLD 0x1F | |
136 | #define HW_CURSOR_AREA_SIZE_315 0x4000 /* 16K */ | |
137 | ||
138 | #define SIS_OH_ALLOC_SIZE 4000 | |
139 | #define SENTINEL 0x7fffffff | |
140 | ||
141 | #define SEQ_ADR 0x14 | |
142 | #define SEQ_DATA 0x15 | |
143 | #define DAC_ADR 0x18 | |
144 | #define DAC_DATA 0x19 | |
145 | #define CRTC_ADR 0x24 | |
146 | #define CRTC_DATA 0x25 | |
147 | #define DAC2_ADR (0x16-0x30) | |
148 | #define DAC2_DATA (0x17-0x30) | |
149 | #define VB_PART1_ADR (0x04-0x30) | |
150 | #define VB_PART1_DATA (0x05-0x30) | |
151 | #define VB_PART2_ADR (0x10-0x30) | |
152 | #define VB_PART2_DATA (0x11-0x30) | |
153 | #define VB_PART3_ADR (0x12-0x30) | |
154 | #define VB_PART3_DATA (0x13-0x30) | |
155 | #define VB_PART4_ADR (0x14-0x30) | |
156 | #define VB_PART4_DATA (0x15-0x30) | |
157 | ||
158 | #define SISSR ivideo->SiS_Pr.SiS_P3c4 | |
159 | #define SISCR ivideo->SiS_Pr.SiS_P3d4 | |
160 | #define SISDACA ivideo->SiS_Pr.SiS_P3c8 | |
161 | #define SISDACD ivideo->SiS_Pr.SiS_P3c9 | |
162 | #define SISPART1 ivideo->SiS_Pr.SiS_Part1Port | |
163 | #define SISPART2 ivideo->SiS_Pr.SiS_Part2Port | |
164 | #define SISPART3 ivideo->SiS_Pr.SiS_Part3Port | |
165 | #define SISPART4 ivideo->SiS_Pr.SiS_Part4Port | |
166 | #define SISPART5 ivideo->SiS_Pr.SiS_Part5Port | |
167 | #define SISDAC2A SISPART5 | |
168 | #define SISDAC2D (SISPART5 + 1) | |
169 | #define SISMISCR (ivideo->SiS_Pr.RelIO + 0x1c) | |
170 | #define SISMISCW ivideo->SiS_Pr.SiS_P3c2 | |
171 | #define SISINPSTAT (ivideo->SiS_Pr.RelIO + 0x2a) | |
172 | #define SISPEL ivideo->SiS_Pr.SiS_P3c6 | |
173 | ||
174 | #define IND_SIS_PASSWORD 0x05 /* SRs */ | |
175 | #define IND_SIS_COLOR_MODE 0x06 | |
176 | #define IND_SIS_RAMDAC_CONTROL 0x07 | |
177 | #define IND_SIS_DRAM_SIZE 0x14 | |
178 | #define IND_SIS_MODULE_ENABLE 0x1E | |
179 | #define IND_SIS_PCI_ADDRESS_SET 0x20 | |
180 | #define IND_SIS_TURBOQUEUE_ADR 0x26 | |
181 | #define IND_SIS_TURBOQUEUE_SET 0x27 | |
182 | #define IND_SIS_POWER_ON_TRAP 0x38 | |
183 | #define IND_SIS_POWER_ON_TRAP2 0x39 | |
184 | #define IND_SIS_CMDQUEUE_SET 0x26 | |
185 | #define IND_SIS_CMDQUEUE_THRESHOLD 0x27 | |
186 | ||
187 | #define IND_SIS_AGP_IO_PAD 0x48 | |
188 | ||
189 | #define SIS_CRT2_WENABLE_300 0x24 /* Part1 */ | |
190 | #define SIS_CRT2_WENABLE_315 0x2F | |
191 | ||
192 | #define SIS_PASSWORD 0x86 /* SR05 */ | |
193 | ||
194 | #define SIS_INTERLACED_MODE 0x20 /* SR06 */ | |
195 | #define SIS_8BPP_COLOR_MODE 0x0 | |
196 | #define SIS_15BPP_COLOR_MODE 0x1 | |
197 | #define SIS_16BPP_COLOR_MODE 0x2 | |
198 | #define SIS_32BPP_COLOR_MODE 0x4 | |
199 | ||
200 | #define SIS_ENABLE_2D 0x40 /* SR1E */ | |
201 | ||
202 | #define SIS_MEM_MAP_IO_ENABLE 0x01 /* SR20 */ | |
203 | #define SIS_PCI_ADDR_ENABLE 0x80 | |
204 | ||
205 | #define SIS_AGP_CMDQUEUE_ENABLE 0x80 /* 315/330 series SR26 */ | |
206 | #define SIS_VRAM_CMDQUEUE_ENABLE 0x40 | |
207 | #define SIS_MMIO_CMD_ENABLE 0x20 | |
208 | #define SIS_CMD_QUEUE_SIZE_512k 0x00 | |
209 | #define SIS_CMD_QUEUE_SIZE_1M 0x04 | |
210 | #define SIS_CMD_QUEUE_SIZE_2M 0x08 | |
211 | #define SIS_CMD_QUEUE_SIZE_4M 0x0C | |
212 | #define SIS_CMD_QUEUE_RESET 0x01 | |
213 | #define SIS_CMD_AUTO_CORR 0x02 | |
214 | ||
215 | #define SIS_SIMULTANEOUS_VIEW_ENABLE 0x01 /* CR30 */ | |
216 | #define SIS_MODE_SELECT_CRT2 0x02 | |
217 | #define SIS_VB_OUTPUT_COMPOSITE 0x04 | |
218 | #define SIS_VB_OUTPUT_SVIDEO 0x08 | |
219 | #define SIS_VB_OUTPUT_SCART 0x10 | |
220 | #define SIS_VB_OUTPUT_LCD 0x20 | |
221 | #define SIS_VB_OUTPUT_CRT2 0x40 | |
222 | #define SIS_VB_OUTPUT_HIVISION 0x80 | |
223 | ||
224 | #define SIS_VB_OUTPUT_DISABLE 0x20 /* CR31 */ | |
225 | #define SIS_DRIVER_MODE 0x40 | |
226 | ||
227 | #define SIS_VB_COMPOSITE 0x01 /* CR32 */ | |
228 | #define SIS_VB_SVIDEO 0x02 | |
229 | #define SIS_VB_SCART 0x04 | |
230 | #define SIS_VB_LCD 0x08 | |
231 | #define SIS_VB_CRT2 0x10 | |
232 | #define SIS_CRT1 0x20 | |
233 | #define SIS_VB_HIVISION 0x40 | |
234 | #define SIS_VB_YPBPR 0x80 | |
235 | #define SIS_VB_TV (SIS_VB_COMPOSITE | SIS_VB_SVIDEO | \ | |
236 | SIS_VB_SCART | SIS_VB_HIVISION | SIS_VB_YPBPR) | |
237 | ||
238 | #define SIS_EXTERNAL_CHIP_MASK 0x0E /* CR37 (< SiS 660) */ | |
239 | #define SIS_EXTERNAL_CHIP_SIS301 0x01 /* in CR37 << 1 ! */ | |
240 | #define SIS_EXTERNAL_CHIP_LVDS 0x02 | |
241 | #define SIS_EXTERNAL_CHIP_TRUMPION 0x03 | |
242 | #define SIS_EXTERNAL_CHIP_LVDS_CHRONTEL 0x04 | |
243 | #define SIS_EXTERNAL_CHIP_CHRONTEL 0x05 | |
244 | #define SIS310_EXTERNAL_CHIP_LVDS 0x02 | |
245 | #define SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL 0x03 | |
246 | ||
247 | #define SIS_AGP_2X 0x20 /* CR48 */ | |
248 | ||
249 | #define HW_DEVICE_EXTENSION SIS_HW_INFO | |
250 | #define PHW_DEVICE_EXTENSION PSIS_HW_INFO | |
251 | ||
252 | /* I/O port access macros */ | |
253 | #define inSISREG(base) inb(base) | |
254 | ||
255 | #define outSISREG(base,val) outb(val,base) | |
256 | ||
257 | #define orSISREG(base,val) \ | |
258 | do { \ | |
259 | u8 __Temp = inSISREG(base); \ | |
260 | outSISREG(base, __Temp | (val)); \ | |
261 | } while (0) | |
262 | ||
263 | #define andSISREG(base,val) \ | |
264 | do { \ | |
265 | u8 __Temp = inSISREG(base); \ | |
266 | outSISREG(base, __Temp & (val)); \ | |
267 | } while (0) | |
268 | ||
269 | #define inSISIDXREG(base,idx,var) \ | |
270 | do { \ | |
271 | outSISREG(base, idx); \ | |
272 | var = inSISREG((base)+1); \ | |
273 | } while (0) | |
274 | ||
275 | #define outSISIDXREG(base,idx,val) \ | |
276 | do { \ | |
277 | outSISREG(base, idx); \ | |
278 | outSISREG((base)+1, val); \ | |
279 | } while (0) | |
280 | ||
281 | #define orSISIDXREG(base,idx,val) \ | |
282 | do { \ | |
283 | u8 __Temp; \ | |
284 | outSISREG(base, idx); \ | |
285 | __Temp = inSISREG((base)+1) | (val); \ | |
286 | outSISREG((base)+1, __Temp); \ | |
287 | } while (0) | |
288 | ||
289 | #define andSISIDXREG(base,idx,and) \ | |
290 | do { \ | |
291 | u8 __Temp; \ | |
292 | outSISREG(base, idx); \ | |
293 | __Temp = inSISREG((base)+1) & (and); \ | |
294 | outSISREG((base)+1, __Temp); \ | |
295 | } while (0) | |
296 | ||
297 | #define setSISIDXREG(base,idx,and,or) \ | |
298 | do { \ | |
299 | u8 __Temp; \ | |
300 | outSISREG(base, idx); \ | |
301 | __Temp = (inSISREG((base)+1) & (and)) | (or); \ | |
302 | outSISREG((base)+1, __Temp); \ | |
303 | } while (0) | |
304 | ||
305 | /* MMIO access macros */ | |
306 | #define MMIO_IN8(base, offset) readb((base+offset)) | |
307 | #define MMIO_IN16(base, offset) readw((base+offset)) | |
308 | #define MMIO_IN32(base, offset) readl((base+offset)) | |
309 | ||
310 | #define MMIO_OUT8(base, offset, val) writeb(((u8)(val)), (base+offset)) | |
311 | #define MMIO_OUT16(base, offset, val) writew(((u16)(val)), (base+offset)) | |
312 | #define MMIO_OUT32(base, offset, val) writel(((u32)(val)), (base+offset)) | |
313 | ||
314 | /* Queue control MMIO registers */ | |
315 | #define Q_BASE_ADDR 0x85C0 /* Base address of software queue */ | |
316 | #define Q_WRITE_PTR 0x85C4 /* Current write pointer */ | |
317 | #define Q_READ_PTR 0x85C8 /* Current read pointer */ | |
318 | #define Q_STATUS 0x85CC /* queue status */ | |
319 | ||
320 | #define MMIO_QUEUE_PHYBASE Q_BASE_ADDR | |
321 | #define MMIO_QUEUE_WRITEPORT Q_WRITE_PTR | |
322 | #define MMIO_QUEUE_READPORT Q_READ_PTR | |
323 | ||
324 | #ifndef FB_BLANK_UNBLANK | |
325 | #define FB_BLANK_UNBLANK 0 | |
326 | #endif | |
327 | #ifndef FB_BLANK_NORMAL | |
328 | #define FB_BLANK_NORMAL 1 | |
329 | #endif | |
330 | #ifndef FB_BLANK_VSYNC_SUSPEND | |
331 | #define FB_BLANK_VSYNC_SUSPEND 2 | |
332 | #endif | |
333 | #ifndef FB_BLANK_HSYNC_SUSPEND | |
334 | #define FB_BLANK_HSYNC_SUSPEND 3 | |
335 | #endif | |
336 | #ifndef FB_BLANK_POWERDOWN | |
337 | #define FB_BLANK_POWERDOWN 4 | |
338 | #endif | |
339 | ||
340 | enum _SIS_LCD_TYPE { | |
341 | LCD_INVALID = 0, | |
342 | LCD_800x600, | |
343 | LCD_1024x768, | |
344 | LCD_1280x1024, | |
345 | LCD_1280x960, | |
346 | LCD_640x480, | |
347 | LCD_1600x1200, | |
348 | LCD_1920x1440, | |
349 | LCD_2048x1536, | |
350 | LCD_320x480, /* FSTN */ | |
351 | LCD_1400x1050, | |
352 | LCD_1152x864, | |
353 | LCD_1152x768, | |
354 | LCD_1280x768, | |
355 | LCD_1024x600, | |
356 | LCD_640x480_2, /* DSTN */ | |
357 | LCD_640x480_3, /* DSTN */ | |
358 | LCD_848x480, | |
359 | LCD_1280x800, | |
360 | LCD_1680x1050, | |
361 | LCD_1280x720, | |
362 | LCD_CUSTOM, | |
363 | LCD_UNKNOWN | |
364 | }; | |
365 | ||
366 | enum _SIS_CMDTYPE { | |
367 | MMIO_CMD = 0, | |
368 | AGP_CMD_QUEUE, | |
369 | VM_CMD_QUEUE, | |
370 | }; | |
371 | typedef unsigned int SIS_CMDTYPE; | |
372 | ||
373 | /* Our "par" */ | |
374 | struct sis_video_info { | |
375 | int cardnumber; | |
376 | struct fb_info *memyselfandi; | |
377 | ||
378 | SIS_HW_INFO sishw_ext; | |
379 | SiS_Private SiS_Pr; | |
380 | ||
381 | sisfb_info sisfbinfo; /* For ioctl SISFB_GET_INFO */ | |
382 | ||
383 | struct fb_var_screeninfo default_var; | |
384 | ||
385 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) | |
386 | struct fb_fix_screeninfo sisfb_fix; | |
387 | u32 pseudo_palette[17]; | |
388 | #endif | |
389 | ||
390 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) | |
391 | struct display sis_disp; | |
392 | struct display_switch sisfb_sw; | |
393 | struct { | |
394 | u16 red, green, blue, pad; | |
395 | } sis_palette[256]; | |
396 | union { | |
397 | #ifdef FBCON_HAS_CFB16 | |
398 | u16 cfb16[16]; | |
399 | #endif | |
400 | #ifdef FBCON_HAS_CFB32 | |
401 | u32 cfb32[16]; | |
402 | #endif | |
403 | } sis_fbcon_cmap; | |
404 | #endif | |
405 | ||
406 | struct sisfb_monitor { | |
407 | u16 hmin; | |
408 | u16 hmax; | |
409 | u16 vmin; | |
410 | u16 vmax; | |
411 | u32 dclockmax; | |
412 | u8 feature; | |
413 | BOOLEAN datavalid; | |
414 | } sisfb_thismonitor; | |
415 | ||
416 | int chip_id; | |
417 | char myid[40]; | |
418 | ||
419 | struct pci_dev *nbridge; | |
420 | ||
421 | int mni; /* Mode number index */ | |
422 | ||
423 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) | |
424 | int currcon; | |
425 | #endif | |
426 | ||
427 | unsigned long video_size; | |
428 | unsigned long video_base; | |
429 | unsigned long mmio_size; | |
430 | unsigned long mmio_base; | |
431 | unsigned long vga_base; | |
432 | ||
433 | SIS_IOTYPE1 *video_vbase; | |
434 | SIS_IOTYPE1 *mmio_vbase; | |
435 | ||
436 | unsigned char *bios_abase; | |
437 | ||
438 | int mtrr; | |
439 | ||
440 | u32 sisfb_mem; | |
441 | ||
442 | u32 sisfb_parm_mem; | |
443 | int sisfb_accel; | |
444 | int sisfb_ypan; | |
445 | int sisfb_max; | |
446 | int sisfb_userom; | |
447 | int sisfb_useoem; | |
448 | int sisfb_mode_idx; | |
449 | int sisfb_parm_rate; | |
450 | int sisfb_crt1off; | |
451 | int sisfb_forcecrt1; | |
452 | int sisfb_crt2type; | |
453 | int sisfb_crt2flags; | |
454 | int sisfb_dstn; | |
455 | int sisfb_fstn; | |
456 | int sisfb_tvplug; | |
457 | int sisfb_tvstd; | |
458 | int sisfb_filter; | |
459 | int sisfb_nocrt2rate; | |
460 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) | |
461 | int sisfb_inverse; | |
462 | #endif | |
463 | ||
464 | u32 heapstart; /* offset */ | |
465 | SIS_IOTYPE1 *sisfb_heap_start; /* address */ | |
466 | SIS_IOTYPE1 *sisfb_heap_end; /* address */ | |
467 | u32 sisfb_heap_size; | |
468 | int havenoheap; | |
469 | #if 0 | |
470 | SIS_HEAP sisfb_heap; | |
471 | #endif | |
472 | ||
473 | ||
474 | int video_bpp; | |
475 | int video_cmap_len; | |
476 | int video_width; | |
477 | int video_height; | |
478 | unsigned int refresh_rate; | |
479 | ||
480 | unsigned int chip; | |
481 | u8 revision_id; | |
482 | ||
483 | int video_linelength; /* real pitch */ | |
484 | int scrnpitchCRT1; /* pitch regarding interlace */ | |
485 | ||
486 | u16 DstColor; /* For 2d acceleration */ | |
487 | u32 SiS310_AccelDepth; | |
488 | u32 CommandReg; | |
489 | int cmdqueuelength; | |
490 | ||
491 | spinlock_t lockaccel; /* Do not use outside of kernel! */ | |
492 | ||
493 | unsigned int pcibus; | |
494 | unsigned int pcislot; | |
495 | unsigned int pcifunc; | |
496 | ||
497 | int accel; | |
498 | ||
499 | u16 subsysvendor; | |
500 | u16 subsysdevice; | |
501 | ||
502 | u32 vbflags; /* Replacing deprecated stuff from above */ | |
503 | u32 currentvbflags; | |
504 | ||
505 | int lcdxres, lcdyres; | |
506 | int lcddefmodeidx, tvdefmodeidx, defmodeidx; | |
507 | u32 CRT2LCDType; /* defined in "SIS_LCD_TYPE" */ | |
508 | ||
509 | int current_bpp; | |
510 | int current_width; | |
511 | int current_height; | |
512 | int current_htotal; | |
513 | int current_vtotal; | |
514 | int current_linelength; | |
515 | __u32 current_pixclock; | |
516 | int current_refresh_rate; | |
517 | ||
518 | u8 mode_no; | |
519 | u8 rate_idx; | |
520 | int modechanged; | |
521 | unsigned char modeprechange; | |
522 | ||
523 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) | |
524 | u8 sisfb_lastrates[128]; | |
525 | #endif | |
526 | ||
527 | int newrom; | |
528 | int registered; | |
529 | int warncount; | |
530 | ||
531 | int sisvga_engine; | |
532 | int hwcursor_size; | |
533 | int CRT2_write_enable; | |
534 | u8 caps; | |
535 | ||
536 | u8 detectedpdc; | |
537 | u8 detectedpdca; | |
538 | u8 detectedlcda; | |
539 | ||
540 | SIS_IOTYPE1 *hwcursor_vbase; | |
541 | ||
542 | int chronteltype; | |
543 | int tvxpos, tvypos; | |
544 | u8 p2_1f,p2_20,p2_2b,p2_42,p2_43,p2_01,p2_02; | |
545 | int tvx, tvy; | |
546 | ||
547 | u8 sisfblocked; | |
548 | ||
549 | struct sis_video_info *next; | |
550 | }; | |
551 | ||
552 | typedef struct _SIS_OH { | |
553 | struct _SIS_OH *poh_next; | |
554 | struct _SIS_OH *poh_prev; | |
555 | u32 offset; | |
556 | u32 size; | |
557 | } SIS_OH; | |
558 | ||
559 | typedef struct _SIS_OHALLOC { | |
560 | struct _SIS_OHALLOC *poha_next; | |
561 | SIS_OH aoh[1]; | |
562 | } SIS_OHALLOC; | |
563 | ||
564 | typedef struct _SIS_HEAP { | |
565 | SIS_OH oh_free; | |
566 | SIS_OH oh_used; | |
567 | SIS_OH *poh_freelist; | |
568 | SIS_OHALLOC *poha_chain; | |
569 | u32 max_freesize; | |
570 | struct sis_video_info *vinfo; | |
571 | } SIS_HEAP; | |
572 | ||
573 | #endif |