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Commit | Line | Data |
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1da177e4 LT |
1 | /* tcx.c: TCX frame buffer driver |
2 | * | |
50312ce9 | 3 | * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net) |
1da177e4 LT |
4 | * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz) |
5 | * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx) | |
6 | * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be) | |
7 | * | |
8 | * Driver layout based loosely on tgafb.c, see that file for credits. | |
9 | */ | |
10 | ||
11 | #include <linux/module.h> | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/errno.h> | |
14 | #include <linux/string.h> | |
15 | #include <linux/slab.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/fb.h> | |
19 | #include <linux/mm.h> | |
20 | ||
21 | #include <asm/io.h> | |
50312ce9 DM |
22 | #include <asm/prom.h> |
23 | #include <asm/of_device.h> | |
1da177e4 LT |
24 | #include <asm/fbio.h> |
25 | ||
26 | #include "sbuslib.h" | |
27 | ||
28 | /* | |
29 | * Local functions. | |
30 | */ | |
31 | ||
32 | static int tcx_setcolreg(unsigned, unsigned, unsigned, unsigned, | |
33 | unsigned, struct fb_info *); | |
34 | static int tcx_blank(int, struct fb_info *); | |
35 | ||
216d526c | 36 | static int tcx_mmap(struct fb_info *, struct vm_area_struct *); |
67a6680d | 37 | static int tcx_ioctl(struct fb_info *, unsigned int, unsigned long); |
6ee7c152 | 38 | static int tcx_pan_display(struct fb_var_screeninfo *, struct fb_info *); |
1da177e4 LT |
39 | |
40 | /* | |
41 | * Frame buffer operations | |
42 | */ | |
43 | ||
44 | static struct fb_ops tcx_ops = { | |
45 | .owner = THIS_MODULE, | |
46 | .fb_setcolreg = tcx_setcolreg, | |
47 | .fb_blank = tcx_blank, | |
6ee7c152 | 48 | .fb_pan_display = tcx_pan_display, |
1da177e4 LT |
49 | .fb_fillrect = cfb_fillrect, |
50 | .fb_copyarea = cfb_copyarea, | |
51 | .fb_imageblit = cfb_imageblit, | |
52 | .fb_mmap = tcx_mmap, | |
53 | .fb_ioctl = tcx_ioctl, | |
9ffb83bc CH |
54 | #ifdef CONFIG_COMPAT |
55 | .fb_compat_ioctl = sbusfb_compat_ioctl, | |
56 | #endif | |
1da177e4 LT |
57 | }; |
58 | ||
59 | /* THC definitions */ | |
60 | #define TCX_THC_MISC_REV_SHIFT 16 | |
61 | #define TCX_THC_MISC_REV_MASK 15 | |
62 | #define TCX_THC_MISC_VSYNC_DIS (1 << 25) | |
63 | #define TCX_THC_MISC_HSYNC_DIS (1 << 24) | |
64 | #define TCX_THC_MISC_RESET (1 << 12) | |
65 | #define TCX_THC_MISC_VIDEO (1 << 10) | |
66 | #define TCX_THC_MISC_SYNC (1 << 9) | |
67 | #define TCX_THC_MISC_VSYNC (1 << 8) | |
68 | #define TCX_THC_MISC_SYNC_ENAB (1 << 7) | |
69 | #define TCX_THC_MISC_CURS_RES (1 << 6) | |
70 | #define TCX_THC_MISC_INT_ENAB (1 << 5) | |
71 | #define TCX_THC_MISC_INT (1 << 4) | |
72 | #define TCX_THC_MISC_INIT 0x9f | |
73 | #define TCX_THC_REV_REV_SHIFT 20 | |
74 | #define TCX_THC_REV_REV_MASK 15 | |
75 | #define TCX_THC_REV_MINREV_SHIFT 28 | |
76 | #define TCX_THC_REV_MINREV_MASK 15 | |
77 | ||
78 | /* The contents are unknown */ | |
79 | struct tcx_tec { | |
50312ce9 DM |
80 | u32 tec_matrix; |
81 | u32 tec_clip; | |
82 | u32 tec_vdc; | |
1da177e4 LT |
83 | }; |
84 | ||
85 | struct tcx_thc { | |
50312ce9 | 86 | u32 thc_rev; |
5b81d689 | 87 | u32 thc_pad0[511]; |
50312ce9 DM |
88 | u32 thc_hs; /* hsync timing */ |
89 | u32 thc_hsdvs; | |
90 | u32 thc_hd; | |
91 | u32 thc_vs; /* vsync timing */ | |
92 | u32 thc_vd; | |
93 | u32 thc_refresh; | |
94 | u32 thc_misc; | |
1da177e4 | 95 | u32 thc_pad1[56]; |
50312ce9 DM |
96 | u32 thc_cursxy; /* cursor x,y position (16 bits each) */ |
97 | u32 thc_cursmask[32]; /* cursor mask bits */ | |
98 | u32 thc_cursbits[32]; /* what to show where mask enabled */ | |
1da177e4 LT |
99 | }; |
100 | ||
101 | struct bt_regs { | |
50312ce9 DM |
102 | u32 addr; |
103 | u32 color_map; | |
104 | u32 control; | |
105 | u32 cursor; | |
1da177e4 LT |
106 | }; |
107 | ||
108 | #define TCX_MMAP_ENTRIES 14 | |
109 | ||
110 | struct tcx_par { | |
111 | spinlock_t lock; | |
112 | struct bt_regs __iomem *bt; | |
113 | struct tcx_thc __iomem *thc; | |
114 | struct tcx_tec __iomem *tec; | |
50312ce9 | 115 | u32 __iomem *cplane; |
1da177e4 LT |
116 | |
117 | u32 flags; | |
118 | #define TCX_FLAG_BLANKED 0x00000001 | |
119 | ||
120 | unsigned long physbase; | |
50312ce9 | 121 | unsigned long which_io; |
1da177e4 LT |
122 | unsigned long fbsize; |
123 | ||
124 | struct sbus_mmap_map mmap_map[TCX_MMAP_ENTRIES]; | |
125 | int lowdepth; | |
1da177e4 LT |
126 | }; |
127 | ||
128 | /* Reset control plane so that WID is 8-bit plane. */ | |
5b81d689 | 129 | static void __tcx_set_control_plane(struct tcx_par *par) |
1da177e4 | 130 | { |
50312ce9 | 131 | u32 __iomem *p, *pend; |
5b81d689 | 132 | |
1da177e4 LT |
133 | if (par->lowdepth) |
134 | return; | |
135 | ||
136 | p = par->cplane; | |
137 | if (p == NULL) | |
138 | return; | |
139 | for (pend = p + par->fbsize; p < pend; p++) { | |
140 | u32 tmp = sbus_readl(p); | |
141 | ||
142 | tmp &= 0xffffff; | |
143 | sbus_writel(tmp, p); | |
144 | } | |
145 | } | |
5b81d689 RR |
146 | |
147 | static void tcx_reset(struct fb_info *info) | |
1da177e4 LT |
148 | { |
149 | struct tcx_par *par = (struct tcx_par *) info->par; | |
150 | unsigned long flags; | |
151 | ||
152 | spin_lock_irqsave(&par->lock, flags); | |
153 | __tcx_set_control_plane(par); | |
154 | spin_unlock_irqrestore(&par->lock, flags); | |
155 | } | |
156 | ||
6ee7c152 TC |
157 | static int tcx_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) |
158 | { | |
159 | tcx_reset(info); | |
160 | return 0; | |
161 | } | |
162 | ||
1da177e4 LT |
163 | /** |
164 | * tcx_setcolreg - Optional function. Sets a color register. | |
165 | * @regno: boolean, 0 copy local, 1 get_user() function | |
166 | * @red: frame buffer colormap structure | |
167 | * @green: The green value which can be up to 16 bits wide | |
168 | * @blue: The blue value which can be up to 16 bits wide. | |
169 | * @transp: If supported the alpha value which can be up to 16 bits wide. | |
170 | * @info: frame buffer info structure | |
171 | */ | |
172 | static int tcx_setcolreg(unsigned regno, | |
173 | unsigned red, unsigned green, unsigned blue, | |
174 | unsigned transp, struct fb_info *info) | |
175 | { | |
176 | struct tcx_par *par = (struct tcx_par *) info->par; | |
177 | struct bt_regs __iomem *bt = par->bt; | |
178 | unsigned long flags; | |
179 | ||
180 | if (regno >= 256) | |
181 | return 1; | |
182 | ||
183 | red >>= 8; | |
184 | green >>= 8; | |
185 | blue >>= 8; | |
186 | ||
187 | spin_lock_irqsave(&par->lock, flags); | |
188 | ||
189 | sbus_writel(regno << 24, &bt->addr); | |
190 | sbus_writel(red << 24, &bt->color_map); | |
191 | sbus_writel(green << 24, &bt->color_map); | |
192 | sbus_writel(blue << 24, &bt->color_map); | |
193 | ||
194 | spin_unlock_irqrestore(&par->lock, flags); | |
195 | ||
196 | return 0; | |
197 | } | |
198 | ||
199 | /** | |
200 | * tcx_blank - Optional function. Blanks the display. | |
201 | * @blank_mode: the blank mode we want. | |
202 | * @info: frame buffer structure that represents a single frame buffer | |
203 | */ | |
204 | static int | |
205 | tcx_blank(int blank, struct fb_info *info) | |
206 | { | |
207 | struct tcx_par *par = (struct tcx_par *) info->par; | |
208 | struct tcx_thc __iomem *thc = par->thc; | |
209 | unsigned long flags; | |
210 | u32 val; | |
211 | ||
212 | spin_lock_irqsave(&par->lock, flags); | |
213 | ||
214 | val = sbus_readl(&thc->thc_misc); | |
215 | ||
216 | switch (blank) { | |
217 | case FB_BLANK_UNBLANK: /* Unblanking */ | |
218 | val &= ~(TCX_THC_MISC_VSYNC_DIS | | |
219 | TCX_THC_MISC_HSYNC_DIS); | |
220 | val |= TCX_THC_MISC_VIDEO; | |
221 | par->flags &= ~TCX_FLAG_BLANKED; | |
222 | break; | |
223 | ||
224 | case FB_BLANK_NORMAL: /* Normal blanking */ | |
225 | val &= ~TCX_THC_MISC_VIDEO; | |
226 | par->flags |= TCX_FLAG_BLANKED; | |
227 | break; | |
228 | ||
229 | case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */ | |
230 | val |= TCX_THC_MISC_VSYNC_DIS; | |
231 | break; | |
232 | case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */ | |
233 | val |= TCX_THC_MISC_HSYNC_DIS; | |
234 | break; | |
235 | ||
236 | case FB_BLANK_POWERDOWN: /* Poweroff */ | |
237 | break; | |
238 | }; | |
239 | ||
240 | sbus_writel(val, &thc->thc_misc); | |
241 | ||
242 | spin_unlock_irqrestore(&par->lock, flags); | |
243 | ||
244 | return 0; | |
245 | } | |
246 | ||
247 | static struct sbus_mmap_map __tcx_mmap_map[TCX_MMAP_ENTRIES] = { | |
248 | { | |
249 | .voff = TCX_RAM8BIT, | |
250 | .size = SBUS_MMAP_FBSIZE(1) | |
251 | }, | |
252 | { | |
253 | .voff = TCX_RAM24BIT, | |
254 | .size = SBUS_MMAP_FBSIZE(4) | |
255 | }, | |
256 | { | |
257 | .voff = TCX_UNK3, | |
258 | .size = SBUS_MMAP_FBSIZE(8) | |
259 | }, | |
260 | { | |
261 | .voff = TCX_UNK4, | |
262 | .size = SBUS_MMAP_FBSIZE(8) | |
263 | }, | |
264 | { | |
265 | .voff = TCX_CONTROLPLANE, | |
266 | .size = SBUS_MMAP_FBSIZE(4) | |
267 | }, | |
268 | { | |
269 | .voff = TCX_UNK6, | |
270 | .size = SBUS_MMAP_FBSIZE(8) | |
271 | }, | |
272 | { | |
273 | .voff = TCX_UNK7, | |
274 | .size = SBUS_MMAP_FBSIZE(8) | |
275 | }, | |
276 | { | |
277 | .voff = TCX_TEC, | |
278 | .size = PAGE_SIZE | |
279 | }, | |
280 | { | |
281 | .voff = TCX_BTREGS, | |
282 | .size = PAGE_SIZE | |
283 | }, | |
284 | { | |
285 | .voff = TCX_THC, | |
286 | .size = PAGE_SIZE | |
287 | }, | |
288 | { | |
289 | .voff = TCX_DHC, | |
290 | .size = PAGE_SIZE | |
291 | }, | |
292 | { | |
293 | .voff = TCX_ALT, | |
294 | .size = PAGE_SIZE | |
295 | }, | |
296 | { | |
297 | .voff = TCX_UNK2, | |
298 | .size = 0x20000 | |
299 | }, | |
300 | { .size = 0 } | |
301 | }; | |
302 | ||
216d526c | 303 | static int tcx_mmap(struct fb_info *info, struct vm_area_struct *vma) |
1da177e4 LT |
304 | { |
305 | struct tcx_par *par = (struct tcx_par *)info->par; | |
306 | ||
307 | return sbusfb_mmap_helper(par->mmap_map, | |
308 | par->physbase, par->fbsize, | |
50312ce9 | 309 | par->which_io, vma); |
1da177e4 LT |
310 | } |
311 | ||
67a6680d CH |
312 | static int tcx_ioctl(struct fb_info *info, unsigned int cmd, |
313 | unsigned long arg) | |
1da177e4 LT |
314 | { |
315 | struct tcx_par *par = (struct tcx_par *) info->par; | |
316 | ||
317 | return sbusfb_ioctl_helper(cmd, arg, info, | |
318 | FBTYPE_TCXCOLOR, | |
319 | (par->lowdepth ? 8 : 24), | |
320 | par->fbsize); | |
321 | } | |
322 | ||
323 | /* | |
324 | * Initialisation | |
325 | */ | |
326 | ||
327 | static void | |
328 | tcx_init_fix(struct fb_info *info, int linebytes) | |
329 | { | |
330 | struct tcx_par *par = (struct tcx_par *)info->par; | |
331 | const char *tcx_name; | |
332 | ||
333 | if (par->lowdepth) | |
334 | tcx_name = "TCX8"; | |
335 | else | |
336 | tcx_name = "TCX24"; | |
337 | ||
338 | strlcpy(info->fix.id, tcx_name, sizeof(info->fix.id)); | |
339 | ||
340 | info->fix.type = FB_TYPE_PACKED_PIXELS; | |
341 | info->fix.visual = FB_VISUAL_PSEUDOCOLOR; | |
342 | ||
343 | info->fix.line_length = linebytes; | |
344 | ||
345 | info->fix.accel = FB_ACCEL_SUN_TCX; | |
346 | } | |
347 | ||
c7f439b9 DM |
348 | static void tcx_unmap_regs(struct of_device *op, struct fb_info *info, |
349 | struct tcx_par *par) | |
1da177e4 | 350 | { |
c7f439b9 | 351 | if (par->tec) |
e3a411a3 | 352 | of_iounmap(&op->resource[7], |
c7f439b9 DM |
353 | par->tec, sizeof(struct tcx_tec)); |
354 | if (par->thc) | |
e3a411a3 | 355 | of_iounmap(&op->resource[9], |
c7f439b9 DM |
356 | par->thc, sizeof(struct tcx_thc)); |
357 | if (par->bt) | |
e3a411a3 | 358 | of_iounmap(&op->resource[8], |
c7f439b9 DM |
359 | par->bt, sizeof(struct bt_regs)); |
360 | if (par->cplane) | |
e3a411a3 | 361 | of_iounmap(&op->resource[4], |
c7f439b9 DM |
362 | par->cplane, par->fbsize * sizeof(u32)); |
363 | if (info->screen_base) | |
e3a411a3 | 364 | of_iounmap(&op->resource[0], |
c7f439b9 | 365 | info->screen_base, par->fbsize); |
50312ce9 | 366 | } |
1da177e4 | 367 | |
5b81d689 RR |
368 | static int __devinit tcx_probe(struct of_device *op, |
369 | const struct of_device_id *match) | |
50312ce9 DM |
370 | { |
371 | struct device_node *dp = op->node; | |
c7f439b9 DM |
372 | struct fb_info *info; |
373 | struct tcx_par *par; | |
50312ce9 | 374 | int linebytes, i, err; |
1da177e4 | 375 | |
c7f439b9 | 376 | info = framebuffer_alloc(sizeof(struct tcx_par), &op->dev); |
1da177e4 | 377 | |
c7f439b9 DM |
378 | err = -ENOMEM; |
379 | if (!info) | |
380 | goto out_err; | |
381 | par = info->par; | |
1da177e4 | 382 | |
c7f439b9 DM |
383 | spin_lock_init(&par->lock); |
384 | ||
385 | par->lowdepth = | |
50312ce9 | 386 | (of_find_property(dp, "tcx-8-bit", NULL) != NULL); |
1da177e4 | 387 | |
c7f439b9 DM |
388 | sbusfb_fill_var(&info->var, dp->node, 8); |
389 | info->var.red.length = 8; | |
390 | info->var.green.length = 8; | |
391 | info->var.blue.length = 8; | |
1da177e4 | 392 | |
50312ce9 | 393 | linebytes = of_getintprop_default(dp, "linebytes", |
c7f439b9 DM |
394 | info->var.xres); |
395 | par->fbsize = PAGE_ALIGN(linebytes * info->var.yres); | |
1da177e4 | 396 | |
c7f439b9 | 397 | par->tec = of_ioremap(&op->resource[7], 0, |
50312ce9 | 398 | sizeof(struct tcx_tec), "tcx tec"); |
c7f439b9 | 399 | par->thc = of_ioremap(&op->resource[9], 0, |
50312ce9 | 400 | sizeof(struct tcx_thc), "tcx thc"); |
c7f439b9 | 401 | par->bt = of_ioremap(&op->resource[8], 0, |
50312ce9 | 402 | sizeof(struct bt_regs), "tcx dac"); |
c7f439b9 DM |
403 | info->screen_base = of_ioremap(&op->resource[0], 0, |
404 | par->fbsize, "tcx ram"); | |
405 | if (!par->tec || !par->thc || | |
406 | !par->bt || !info->screen_base) | |
407 | goto out_unmap_regs; | |
408 | ||
409 | memcpy(&par->mmap_map, &__tcx_mmap_map, sizeof(par->mmap_map)); | |
410 | if (!par->lowdepth) { | |
411 | par->cplane = of_ioremap(&op->resource[4], 0, | |
412 | par->fbsize * sizeof(u32), | |
50312ce9 | 413 | "tcx cplane"); |
c7f439b9 DM |
414 | if (!par->cplane) |
415 | goto out_unmap_regs; | |
1da177e4 | 416 | } else { |
c7f439b9 DM |
417 | par->mmap_map[1].size = SBUS_MMAP_EMPTY; |
418 | par->mmap_map[4].size = SBUS_MMAP_EMPTY; | |
419 | par->mmap_map[5].size = SBUS_MMAP_EMPTY; | |
420 | par->mmap_map[6].size = SBUS_MMAP_EMPTY; | |
1da177e4 LT |
421 | } |
422 | ||
403ae52a | 423 | par->physbase = op->resource[0].start; |
c7f439b9 | 424 | par->which_io = op->resource[0].flags & IORESOURCE_BITS; |
50312ce9 | 425 | |
1da177e4 LT |
426 | for (i = 0; i < TCX_MMAP_ENTRIES; i++) { |
427 | int j; | |
428 | ||
429 | switch (i) { | |
430 | case 10: | |
431 | j = 12; | |
432 | break; | |
433 | ||
434 | case 11: case 12: | |
435 | j = i - 1; | |
436 | break; | |
437 | ||
438 | default: | |
439 | j = i; | |
440 | break; | |
441 | }; | |
c7f439b9 | 442 | par->mmap_map[i].poff = op->resource[j].start; |
1da177e4 LT |
443 | } |
444 | ||
c7f439b9 DM |
445 | info->flags = FBINFO_DEFAULT; |
446 | info->fbops = &tcx_ops; | |
1da177e4 LT |
447 | |
448 | /* Initialize brooktree DAC. */ | |
c7f439b9 DM |
449 | sbus_writel(0x04 << 24, &par->bt->addr); /* color planes */ |
450 | sbus_writel(0xff << 24, &par->bt->control); | |
451 | sbus_writel(0x05 << 24, &par->bt->addr); | |
452 | sbus_writel(0x00 << 24, &par->bt->control); | |
453 | sbus_writel(0x06 << 24, &par->bt->addr); /* overlay plane */ | |
454 | sbus_writel(0x73 << 24, &par->bt->control); | |
455 | sbus_writel(0x07 << 24, &par->bt->addr); | |
456 | sbus_writel(0x00 << 24, &par->bt->control); | |
457 | ||
458 | tcx_reset(info); | |
1da177e4 | 459 | |
c7f439b9 | 460 | tcx_blank(FB_BLANK_UNBLANK, info); |
1da177e4 | 461 | |
c7f439b9 DM |
462 | if (fb_alloc_cmap(&info->cmap, 256, 0)) |
463 | goto out_unmap_regs; | |
464 | ||
465 | fb_set_cmap(&info->cmap, info); | |
466 | tcx_init_fix(info, linebytes); | |
467 | ||
468 | err = register_framebuffer(info); | |
469 | if (err < 0) | |
470 | goto out_dealloc_cmap; | |
1da177e4 | 471 | |
c7f439b9 | 472 | dev_set_drvdata(&op->dev, info); |
1da177e4 | 473 | |
194f1a68 | 474 | printk(KERN_INFO "%s: TCX at %lx:%lx, %s\n", |
50312ce9 | 475 | dp->full_name, |
c7f439b9 | 476 | par->which_io, |
403ae52a | 477 | par->physbase, |
c7f439b9 | 478 | par->lowdepth ? "8-bit only" : "24-bit depth"); |
50312ce9 DM |
479 | |
480 | return 0; | |
c7f439b9 DM |
481 | |
482 | out_dealloc_cmap: | |
483 | fb_dealloc_cmap(&info->cmap); | |
484 | ||
485 | out_unmap_regs: | |
486 | tcx_unmap_regs(op, info, par); | |
487 | ||
488 | out_err: | |
489 | return err; | |
50312ce9 | 490 | } |
1da177e4 | 491 | |
e3a411a3 | 492 | static int __devexit tcx_remove(struct of_device *op) |
50312ce9 | 493 | { |
c7f439b9 DM |
494 | struct fb_info *info = dev_get_drvdata(&op->dev); |
495 | struct tcx_par *par = info->par; | |
50312ce9 | 496 | |
c7f439b9 DM |
497 | unregister_framebuffer(info); |
498 | fb_dealloc_cmap(&info->cmap); | |
50312ce9 | 499 | |
c7f439b9 | 500 | tcx_unmap_regs(op, info, par); |
50312ce9 | 501 | |
c7f439b9 | 502 | framebuffer_release(info); |
50312ce9 | 503 | |
e3a411a3 | 504 | dev_set_drvdata(&op->dev, NULL); |
1da177e4 LT |
505 | |
506 | return 0; | |
507 | } | |
508 | ||
50312ce9 DM |
509 | static struct of_device_id tcx_match[] = { |
510 | { | |
511 | .name = "SUNW,tcx", | |
512 | }, | |
513 | {}, | |
514 | }; | |
515 | MODULE_DEVICE_TABLE(of, tcx_match); | |
1da177e4 | 516 | |
50312ce9 DM |
517 | static struct of_platform_driver tcx_driver = { |
518 | .name = "tcx", | |
519 | .match_table = tcx_match, | |
520 | .probe = tcx_probe, | |
521 | .remove = __devexit_p(tcx_remove), | |
522 | }; | |
1da177e4 | 523 | |
f36861d5 | 524 | static int __init tcx_init(void) |
50312ce9 DM |
525 | { |
526 | if (fb_get_options("tcxfb", NULL)) | |
527 | return -ENODEV; | |
528 | ||
529 | return of_register_driver(&tcx_driver, &of_bus_type); | |
1da177e4 LT |
530 | } |
531 | ||
f36861d5 | 532 | static void __exit tcx_exit(void) |
1da177e4 | 533 | { |
50312ce9 | 534 | of_unregister_driver(&tcx_driver); |
1da177e4 LT |
535 | } |
536 | ||
537 | module_init(tcx_init); | |
1da177e4 | 538 | module_exit(tcx_exit); |
1da177e4 LT |
539 | |
540 | MODULE_DESCRIPTION("framebuffer driver for TCX chipsets"); | |
50312ce9 DM |
541 | MODULE_AUTHOR("David S. Miller <davem@davemloft.net>"); |
542 | MODULE_VERSION("2.0"); | |
1da177e4 | 543 | MODULE_LICENSE("GPL"); |