]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Frame buffer driver for Trident Blade and Image series | |
3 | * | |
245a2c2c | 4 | * Copyright 2001, 2002 - Jani Monoses <jani@iv.ro> |
1da177e4 LT |
5 | * |
6 | * | |
7 | * CREDITS:(in order of appearance) | |
245a2c2c KH |
8 | * skeletonfb.c by Geert Uytterhoeven and other fb code in drivers/video |
9 | * Special thanks ;) to Mattia Crivellini <tia@mclink.it> | |
10 | * much inspired by the XFree86 4.x Trident driver sources | |
11 | * by Alan Hourihane the FreeVGA project | |
12 | * Francesco Salvestrini <salvestrini@users.sf.net> XP support, | |
13 | * code, suggestions | |
1da177e4 | 14 | * TODO: |
245a2c2c KH |
15 | * timing value tweaking so it looks good on every monitor in every mode |
16 | * TGUI acceleration | |
1da177e4 LT |
17 | */ |
18 | ||
1da177e4 LT |
19 | #include <linux/module.h> |
20 | #include <linux/fb.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/pci.h> | |
23 | ||
24 | #include <linux/delay.h> | |
25 | #include <video/trident.h> | |
26 | ||
122e8ad3 | 27 | #define VERSION "0.7.9-NEWAPI" |
1da177e4 LT |
28 | |
29 | struct tridentfb_par { | |
245a2c2c | 30 | void __iomem *io_virt; /* iospace virtual memory address */ |
ea8ee55c | 31 | u32 pseudo_pal[16]; |
122e8ad3 | 32 | int chip_id; |
1da177e4 LT |
33 | }; |
34 | ||
245a2c2c | 35 | static unsigned char eng_oper; /* engine operation... */ |
1da177e4 LT |
36 | static struct fb_ops tridentfb_ops; |
37 | ||
1da177e4 | 38 | static struct fb_fix_screeninfo tridentfb_fix = { |
245a2c2c | 39 | .id = "Trident", |
1da177e4 LT |
40 | .type = FB_TYPE_PACKED_PIXELS, |
41 | .ypanstep = 1, | |
42 | .visual = FB_VISUAL_PSEUDOCOLOR, | |
43 | .accel = FB_ACCEL_NONE, | |
44 | }; | |
45 | ||
1da177e4 LT |
46 | static int displaytype; |
47 | ||
1da177e4 LT |
48 | /* defaults which are normally overriden by user values */ |
49 | ||
50 | /* video mode */ | |
07f41e45 | 51 | static char *mode_option __devinitdata = "640x480"; |
1da177e4 LT |
52 | static int bpp = 8; |
53 | ||
54 | static int noaccel; | |
55 | ||
56 | static int center; | |
57 | static int stretch; | |
58 | ||
59 | static int fp; | |
60 | static int crt; | |
61 | ||
62 | static int memsize; | |
63 | static int memdiff; | |
64 | static int nativex; | |
65 | ||
07f41e45 KH |
66 | module_param(mode_option, charp, 0); |
67 | MODULE_PARM_DESC(mode_option, "Initial video mode e.g. '648x480-8@60'"); | |
9e3f0ca8 KH |
68 | module_param_named(mode, mode_option, charp, 0); |
69 | MODULE_PARM_DESC(mode, "Initial video mode e.g. '648x480-8@60' (deprecated)"); | |
1da177e4 LT |
70 | module_param(bpp, int, 0); |
71 | module_param(center, int, 0); | |
72 | module_param(stretch, int, 0); | |
73 | module_param(noaccel, int, 0); | |
74 | module_param(memsize, int, 0); | |
75 | module_param(memdiff, int, 0); | |
76 | module_param(nativex, int, 0); | |
77 | module_param(fp, int, 0); | |
78 | module_param(crt, int, 0); | |
79 | ||
1da177e4 LT |
80 | static int is3Dchip(int id) |
81 | { | |
245a2c2c KH |
82 | return ((id == BLADE3D) || (id == CYBERBLADEE4) || |
83 | (id == CYBERBLADEi7) || (id == CYBERBLADEi7D) || | |
84 | (id == CYBER9397) || (id == CYBER9397DVD) || | |
85 | (id == CYBER9520) || (id == CYBER9525DVD) || | |
86 | (id == IMAGE975) || (id == IMAGE985) || | |
87 | (id == CYBERBLADEi1) || (id == CYBERBLADEi1D) || | |
88 | (id == CYBERBLADEAi1) || (id == CYBERBLADEAi1D) || | |
89 | (id == CYBERBLADEXPm8) || (id == CYBERBLADEXPm16) || | |
90 | (id == CYBERBLADEXPAi1)); | |
1da177e4 LT |
91 | } |
92 | ||
93 | static int iscyber(int id) | |
94 | { | |
95 | switch (id) { | |
245a2c2c KH |
96 | case CYBER9388: |
97 | case CYBER9382: | |
98 | case CYBER9385: | |
99 | case CYBER9397: | |
100 | case CYBER9397DVD: | |
101 | case CYBER9520: | |
102 | case CYBER9525DVD: | |
103 | case CYBERBLADEE4: | |
104 | case CYBERBLADEi7D: | |
105 | case CYBERBLADEi1: | |
106 | case CYBERBLADEi1D: | |
107 | case CYBERBLADEAi1: | |
108 | case CYBERBLADEAi1D: | |
109 | case CYBERBLADEXPAi1: | |
110 | return 1; | |
1da177e4 | 111 | |
245a2c2c KH |
112 | case CYBER9320: |
113 | case TGUI9660: | |
114 | case IMAGE975: | |
115 | case IMAGE985: | |
116 | case BLADE3D: | |
117 | case CYBERBLADEi7: /* VIA MPV4 integrated version */ | |
118 | ||
119 | default: | |
120 | /* case CYBERBLDAEXPm8: Strange */ | |
121 | /* case CYBERBLDAEXPm16: Strange */ | |
122 | return 0; | |
1da177e4 LT |
123 | } |
124 | } | |
125 | ||
245a2c2c | 126 | #define CRT 0x3D0 /* CRTC registers offset for color display */ |
1da177e4 | 127 | |
306fa6f6 KH |
128 | static inline void t_outb(struct tridentfb_par *p, u8 val, u16 reg) |
129 | { | |
130 | fb_writeb(val, p->io_virt + reg); | |
131 | } | |
1da177e4 | 132 | |
306fa6f6 KH |
133 | static inline u8 t_inb(struct tridentfb_par *p, u16 reg) |
134 | { | |
135 | return fb_readb(p->io_virt + reg); | |
136 | } | |
1da177e4 LT |
137 | |
138 | static struct accel_switch { | |
306fa6f6 KH |
139 | void (*init_accel) (struct tridentfb_par *, int, int); |
140 | void (*wait_engine) (struct tridentfb_par *); | |
141 | void (*fill_rect) | |
142 | (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32); | |
143 | void (*copy_rect) | |
144 | (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32); | |
1da177e4 LT |
145 | } *acc; |
146 | ||
306fa6f6 KH |
147 | static inline void writemmr(struct tridentfb_par *par, u16 r, u32 v) |
148 | { | |
149 | fb_writel(v, par->io_virt + r); | |
150 | } | |
151 | ||
152 | static inline u32 readmmr(struct tridentfb_par *par, u16 r) | |
153 | { | |
154 | return fb_readl(par->io_virt + r); | |
155 | } | |
1da177e4 | 156 | |
1da177e4 LT |
157 | /* |
158 | * Blade specific acceleration. | |
159 | */ | |
160 | ||
245a2c2c | 161 | #define point(x, y) ((y) << 16 | (x)) |
1da177e4 LT |
162 | #define STA 0x2120 |
163 | #define CMD 0x2144 | |
164 | #define ROP 0x2148 | |
165 | #define CLR 0x2160 | |
166 | #define SR1 0x2100 | |
167 | #define SR2 0x2104 | |
168 | #define DR1 0x2108 | |
169 | #define DR2 0x210C | |
170 | ||
171 | #define ROP_S 0xCC | |
172 | ||
306fa6f6 | 173 | static void blade_init_accel(struct tridentfb_par *par, int pitch, int bpp) |
1da177e4 | 174 | { |
245a2c2c KH |
175 | int v1 = (pitch >> 3) << 20; |
176 | int tmp = 0, v2; | |
1da177e4 | 177 | switch (bpp) { |
245a2c2c KH |
178 | case 8: |
179 | tmp = 0; | |
180 | break; | |
181 | case 15: | |
182 | tmp = 5; | |
183 | break; | |
184 | case 16: | |
185 | tmp = 1; | |
186 | break; | |
187 | case 24: | |
188 | case 32: | |
189 | tmp = 2; | |
190 | break; | |
1da177e4 | 191 | } |
245a2c2c | 192 | v2 = v1 | (tmp << 29); |
306fa6f6 KH |
193 | writemmr(par, 0x21C0, v2); |
194 | writemmr(par, 0x21C4, v2); | |
195 | writemmr(par, 0x21B8, v2); | |
196 | writemmr(par, 0x21BC, v2); | |
197 | writemmr(par, 0x21D0, v1); | |
198 | writemmr(par, 0x21D4, v1); | |
199 | writemmr(par, 0x21C8, v1); | |
200 | writemmr(par, 0x21CC, v1); | |
201 | writemmr(par, 0x216C, 0); | |
1da177e4 LT |
202 | } |
203 | ||
306fa6f6 | 204 | static void blade_wait_engine(struct tridentfb_par *par) |
1da177e4 | 205 | { |
306fa6f6 | 206 | while (readmmr(par, STA) & 0xFA800000) ; |
1da177e4 LT |
207 | } |
208 | ||
306fa6f6 KH |
209 | static void blade_fill_rect(struct tridentfb_par *par, |
210 | u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) | |
1da177e4 | 211 | { |
306fa6f6 KH |
212 | writemmr(par, CLR, c); |
213 | writemmr(par, ROP, rop ? 0x66 : ROP_S); | |
214 | writemmr(par, CMD, 0x20000000 | 1 << 19 | 1 << 4 | 2 << 2); | |
1da177e4 | 215 | |
306fa6f6 KH |
216 | writemmr(par, DR1, point(x, y)); |
217 | writemmr(par, DR2, point(x + w - 1, y + h - 1)); | |
1da177e4 LT |
218 | } |
219 | ||
306fa6f6 KH |
220 | static void blade_copy_rect(struct tridentfb_par *par, |
221 | u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) | |
1da177e4 | 222 | { |
245a2c2c | 223 | u32 s1, s2, d1, d2; |
1da177e4 | 224 | int direction = 2; |
245a2c2c KH |
225 | s1 = point(x1, y1); |
226 | s2 = point(x1 + w - 1, y1 + h - 1); | |
227 | d1 = point(x2, y2); | |
228 | d2 = point(x2 + w - 1, y2 + h - 1); | |
1da177e4 LT |
229 | |
230 | if ((y1 > y2) || ((y1 == y2) && (x1 > x2))) | |
245a2c2c | 231 | direction = 0; |
1da177e4 | 232 | |
306fa6f6 KH |
233 | writemmr(par, ROP, ROP_S); |
234 | writemmr(par, CMD, 0xE0000000 | 1 << 19 | 1 << 4 | 1 << 2 | direction); | |
1da177e4 | 235 | |
306fa6f6 KH |
236 | writemmr(par, SR1, direction ? s2 : s1); |
237 | writemmr(par, SR2, direction ? s1 : s2); | |
238 | writemmr(par, DR1, direction ? d2 : d1); | |
239 | writemmr(par, DR2, direction ? d1 : d2); | |
1da177e4 LT |
240 | } |
241 | ||
242 | static struct accel_switch accel_blade = { | |
243 | blade_init_accel, | |
244 | blade_wait_engine, | |
245 | blade_fill_rect, | |
246 | blade_copy_rect, | |
247 | }; | |
248 | ||
1da177e4 LT |
249 | /* |
250 | * BladeXP specific acceleration functions | |
251 | */ | |
252 | ||
253 | #define ROP_P 0xF0 | |
245a2c2c | 254 | #define masked_point(x, y) ((y & 0xffff)<<16|(x & 0xffff)) |
1da177e4 | 255 | |
306fa6f6 | 256 | static void xp_init_accel(struct tridentfb_par *par, int pitch, int bpp) |
1da177e4 | 257 | { |
245a2c2c | 258 | int tmp = 0, v1; |
1da177e4 LT |
259 | unsigned char x = 0; |
260 | ||
261 | switch (bpp) { | |
245a2c2c KH |
262 | case 8: |
263 | x = 0; | |
264 | break; | |
265 | case 16: | |
266 | x = 1; | |
267 | break; | |
268 | case 24: | |
269 | x = 3; | |
270 | break; | |
271 | case 32: | |
272 | x = 2; | |
273 | break; | |
1da177e4 LT |
274 | } |
275 | ||
276 | switch (pitch << (bpp >> 3)) { | |
245a2c2c KH |
277 | case 8192: |
278 | case 512: | |
279 | x |= 0x00; | |
280 | break; | |
281 | case 1024: | |
282 | x |= 0x04; | |
283 | break; | |
284 | case 2048: | |
285 | x |= 0x08; | |
286 | break; | |
287 | case 4096: | |
288 | x |= 0x0C; | |
289 | break; | |
1da177e4 LT |
290 | } |
291 | ||
306fa6f6 | 292 | t_outb(par, x, 0x2125); |
1da177e4 LT |
293 | |
294 | eng_oper = x | 0x40; | |
295 | ||
296 | switch (bpp) { | |
245a2c2c KH |
297 | case 8: |
298 | tmp = 18; | |
299 | break; | |
300 | case 15: | |
301 | case 16: | |
302 | tmp = 19; | |
303 | break; | |
304 | case 24: | |
305 | case 32: | |
306 | tmp = 20; | |
307 | break; | |
1da177e4 LT |
308 | } |
309 | ||
310 | v1 = pitch << tmp; | |
311 | ||
306fa6f6 KH |
312 | writemmr(par, 0x2154, v1); |
313 | writemmr(par, 0x2150, v1); | |
314 | t_outb(par, 3, 0x2126); | |
1da177e4 LT |
315 | } |
316 | ||
306fa6f6 | 317 | static void xp_wait_engine(struct tridentfb_par *par) |
1da177e4 LT |
318 | { |
319 | int busy; | |
320 | int count, timeout; | |
321 | ||
322 | count = 0; | |
323 | timeout = 0; | |
324 | for (;;) { | |
306fa6f6 | 325 | busy = t_inb(par, STA) & 0x80; |
1da177e4 LT |
326 | if (busy != 0x80) |
327 | return; | |
328 | count++; | |
329 | if (count == 10000000) { | |
330 | /* Timeout */ | |
331 | count = 9990000; | |
332 | timeout++; | |
333 | if (timeout == 8) { | |
334 | /* Reset engine */ | |
306fa6f6 | 335 | t_outb(par, 0x00, 0x2120); |
1da177e4 LT |
336 | return; |
337 | } | |
338 | } | |
339 | } | |
340 | } | |
341 | ||
306fa6f6 KH |
342 | static void xp_fill_rect(struct tridentfb_par *par, |
343 | u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) | |
1da177e4 | 344 | { |
306fa6f6 KH |
345 | writemmr(par, 0x2127, ROP_P); |
346 | writemmr(par, 0x2158, c); | |
347 | writemmr(par, 0x2128, 0x4000); | |
348 | writemmr(par, 0x2140, masked_point(h, w)); | |
349 | writemmr(par, 0x2138, masked_point(y, x)); | |
350 | t_outb(par, 0x01, 0x2124); | |
351 | t_outb(par, eng_oper, 0x2125); | |
1da177e4 LT |
352 | } |
353 | ||
306fa6f6 KH |
354 | static void xp_copy_rect(struct tridentfb_par *par, |
355 | u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) | |
1da177e4 LT |
356 | { |
357 | int direction; | |
245a2c2c | 358 | u32 x1_tmp, x2_tmp, y1_tmp, y2_tmp; |
1da177e4 LT |
359 | |
360 | direction = 0x0004; | |
245a2c2c | 361 | |
1da177e4 LT |
362 | if ((x1 < x2) && (y1 == y2)) { |
363 | direction |= 0x0200; | |
364 | x1_tmp = x1 + w - 1; | |
365 | x2_tmp = x2 + w - 1; | |
366 | } else { | |
367 | x1_tmp = x1; | |
368 | x2_tmp = x2; | |
369 | } | |
245a2c2c | 370 | |
1da177e4 LT |
371 | if (y1 < y2) { |
372 | direction |= 0x0100; | |
373 | y1_tmp = y1 + h - 1; | |
374 | y2_tmp = y2 + h - 1; | |
245a2c2c | 375 | } else { |
1da177e4 LT |
376 | y1_tmp = y1; |
377 | y2_tmp = y2; | |
378 | } | |
379 | ||
306fa6f6 KH |
380 | writemmr(par, 0x2128, direction); |
381 | t_outb(par, ROP_S, 0x2127); | |
382 | writemmr(par, 0x213C, masked_point(y1_tmp, x1_tmp)); | |
383 | writemmr(par, 0x2138, masked_point(y2_tmp, x2_tmp)); | |
384 | writemmr(par, 0x2140, masked_point(h, w)); | |
385 | t_outb(par, 0x01, 0x2124); | |
1da177e4 LT |
386 | } |
387 | ||
388 | static struct accel_switch accel_xp = { | |
245a2c2c | 389 | xp_init_accel, |
1da177e4 LT |
390 | xp_wait_engine, |
391 | xp_fill_rect, | |
392 | xp_copy_rect, | |
393 | }; | |
394 | ||
1da177e4 LT |
395 | /* |
396 | * Image specific acceleration functions | |
397 | */ | |
306fa6f6 | 398 | static void image_init_accel(struct tridentfb_par *par, int pitch, int bpp) |
1da177e4 LT |
399 | { |
400 | int tmp = 0; | |
245a2c2c KH |
401 | switch (bpp) { |
402 | case 8: | |
403 | tmp = 0; | |
404 | break; | |
405 | case 15: | |
406 | tmp = 5; | |
407 | break; | |
408 | case 16: | |
409 | tmp = 1; | |
410 | break; | |
411 | case 24: | |
412 | case 32: | |
413 | tmp = 2; | |
414 | break; | |
1da177e4 | 415 | } |
306fa6f6 KH |
416 | writemmr(par, 0x2120, 0xF0000000); |
417 | writemmr(par, 0x2120, 0x40000000 | tmp); | |
418 | writemmr(par, 0x2120, 0x80000000); | |
419 | writemmr(par, 0x2144, 0x00000000); | |
420 | writemmr(par, 0x2148, 0x00000000); | |
421 | writemmr(par, 0x2150, 0x00000000); | |
422 | writemmr(par, 0x2154, 0x00000000); | |
423 | writemmr(par, 0x2120, 0x60000000 | (pitch << 16) | pitch); | |
424 | writemmr(par, 0x216C, 0x00000000); | |
425 | writemmr(par, 0x2170, 0x00000000); | |
426 | writemmr(par, 0x217C, 0x00000000); | |
427 | writemmr(par, 0x2120, 0x10000000); | |
428 | writemmr(par, 0x2130, (2047 << 16) | 2047); | |
1da177e4 LT |
429 | } |
430 | ||
306fa6f6 | 431 | static void image_wait_engine(struct tridentfb_par *par) |
1da177e4 | 432 | { |
306fa6f6 | 433 | while (readmmr(par, 0x2164) & 0xF0000000) ; |
1da177e4 LT |
434 | } |
435 | ||
306fa6f6 KH |
436 | static void image_fill_rect(struct tridentfb_par *par, |
437 | u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) | |
1da177e4 | 438 | { |
306fa6f6 KH |
439 | writemmr(par, 0x2120, 0x80000000); |
440 | writemmr(par, 0x2120, 0x90000000 | ROP_S); | |
1da177e4 | 441 | |
306fa6f6 | 442 | writemmr(par, 0x2144, c); |
1da177e4 | 443 | |
306fa6f6 KH |
444 | writemmr(par, DR1, point(x, y)); |
445 | writemmr(par, DR2, point(x + w - 1, y + h - 1)); | |
1da177e4 | 446 | |
306fa6f6 | 447 | writemmr(par, 0x2124, 0x80000000 | 3 << 22 | 1 << 10 | 1 << 9); |
1da177e4 LT |
448 | } |
449 | ||
306fa6f6 KH |
450 | static void image_copy_rect(struct tridentfb_par *par, |
451 | u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) | |
1da177e4 | 452 | { |
245a2c2c | 453 | u32 s1, s2, d1, d2; |
1da177e4 | 454 | int direction = 2; |
245a2c2c KH |
455 | s1 = point(x1, y1); |
456 | s2 = point(x1 + w - 1, y1 + h - 1); | |
457 | d1 = point(x2, y2); | |
458 | d2 = point(x2 + w - 1, y2 + h - 1); | |
1da177e4 | 459 | |
245a2c2c KH |
460 | if ((y1 > y2) || ((y1 == y2) && (x1 > x2))) |
461 | direction = 0; | |
462 | ||
306fa6f6 KH |
463 | writemmr(par, 0x2120, 0x80000000); |
464 | writemmr(par, 0x2120, 0x90000000 | ROP_S); | |
245a2c2c | 465 | |
306fa6f6 KH |
466 | writemmr(par, SR1, direction ? s2 : s1); |
467 | writemmr(par, SR2, direction ? s1 : s2); | |
468 | writemmr(par, DR1, direction ? d2 : d1); | |
469 | writemmr(par, DR2, direction ? d1 : d2); | |
470 | writemmr(par, 0x2124, | |
471 | 0x80000000 | 1 << 22 | 1 << 10 | 1 << 7 | direction); | |
245a2c2c | 472 | } |
1da177e4 LT |
473 | |
474 | static struct accel_switch accel_image = { | |
475 | image_init_accel, | |
476 | image_wait_engine, | |
477 | image_fill_rect, | |
478 | image_copy_rect, | |
479 | }; | |
480 | ||
481 | /* | |
482 | * Accel functions called by the upper layers | |
483 | */ | |
484 | #ifdef CONFIG_FB_TRIDENT_ACCEL | |
245a2c2c KH |
485 | static void tridentfb_fillrect(struct fb_info *info, |
486 | const struct fb_fillrect *fr) | |
1da177e4 | 487 | { |
306fa6f6 | 488 | struct tridentfb_par *par = info->par; |
1da177e4 | 489 | int bpp = info->var.bits_per_pixel; |
8dad46cf | 490 | int col = 0; |
245a2c2c | 491 | |
1da177e4 | 492 | switch (bpp) { |
245a2c2c KH |
493 | default: |
494 | case 8: | |
495 | col |= fr->color; | |
496 | col |= col << 8; | |
497 | col |= col << 16; | |
498 | break; | |
499 | case 16: | |
500 | col = ((u32 *)(info->pseudo_palette))[fr->color]; | |
501 | break; | |
502 | case 32: | |
503 | col = ((u32 *)(info->pseudo_palette))[fr->color]; | |
504 | break; | |
505 | } | |
506 | ||
306fa6f6 KH |
507 | acc->fill_rect(par, fr->dx, fr->dy, fr->width, |
508 | fr->height, col, fr->rop); | |
509 | acc->wait_engine(par); | |
1da177e4 | 510 | } |
245a2c2c KH |
511 | static void tridentfb_copyarea(struct fb_info *info, |
512 | const struct fb_copyarea *ca) | |
1da177e4 | 513 | { |
306fa6f6 KH |
514 | struct tridentfb_par *par = info->par; |
515 | ||
516 | acc->copy_rect(par, ca->sx, ca->sy, ca->dx, ca->dy, | |
517 | ca->width, ca->height); | |
518 | acc->wait_engine(par); | |
1da177e4 LT |
519 | } |
520 | #else /* !CONFIG_FB_TRIDENT_ACCEL */ | |
521 | #define tridentfb_fillrect cfb_fillrect | |
522 | #define tridentfb_copyarea cfb_copyarea | |
523 | #endif /* CONFIG_FB_TRIDENT_ACCEL */ | |
524 | ||
525 | ||
526 | /* | |
527 | * Hardware access functions | |
528 | */ | |
529 | ||
306fa6f6 | 530 | static inline unsigned char read3X4(struct tridentfb_par *par, int reg) |
1da177e4 | 531 | { |
1da177e4 | 532 | writeb(reg, par->io_virt + CRT + 4); |
245a2c2c | 533 | return readb(par->io_virt + CRT + 5); |
1da177e4 LT |
534 | } |
535 | ||
306fa6f6 KH |
536 | static inline void write3X4(struct tridentfb_par *par, int reg, |
537 | unsigned char val) | |
1da177e4 | 538 | { |
1da177e4 LT |
539 | writeb(reg, par->io_virt + CRT + 4); |
540 | writeb(val, par->io_virt + CRT + 5); | |
541 | } | |
542 | ||
306fa6f6 | 543 | static inline unsigned char read3C4(struct tridentfb_par *par, int reg) |
1da177e4 | 544 | { |
306fa6f6 KH |
545 | t_outb(par, reg, 0x3C4); |
546 | return t_inb(par, 0x3C5); | |
1da177e4 LT |
547 | } |
548 | ||
306fa6f6 KH |
549 | static inline void write3C4(struct tridentfb_par *par, int reg, |
550 | unsigned char val) | |
1da177e4 | 551 | { |
306fa6f6 KH |
552 | t_outb(par, reg, 0x3C4); |
553 | t_outb(par, val, 0x3C5); | |
1da177e4 LT |
554 | } |
555 | ||
306fa6f6 | 556 | static inline unsigned char read3CE(struct tridentfb_par *par, int reg) |
1da177e4 | 557 | { |
306fa6f6 KH |
558 | t_outb(par, reg, 0x3CE); |
559 | return t_inb(par, 0x3CF); | |
1da177e4 LT |
560 | } |
561 | ||
306fa6f6 KH |
562 | static inline void writeAttr(struct tridentfb_par *par, int reg, |
563 | unsigned char val) | |
1da177e4 | 564 | { |
306fa6f6 KH |
565 | fb_readb(par->io_virt + CRT + 0x0A); /* flip-flop to index */ |
566 | t_outb(par, reg, 0x3C0); | |
567 | t_outb(par, val, 0x3C0); | |
1da177e4 LT |
568 | } |
569 | ||
306fa6f6 KH |
570 | static inline void write3CE(struct tridentfb_par *par, int reg, |
571 | unsigned char val) | |
1da177e4 | 572 | { |
306fa6f6 KH |
573 | t_outb(par, reg, 0x3CE); |
574 | t_outb(par, val, 0x3CF); | |
1da177e4 LT |
575 | } |
576 | ||
e8ed857c | 577 | static void enable_mmio(void) |
1da177e4 LT |
578 | { |
579 | /* Goto New Mode */ | |
580 | outb(0x0B, 0x3C4); | |
581 | inb(0x3C5); | |
582 | ||
583 | /* Unprotect registers */ | |
584 | outb(NewMode1, 0x3C4); | |
585 | outb(0x80, 0x3C5); | |
245a2c2c | 586 | |
1da177e4 | 587 | /* Enable MMIO */ |
245a2c2c | 588 | outb(PCIReg, 0x3D4); |
1da177e4 | 589 | outb(inb(0x3D5) | 0x01, 0x3D5); |
e8ed857c KH |
590 | } |
591 | ||
306fa6f6 | 592 | static void disable_mmio(struct tridentfb_par *par) |
e8ed857c | 593 | { |
e8ed857c | 594 | /* Goto New Mode */ |
306fa6f6 KH |
595 | t_outb(par, 0x0B, 0x3C4); |
596 | t_inb(par, 0x3C5); | |
e8ed857c KH |
597 | |
598 | /* Unprotect registers */ | |
306fa6f6 KH |
599 | t_outb(par, NewMode1, 0x3C4); |
600 | t_outb(par, 0x80, 0x3C5); | |
e8ed857c KH |
601 | |
602 | /* Disable MMIO */ | |
306fa6f6 KH |
603 | t_outb(par, PCIReg, 0x3D4); |
604 | t_outb(par, t_inb(par, 0x3D5) & ~0x01, 0x3D5); | |
1da177e4 LT |
605 | } |
606 | ||
306fa6f6 KH |
607 | static void crtc_unlock(struct tridentfb_par *par) |
608 | { | |
609 | write3X4(par, CRTVSyncEnd, read3X4(par, CRTVSyncEnd) & 0x7F); | |
610 | } | |
1da177e4 LT |
611 | |
612 | /* Return flat panel's maximum x resolution */ | |
306fa6f6 | 613 | static int __devinit get_nativex(struct tridentfb_par *par) |
1da177e4 | 614 | { |
245a2c2c | 615 | int x, y, tmp; |
1da177e4 LT |
616 | |
617 | if (nativex) | |
618 | return nativex; | |
619 | ||
306fa6f6 | 620 | tmp = (read3CE(par, VertStretch) >> 4) & 3; |
1da177e4 LT |
621 | |
622 | switch (tmp) { | |
245a2c2c KH |
623 | case 0: |
624 | x = 1280; y = 1024; | |
625 | break; | |
626 | case 2: | |
627 | x = 1024; y = 768; | |
628 | break; | |
629 | case 3: | |
630 | x = 800; y = 600; | |
631 | break; | |
632 | case 4: | |
633 | x = 1400; y = 1050; | |
634 | break; | |
635 | case 1: | |
636 | default: | |
637 | x = 640; y = 480; | |
638 | break; | |
1da177e4 LT |
639 | } |
640 | ||
641 | output("%dx%d flat panel found\n", x, y); | |
642 | return x; | |
643 | } | |
644 | ||
645 | /* Set pitch */ | |
306fa6f6 | 646 | static void set_lwidth(struct tridentfb_par *par, int width) |
1da177e4 | 647 | { |
306fa6f6 KH |
648 | write3X4(par, Offset, width & 0xFF); |
649 | write3X4(par, AddColReg, | |
650 | (read3X4(par, AddColReg) & 0xCF) | ((width & 0x300) >> 4)); | |
1da177e4 LT |
651 | } |
652 | ||
653 | /* For resolutions smaller than FP resolution stretch */ | |
306fa6f6 | 654 | static void screen_stretch(struct tridentfb_par *par) |
1da177e4 | 655 | { |
122e8ad3 | 656 | if (par->chip_id != CYBERBLADEXPAi1) |
306fa6f6 | 657 | write3CE(par, BiosReg, 0); |
245a2c2c | 658 | else |
306fa6f6 KH |
659 | write3CE(par, BiosReg, 8); |
660 | write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 1); | |
661 | write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 1); | |
1da177e4 LT |
662 | } |
663 | ||
664 | /* For resolutions smaller than FP resolution center */ | |
306fa6f6 | 665 | static void screen_center(struct tridentfb_par *par) |
1da177e4 | 666 | { |
306fa6f6 KH |
667 | write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 0x80); |
668 | write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 0x80); | |
1da177e4 LT |
669 | } |
670 | ||
671 | /* Address of first shown pixel in display memory */ | |
306fa6f6 | 672 | static void set_screen_start(struct tridentfb_par *par, int base) |
1da177e4 | 673 | { |
306fa6f6 KH |
674 | u8 tmp; |
675 | write3X4(par, StartAddrLow, base & 0xFF); | |
676 | write3X4(par, StartAddrHigh, (base & 0xFF00) >> 8); | |
677 | tmp = read3X4(par, CRTCModuleTest) & 0xDF; | |
678 | write3X4(par, CRTCModuleTest, tmp | ((base & 0x10000) >> 11)); | |
679 | tmp = read3X4(par, CRTHiOrd) & 0xF8; | |
680 | write3X4(par, CRTHiOrd, tmp | ((base & 0xE0000) >> 17)); | |
1da177e4 LT |
681 | } |
682 | ||
1da177e4 | 683 | /* Set dotclock frequency */ |
306fa6f6 | 684 | static void set_vclk(struct tridentfb_par *par, unsigned long freq) |
1da177e4 | 685 | { |
245a2c2c | 686 | int m, n, k; |
3f275ea3 | 687 | unsigned long f, fi, d, di; |
245a2c2c | 688 | unsigned char lo = 0, hi = 0; |
1da177e4 | 689 | |
3f275ea3 | 690 | d = 20000; |
245a2c2c KH |
691 | for (k = 2; k >= 0; k--) |
692 | for (m = 0; m < 63; m++) | |
693 | for (n = 0; n < 128; n++) { | |
3f275ea3 | 694 | fi = ((14318l * (n + 8)) / (m + 2)) >> k; |
245a2c2c KH |
695 | if ((di = abs(fi - freq)) < d) { |
696 | d = di; | |
697 | f = fi; | |
698 | lo = n; | |
699 | hi = (k << 6) | m; | |
700 | } | |
3f275ea3 KH |
701 | if (fi > freq) |
702 | break; | |
245a2c2c | 703 | } |
122e8ad3 | 704 | if (is3Dchip(par->chip_id)) { |
306fa6f6 KH |
705 | write3C4(par, ClockHigh, hi); |
706 | write3C4(par, ClockLow, lo); | |
1da177e4 | 707 | } else { |
245a2c2c KH |
708 | outb(lo, 0x43C8); |
709 | outb(hi, 0x43C9); | |
1da177e4 | 710 | } |
245a2c2c | 711 | debug("VCLK = %X %X\n", hi, lo); |
1da177e4 LT |
712 | } |
713 | ||
714 | /* Set number of lines for flat panels*/ | |
306fa6f6 | 715 | static void set_number_of_lines(struct tridentfb_par *par, int lines) |
1da177e4 | 716 | { |
306fa6f6 | 717 | int tmp = read3CE(par, CyberEnhance) & 0x8F; |
1da177e4 LT |
718 | if (lines > 1024) |
719 | tmp |= 0x50; | |
720 | else if (lines > 768) | |
721 | tmp |= 0x30; | |
722 | else if (lines > 600) | |
723 | tmp |= 0x20; | |
724 | else if (lines > 480) | |
725 | tmp |= 0x10; | |
306fa6f6 | 726 | write3CE(par, CyberEnhance, tmp); |
1da177e4 LT |
727 | } |
728 | ||
729 | /* | |
730 | * If we see that FP is active we assume we have one. | |
731 | * Otherwise we have a CRT display.User can override. | |
732 | */ | |
306fa6f6 | 733 | static unsigned int __devinit get_displaytype(struct tridentfb_par *par) |
1da177e4 LT |
734 | { |
735 | if (fp) | |
736 | return DISPLAY_FP; | |
122e8ad3 | 737 | if (crt || !iscyber(par->chip_id)) |
1da177e4 | 738 | return DISPLAY_CRT; |
306fa6f6 | 739 | return (read3CE(par, FPConfig) & 0x10) ? DISPLAY_FP : DISPLAY_CRT; |
1da177e4 LT |
740 | } |
741 | ||
742 | /* Try detecting the video memory size */ | |
306fa6f6 | 743 | static unsigned int __devinit get_memsize(struct tridentfb_par *par) |
1da177e4 LT |
744 | { |
745 | unsigned char tmp, tmp2; | |
746 | unsigned int k; | |
747 | ||
748 | /* If memory size provided by user */ | |
749 | if (memsize) | |
750 | k = memsize * Kb; | |
751 | else | |
122e8ad3 | 752 | switch (par->chip_id) { |
245a2c2c KH |
753 | case CYBER9525DVD: |
754 | k = 2560 * Kb; | |
755 | break; | |
1da177e4 | 756 | default: |
306fa6f6 | 757 | tmp = read3X4(par, SPR) & 0x0F; |
1da177e4 LT |
758 | switch (tmp) { |
759 | ||
245a2c2c | 760 | case 0x01: |
b614ce8b | 761 | k = 512 * Kb; |
245a2c2c KH |
762 | break; |
763 | case 0x02: | |
764 | k = 6 * Mb; /* XP */ | |
765 | break; | |
766 | case 0x03: | |
767 | k = 1 * Mb; | |
768 | break; | |
769 | case 0x04: | |
770 | k = 8 * Mb; | |
771 | break; | |
772 | case 0x06: | |
773 | k = 10 * Mb; /* XP */ | |
774 | break; | |
775 | case 0x07: | |
776 | k = 2 * Mb; | |
777 | break; | |
778 | case 0x08: | |
779 | k = 12 * Mb; /* XP */ | |
780 | break; | |
781 | case 0x0A: | |
782 | k = 14 * Mb; /* XP */ | |
783 | break; | |
784 | case 0x0C: | |
785 | k = 16 * Mb; /* XP */ | |
786 | break; | |
787 | case 0x0E: /* XP */ | |
788 | ||
306fa6f6 | 789 | tmp2 = read3C4(par, 0xC1); |
245a2c2c KH |
790 | switch (tmp2) { |
791 | case 0x00: | |
792 | k = 20 * Mb; | |
793 | break; | |
794 | case 0x01: | |
795 | k = 24 * Mb; | |
796 | break; | |
797 | case 0x10: | |
798 | k = 28 * Mb; | |
799 | break; | |
800 | case 0x11: | |
801 | k = 32 * Mb; | |
802 | break; | |
803 | default: | |
804 | k = 1 * Mb; | |
805 | break; | |
806 | } | |
807 | break; | |
808 | ||
809 | case 0x0F: | |
810 | k = 4 * Mb; | |
811 | break; | |
812 | default: | |
813 | k = 1 * Mb; | |
1da177e4 | 814 | break; |
1da177e4 | 815 | } |
245a2c2c | 816 | } |
1da177e4 LT |
817 | |
818 | k -= memdiff * Kb; | |
245a2c2c | 819 | output("framebuffer size = %d Kb\n", k / Kb); |
1da177e4 LT |
820 | return k; |
821 | } | |
822 | ||
823 | /* See if we can handle the video mode described in var */ | |
245a2c2c KH |
824 | static int tridentfb_check_var(struct fb_var_screeninfo *var, |
825 | struct fb_info *info) | |
1da177e4 LT |
826 | { |
827 | int bpp = var->bits_per_pixel; | |
828 | debug("enter\n"); | |
829 | ||
830 | /* check color depth */ | |
245a2c2c | 831 | if (bpp == 24) |
1da177e4 | 832 | bpp = var->bits_per_pixel = 32; |
245a2c2c | 833 | /* check whether resolution fits on panel and in memory */ |
1da177e4 LT |
834 | if (flatpanel && nativex && var->xres > nativex) |
835 | return -EINVAL; | |
245a2c2c | 836 | if (var->xres * var->yres_virtual * bpp / 8 > info->fix.smem_len) |
1da177e4 LT |
837 | return -EINVAL; |
838 | ||
839 | switch (bpp) { | |
245a2c2c KH |
840 | case 8: |
841 | var->red.offset = 0; | |
842 | var->green.offset = 0; | |
843 | var->blue.offset = 0; | |
844 | var->red.length = 6; | |
845 | var->green.length = 6; | |
846 | var->blue.length = 6; | |
847 | break; | |
848 | case 16: | |
849 | var->red.offset = 11; | |
850 | var->green.offset = 5; | |
851 | var->blue.offset = 0; | |
852 | var->red.length = 5; | |
853 | var->green.length = 6; | |
854 | var->blue.length = 5; | |
855 | break; | |
856 | case 32: | |
857 | var->red.offset = 16; | |
858 | var->green.offset = 8; | |
859 | var->blue.offset = 0; | |
860 | var->red.length = 8; | |
861 | var->green.length = 8; | |
862 | var->blue.length = 8; | |
863 | break; | |
864 | default: | |
865 | return -EINVAL; | |
1da177e4 LT |
866 | } |
867 | debug("exit\n"); | |
868 | ||
869 | return 0; | |
870 | ||
871 | } | |
245a2c2c | 872 | |
1da177e4 LT |
873 | /* Pan the display */ |
874 | static int tridentfb_pan_display(struct fb_var_screeninfo *var, | |
245a2c2c | 875 | struct fb_info *info) |
1da177e4 | 876 | { |
306fa6f6 | 877 | struct tridentfb_par *par = info->par; |
1da177e4 LT |
878 | unsigned int offset; |
879 | ||
880 | debug("enter\n"); | |
881 | offset = (var->xoffset + (var->yoffset * var->xres)) | |
245a2c2c | 882 | * var->bits_per_pixel / 32; |
1da177e4 LT |
883 | info->var.xoffset = var->xoffset; |
884 | info->var.yoffset = var->yoffset; | |
306fa6f6 | 885 | set_screen_start(par, offset); |
1da177e4 LT |
886 | debug("exit\n"); |
887 | return 0; | |
888 | } | |
889 | ||
306fa6f6 KH |
890 | static void shadowmode_on(struct tridentfb_par *par) |
891 | { | |
892 | write3CE(par, CyberControl, read3CE(par, CyberControl) | 0x81); | |
893 | } | |
894 | ||
895 | static void shadowmode_off(struct tridentfb_par *par) | |
896 | { | |
897 | write3CE(par, CyberControl, read3CE(par, CyberControl) & 0x7E); | |
898 | } | |
1da177e4 LT |
899 | |
900 | /* Set the hardware to the requested video mode */ | |
901 | static int tridentfb_set_par(struct fb_info *info) | |
902 | { | |
245a2c2c KH |
903 | struct tridentfb_par *par = (struct tridentfb_par *)(info->par); |
904 | u32 htotal, hdispend, hsyncstart, hsyncend, hblankstart, hblankend; | |
905 | u32 vtotal, vdispend, vsyncstart, vsyncend, vblankstart, vblankend; | |
906 | struct fb_var_screeninfo *var = &info->var; | |
1da177e4 LT |
907 | int bpp = var->bits_per_pixel; |
908 | unsigned char tmp; | |
3f275ea3 KH |
909 | unsigned long vclk; |
910 | ||
1da177e4 | 911 | debug("enter\n"); |
245a2c2c KH |
912 | hdispend = var->xres / 8 - 1; |
913 | hsyncstart = (var->xres + var->right_margin) / 8; | |
914 | hsyncend = var->hsync_len / 8; | |
915 | htotal = | |
916 | (var->xres + var->left_margin + var->right_margin + | |
917 | var->hsync_len) / 8 - 10; | |
1da177e4 LT |
918 | hblankstart = hdispend + 1; |
919 | hblankend = htotal + 5; | |
920 | ||
1da177e4 LT |
921 | vdispend = var->yres - 1; |
922 | vsyncstart = var->yres + var->lower_margin; | |
923 | vsyncend = var->vsync_len; | |
245a2c2c | 924 | vtotal = var->upper_margin + vsyncstart + vsyncend - 2; |
1da177e4 LT |
925 | vblankstart = var->yres; |
926 | vblankend = vtotal + 2; | |
927 | ||
306fa6f6 KH |
928 | crtc_unlock(par); |
929 | write3CE(par, CyberControl, 8); | |
1da177e4 LT |
930 | |
931 | if (flatpanel && var->xres < nativex) { | |
932 | /* | |
933 | * on flat panels with native size larger | |
934 | * than requested resolution decide whether | |
935 | * we stretch or center | |
936 | */ | |
306fa6f6 | 937 | t_outb(par, 0xEB, 0x3C2); |
1da177e4 | 938 | |
306fa6f6 | 939 | shadowmode_on(par); |
1da177e4 | 940 | |
245a2c2c | 941 | if (center) |
306fa6f6 | 942 | screen_center(par); |
1da177e4 | 943 | else if (stretch) |
306fa6f6 | 944 | screen_stretch(par); |
1da177e4 LT |
945 | |
946 | } else { | |
306fa6f6 KH |
947 | t_outb(par, 0x2B, 0x3C2); |
948 | write3CE(par, CyberControl, 8); | |
1da177e4 LT |
949 | } |
950 | ||
951 | /* vertical timing values */ | |
306fa6f6 KH |
952 | write3X4(par, CRTVTotal, vtotal & 0xFF); |
953 | write3X4(par, CRTVDispEnd, vdispend & 0xFF); | |
954 | write3X4(par, CRTVSyncStart, vsyncstart & 0xFF); | |
955 | write3X4(par, CRTVSyncEnd, (vsyncend & 0x0F)); | |
956 | write3X4(par, CRTVBlankStart, vblankstart & 0xFF); | |
957 | write3X4(par, CRTVBlankEnd, 0 /* p->vblankend & 0xFF */); | |
1da177e4 LT |
958 | |
959 | /* horizontal timing values */ | |
306fa6f6 KH |
960 | write3X4(par, CRTHTotal, htotal & 0xFF); |
961 | write3X4(par, CRTHDispEnd, hdispend & 0xFF); | |
962 | write3X4(par, CRTHSyncStart, hsyncstart & 0xFF); | |
963 | write3X4(par, CRTHSyncEnd, | |
964 | (hsyncend & 0x1F) | ((hblankend & 0x20) << 2)); | |
965 | write3X4(par, CRTHBlankStart, hblankstart & 0xFF); | |
966 | write3X4(par, CRTHBlankEnd, 0 /* (p->hblankend & 0x1F) */); | |
1da177e4 LT |
967 | |
968 | /* higher bits of vertical timing values */ | |
969 | tmp = 0x10; | |
970 | if (vtotal & 0x100) tmp |= 0x01; | |
971 | if (vdispend & 0x100) tmp |= 0x02; | |
972 | if (vsyncstart & 0x100) tmp |= 0x04; | |
973 | if (vblankstart & 0x100) tmp |= 0x08; | |
974 | ||
975 | if (vtotal & 0x200) tmp |= 0x20; | |
976 | if (vdispend & 0x200) tmp |= 0x40; | |
977 | if (vsyncstart & 0x200) tmp |= 0x80; | |
306fa6f6 | 978 | write3X4(par, CRTOverflow, tmp); |
1da177e4 | 979 | |
306fa6f6 | 980 | tmp = read3X4(par, CRTHiOrd) | 0x08; /* line compare bit 10 */ |
1da177e4 LT |
981 | if (vtotal & 0x400) tmp |= 0x80; |
982 | if (vblankstart & 0x400) tmp |= 0x40; | |
983 | if (vsyncstart & 0x400) tmp |= 0x20; | |
984 | if (vdispend & 0x400) tmp |= 0x10; | |
306fa6f6 | 985 | write3X4(par, CRTHiOrd, tmp); |
1da177e4 LT |
986 | |
987 | tmp = 0; | |
988 | if (htotal & 0x800) tmp |= 0x800 >> 11; | |
989 | if (hblankstart & 0x800) tmp |= 0x800 >> 7; | |
306fa6f6 | 990 | write3X4(par, HorizOverflow, tmp); |
245a2c2c | 991 | |
1da177e4 LT |
992 | tmp = 0x40; |
993 | if (vblankstart & 0x200) tmp |= 0x20; | |
245a2c2c | 994 | //FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp |= 0x80; /* double scan for 200 line modes */ |
306fa6f6 | 995 | write3X4(par, CRTMaxScanLine, tmp); |
1da177e4 | 996 | |
306fa6f6 KH |
997 | write3X4(par, CRTLineCompare, 0xFF); |
998 | write3X4(par, CRTPRowScan, 0); | |
999 | write3X4(par, CRTModeControl, 0xC3); | |
1da177e4 | 1000 | |
306fa6f6 | 1001 | write3X4(par, LinearAddReg, 0x20); /* enable linear addressing */ |
1da177e4 | 1002 | |
245a2c2c | 1003 | tmp = (info->var.vmode & FB_VMODE_INTERLACED) ? 0x84 : 0x80; |
306fa6f6 KH |
1004 | /* enable access extended memory */ |
1005 | write3X4(par, CRTCModuleTest, tmp); | |
1da177e4 | 1006 | |
306fa6f6 KH |
1007 | /* enable GE for text acceleration */ |
1008 | write3X4(par, GraphEngReg, 0x80); | |
1da177e4 | 1009 | |
245a2c2c | 1010 | #ifdef CONFIG_FB_TRIDENT_ACCEL |
306fa6f6 | 1011 | acc->init_accel(par, info->var.xres, bpp); |
8dad46cf | 1012 | #endif |
245a2c2c | 1013 | |
1da177e4 | 1014 | switch (bpp) { |
245a2c2c KH |
1015 | case 8: |
1016 | tmp = 0x00; | |
1017 | break; | |
1018 | case 16: | |
1019 | tmp = 0x05; | |
1020 | break; | |
1021 | case 24: | |
1022 | tmp = 0x29; | |
1023 | break; | |
1024 | case 32: | |
1025 | tmp = 0x09; | |
1026 | break; | |
1da177e4 LT |
1027 | } |
1028 | ||
306fa6f6 | 1029 | write3X4(par, PixelBusReg, tmp); |
1da177e4 LT |
1030 | |
1031 | tmp = 0x10; | |
122e8ad3 | 1032 | if (iscyber(par->chip_id)) |
245a2c2c | 1033 | tmp |= 0x20; |
306fa6f6 | 1034 | write3X4(par, DRAMControl, tmp); /* both IO, linear enable */ |
1da177e4 | 1035 | |
306fa6f6 KH |
1036 | write3X4(par, InterfaceSel, read3X4(par, InterfaceSel) | 0x40); |
1037 | write3X4(par, Performance, 0x92); | |
1038 | /* MMIO & PCI read and write burst enable */ | |
1039 | write3X4(par, PCIReg, 0x07); | |
1da177e4 | 1040 | |
3f275ea3 KH |
1041 | /* convert from picoseconds to kHz */ |
1042 | vclk = PICOS2KHZ(info->var.pixclock); | |
1da177e4 | 1043 | if (bpp == 32) |
3f275ea3 | 1044 | vclk *= 2; |
306fa6f6 | 1045 | set_vclk(par, vclk); |
1da177e4 | 1046 | |
306fa6f6 KH |
1047 | write3C4(par, 0, 3); |
1048 | write3C4(par, 1, 1); /* set char clock 8 dots wide */ | |
1049 | /* enable 4 maps because needed in chain4 mode */ | |
1050 | write3C4(par, 2, 0x0F); | |
1051 | write3C4(par, 3, 0); | |
1052 | write3C4(par, 4, 0x0E); /* memory mode enable bitmaps ?? */ | |
1da177e4 | 1053 | |
306fa6f6 KH |
1054 | /* divide clock by 2 if 32bpp chain4 mode display and CPU path */ |
1055 | write3CE(par, MiscExtFunc, (bpp == 32) ? 0x1A : 0x12); | |
1056 | write3CE(par, 0x5, 0x40); /* no CGA compat, allow 256 col */ | |
1057 | write3CE(par, 0x6, 0x05); /* graphics mode */ | |
1058 | write3CE(par, 0x7, 0x0F); /* planes? */ | |
1da177e4 | 1059 | |
122e8ad3 | 1060 | if (par->chip_id == CYBERBLADEXPAi1) { |
1da177e4 | 1061 | /* This fixes snow-effect in 32 bpp */ |
306fa6f6 | 1062 | write3X4(par, CRTHSyncStart, 0x84); |
1da177e4 LT |
1063 | } |
1064 | ||
306fa6f6 KH |
1065 | /* graphics mode and support 256 color modes */ |
1066 | writeAttr(par, 0x10, 0x41); | |
1067 | writeAttr(par, 0x12, 0x0F); /* planes */ | |
1068 | writeAttr(par, 0x13, 0); /* horizontal pel panning */ | |
1da177e4 | 1069 | |
245a2c2c KH |
1070 | /* colors */ |
1071 | for (tmp = 0; tmp < 0x10; tmp++) | |
306fa6f6 KH |
1072 | writeAttr(par, tmp, tmp); |
1073 | fb_readb(par->io_virt + CRT + 0x0A); /* flip-flop to index */ | |
1074 | t_outb(par, 0x20, 0x3C0); /* enable attr */ | |
1da177e4 LT |
1075 | |
1076 | switch (bpp) { | |
245a2c2c KH |
1077 | case 8: |
1078 | tmp = 0; | |
1079 | break; | |
1080 | case 15: | |
1081 | tmp = 0x10; | |
1082 | break; | |
1083 | case 16: | |
1084 | tmp = 0x30; | |
1085 | break; | |
1086 | case 24: | |
1087 | case 32: | |
1088 | tmp = 0xD0; | |
1089 | break; | |
1da177e4 LT |
1090 | } |
1091 | ||
306fa6f6 KH |
1092 | t_inb(par, 0x3C8); |
1093 | t_inb(par, 0x3C6); | |
1094 | t_inb(par, 0x3C6); | |
1095 | t_inb(par, 0x3C6); | |
1096 | t_inb(par, 0x3C6); | |
1097 | t_outb(par, tmp, 0x3C6); | |
1098 | t_inb(par, 0x3C8); | |
1da177e4 LT |
1099 | |
1100 | if (flatpanel) | |
306fa6f6 KH |
1101 | set_number_of_lines(par, info->var.yres); |
1102 | set_lwidth(par, info->var.xres * bpp / (4 * 16)); | |
1da177e4 | 1103 | info->fix.visual = (bpp == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR; |
245a2c2c KH |
1104 | info->fix.line_length = info->var.xres * (bpp >> 3); |
1105 | info->cmap.len = (bpp == 8) ? 256 : 16; | |
1da177e4 LT |
1106 | debug("exit\n"); |
1107 | return 0; | |
1108 | } | |
1109 | ||
1110 | /* Set one color register */ | |
1111 | static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green, | |
245a2c2c KH |
1112 | unsigned blue, unsigned transp, |
1113 | struct fb_info *info) | |
1da177e4 LT |
1114 | { |
1115 | int bpp = info->var.bits_per_pixel; | |
306fa6f6 | 1116 | struct tridentfb_par *par = info->par; |
1da177e4 LT |
1117 | |
1118 | if (regno >= info->cmap.len) | |
1119 | return 1; | |
1120 | ||
973d9ab2 | 1121 | if (bpp == 8) { |
306fa6f6 KH |
1122 | t_outb(par, 0xFF, 0x3C6); |
1123 | t_outb(par, regno, 0x3C8); | |
1da177e4 | 1124 | |
306fa6f6 KH |
1125 | t_outb(par, red >> 10, 0x3C9); |
1126 | t_outb(par, green >> 10, 0x3C9); | |
1127 | t_outb(par, blue >> 10, 0x3C9); | |
1da177e4 | 1128 | |
973d9ab2 AD |
1129 | } else if (regno < 16) { |
1130 | if (bpp == 16) { /* RGB 565 */ | |
1131 | u32 col; | |
1132 | ||
1133 | col = (red & 0xF800) | ((green & 0xFC00) >> 5) | | |
1134 | ((blue & 0xF800) >> 11); | |
1135 | col |= col << 16; | |
1136 | ((u32 *)(info->pseudo_palette))[regno] = col; | |
1137 | } else if (bpp == 32) /* ARGB 8888 */ | |
1138 | ((u32*)info->pseudo_palette)[regno] = | |
245a2c2c KH |
1139 | ((transp & 0xFF00) << 16) | |
1140 | ((red & 0xFF00) << 8) | | |
973d9ab2 | 1141 | ((green & 0xFF00)) | |
245a2c2c | 1142 | ((blue & 0xFF00) >> 8); |
973d9ab2 | 1143 | } |
1da177e4 | 1144 | |
245a2c2c | 1145 | /* debug("exit\n"); */ |
1da177e4 LT |
1146 | return 0; |
1147 | } | |
1148 | ||
1149 | /* Try blanking the screen.For flat panels it does nothing */ | |
1150 | static int tridentfb_blank(int blank_mode, struct fb_info *info) | |
1151 | { | |
245a2c2c | 1152 | unsigned char PMCont, DPMSCont; |
306fa6f6 | 1153 | struct tridentfb_par *par = info->par; |
1da177e4 LT |
1154 | |
1155 | debug("enter\n"); | |
1156 | if (flatpanel) | |
1157 | return 0; | |
306fa6f6 KH |
1158 | t_outb(par, 0x04, 0x83C8); /* Read DPMS Control */ |
1159 | PMCont = t_inb(par, 0x83C6) & 0xFC; | |
1160 | DPMSCont = read3CE(par, PowerStatus) & 0xFC; | |
245a2c2c | 1161 | switch (blank_mode) { |
1da177e4 LT |
1162 | case FB_BLANK_UNBLANK: |
1163 | /* Screen: On, HSync: On, VSync: On */ | |
1164 | case FB_BLANK_NORMAL: | |
1165 | /* Screen: Off, HSync: On, VSync: On */ | |
1166 | PMCont |= 0x03; | |
1167 | DPMSCont |= 0x00; | |
1168 | break; | |
1169 | case FB_BLANK_HSYNC_SUSPEND: | |
1170 | /* Screen: Off, HSync: Off, VSync: On */ | |
1171 | PMCont |= 0x02; | |
1172 | DPMSCont |= 0x01; | |
1173 | break; | |
1174 | case FB_BLANK_VSYNC_SUSPEND: | |
1175 | /* Screen: Off, HSync: On, VSync: Off */ | |
1176 | PMCont |= 0x02; | |
1177 | DPMSCont |= 0x02; | |
1178 | break; | |
1179 | case FB_BLANK_POWERDOWN: | |
1180 | /* Screen: Off, HSync: Off, VSync: Off */ | |
1181 | PMCont |= 0x00; | |
1182 | DPMSCont |= 0x03; | |
1183 | break; | |
245a2c2c | 1184 | } |
1da177e4 | 1185 | |
306fa6f6 KH |
1186 | write3CE(par, PowerStatus, DPMSCont); |
1187 | t_outb(par, 4, 0x83C8); | |
1188 | t_outb(par, PMCont, 0x83C6); | |
1da177e4 LT |
1189 | |
1190 | debug("exit\n"); | |
1191 | ||
1192 | /* let fbcon do a softblank for us */ | |
1193 | return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0; | |
1194 | } | |
1195 | ||
245a2c2c KH |
1196 | static struct fb_ops tridentfb_ops = { |
1197 | .owner = THIS_MODULE, | |
1198 | .fb_setcolreg = tridentfb_setcolreg, | |
1199 | .fb_pan_display = tridentfb_pan_display, | |
1200 | .fb_blank = tridentfb_blank, | |
1201 | .fb_check_var = tridentfb_check_var, | |
1202 | .fb_set_par = tridentfb_set_par, | |
1203 | .fb_fillrect = tridentfb_fillrect, | |
1204 | .fb_copyarea = tridentfb_copyarea, | |
1205 | .fb_imageblit = cfb_imageblit, | |
1206 | }; | |
1207 | ||
e09ed099 KH |
1208 | static int __devinit trident_pci_probe(struct pci_dev *dev, |
1209 | const struct pci_device_id *id) | |
1da177e4 LT |
1210 | { |
1211 | int err; | |
1212 | unsigned char revision; | |
e09ed099 KH |
1213 | struct fb_info *info; |
1214 | struct tridentfb_par *default_par; | |
122e8ad3 KH |
1215 | int defaultaccel; |
1216 | int chip3D; | |
1217 | int chip_id; | |
1da177e4 LT |
1218 | |
1219 | err = pci_enable_device(dev); | |
1220 | if (err) | |
1221 | return err; | |
1222 | ||
e09ed099 KH |
1223 | info = framebuffer_alloc(sizeof(struct tridentfb_par), &dev->dev); |
1224 | if (!info) | |
1225 | return -ENOMEM; | |
1226 | default_par = info->par; | |
1227 | ||
1da177e4 LT |
1228 | chip_id = id->device; |
1229 | ||
245a2c2c | 1230 | if (chip_id == CYBERBLADEi1) |
9fa68eae KP |
1231 | output("*** Please do use cyblafb, Cyberblade/i1 support " |
1232 | "will soon be removed from tridentfb!\n"); | |
1233 | ||
1234 | ||
1da177e4 | 1235 | /* If PCI id is 0x9660 then further detect chip type */ |
245a2c2c | 1236 | |
1da177e4 | 1237 | if (chip_id == TGUI9660) { |
245a2c2c KH |
1238 | outb(RevisionID, 0x3C4); |
1239 | revision = inb(0x3C5); | |
1240 | ||
1da177e4 | 1241 | switch (revision) { |
245a2c2c KH |
1242 | case 0x22: |
1243 | case 0x23: | |
1244 | chip_id = CYBER9397; | |
1245 | break; | |
1246 | case 0x2A: | |
1247 | chip_id = CYBER9397DVD; | |
1248 | break; | |
1249 | case 0x30: | |
1250 | case 0x33: | |
1251 | case 0x34: | |
1252 | case 0x35: | |
1253 | case 0x38: | |
1254 | case 0x3A: | |
1255 | case 0xB3: | |
1256 | chip_id = CYBER9385; | |
1257 | break; | |
1258 | case 0x40 ... 0x43: | |
1259 | chip_id = CYBER9382; | |
1260 | break; | |
1261 | case 0x4A: | |
1262 | chip_id = CYBER9388; | |
1263 | break; | |
1264 | default: | |
1265 | break; | |
1da177e4 LT |
1266 | } |
1267 | } | |
1268 | ||
1269 | chip3D = is3Dchip(chip_id); | |
1da177e4 LT |
1270 | |
1271 | if (is_xp(chip_id)) { | |
1272 | acc = &accel_xp; | |
245a2c2c | 1273 | } else if (is_blade(chip_id)) { |
1da177e4 LT |
1274 | acc = &accel_blade; |
1275 | } else { | |
1276 | acc = &accel_image; | |
1277 | } | |
1278 | ||
122e8ad3 KH |
1279 | default_par->chip_id = chip_id; |
1280 | ||
1da177e4 LT |
1281 | /* acceleration is on by default for 3D chips */ |
1282 | defaultaccel = chip3D && !noaccel; | |
1283 | ||
1da177e4 | 1284 | /* setup MMIO region */ |
245a2c2c KH |
1285 | tridentfb_fix.mmio_start = pci_resource_start(dev, 1); |
1286 | tridentfb_fix.mmio_len = chip3D ? 0x20000 : 0x10000; | |
1da177e4 LT |
1287 | |
1288 | if (!request_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len, "tridentfb")) { | |
1289 | debug("request_region failed!\n"); | |
1290 | return -1; | |
1291 | } | |
1292 | ||
e09ed099 KH |
1293 | default_par->io_virt = ioremap_nocache(tridentfb_fix.mmio_start, |
1294 | tridentfb_fix.mmio_len); | |
1da177e4 | 1295 | |
e09ed099 | 1296 | if (!default_par->io_virt) { |
1da177e4 | 1297 | debug("ioremap failed\n"); |
e8ed857c KH |
1298 | err = -1; |
1299 | goto out_unmap1; | |
1da177e4 LT |
1300 | } |
1301 | ||
1302 | enable_mmio(); | |
245a2c2c | 1303 | |
1da177e4 | 1304 | /* setup framebuffer memory */ |
245a2c2c | 1305 | tridentfb_fix.smem_start = pci_resource_start(dev, 0); |
e09ed099 | 1306 | tridentfb_fix.smem_len = get_memsize(default_par); |
245a2c2c | 1307 | |
1da177e4 LT |
1308 | if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) { |
1309 | debug("request_mem_region failed!\n"); | |
e09ed099 | 1310 | disable_mmio(info->par); |
a02f6402 | 1311 | err = -1; |
e8ed857c | 1312 | goto out_unmap1; |
1da177e4 LT |
1313 | } |
1314 | ||
e09ed099 KH |
1315 | info->screen_base = ioremap_nocache(tridentfb_fix.smem_start, |
1316 | tridentfb_fix.smem_len); | |
1da177e4 | 1317 | |
e09ed099 | 1318 | if (!info->screen_base) { |
1da177e4 | 1319 | debug("ioremap failed\n"); |
a02f6402 | 1320 | err = -1; |
e8ed857c | 1321 | goto out_unmap2; |
1da177e4 LT |
1322 | } |
1323 | ||
1324 | output("%s board found\n", pci_name(dev)); | |
e09ed099 | 1325 | displaytype = get_displaytype(default_par); |
1da177e4 | 1326 | |
245a2c2c | 1327 | if (flatpanel) |
e09ed099 | 1328 | nativex = get_nativex(default_par); |
1da177e4 | 1329 | |
e09ed099 KH |
1330 | info->fix = tridentfb_fix; |
1331 | info->fbops = &tridentfb_ops; | |
1da177e4 LT |
1332 | |
1333 | ||
e09ed099 | 1334 | info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; |
1da177e4 | 1335 | #ifdef CONFIG_FB_TRIDENT_ACCEL |
e09ed099 | 1336 | info->flags |= FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT; |
1da177e4 | 1337 | #endif |
ea8ee55c | 1338 | if (!fb_find_mode(&info->var, info, |
07f41e45 | 1339 | mode_option, NULL, 0, NULL, bpp)) { |
a02f6402 | 1340 | err = -EINVAL; |
e8ed857c | 1341 | goto out_unmap2; |
a02f6402 | 1342 | } |
e09ed099 | 1343 | err = fb_alloc_cmap(&info->cmap, 256, 0); |
e8ed857c KH |
1344 | if (err < 0) |
1345 | goto out_unmap2; | |
1346 | ||
1da177e4 | 1347 | if (defaultaccel && acc) |
ea8ee55c | 1348 | info->var.accel_flags |= FB_ACCELF_TEXT; |
1da177e4 | 1349 | else |
ea8ee55c KH |
1350 | info->var.accel_flags &= ~FB_ACCELF_TEXT; |
1351 | info->var.activate |= FB_ACTIVATE_NOW; | |
e09ed099 KH |
1352 | info->device = &dev->dev; |
1353 | if (register_framebuffer(info) < 0) { | |
1da177e4 | 1354 | printk(KERN_ERR "tridentfb: could not register Trident framebuffer\n"); |
e09ed099 | 1355 | fb_dealloc_cmap(&info->cmap); |
a02f6402 | 1356 | err = -EINVAL; |
e8ed857c | 1357 | goto out_unmap2; |
1da177e4 LT |
1358 | } |
1359 | output("fb%d: %s frame buffer device %dx%d-%dbpp\n", | |
ea8ee55c KH |
1360 | info->node, info->fix.id, info->var.xres, |
1361 | info->var.yres, info->var.bits_per_pixel); | |
e09ed099 KH |
1362 | |
1363 | pci_set_drvdata(dev, info); | |
1da177e4 | 1364 | return 0; |
a02f6402 | 1365 | |
e8ed857c | 1366 | out_unmap2: |
e09ed099 KH |
1367 | if (info->screen_base) |
1368 | iounmap(info->screen_base); | |
e8ed857c | 1369 | release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len); |
e09ed099 | 1370 | disable_mmio(info->par); |
e8ed857c | 1371 | out_unmap1: |
e09ed099 KH |
1372 | if (default_par->io_virt) |
1373 | iounmap(default_par->io_virt); | |
e8ed857c | 1374 | release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len); |
e09ed099 | 1375 | framebuffer_release(info); |
a02f6402 | 1376 | return err; |
1da177e4 LT |
1377 | } |
1378 | ||
245a2c2c | 1379 | static void __devexit trident_pci_remove(struct pci_dev *dev) |
1da177e4 | 1380 | { |
e09ed099 KH |
1381 | struct fb_info *info = pci_get_drvdata(dev); |
1382 | struct tridentfb_par *par = info->par; | |
1383 | ||
1384 | unregister_framebuffer(info); | |
1da177e4 | 1385 | iounmap(par->io_virt); |
e09ed099 | 1386 | iounmap(info->screen_base); |
1da177e4 | 1387 | release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len); |
e8ed857c | 1388 | release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len); |
e09ed099 KH |
1389 | pci_set_drvdata(dev, NULL); |
1390 | framebuffer_release(info); | |
1da177e4 LT |
1391 | } |
1392 | ||
1393 | /* List of boards that we are trying to support */ | |
1394 | static struct pci_device_id trident_devices[] = { | |
245a2c2c KH |
1395 | {PCI_VENDOR_ID_TRIDENT, BLADE3D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1396 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1397 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1398 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1399 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1400 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1401 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1402 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEE4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1403 | {PCI_VENDOR_ID_TRIDENT, TGUI9660, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1404 | {PCI_VENDOR_ID_TRIDENT, IMAGE975, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1405 | {PCI_VENDOR_ID_TRIDENT, IMAGE985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1406 | {PCI_VENDOR_ID_TRIDENT, CYBER9320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1407 | {PCI_VENDOR_ID_TRIDENT, CYBER9388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1408 | {PCI_VENDOR_ID_TRIDENT, CYBER9520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1409 | {PCI_VENDOR_ID_TRIDENT, CYBER9525DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1410 | {PCI_VENDOR_ID_TRIDENT, CYBER9397, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1411 | {PCI_VENDOR_ID_TRIDENT, CYBER9397DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1412 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1413 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1414 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm16, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
1da177e4 | 1415 | {0,} |
245a2c2c KH |
1416 | }; |
1417 | ||
1418 | MODULE_DEVICE_TABLE(pci, trident_devices); | |
1da177e4 LT |
1419 | |
1420 | static struct pci_driver tridentfb_pci_driver = { | |
245a2c2c KH |
1421 | .name = "tridentfb", |
1422 | .id_table = trident_devices, | |
1423 | .probe = trident_pci_probe, | |
1424 | .remove = __devexit_p(trident_pci_remove) | |
1da177e4 LT |
1425 | }; |
1426 | ||
1427 | /* | |
1428 | * Parse user specified options (`video=trident:') | |
1429 | * example: | |
245a2c2c | 1430 | * video=trident:800x600,bpp=16,noaccel |
1da177e4 LT |
1431 | */ |
1432 | #ifndef MODULE | |
07f41e45 | 1433 | static int __init tridentfb_setup(char *options) |
1da177e4 | 1434 | { |
245a2c2c | 1435 | char *opt; |
1da177e4 LT |
1436 | if (!options || !*options) |
1437 | return 0; | |
245a2c2c KH |
1438 | while ((opt = strsep(&options, ",")) != NULL) { |
1439 | if (!*opt) | |
1440 | continue; | |
1441 | if (!strncmp(opt, "noaccel", 7)) | |
1da177e4 | 1442 | noaccel = 1; |
245a2c2c | 1443 | else if (!strncmp(opt, "fp", 2)) |
1da177e4 | 1444 | displaytype = DISPLAY_FP; |
245a2c2c | 1445 | else if (!strncmp(opt, "crt", 3)) |
1da177e4 | 1446 | displaytype = DISPLAY_CRT; |
245a2c2c KH |
1447 | else if (!strncmp(opt, "bpp=", 4)) |
1448 | bpp = simple_strtoul(opt + 4, NULL, 0); | |
1449 | else if (!strncmp(opt, "center", 6)) | |
1da177e4 | 1450 | center = 1; |
245a2c2c | 1451 | else if (!strncmp(opt, "stretch", 7)) |
1da177e4 | 1452 | stretch = 1; |
245a2c2c KH |
1453 | else if (!strncmp(opt, "memsize=", 8)) |
1454 | memsize = simple_strtoul(opt + 8, NULL, 0); | |
1455 | else if (!strncmp(opt, "memdiff=", 8)) | |
1456 | memdiff = simple_strtoul(opt + 8, NULL, 0); | |
1457 | else if (!strncmp(opt, "nativex=", 8)) | |
1458 | nativex = simple_strtoul(opt + 8, NULL, 0); | |
1da177e4 | 1459 | else |
07f41e45 | 1460 | mode_option = opt; |
1da177e4 LT |
1461 | } |
1462 | return 0; | |
1463 | } | |
1464 | #endif | |
1465 | ||
1466 | static int __init tridentfb_init(void) | |
1467 | { | |
1468 | #ifndef MODULE | |
1469 | char *option = NULL; | |
1470 | ||
1471 | if (fb_get_options("tridentfb", &option)) | |
1472 | return -ENODEV; | |
1473 | tridentfb_setup(option); | |
1474 | #endif | |
1475 | output("Trident framebuffer %s initializing\n", VERSION); | |
1476 | return pci_register_driver(&tridentfb_pci_driver); | |
1477 | } | |
1478 | ||
1479 | static void __exit tridentfb_exit(void) | |
1480 | { | |
1481 | pci_unregister_driver(&tridentfb_pci_driver); | |
1482 | } | |
1483 | ||
1da177e4 LT |
1484 | module_init(tridentfb_init); |
1485 | module_exit(tridentfb_exit); | |
1486 | ||
1487 | MODULE_AUTHOR("Jani Monoses <jani@iv.ro>"); | |
1488 | MODULE_DESCRIPTION("Framebuffer driver for Trident cards"); | |
1489 | MODULE_LICENSE("GPL"); | |
1490 |