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baf12ae2 EP |
1 | /** |
2 | * ds2482.c - provides i2c to w1-master bridge(s) | |
3 | * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com> | |
4 | * | |
5 | * The DS2482 is a sensor chip made by Dallas Semiconductor (Maxim). | |
6 | * It is a I2C to 1-wire bridge. | |
7 | * There are two variations: -100 and -800, which have 1 or 8 1-wire ports. | |
8 | * The complete datasheet can be obtained from MAXIM's website at: | |
9 | * http://www.maxim-ic.com/quick_view2.cfm/qv_pk/4382 | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; version 2 of the License. | |
14 | */ | |
15 | ||
16 | #include <linux/module.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/slab.h> | |
19 | #include <linux/i2c.h> | |
20 | #include <linux/delay.h> | |
21 | #include <asm/delay.h> | |
22 | ||
23 | #include "../w1.h" | |
24 | #include "../w1_int.h" | |
25 | ||
baf12ae2 EP |
26 | /** |
27 | * The DS2482 registers - there are 3 registers that are addressed by a read | |
28 | * pointer. The read pointer is set by the last command executed. | |
29 | * | |
30 | * To read the data, issue a register read for any address | |
31 | */ | |
32 | #define DS2482_CMD_RESET 0xF0 /* No param */ | |
33 | #define DS2482_CMD_SET_READ_PTR 0xE1 /* Param: DS2482_PTR_CODE_xxx */ | |
34 | #define DS2482_CMD_CHANNEL_SELECT 0xC3 /* Param: Channel byte - DS2482-800 only */ | |
35 | #define DS2482_CMD_WRITE_CONFIG 0xD2 /* Param: Config byte */ | |
36 | #define DS2482_CMD_1WIRE_RESET 0xB4 /* Param: None */ | |
37 | #define DS2482_CMD_1WIRE_SINGLE_BIT 0x87 /* Param: Bit byte (bit7) */ | |
38 | #define DS2482_CMD_1WIRE_WRITE_BYTE 0xA5 /* Param: Data byte */ | |
39 | #define DS2482_CMD_1WIRE_READ_BYTE 0x96 /* Param: None */ | |
40 | /* Note to read the byte, Set the ReadPtr to Data then read (any addr) */ | |
41 | #define DS2482_CMD_1WIRE_TRIPLET 0x78 /* Param: Dir byte (bit7) */ | |
42 | ||
43 | /* Values for DS2482_CMD_SET_READ_PTR */ | |
44 | #define DS2482_PTR_CODE_STATUS 0xF0 | |
45 | #define DS2482_PTR_CODE_DATA 0xE1 | |
46 | #define DS2482_PTR_CODE_CHANNEL 0xD2 /* DS2482-800 only */ | |
47 | #define DS2482_PTR_CODE_CONFIG 0xC3 | |
48 | ||
49 | /** | |
50 | * Configure Register bit definitions | |
51 | * The top 4 bits always read 0. | |
52 | * To write, the top nibble must be the 1's compl. of the low nibble. | |
53 | */ | |
9c95bb6f MA |
54 | #define DS2482_REG_CFG_1WS 0x08 /* 1-wire speed */ |
55 | #define DS2482_REG_CFG_SPU 0x04 /* strong pull-up */ | |
56 | #define DS2482_REG_CFG_PPM 0x02 /* presence pulse masking */ | |
57 | #define DS2482_REG_CFG_APU 0x01 /* active pull-up */ | |
baf12ae2 EP |
58 | |
59 | ||
60 | /** | |
61 | * Write and verify codes for the CHANNEL_SELECT command (DS2482-800 only). | |
62 | * To set the channel, write the value at the index of the channel. | |
63 | * Read and compare against the corresponding value to verify the change. | |
64 | */ | |
65 | static const u8 ds2482_chan_wr[8] = | |
66 | { 0xF0, 0xE1, 0xD2, 0xC3, 0xB4, 0xA5, 0x96, 0x87 }; | |
67 | static const u8 ds2482_chan_rd[8] = | |
68 | { 0xB8, 0xB1, 0xAA, 0xA3, 0x9C, 0x95, 0x8E, 0x87 }; | |
69 | ||
70 | ||
71 | /** | |
72 | * Status Register bit definitions (read only) | |
73 | */ | |
74 | #define DS2482_REG_STS_DIR 0x80 | |
75 | #define DS2482_REG_STS_TSB 0x40 | |
76 | #define DS2482_REG_STS_SBR 0x20 | |
77 | #define DS2482_REG_STS_RST 0x10 | |
78 | #define DS2482_REG_STS_LL 0x08 | |
79 | #define DS2482_REG_STS_SD 0x04 | |
80 | #define DS2482_REG_STS_PPD 0x02 | |
81 | #define DS2482_REG_STS_1WB 0x01 | |
82 | ||
83 | ||
61c91f7d JD |
84 | static int ds2482_probe(struct i2c_client *client, |
85 | const struct i2c_device_id *id); | |
61c91f7d | 86 | static int ds2482_remove(struct i2c_client *client); |
baf12ae2 EP |
87 | |
88 | ||
89 | /** | |
90 | * Driver data (common to all clients) | |
91 | */ | |
61c91f7d JD |
92 | static const struct i2c_device_id ds2482_id[] = { |
93 | { "ds2482", 0 }, | |
94 | { } | |
95 | }; | |
0dcacd76 | 96 | MODULE_DEVICE_TABLE(i2c, ds2482_id); |
61c91f7d | 97 | |
baf12ae2 EP |
98 | static struct i2c_driver ds2482_driver = { |
99 | .driver = { | |
baf12ae2 EP |
100 | .name = "ds2482", |
101 | }, | |
61c91f7d JD |
102 | .probe = ds2482_probe, |
103 | .remove = ds2482_remove, | |
104 | .id_table = ds2482_id, | |
baf12ae2 EP |
105 | }; |
106 | ||
107 | /* | |
108 | * Client data (each client gets its own) | |
109 | */ | |
110 | ||
111 | struct ds2482_data; | |
112 | ||
113 | struct ds2482_w1_chan { | |
114 | struct ds2482_data *pdev; | |
115 | u8 channel; | |
116 | struct w1_bus_master w1_bm; | |
117 | }; | |
118 | ||
119 | struct ds2482_data { | |
61c91f7d | 120 | struct i2c_client *client; |
abd52a13 | 121 | struct mutex access_lock; |
baf12ae2 EP |
122 | |
123 | /* 1-wire interface(s) */ | |
124 | int w1_count; /* 1 or 8 */ | |
125 | struct ds2482_w1_chan w1_ch[8]; | |
126 | ||
127 | /* per-device values */ | |
128 | u8 channel; | |
129 | u8 read_prt; /* see DS2482_PTR_CODE_xxx */ | |
130 | u8 reg_config; | |
131 | }; | |
132 | ||
133 | ||
9c95bb6f MA |
134 | /** |
135 | * Helper to calculate values for configuration register | |
136 | * @param conf the raw config value | |
137 | * @return the value w/ complements that can be written to register | |
138 | */ | |
139 | static inline u8 ds2482_calculate_config(u8 conf) | |
140 | { | |
141 | return conf | ((~conf & 0x0f) << 4); | |
142 | } | |
143 | ||
144 | ||
baf12ae2 EP |
145 | /** |
146 | * Sets the read pointer. | |
147 | * @param pdev The ds2482 client pointer | |
148 | * @param read_ptr see DS2482_PTR_CODE_xxx above | |
149 | * @return -1 on failure, 0 on success | |
150 | */ | |
151 | static inline int ds2482_select_register(struct ds2482_data *pdev, u8 read_ptr) | |
152 | { | |
153 | if (pdev->read_prt != read_ptr) { | |
61c91f7d | 154 | if (i2c_smbus_write_byte_data(pdev->client, |
baf12ae2 EP |
155 | DS2482_CMD_SET_READ_PTR, |
156 | read_ptr) < 0) | |
157 | return -1; | |
158 | ||
159 | pdev->read_prt = read_ptr; | |
160 | } | |
161 | return 0; | |
162 | } | |
163 | ||
164 | /** | |
165 | * Sends a command without a parameter | |
166 | * @param pdev The ds2482 client pointer | |
167 | * @param cmd DS2482_CMD_RESET, | |
168 | * DS2482_CMD_1WIRE_RESET, | |
169 | * DS2482_CMD_1WIRE_READ_BYTE | |
170 | * @return -1 on failure, 0 on success | |
171 | */ | |
172 | static inline int ds2482_send_cmd(struct ds2482_data *pdev, u8 cmd) | |
173 | { | |
61c91f7d | 174 | if (i2c_smbus_write_byte(pdev->client, cmd) < 0) |
baf12ae2 EP |
175 | return -1; |
176 | ||
177 | pdev->read_prt = DS2482_PTR_CODE_STATUS; | |
178 | return 0; | |
179 | } | |
180 | ||
181 | /** | |
182 | * Sends a command with a parameter | |
183 | * @param pdev The ds2482 client pointer | |
184 | * @param cmd DS2482_CMD_WRITE_CONFIG, | |
185 | * DS2482_CMD_1WIRE_SINGLE_BIT, | |
186 | * DS2482_CMD_1WIRE_WRITE_BYTE, | |
187 | * DS2482_CMD_1WIRE_TRIPLET | |
188 | * @param byte The data to send | |
189 | * @return -1 on failure, 0 on success | |
190 | */ | |
191 | static inline int ds2482_send_cmd_data(struct ds2482_data *pdev, | |
192 | u8 cmd, u8 byte) | |
193 | { | |
61c91f7d | 194 | if (i2c_smbus_write_byte_data(pdev->client, cmd, byte) < 0) |
baf12ae2 EP |
195 | return -1; |
196 | ||
197 | /* all cmds leave in STATUS, except CONFIG */ | |
198 | pdev->read_prt = (cmd != DS2482_CMD_WRITE_CONFIG) ? | |
199 | DS2482_PTR_CODE_STATUS : DS2482_PTR_CODE_CONFIG; | |
200 | return 0; | |
201 | } | |
202 | ||
203 | ||
204 | /* | |
205 | * 1-Wire interface code | |
206 | */ | |
207 | ||
208 | #define DS2482_WAIT_IDLE_TIMEOUT 100 | |
209 | ||
210 | /** | |
211 | * Waits until the 1-wire interface is idle (not busy) | |
212 | * | |
213 | * @param pdev Pointer to the device structure | |
214 | * @return the last value read from status or -1 (failure) | |
215 | */ | |
216 | static int ds2482_wait_1wire_idle(struct ds2482_data *pdev) | |
217 | { | |
218 | int temp = -1; | |
219 | int retries = 0; | |
220 | ||
221 | if (!ds2482_select_register(pdev, DS2482_PTR_CODE_STATUS)) { | |
222 | do { | |
61c91f7d | 223 | temp = i2c_smbus_read_byte(pdev->client); |
baf12ae2 | 224 | } while ((temp >= 0) && (temp & DS2482_REG_STS_1WB) && |
b4786f18 | 225 | (++retries < DS2482_WAIT_IDLE_TIMEOUT)); |
baf12ae2 EP |
226 | } |
227 | ||
67860739 | 228 | if (retries >= DS2482_WAIT_IDLE_TIMEOUT) |
1fda5690 | 229 | pr_err("%s: timeout on channel %d\n", |
baf12ae2 EP |
230 | __func__, pdev->channel); |
231 | ||
232 | return temp; | |
233 | } | |
234 | ||
235 | /** | |
236 | * Selects a w1 channel. | |
237 | * The 1-wire interface must be idle before calling this function. | |
238 | * | |
239 | * @param pdev The ds2482 client pointer | |
240 | * @param channel 0-7 | |
241 | * @return -1 (failure) or 0 (success) | |
242 | */ | |
243 | static int ds2482_set_channel(struct ds2482_data *pdev, u8 channel) | |
244 | { | |
61c91f7d | 245 | if (i2c_smbus_write_byte_data(pdev->client, DS2482_CMD_CHANNEL_SELECT, |
baf12ae2 EP |
246 | ds2482_chan_wr[channel]) < 0) |
247 | return -1; | |
248 | ||
249 | pdev->read_prt = DS2482_PTR_CODE_CHANNEL; | |
250 | pdev->channel = -1; | |
61c91f7d | 251 | if (i2c_smbus_read_byte(pdev->client) == ds2482_chan_rd[channel]) { |
baf12ae2 EP |
252 | pdev->channel = channel; |
253 | return 0; | |
254 | } | |
255 | return -1; | |
256 | } | |
257 | ||
258 | ||
259 | /** | |
260 | * Performs the touch-bit function, which writes a 0 or 1 and reads the level. | |
261 | * | |
262 | * @param data The ds2482 channel pointer | |
263 | * @param bit The level to write: 0 or non-zero | |
264 | * @return The level read: 0 or 1 | |
265 | */ | |
266 | static u8 ds2482_w1_touch_bit(void *data, u8 bit) | |
267 | { | |
268 | struct ds2482_w1_chan *pchan = data; | |
269 | struct ds2482_data *pdev = pchan->pdev; | |
270 | int status = -1; | |
271 | ||
abd52a13 | 272 | mutex_lock(&pdev->access_lock); |
baf12ae2 EP |
273 | |
274 | /* Select the channel */ | |
275 | ds2482_wait_1wire_idle(pdev); | |
276 | if (pdev->w1_count > 1) | |
277 | ds2482_set_channel(pdev, pchan->channel); | |
278 | ||
279 | /* Send the touch command, wait until 1WB == 0, return the status */ | |
280 | if (!ds2482_send_cmd_data(pdev, DS2482_CMD_1WIRE_SINGLE_BIT, | |
281 | bit ? 0xFF : 0)) | |
282 | status = ds2482_wait_1wire_idle(pdev); | |
283 | ||
abd52a13 | 284 | mutex_unlock(&pdev->access_lock); |
baf12ae2 EP |
285 | |
286 | return (status & DS2482_REG_STS_SBR) ? 1 : 0; | |
287 | } | |
288 | ||
289 | /** | |
290 | * Performs the triplet function, which reads two bits and writes a bit. | |
291 | * The bit written is determined by the two reads: | |
292 | * 00 => dbit, 01 => 0, 10 => 1 | |
293 | * | |
294 | * @param data The ds2482 channel pointer | |
295 | * @param dbit The direction to choose if both branches are valid | |
296 | * @return b0=read1 b1=read2 b3=bit written | |
297 | */ | |
298 | static u8 ds2482_w1_triplet(void *data, u8 dbit) | |
299 | { | |
300 | struct ds2482_w1_chan *pchan = data; | |
301 | struct ds2482_data *pdev = pchan->pdev; | |
302 | int status = (3 << 5); | |
303 | ||
abd52a13 | 304 | mutex_lock(&pdev->access_lock); |
baf12ae2 EP |
305 | |
306 | /* Select the channel */ | |
307 | ds2482_wait_1wire_idle(pdev); | |
308 | if (pdev->w1_count > 1) | |
309 | ds2482_set_channel(pdev, pchan->channel); | |
310 | ||
311 | /* Send the triplet command, wait until 1WB == 0, return the status */ | |
312 | if (!ds2482_send_cmd_data(pdev, DS2482_CMD_1WIRE_TRIPLET, | |
313 | dbit ? 0xFF : 0)) | |
314 | status = ds2482_wait_1wire_idle(pdev); | |
315 | ||
abd52a13 | 316 | mutex_unlock(&pdev->access_lock); |
baf12ae2 EP |
317 | |
318 | /* Decode the status */ | |
319 | return (status >> 5); | |
320 | } | |
321 | ||
322 | /** | |
323 | * Performs the write byte function. | |
324 | * | |
325 | * @param data The ds2482 channel pointer | |
326 | * @param byte The value to write | |
327 | */ | |
328 | static void ds2482_w1_write_byte(void *data, u8 byte) | |
329 | { | |
330 | struct ds2482_w1_chan *pchan = data; | |
331 | struct ds2482_data *pdev = pchan->pdev; | |
332 | ||
abd52a13 | 333 | mutex_lock(&pdev->access_lock); |
baf12ae2 EP |
334 | |
335 | /* Select the channel */ | |
336 | ds2482_wait_1wire_idle(pdev); | |
337 | if (pdev->w1_count > 1) | |
338 | ds2482_set_channel(pdev, pchan->channel); | |
339 | ||
340 | /* Send the write byte command */ | |
341 | ds2482_send_cmd_data(pdev, DS2482_CMD_1WIRE_WRITE_BYTE, byte); | |
342 | ||
abd52a13 | 343 | mutex_unlock(&pdev->access_lock); |
baf12ae2 EP |
344 | } |
345 | ||
346 | /** | |
347 | * Performs the read byte function. | |
348 | * | |
349 | * @param data The ds2482 channel pointer | |
350 | * @return The value read | |
351 | */ | |
352 | static u8 ds2482_w1_read_byte(void *data) | |
353 | { | |
354 | struct ds2482_w1_chan *pchan = data; | |
355 | struct ds2482_data *pdev = pchan->pdev; | |
356 | int result; | |
357 | ||
abd52a13 | 358 | mutex_lock(&pdev->access_lock); |
baf12ae2 EP |
359 | |
360 | /* Select the channel */ | |
361 | ds2482_wait_1wire_idle(pdev); | |
362 | if (pdev->w1_count > 1) | |
363 | ds2482_set_channel(pdev, pchan->channel); | |
364 | ||
365 | /* Send the read byte command */ | |
366 | ds2482_send_cmd(pdev, DS2482_CMD_1WIRE_READ_BYTE); | |
367 | ||
368 | /* Wait until 1WB == 0 */ | |
369 | ds2482_wait_1wire_idle(pdev); | |
370 | ||
371 | /* Select the data register */ | |
372 | ds2482_select_register(pdev, DS2482_PTR_CODE_DATA); | |
373 | ||
374 | /* Read the data byte */ | |
61c91f7d | 375 | result = i2c_smbus_read_byte(pdev->client); |
baf12ae2 | 376 | |
abd52a13 | 377 | mutex_unlock(&pdev->access_lock); |
baf12ae2 EP |
378 | |
379 | return result; | |
380 | } | |
381 | ||
382 | ||
383 | /** | |
384 | * Sends a reset on the 1-wire interface | |
385 | * | |
386 | * @param data The ds2482 channel pointer | |
387 | * @return 0=Device present, 1=No device present or error | |
388 | */ | |
389 | static u8 ds2482_w1_reset_bus(void *data) | |
390 | { | |
391 | struct ds2482_w1_chan *pchan = data; | |
392 | struct ds2482_data *pdev = pchan->pdev; | |
393 | int err; | |
394 | u8 retval = 1; | |
395 | ||
abd52a13 | 396 | mutex_lock(&pdev->access_lock); |
baf12ae2 EP |
397 | |
398 | /* Select the channel */ | |
399 | ds2482_wait_1wire_idle(pdev); | |
400 | if (pdev->w1_count > 1) | |
401 | ds2482_set_channel(pdev, pchan->channel); | |
402 | ||
403 | /* Send the reset command */ | |
404 | err = ds2482_send_cmd(pdev, DS2482_CMD_1WIRE_RESET); | |
405 | if (err >= 0) { | |
406 | /* Wait until the reset is complete */ | |
407 | err = ds2482_wait_1wire_idle(pdev); | |
408 | retval = !(err & DS2482_REG_STS_PPD); | |
409 | ||
410 | /* If the chip did reset since detect, re-config it */ | |
411 | if (err & DS2482_REG_STS_RST) | |
412 | ds2482_send_cmd_data(pdev, DS2482_CMD_WRITE_CONFIG, | |
9c95bb6f | 413 | ds2482_calculate_config(0x00)); |
baf12ae2 EP |
414 | } |
415 | ||
abd52a13 | 416 | mutex_unlock(&pdev->access_lock); |
baf12ae2 EP |
417 | |
418 | return retval; | |
419 | } | |
420 | ||
9c95bb6f MA |
421 | static u8 ds2482_w1_set_pullup(void *data, int delay) |
422 | { | |
423 | struct ds2482_w1_chan *pchan = data; | |
424 | struct ds2482_data *pdev = pchan->pdev; | |
425 | u8 retval = 1; | |
426 | ||
427 | /* if delay is non-zero activate the pullup, | |
428 | * the strong pullup will be automatically deactivated | |
429 | * by the master, so do not explicitly deactive it | |
430 | */ | |
431 | if (delay) { | |
432 | /* both waits are crucial, otherwise devices might not be | |
433 | * powered long enough, causing e.g. a w1_therm sensor to | |
434 | * provide wrong conversion results | |
435 | */ | |
436 | ds2482_wait_1wire_idle(pdev); | |
437 | /* note: it seems like both SPU and APU have to be set! */ | |
438 | retval = ds2482_send_cmd_data(pdev, DS2482_CMD_WRITE_CONFIG, | |
439 | ds2482_calculate_config(DS2482_REG_CFG_SPU | | |
440 | DS2482_REG_CFG_APU)); | |
441 | ds2482_wait_1wire_idle(pdev); | |
442 | } | |
443 | ||
444 | return retval; | |
445 | } | |
446 | ||
baf12ae2 | 447 | |
61c91f7d JD |
448 | static int ds2482_probe(struct i2c_client *client, |
449 | const struct i2c_device_id *id) | |
baf12ae2 EP |
450 | { |
451 | struct ds2482_data *data; | |
61c91f7d | 452 | int err = -ENODEV; |
baf12ae2 EP |
453 | int temp1; |
454 | int idx; | |
455 | ||
0314b020 JD |
456 | if (!i2c_check_functionality(client->adapter, |
457 | I2C_FUNC_SMBUS_WRITE_BYTE_DATA | | |
458 | I2C_FUNC_SMBUS_BYTE)) | |
459 | return -ENODEV; | |
460 | ||
baf12ae2 EP |
461 | if (!(data = kzalloc(sizeof(struct ds2482_data), GFP_KERNEL))) { |
462 | err = -ENOMEM; | |
463 | goto exit; | |
464 | } | |
465 | ||
61c91f7d JD |
466 | data->client = client; |
467 | i2c_set_clientdata(client, data); | |
baf12ae2 EP |
468 | |
469 | /* Reset the device (sets the read_ptr to status) */ | |
470 | if (ds2482_send_cmd(data, DS2482_CMD_RESET) < 0) { | |
61c91f7d | 471 | dev_warn(&client->dev, "DS2482 reset failed.\n"); |
baf12ae2 EP |
472 | goto exit_free; |
473 | } | |
474 | ||
475 | /* Sleep at least 525ns to allow the reset to complete */ | |
476 | ndelay(525); | |
477 | ||
478 | /* Read the status byte - only reset bit and line should be set */ | |
61c91f7d | 479 | temp1 = i2c_smbus_read_byte(client); |
baf12ae2 | 480 | if (temp1 != (DS2482_REG_STS_LL | DS2482_REG_STS_RST)) { |
61c91f7d JD |
481 | dev_warn(&client->dev, "DS2482 reset status " |
482 | "0x%02X - not a DS2482\n", temp1); | |
baf12ae2 EP |
483 | goto exit_free; |
484 | } | |
485 | ||
486 | /* Detect the 8-port version */ | |
487 | data->w1_count = 1; | |
488 | if (ds2482_set_channel(data, 7) == 0) | |
489 | data->w1_count = 8; | |
490 | ||
491 | /* Set all config items to 0 (off) */ | |
9c95bb6f MA |
492 | ds2482_send_cmd_data(data, DS2482_CMD_WRITE_CONFIG, |
493 | ds2482_calculate_config(0x00)); | |
baf12ae2 | 494 | |
abd52a13 | 495 | mutex_init(&data->access_lock); |
baf12ae2 | 496 | |
baf12ae2 EP |
497 | /* Register 1-wire interface(s) */ |
498 | for (idx = 0; idx < data->w1_count; idx++) { | |
499 | data->w1_ch[idx].pdev = data; | |
500 | data->w1_ch[idx].channel = idx; | |
501 | ||
502 | /* Populate all the w1 bus master stuff */ | |
503 | data->w1_ch[idx].w1_bm.data = &data->w1_ch[idx]; | |
504 | data->w1_ch[idx].w1_bm.read_byte = ds2482_w1_read_byte; | |
505 | data->w1_ch[idx].w1_bm.write_byte = ds2482_w1_write_byte; | |
506 | data->w1_ch[idx].w1_bm.touch_bit = ds2482_w1_touch_bit; | |
507 | data->w1_ch[idx].w1_bm.triplet = ds2482_w1_triplet; | |
508 | data->w1_ch[idx].w1_bm.reset_bus = ds2482_w1_reset_bus; | |
9c95bb6f | 509 | data->w1_ch[idx].w1_bm.set_pullup = ds2482_w1_set_pullup; |
baf12ae2 EP |
510 | |
511 | err = w1_add_master_device(&data->w1_ch[idx].w1_bm); | |
512 | if (err) { | |
513 | data->w1_ch[idx].pdev = NULL; | |
514 | goto exit_w1_remove; | |
515 | } | |
516 | } | |
517 | ||
518 | return 0; | |
519 | ||
520 | exit_w1_remove: | |
baf12ae2 EP |
521 | for (idx = 0; idx < data->w1_count; idx++) { |
522 | if (data->w1_ch[idx].pdev != NULL) | |
523 | w1_remove_master_device(&data->w1_ch[idx].w1_bm); | |
524 | } | |
525 | exit_free: | |
526 | kfree(data); | |
527 | exit: | |
528 | return err; | |
529 | } | |
530 | ||
61c91f7d | 531 | static int ds2482_remove(struct i2c_client *client) |
baf12ae2 EP |
532 | { |
533 | struct ds2482_data *data = i2c_get_clientdata(client); | |
61c91f7d | 534 | int idx; |
baf12ae2 EP |
535 | |
536 | /* Unregister the 1-wire bridge(s) */ | |
537 | for (idx = 0; idx < data->w1_count; idx++) { | |
538 | if (data->w1_ch[idx].pdev != NULL) | |
539 | w1_remove_master_device(&data->w1_ch[idx].w1_bm); | |
540 | } | |
541 | ||
baf12ae2 EP |
542 | /* Free the memory */ |
543 | kfree(data); | |
544 | return 0; | |
545 | } | |
546 | ||
dbfd5ccc | 547 | module_i2c_driver(ds2482_driver); |
baf12ae2 EP |
548 | |
549 | MODULE_AUTHOR("Ben Gardner <bgardner@wabtec.com>"); | |
550 | MODULE_DESCRIPTION("DS2482 driver"); | |
551 | MODULE_LICENSE("GPL"); |