[mirror_ubuntu-zesty-kernel.git] / drivers / watchdog / ar7_wdt.c

/*
 * drivers/watchdog/ar7_wdt.c
 *
 * Copyright (C) 2007 Nicolas Thill <nico@openwrt.org>
 * Copyright (c) 2005 Enrik Berkhan <Enrik.Berkhan@akk.org>
 *
 * Some code taken from:
 * National Semiconductor SCx200 Watchdog support
 * Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/errno.h>
#include <linux/miscdevice.h>
#include <linux/platform_device.h>
#include <linux/watchdog.h>
#include <linux/fs.h>
#include <linux/ioport.h>
#include <linux/io.h>
#include <linux/uaccess.h>
#include <linux/clk.h>

#include <asm/addrspace.h>
#include <asm/mach-ar7/ar7.h>

#define LONGNAME "TI AR7 Watchdog Timer"

MODULE_AUTHOR("Nicolas Thill <nico@openwrt.org>");
MODULE_DESCRIPTION(LONGNAME);
MODULE_LICENSE("GPL");

static int margin = 60;
module_param(margin, int, 0);
MODULE_PARM_DESC(margin, "Watchdog margin in seconds");

static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");

#define READ_REG(x) readl((void __iomem *)&(x))
#define WRITE_REG(x, v) writel((v), (void __iomem *)&(x))

struct ar7_wdt {
	u32 kick_lock;
	u32 kick;
	u32 change_lock;
	u32 change;
	u32 disable_lock;
	u32 disable;
	u32 prescale_lock;
	u32 prescale;
};

static unsigned long wdt_is_open;
static unsigned expect_close;
static DEFINE_SPINLOCK(wdt_lock);

/* XXX currently fixed, allows max margin ~68.72 secs */
#define prescale_value 0xffff

/* Resource of the WDT registers */
static struct resource *ar7_regs_wdt;
/* Pointer to the remapped WDT IO space */
static struct ar7_wdt *ar7_wdt;

static struct clk *vbus_clk;

static void ar7_wdt_kick(u32 value)
{
	WRITE_REG(ar7_wdt->kick_lock, 0x5555);
	if ((READ_REG(ar7_wdt->kick_lock) & 3) == 1) {
		WRITE_REG(ar7_wdt->kick_lock, 0xaaaa);
		if ((READ_REG(ar7_wdt->kick_lock) & 3) == 3) {
			WRITE_REG(ar7_wdt->kick, value);
			return;
		}
	}
	pr_err("failed to unlock WDT kick reg\n");
}

static void ar7_wdt_prescale(u32 value)
{
	WRITE_REG(ar7_wdt->prescale_lock, 0x5a5a);
	if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 1) {
		WRITE_REG(ar7_wdt->prescale_lock, 0xa5a5);
		if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 3) {
			WRITE_REG(ar7_wdt->prescale, value);
			return;
		}
	}
	pr_err("failed to unlock WDT prescale reg\n");
}

static void ar7_wdt_change(u32 value)
{
	WRITE_REG(ar7_wdt->change_lock, 0x6666);
	if ((READ_REG(ar7_wdt->change_lock) & 3) == 1) {
		WRITE_REG(ar7_wdt->change_lock, 0xbbbb);
		if ((READ_REG(ar7_wdt->change_lock) & 3) == 3) {
			WRITE_REG(ar7_wdt->change, value);
			return;
		}
	}
	pr_err("failed to unlock WDT change reg\n");
}

static void ar7_wdt_disable(u32 value)
{
	WRITE_REG(ar7_wdt->disable_lock, 0x7777);
	if ((READ_REG(ar7_wdt->disable_lock) & 3) == 1) {
		WRITE_REG(ar7_wdt->disable_lock, 0xcccc);
		if ((READ_REG(ar7_wdt->disable_lock) & 3) == 2) {
			WRITE_REG(ar7_wdt->disable_lock, 0xdddd);
			if ((READ_REG(ar7_wdt->disable_lock) & 3) == 3) {
				WRITE_REG(ar7_wdt->disable, value);
				return;
			}
		}
	}
	pr_err("failed to unlock WDT disable reg\n");
}

static void ar7_wdt_update_margin(int new_margin)
{
	u32 change;
	u32 vbus_rate;

	vbus_rate = clk_get_rate(vbus_clk);
	change = new_margin * (vbus_rate / prescale_value);
	if (change < 1)
		change = 1;
	if (change > 0xffff)
		change = 0xffff;
	ar7_wdt_change(change);
	margin = change * prescale_value / vbus_rate;
	pr_info("timer margin %d seconds (prescale %d, change %d, freq %d)\n",
		margin, prescale_value, change, vbus_rate);
}

static void ar7_wdt_enable_wdt(void)
{
	pr_debug("enabling watchdog timer\n");
	ar7_wdt_disable(1);
	ar7_wdt_kick(1);
}

static void ar7_wdt_disable_wdt(void)
{
	pr_debug("disabling watchdog timer\n");
	ar7_wdt_disable(0);
}

static int ar7_wdt_open(struct inode *inode, struct file *file)
{
	/* only allow one at a time */
	if (test_and_set_bit(0, &wdt_is_open))
		return -EBUSY;
	ar7_wdt_enable_wdt();
	expect_close = 0;

	return nonseekable_open(inode, file);
}

static int ar7_wdt_release(struct inode *inode, struct file *file)
{
	if (!expect_close)
		pr_warn("watchdog device closed unexpectedly, will not disable the watchdog timer\n");
	else if (!nowayout)
		ar7_wdt_disable_wdt();
	clear_bit(0, &wdt_is_open);
	return 0;
}

static ssize_t ar7_wdt_write(struct file *file, const char *data,
			     size_t len, loff_t *ppos)
{
	/* check for a magic close character */
	if (len) {
		size_t i;

		spin_lock(&wdt_lock);
		ar7_wdt_kick(1);
		spin_unlock(&wdt_lock);

		expect_close = 0;
		for (i = 0; i < len; ++i) {
			char c;
			if (get_user(c, data + i))
				return -EFAULT;
			if (c == 'V')
				expect_close = 1;
		}

	}
	return len;
}

static long ar7_wdt_ioctl(struct file *file,
					unsigned int cmd, unsigned long arg)
{
	static const struct watchdog_info ident = {
		.identity = LONGNAME,
		.firmware_version = 1,
		.options = (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
						WDIOF_MAGICCLOSE),
	};
	int new_margin;

	switch (cmd) {
	case WDIOC_GETSUPPORT:
		if (copy_to_user((struct watchdog_info *)arg, &ident,
				sizeof(ident)))
			return -EFAULT;
		return 0;
	case WDIOC_GETSTATUS:
	case WDIOC_GETBOOTSTATUS:
		if (put_user(0, (int *)arg))
			return -EFAULT;
		return 0;
	case WDIOC_KEEPALIVE:
		ar7_wdt_kick(1);
		return 0;
	case WDIOC_SETTIMEOUT:
		if (get_user(new_margin, (int *)arg))
			return -EFAULT;
		if (new_margin < 1)
			return -EINVAL;

		spin_lock(&wdt_lock);
		ar7_wdt_update_margin(new_margin);
		ar7_wdt_kick(1);
		spin_unlock(&wdt_lock);

	case WDIOC_GETTIMEOUT:
		if (put_user(margin, (int *)arg))
			return -EFAULT;
		return 0;
	default:
		return -ENOTTY;
	}
}

static const struct file_operations ar7_wdt_fops = {
	.owner		= THIS_MODULE,
	.write		= ar7_wdt_write,
	.unlocked_ioctl	= ar7_wdt_ioctl,
	.open		= ar7_wdt_open,
	.release	= ar7_wdt_release,
	.llseek		= no_llseek,
};

static struct miscdevice ar7_wdt_miscdev = {
	.minor		= WATCHDOG_MINOR,
	.name		= "watchdog",
	.fops		= &ar7_wdt_fops,
};

static int ar7_wdt_probe(struct platform_device *pdev)
{
	int rc;

	ar7_regs_wdt =
		platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
	ar7_wdt = devm_ioremap_resource(&pdev->dev, ar7_regs_wdt);
	if (IS_ERR(ar7_wdt))
		return PTR_ERR(ar7_wdt);

	vbus_clk = clk_get(NULL, "vbus");
	if (IS_ERR(vbus_clk)) {
		pr_err("could not get vbus clock\n");
		return PTR_ERR(vbus_clk);
	}

	ar7_wdt_disable_wdt();
	ar7_wdt_prescale(prescale_value);
	ar7_wdt_update_margin(margin);

	rc = misc_register(&ar7_wdt_miscdev);
	if (rc) {
		pr_err("unable to register misc device\n");
		goto out;
	}
	return 0;

out:
	clk_put(vbus_clk);
	vbus_clk = NULL;
	return rc;
}

static int ar7_wdt_remove(struct platform_device *pdev)
{
	misc_deregister(&ar7_wdt_miscdev);
	clk_put(vbus_clk);
	vbus_clk = NULL;
	return 0;
}

static void ar7_wdt_shutdown(struct platform_device *pdev)
{
	if (!nowayout)
		ar7_wdt_disable_wdt();
}

static struct platform_driver ar7_wdt_driver = {
	.probe = ar7_wdt_probe,
	.remove = ar7_wdt_remove,
	.shutdown = ar7_wdt_shutdown,
	.driver = {
		.name = "ar7_wdt",
	},
};

module_platform_driver(ar7_wdt_driver);
Commit	Line	Data
c283cf2c MC	1	/*
	2	* drivers/watchdog/ar7_wdt.c
	3	*
	4	* Copyright (C) 2007 Nicolas Thill <nico@openwrt.org>
	5	* Copyright (c) 2005 Enrik Berkhan <Enrik.Berkhan@akk.org>
	6	*
	7	* Some code taken from:
	8	* National Semiconductor SCx200 Watchdog support
	9	* Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License as published by
	13	* the Free Software Foundation; either version 2 of the License, or
	14	* (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	24	*/
	25
27c766aa JP	26	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27c766aa JP	27
c283cf2c MC	28	#include <linux/module.h>
	29	#include <linux/moduleparam.h>
	30	#include <linux/errno.h>
c283cf2c	31	#include <linux/miscdevice.h>
64d4062a	32	#include <linux/platform_device.h>
c283cf2c	33	#include <linux/watchdog.h>
c283cf2c MC	34	#include <linux/fs.h>
	35	#include <linux/ioport.h>
	36	#include <linux/io.h>
	37	#include <linux/uaccess.h>
780019dd	38	#include <linux/clk.h>
c283cf2c MC	39
c283cf2c MC	40	#include <asm/addrspace.h>
c5e7f5a3	41	#include <asm/mach-ar7/ar7.h>
c283cf2c	42
c283cf2c MC	43	#define LONGNAME "TI AR7 Watchdog Timer"
	44
	45	MODULE_AUTHOR("Nicolas Thill <nico@openwrt.org>");
	46	MODULE_DESCRIPTION(LONGNAME);
	47	MODULE_LICENSE("GPL");
c283cf2c MC	48
	49	static int margin = 60;
	50	module_param(margin, int, 0);
	51	MODULE_PARM_DESC(margin, "Watchdog margin in seconds");
	52
86a1e189 WVS	53	static bool nowayout = WATCHDOG_NOWAYOUT;
86a1e189 WVS	54	module_param(nowayout, bool, 0);
c283cf2c MC	55	MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
	56
	57	#define READ_REG(x) readl((void __iomem *)&(x))
	58	#define WRITE_REG(x, v) writel((v), (void __iomem *)&(x))
	59
	60	struct ar7_wdt {
	61	u32 kick_lock;
	62	u32 kick;
	63	u32 change_lock;
	64	u32 change;
	65	u32 disable_lock;
	66	u32 disable;
	67	u32 prescale_lock;
	68	u32 prescale;
	69	};
	70
670d59c0	71	static unsigned long wdt_is_open;
c283cf2c	72	static unsigned expect_close;
1334f329	73	static DEFINE_SPINLOCK(wdt_lock);
c283cf2c MC	74
	75	/* XXX currently fixed, allows max margin ~68.72 secs */
	76	#define prescale_value 0xffff
	77
64d4062a FF	78	/* Resource of the WDT registers */
64d4062a FF	79	static struct resource *ar7_regs_wdt;
c283cf2c MC	80	/* Pointer to the remapped WDT IO space */
c283cf2c MC	81	static struct ar7_wdt *ar7_wdt;
c283cf2c	82
780019dd FF	83	static struct clk *vbus_clk;
780019dd FF	84
c283cf2c MC	85	static void ar7_wdt_kick(u32 value)
	86	{
	87	WRITE_REG(ar7_wdt->kick_lock, 0x5555);
	88	if ((READ_REG(ar7_wdt->kick_lock) & 3) == 1) {
	89	WRITE_REG(ar7_wdt->kick_lock, 0xaaaa);
	90	if ((READ_REG(ar7_wdt->kick_lock) & 3) == 3) {
	91	WRITE_REG(ar7_wdt->kick, value);
	92	return;
	93	}
	94	}
27c766aa	95	pr_err("failed to unlock WDT kick reg\n");
c283cf2c MC	96	}
	97
	98	static void ar7_wdt_prescale(u32 value)
	99	{
	100	WRITE_REG(ar7_wdt->prescale_lock, 0x5a5a);
	101	if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 1) {
	102	WRITE_REG(ar7_wdt->prescale_lock, 0xa5a5);
	103	if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 3) {
	104	WRITE_REG(ar7_wdt->prescale, value);
	105	return;
	106	}
	107	}
27c766aa	108	pr_err("failed to unlock WDT prescale reg\n");
c283cf2c MC	109	}
	110
	111	static void ar7_wdt_change(u32 value)
	112	{
	113	WRITE_REG(ar7_wdt->change_lock, 0x6666);
	114	if ((READ_REG(ar7_wdt->change_lock) & 3) == 1) {
	115	WRITE_REG(ar7_wdt->change_lock, 0xbbbb);
	116	if ((READ_REG(ar7_wdt->change_lock) & 3) == 3) {
	117	WRITE_REG(ar7_wdt->change, value);
	118	return;
	119	}
	120	}
27c766aa	121	pr_err("failed to unlock WDT change reg\n");
c283cf2c MC	122	}
	123
	124	static void ar7_wdt_disable(u32 value)
	125	{
	126	WRITE_REG(ar7_wdt->disable_lock, 0x7777);
	127	if ((READ_REG(ar7_wdt->disable_lock) & 3) == 1) {
	128	WRITE_REG(ar7_wdt->disable_lock, 0xcccc);
	129	if ((READ_REG(ar7_wdt->disable_lock) & 3) == 2) {
	130	WRITE_REG(ar7_wdt->disable_lock, 0xdddd);
	131	if ((READ_REG(ar7_wdt->disable_lock) & 3) == 3) {
	132	WRITE_REG(ar7_wdt->disable, value);
	133	return;
	134	}
	135	}
	136	}
27c766aa	137	pr_err("failed to unlock WDT disable reg\n");
c283cf2c MC	138	}
	139
	140	static void ar7_wdt_update_margin(int new_margin)
	141	{
	142	u32 change;
780019dd	143	u32 vbus_rate;
c283cf2c	144
780019dd FF	145	vbus_rate = clk_get_rate(vbus_clk);
780019dd FF	146	change = new_margin * (vbus_rate / prescale_value);
670d59c0 AC	147	if (change < 1)
	148	change = 1;
	149	if (change > 0xffff)
	150	change = 0xffff;
c283cf2c	151	ar7_wdt_change(change);
780019dd	152	margin = change * prescale_value / vbus_rate;
27c766aa JP	153	pr_info("timer margin %d seconds (prescale %d, change %d, freq %d)\n",
27c766aa JP	154	margin, prescale_value, change, vbus_rate);
c283cf2c MC	155	}
	156
	157	static void ar7_wdt_enable_wdt(void)
	158	{
27c766aa	159	pr_debug("enabling watchdog timer\n");
c283cf2c MC	160	ar7_wdt_disable(1);
	161	ar7_wdt_kick(1);
	162	}
	163
	164	static void ar7_wdt_disable_wdt(void)
	165	{
27c766aa	166	pr_debug("disabling watchdog timer\n");
c283cf2c MC	167	ar7_wdt_disable(0);
	168	}
	169
	170	static int ar7_wdt_open(struct inode inode, struct file file)
	171	{
	172	/* only allow one at a time */
670d59c0	173	if (test_and_set_bit(0, &wdt_is_open))
c283cf2c MC	174	return -EBUSY;
	175	ar7_wdt_enable_wdt();
	176	expect_close = 0;
	177
	178	return nonseekable_open(inode, file);
	179	}
	180
	181	static int ar7_wdt_release(struct inode inode, struct file file)
	182	{
	183	if (!expect_close)
27c766aa	184	pr_warn("watchdog device closed unexpectedly, will not disable the watchdog timer\n");
c283cf2c MC	185	else if (!nowayout)
c283cf2c MC	186	ar7_wdt_disable_wdt();
670d59c0	187	clear_bit(0, &wdt_is_open);
c283cf2c MC	188	return 0;
	189	}
	190
c283cf2c MC	191	static ssize_t ar7_wdt_write(struct file file, const char data,
	192	size_t len, loff_t *ppos)
	193	{
	194	/* check for a magic close character */
	195	if (len) {
	196	size_t i;
	197
670d59c0	198	spin_lock(&wdt_lock);
c283cf2c	199	ar7_wdt_kick(1);
670d59c0	200	spin_unlock(&wdt_lock);
c283cf2c MC	201
	202	expect_close = 0;
	203	for (i = 0; i < len; ++i) {
	204	char c;
7944d3a5	205	if (get_user(c, data + i))
c283cf2c MC	206	return -EFAULT;
	207	if (c == 'V')
	208	expect_close = 1;
	209	}
	210
	211	}
	212	return len;
	213	}
	214
670d59c0 AC	215	static long ar7_wdt_ioctl(struct file *file,
670d59c0 AC	216	unsigned int cmd, unsigned long arg)
c283cf2c	217	{
42747d71	218	static const struct watchdog_info ident = {
c283cf2c MC	219	.identity = LONGNAME,
c283cf2c MC	220	.firmware_version = 1,
e73a7802 WVS	221	.options = (WDIOF_SETTIMEOUT \| WDIOF_KEEPALIVEPING \|
e73a7802 WVS	222	WDIOF_MAGICCLOSE),
c283cf2c MC	223	};
	224	int new_margin;
	225
	226	switch (cmd) {
c283cf2c MC	227	case WDIOC_GETSUPPORT:
	228	if (copy_to_user((struct watchdog_info *)arg, &ident,
	229	sizeof(ident)))
	230	return -EFAULT;
	231	return 0;
	232	case WDIOC_GETSTATUS:
	233	case WDIOC_GETBOOTSTATUS:
	234	if (put_user(0, (int *)arg))
	235	return -EFAULT;
	236	return 0;
	237	case WDIOC_KEEPALIVE:
	238	ar7_wdt_kick(1);
	239	return 0;
	240	case WDIOC_SETTIMEOUT:
	241	if (get_user(new_margin, (int *)arg))
	242	return -EFAULT;
	243	if (new_margin < 1)
	244	return -EINVAL;
	245
670d59c0	246	spin_lock(&wdt_lock);
c283cf2c MC	247	ar7_wdt_update_margin(new_margin);
c283cf2c MC	248	ar7_wdt_kick(1);
670d59c0	249	spin_unlock(&wdt_lock);
c283cf2c MC	250
	251	case WDIOC_GETTIMEOUT:
	252	if (put_user(margin, (int *)arg))
	253	return -EFAULT;
	254	return 0;
0c06090c WVS	255	default:
0c06090c WVS	256	return -ENOTTY;
c283cf2c MC	257	}
	258	}
	259
b47a166e	260	static const struct file_operations ar7_wdt_fops = {
c283cf2c MC	261	.owner = THIS_MODULE,
c283cf2c MC	262	.write = ar7_wdt_write,
670d59c0	263	.unlocked_ioctl = ar7_wdt_ioctl,
c283cf2c MC	264	.open = ar7_wdt_open,
c283cf2c MC	265	.release = ar7_wdt_release,
6038f373	266	.llseek = no_llseek,
c283cf2c MC	267	};
	268
	269	static struct miscdevice ar7_wdt_miscdev = {
	270	.minor = WATCHDOG_MINOR,
	271	.name = "watchdog",
	272	.fops = &ar7_wdt_fops,
	273	};
	274
2d991a16	275	static int ar7_wdt_probe(struct platform_device *pdev)
c283cf2c MC	276	{
	277	int rc;
	278
64d4062a FF	279	ar7_regs_wdt =
64d4062a FF	280	platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
4c271bb6 TR	281	ar7_wdt = devm_ioremap_resource(&pdev->dev, ar7_regs_wdt);
	282	if (IS_ERR(ar7_wdt))
	283	return PTR_ERR(ar7_wdt);
c283cf2c	284
780019dd FF	285	vbus_clk = clk_get(NULL, "vbus");
780019dd FF	286	if (IS_ERR(vbus_clk)) {
27c766aa	287	pr_err("could not get vbus clock\n");
ae21cc20	288	return PTR_ERR(vbus_clk);
780019dd FF	289	}
780019dd FF	290
c283cf2c MC	291	ar7_wdt_disable_wdt();
	292	ar7_wdt_prescale(prescale_value);
	293	ar7_wdt_update_margin(margin);
	294
c283cf2c MC	295	rc = misc_register(&ar7_wdt_miscdev);
c283cf2c MC	296	if (rc) {
27c766aa	297	pr_err("unable to register misc device\n");
ae21cc20	298	goto out;
c283cf2c	299	}
ae21cc20	300	return 0;
c283cf2c	301
c283cf2c	302	out:
ae21cc20 JL	303	clk_put(vbus_clk);
ae21cc20 JL	304	vbus_clk = NULL;
c283cf2c MC	305	return rc;
	306	}
	307
4b12b896	308	static int ar7_wdt_remove(struct platform_device *pdev)
c283cf2c MC	309	{
c283cf2c MC	310	misc_deregister(&ar7_wdt_miscdev);
ae21cc20 JL	311	clk_put(vbus_clk);
ae21cc20 JL	312	vbus_clk = NULL;
64d4062a FF	313	return 0;
	314	}
	315
	316	static void ar7_wdt_shutdown(struct platform_device *pdev)
	317	{
	318	if (!nowayout)
	319	ar7_wdt_disable_wdt();
	320	}
	321
	322	static struct platform_driver ar7_wdt_driver = {
	323	.probe = ar7_wdt_probe,
82268714	324	.remove = ar7_wdt_remove,
64d4062a FF	325	.shutdown = ar7_wdt_shutdown,
64d4062a FF	326	.driver = {
64d4062a FF	327	.name = "ar7_wdt",
	328	},
	329	};
	330
b8ec6118	331	module_platform_driver(ar7_wdt_driver);