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Commit | Line | Data |
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2e62c498 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
c283cf2c MC |
2 | /* |
3 | * drivers/watchdog/ar7_wdt.c | |
4 | * | |
5 | * Copyright (C) 2007 Nicolas Thill <nico@openwrt.org> | |
6 | * Copyright (c) 2005 Enrik Berkhan <Enrik.Berkhan@akk.org> | |
7 | * | |
8 | * Some code taken from: | |
9 | * National Semiconductor SCx200 Watchdog support | |
10 | * Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com> | |
11 | * | |
c283cf2c MC |
12 | */ |
13 | ||
27c766aa JP |
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
15 | ||
c283cf2c MC |
16 | #include <linux/module.h> |
17 | #include <linux/moduleparam.h> | |
18 | #include <linux/errno.h> | |
c283cf2c | 19 | #include <linux/miscdevice.h> |
64d4062a | 20 | #include <linux/platform_device.h> |
c283cf2c | 21 | #include <linux/watchdog.h> |
c283cf2c MC |
22 | #include <linux/fs.h> |
23 | #include <linux/ioport.h> | |
24 | #include <linux/io.h> | |
25 | #include <linux/uaccess.h> | |
780019dd | 26 | #include <linux/clk.h> |
c283cf2c MC |
27 | |
28 | #include <asm/addrspace.h> | |
c5e7f5a3 | 29 | #include <asm/mach-ar7/ar7.h> |
c283cf2c | 30 | |
c283cf2c MC |
31 | #define LONGNAME "TI AR7 Watchdog Timer" |
32 | ||
33 | MODULE_AUTHOR("Nicolas Thill <nico@openwrt.org>"); | |
34 | MODULE_DESCRIPTION(LONGNAME); | |
35 | MODULE_LICENSE("GPL"); | |
c283cf2c MC |
36 | |
37 | static int margin = 60; | |
38 | module_param(margin, int, 0); | |
39 | MODULE_PARM_DESC(margin, "Watchdog margin in seconds"); | |
40 | ||
86a1e189 WVS |
41 | static bool nowayout = WATCHDOG_NOWAYOUT; |
42 | module_param(nowayout, bool, 0); | |
c283cf2c MC |
43 | MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close"); |
44 | ||
45 | #define READ_REG(x) readl((void __iomem *)&(x)) | |
46 | #define WRITE_REG(x, v) writel((v), (void __iomem *)&(x)) | |
47 | ||
48 | struct ar7_wdt { | |
49 | u32 kick_lock; | |
50 | u32 kick; | |
51 | u32 change_lock; | |
52 | u32 change; | |
53 | u32 disable_lock; | |
54 | u32 disable; | |
55 | u32 prescale_lock; | |
56 | u32 prescale; | |
57 | }; | |
58 | ||
670d59c0 | 59 | static unsigned long wdt_is_open; |
c283cf2c | 60 | static unsigned expect_close; |
1334f329 | 61 | static DEFINE_SPINLOCK(wdt_lock); |
c283cf2c MC |
62 | |
63 | /* XXX currently fixed, allows max margin ~68.72 secs */ | |
64 | #define prescale_value 0xffff | |
65 | ||
64d4062a FF |
66 | /* Resource of the WDT registers */ |
67 | static struct resource *ar7_regs_wdt; | |
c283cf2c MC |
68 | /* Pointer to the remapped WDT IO space */ |
69 | static struct ar7_wdt *ar7_wdt; | |
c283cf2c | 70 | |
780019dd FF |
71 | static struct clk *vbus_clk; |
72 | ||
c283cf2c MC |
73 | static void ar7_wdt_kick(u32 value) |
74 | { | |
75 | WRITE_REG(ar7_wdt->kick_lock, 0x5555); | |
76 | if ((READ_REG(ar7_wdt->kick_lock) & 3) == 1) { | |
77 | WRITE_REG(ar7_wdt->kick_lock, 0xaaaa); | |
78 | if ((READ_REG(ar7_wdt->kick_lock) & 3) == 3) { | |
79 | WRITE_REG(ar7_wdt->kick, value); | |
80 | return; | |
81 | } | |
82 | } | |
27c766aa | 83 | pr_err("failed to unlock WDT kick reg\n"); |
c283cf2c MC |
84 | } |
85 | ||
86 | static void ar7_wdt_prescale(u32 value) | |
87 | { | |
88 | WRITE_REG(ar7_wdt->prescale_lock, 0x5a5a); | |
89 | if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 1) { | |
90 | WRITE_REG(ar7_wdt->prescale_lock, 0xa5a5); | |
91 | if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 3) { | |
92 | WRITE_REG(ar7_wdt->prescale, value); | |
93 | return; | |
94 | } | |
95 | } | |
27c766aa | 96 | pr_err("failed to unlock WDT prescale reg\n"); |
c283cf2c MC |
97 | } |
98 | ||
99 | static void ar7_wdt_change(u32 value) | |
100 | { | |
101 | WRITE_REG(ar7_wdt->change_lock, 0x6666); | |
102 | if ((READ_REG(ar7_wdt->change_lock) & 3) == 1) { | |
103 | WRITE_REG(ar7_wdt->change_lock, 0xbbbb); | |
104 | if ((READ_REG(ar7_wdt->change_lock) & 3) == 3) { | |
105 | WRITE_REG(ar7_wdt->change, value); | |
106 | return; | |
107 | } | |
108 | } | |
27c766aa | 109 | pr_err("failed to unlock WDT change reg\n"); |
c283cf2c MC |
110 | } |
111 | ||
112 | static void ar7_wdt_disable(u32 value) | |
113 | { | |
114 | WRITE_REG(ar7_wdt->disable_lock, 0x7777); | |
115 | if ((READ_REG(ar7_wdt->disable_lock) & 3) == 1) { | |
116 | WRITE_REG(ar7_wdt->disable_lock, 0xcccc); | |
117 | if ((READ_REG(ar7_wdt->disable_lock) & 3) == 2) { | |
118 | WRITE_REG(ar7_wdt->disable_lock, 0xdddd); | |
119 | if ((READ_REG(ar7_wdt->disable_lock) & 3) == 3) { | |
120 | WRITE_REG(ar7_wdt->disable, value); | |
121 | return; | |
122 | } | |
123 | } | |
124 | } | |
27c766aa | 125 | pr_err("failed to unlock WDT disable reg\n"); |
c283cf2c MC |
126 | } |
127 | ||
128 | static void ar7_wdt_update_margin(int new_margin) | |
129 | { | |
130 | u32 change; | |
780019dd | 131 | u32 vbus_rate; |
c283cf2c | 132 | |
780019dd FF |
133 | vbus_rate = clk_get_rate(vbus_clk); |
134 | change = new_margin * (vbus_rate / prescale_value); | |
670d59c0 AC |
135 | if (change < 1) |
136 | change = 1; | |
137 | if (change > 0xffff) | |
138 | change = 0xffff; | |
c283cf2c | 139 | ar7_wdt_change(change); |
780019dd | 140 | margin = change * prescale_value / vbus_rate; |
27c766aa JP |
141 | pr_info("timer margin %d seconds (prescale %d, change %d, freq %d)\n", |
142 | margin, prescale_value, change, vbus_rate); | |
c283cf2c MC |
143 | } |
144 | ||
145 | static void ar7_wdt_enable_wdt(void) | |
146 | { | |
27c766aa | 147 | pr_debug("enabling watchdog timer\n"); |
c283cf2c MC |
148 | ar7_wdt_disable(1); |
149 | ar7_wdt_kick(1); | |
150 | } | |
151 | ||
152 | static void ar7_wdt_disable_wdt(void) | |
153 | { | |
27c766aa | 154 | pr_debug("disabling watchdog timer\n"); |
c283cf2c MC |
155 | ar7_wdt_disable(0); |
156 | } | |
157 | ||
158 | static int ar7_wdt_open(struct inode *inode, struct file *file) | |
159 | { | |
160 | /* only allow one at a time */ | |
670d59c0 | 161 | if (test_and_set_bit(0, &wdt_is_open)) |
c283cf2c MC |
162 | return -EBUSY; |
163 | ar7_wdt_enable_wdt(); | |
164 | expect_close = 0; | |
165 | ||
c5bf68fe | 166 | return stream_open(inode, file); |
c283cf2c MC |
167 | } |
168 | ||
169 | static int ar7_wdt_release(struct inode *inode, struct file *file) | |
170 | { | |
171 | if (!expect_close) | |
27c766aa | 172 | pr_warn("watchdog device closed unexpectedly, will not disable the watchdog timer\n"); |
c283cf2c MC |
173 | else if (!nowayout) |
174 | ar7_wdt_disable_wdt(); | |
670d59c0 | 175 | clear_bit(0, &wdt_is_open); |
c283cf2c MC |
176 | return 0; |
177 | } | |
178 | ||
c283cf2c MC |
179 | static ssize_t ar7_wdt_write(struct file *file, const char *data, |
180 | size_t len, loff_t *ppos) | |
181 | { | |
182 | /* check for a magic close character */ | |
183 | if (len) { | |
184 | size_t i; | |
185 | ||
670d59c0 | 186 | spin_lock(&wdt_lock); |
c283cf2c | 187 | ar7_wdt_kick(1); |
670d59c0 | 188 | spin_unlock(&wdt_lock); |
c283cf2c MC |
189 | |
190 | expect_close = 0; | |
191 | for (i = 0; i < len; ++i) { | |
192 | char c; | |
7944d3a5 | 193 | if (get_user(c, data + i)) |
c283cf2c MC |
194 | return -EFAULT; |
195 | if (c == 'V') | |
196 | expect_close = 1; | |
197 | } | |
198 | ||
199 | } | |
200 | return len; | |
201 | } | |
202 | ||
670d59c0 AC |
203 | static long ar7_wdt_ioctl(struct file *file, |
204 | unsigned int cmd, unsigned long arg) | |
c283cf2c | 205 | { |
42747d71 | 206 | static const struct watchdog_info ident = { |
c283cf2c MC |
207 | .identity = LONGNAME, |
208 | .firmware_version = 1, | |
e73a7802 WVS |
209 | .options = (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | |
210 | WDIOF_MAGICCLOSE), | |
c283cf2c MC |
211 | }; |
212 | int new_margin; | |
213 | ||
214 | switch (cmd) { | |
c283cf2c MC |
215 | case WDIOC_GETSUPPORT: |
216 | if (copy_to_user((struct watchdog_info *)arg, &ident, | |
217 | sizeof(ident))) | |
218 | return -EFAULT; | |
219 | return 0; | |
220 | case WDIOC_GETSTATUS: | |
221 | case WDIOC_GETBOOTSTATUS: | |
222 | if (put_user(0, (int *)arg)) | |
223 | return -EFAULT; | |
224 | return 0; | |
225 | case WDIOC_KEEPALIVE: | |
226 | ar7_wdt_kick(1); | |
227 | return 0; | |
228 | case WDIOC_SETTIMEOUT: | |
229 | if (get_user(new_margin, (int *)arg)) | |
230 | return -EFAULT; | |
231 | if (new_margin < 1) | |
232 | return -EINVAL; | |
233 | ||
670d59c0 | 234 | spin_lock(&wdt_lock); |
c283cf2c MC |
235 | ar7_wdt_update_margin(new_margin); |
236 | ar7_wdt_kick(1); | |
670d59c0 | 237 | spin_unlock(&wdt_lock); |
bd490f82 | 238 | fallthrough; |
c283cf2c MC |
239 | case WDIOC_GETTIMEOUT: |
240 | if (put_user(margin, (int *)arg)) | |
241 | return -EFAULT; | |
242 | return 0; | |
0c06090c WVS |
243 | default: |
244 | return -ENOTTY; | |
c283cf2c MC |
245 | } |
246 | } | |
247 | ||
b47a166e | 248 | static const struct file_operations ar7_wdt_fops = { |
c283cf2c MC |
249 | .owner = THIS_MODULE, |
250 | .write = ar7_wdt_write, | |
670d59c0 | 251 | .unlocked_ioctl = ar7_wdt_ioctl, |
b6dfb247 | 252 | .compat_ioctl = compat_ptr_ioctl, |
c283cf2c MC |
253 | .open = ar7_wdt_open, |
254 | .release = ar7_wdt_release, | |
6038f373 | 255 | .llseek = no_llseek, |
c283cf2c MC |
256 | }; |
257 | ||
258 | static struct miscdevice ar7_wdt_miscdev = { | |
259 | .minor = WATCHDOG_MINOR, | |
260 | .name = "watchdog", | |
261 | .fops = &ar7_wdt_fops, | |
262 | }; | |
263 | ||
2d991a16 | 264 | static int ar7_wdt_probe(struct platform_device *pdev) |
c283cf2c MC |
265 | { |
266 | int rc; | |
267 | ||
64d4062a FF |
268 | ar7_regs_wdt = |
269 | platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); | |
4c271bb6 TR |
270 | ar7_wdt = devm_ioremap_resource(&pdev->dev, ar7_regs_wdt); |
271 | if (IS_ERR(ar7_wdt)) | |
272 | return PTR_ERR(ar7_wdt); | |
c283cf2c | 273 | |
780019dd FF |
274 | vbus_clk = clk_get(NULL, "vbus"); |
275 | if (IS_ERR(vbus_clk)) { | |
27c766aa | 276 | pr_err("could not get vbus clock\n"); |
ae21cc20 | 277 | return PTR_ERR(vbus_clk); |
780019dd FF |
278 | } |
279 | ||
c283cf2c MC |
280 | ar7_wdt_disable_wdt(); |
281 | ar7_wdt_prescale(prescale_value); | |
282 | ar7_wdt_update_margin(margin); | |
283 | ||
c283cf2c MC |
284 | rc = misc_register(&ar7_wdt_miscdev); |
285 | if (rc) { | |
27c766aa | 286 | pr_err("unable to register misc device\n"); |
ae21cc20 | 287 | goto out; |
c283cf2c | 288 | } |
ae21cc20 | 289 | return 0; |
c283cf2c | 290 | |
c283cf2c | 291 | out: |
ae21cc20 JL |
292 | clk_put(vbus_clk); |
293 | vbus_clk = NULL; | |
c283cf2c MC |
294 | return rc; |
295 | } | |
296 | ||
4b12b896 | 297 | static int ar7_wdt_remove(struct platform_device *pdev) |
c283cf2c MC |
298 | { |
299 | misc_deregister(&ar7_wdt_miscdev); | |
ae21cc20 JL |
300 | clk_put(vbus_clk); |
301 | vbus_clk = NULL; | |
64d4062a FF |
302 | return 0; |
303 | } | |
304 | ||
305 | static void ar7_wdt_shutdown(struct platform_device *pdev) | |
306 | { | |
307 | if (!nowayout) | |
308 | ar7_wdt_disable_wdt(); | |
309 | } | |
310 | ||
311 | static struct platform_driver ar7_wdt_driver = { | |
312 | .probe = ar7_wdt_probe, | |
82268714 | 313 | .remove = ar7_wdt_remove, |
64d4062a FF |
314 | .shutdown = ar7_wdt_shutdown, |
315 | .driver = { | |
64d4062a FF |
316 | .name = "ar7_wdt", |
317 | }, | |
318 | }; | |
319 | ||
b8ec6118 | 320 | module_platform_driver(ar7_wdt_driver); |