[mirror_ubuntu-artful-kernel.git] / drivers / watchdog / bcm2835_wdt.c

/*
 * Watchdog driver for Broadcom BCM2835
 *
 * "bcm2708_wdog" driver written by Luke Diamand that was obtained from
 * branch "rpi-3.6.y" of git://github.com/raspberrypi/linux.git was used
 * as a hardware reference for the Broadcom BCM2835 watchdog timer.
 *
 * Copyright (C) 2013 Lubomir Rintel <lkundrak@v3.sk>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or (at your
 * option) any later version.
 */

#include <linux/delay.h>
#include <linux/types.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/watchdog.h>
#include <linux/platform_device.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>

#define PM_RSTC				0x1c
#define PM_RSTS				0x20
#define PM_WDOG				0x24

#define PM_PASSWORD			0x5a000000

#define PM_WDOG_TIME_SET		0x000fffff
#define PM_RSTC_WRCFG_CLR		0xffffffcf
#define PM_RSTS_HADWRH_SET		0x00000040
#define PM_RSTC_WRCFG_SET		0x00000030
#define PM_RSTC_WRCFG_FULL_RESET	0x00000020
#define PM_RSTC_RESET			0x00000102
#define PM_RSTS_PARTITION_CLR          0xfffffaaa

#define SECS_TO_WDOG_TICKS(x) ((x) << 16)
#define WDOG_TICKS_TO_SECS(x) ((x) >> 16)

struct bcm2835_wdt {
	void __iomem		*base;
	spinlock_t		lock;
};

static unsigned int heartbeat;
static bool nowayout = WATCHDOG_NOWAYOUT;

static bool bcm2835_wdt_is_running(struct bcm2835_wdt *wdt)
{
	uint32_t cur;

	cur = readl(wdt->base + PM_RSTC);

	return !!(cur & PM_RSTC_WRCFG_FULL_RESET);
}

static int bcm2835_wdt_start(struct watchdog_device *wdog)
{
	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
	uint32_t cur;
	unsigned long flags;

	spin_lock_irqsave(&wdt->lock, flags);

	writel_relaxed(PM_PASSWORD | (SECS_TO_WDOG_TICKS(wdog->timeout) &
				PM_WDOG_TIME_SET), wdt->base + PM_WDOG);
	cur = readl_relaxed(wdt->base + PM_RSTC);
	writel_relaxed(PM_PASSWORD | (cur & PM_RSTC_WRCFG_CLR) |
		  PM_RSTC_WRCFG_FULL_RESET, wdt->base + PM_RSTC);

	spin_unlock_irqrestore(&wdt->lock, flags);

	return 0;
}

static int bcm2835_wdt_stop(struct watchdog_device *wdog)
{
	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);

	writel_relaxed(PM_PASSWORD | PM_RSTC_RESET, wdt->base + PM_RSTC);
	return 0;
}

static unsigned int bcm2835_wdt_get_timeleft(struct watchdog_device *wdog)
{
	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);

	uint32_t ret = readl_relaxed(wdt->base + PM_WDOG);
	return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
}

/*
 * The Raspberry Pi firmware uses the RSTS register to know which partiton
 * to boot from. The partiton value is spread into bits 0, 2, 4, 6, 8, 10.
 * Partiton 63 is a special partition used by the firmware to indicate halt.
 */

static void __bcm2835_restart(struct bcm2835_wdt *wdt, u8 partition)
{
	u32 val, rsts;

	rsts = (partition & BIT(0)) | ((partition & BIT(1)) << 1) |
	       ((partition & BIT(2)) << 2) | ((partition & BIT(3)) << 3) |
	       ((partition & BIT(4)) << 4) | ((partition & BIT(5)) << 5);

	val = readl_relaxed(wdt->base + PM_RSTS);
	val &= PM_RSTS_PARTITION_CLR;
	val |= PM_PASSWORD | rsts;
	writel_relaxed(val, wdt->base + PM_RSTS);

	/* use a timeout of 10 ticks (~150us) */
	writel_relaxed(10 | PM_PASSWORD, wdt->base + PM_WDOG);
	val = readl_relaxed(wdt->base + PM_RSTC);
	val &= PM_RSTC_WRCFG_CLR;
	val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET;
	writel_relaxed(val, wdt->base + PM_RSTC);

	/* No sleeping, possibly atomic. */
	mdelay(1);
}

static int bcm2835_restart(struct watchdog_device *wdog,
			   unsigned long action, void *data)
{
	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);

	unsigned long long val;
	u8 partition = 0;

	if (data && !kstrtoull(data, 0, &val) && val <= 63)
		partition = val;

	__bcm2835_restart(wdt, partition);

	return 0;
}

static const struct watchdog_ops bcm2835_wdt_ops = {
	.owner =	THIS_MODULE,
	.start =	bcm2835_wdt_start,
	.stop =		bcm2835_wdt_stop,
	.get_timeleft =	bcm2835_wdt_get_timeleft,
	.restart =	bcm2835_restart,
};

static const struct watchdog_info bcm2835_wdt_info = {
	.options =	WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE |
			WDIOF_KEEPALIVEPING,
	.identity =	"Broadcom BCM2835 Watchdog timer",
};

static struct watchdog_device bcm2835_wdt_wdd = {
	.info =		&bcm2835_wdt_info,
	.ops =		&bcm2835_wdt_ops,
	.min_timeout =	1,
	.max_timeout =	WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
	.timeout =	WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
};

/*
 * We can't really power off, but if we do the normal reset scheme, and
 * indicate to bootcode.bin not to reboot, then most of the chip will be
 * powered off.
 */
static void bcm2835_power_off(void)
{
	struct device_node *np =
		of_find_compatible_node(NULL, NULL, "brcm,bcm2835-pm-wdt");
	struct platform_device *pdev = of_find_device_by_node(np);
	struct bcm2835_wdt *wdt = platform_get_drvdata(pdev);

	/* Partition 63 tells the firmware that this is a halt */
	__bcm2835_restart(wdt, 63);
}

static int bcm2835_wdt_probe(struct platform_device *pdev)
{
	struct resource *res;
	struct device *dev = &pdev->dev;
	struct bcm2835_wdt *wdt;
	int err;

	wdt = devm_kzalloc(dev, sizeof(struct bcm2835_wdt), GFP_KERNEL);
	if (!wdt)
		return -ENOMEM;
	platform_set_drvdata(pdev, wdt);

	spin_lock_init(&wdt->lock);

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	wdt->base = devm_ioremap_resource(dev, res);
	if (IS_ERR(wdt->base))
		return PTR_ERR(wdt->base);

	watchdog_set_drvdata(&bcm2835_wdt_wdd, wdt);
	watchdog_init_timeout(&bcm2835_wdt_wdd, heartbeat, dev);
	watchdog_set_nowayout(&bcm2835_wdt_wdd, nowayout);
	bcm2835_wdt_wdd.parent = dev;
	if (bcm2835_wdt_is_running(wdt)) {
		/*
		 * The currently active timeout value (set by the
		 * bootloader) may be different from the module
		 * heartbeat parameter or the value in device
		 * tree. But we just need to set WDOG_HW_RUNNING,
		 * because then the framework will "immediately" ping
		 * the device, updating the timeout.
		 */
		set_bit(WDOG_HW_RUNNING, &bcm2835_wdt_wdd.status);
	}

	watchdog_set_restart_priority(&bcm2835_wdt_wdd, 128);

	watchdog_stop_on_reboot(&bcm2835_wdt_wdd);
	err = devm_watchdog_register_device(dev, &bcm2835_wdt_wdd);
	if (err) {
		dev_err(dev, "Failed to register watchdog device");
		return err;
	}

	if (pm_power_off == NULL)
		pm_power_off = bcm2835_power_off;

	dev_info(dev, "Broadcom BCM2835 watchdog timer");
	return 0;
}

static int bcm2835_wdt_remove(struct platform_device *pdev)
{
	if (pm_power_off == bcm2835_power_off)
		pm_power_off = NULL;

	return 0;
}

static const struct of_device_id bcm2835_wdt_of_match[] = {
	{ .compatible = "brcm,bcm2835-pm-wdt", },
	{},
};
MODULE_DEVICE_TABLE(of, bcm2835_wdt_of_match);

static struct platform_driver bcm2835_wdt_driver = {
	.probe		= bcm2835_wdt_probe,
	.remove		= bcm2835_wdt_remove,
	.driver = {
		.name =		"bcm2835-wdt",
		.of_match_table = bcm2835_wdt_of_match,
	},
};
module_platform_driver(bcm2835_wdt_driver);

module_param(heartbeat, uint, 0);
MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");

module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
				__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
MODULE_DESCRIPTION("Driver for Broadcom BCM2835 watchdog timer");
MODULE_LICENSE("GPL");
Commit	Line	Data
938d0a84 LR	1	/*
	2	* Watchdog driver for Broadcom BCM2835
	3	*
	4	* "bcm2708_wdog" driver written by Luke Diamand that was obtained from
	5	* branch "rpi-3.6.y" of git://github.com/raspberrypi/linux.git was used
	6	* as a hardware reference for the Broadcom BCM2835 watchdog timer.
	7	*
	8	* Copyright (C) 2013 Lubomir Rintel <lkundrak@v3.sk>
	9	*
	10	* This program is free software; you can redistribute it and/or modify it
	11	* under the terms of the GNU General Public License as published by the
	12	* Free Software Foundation; either version 2 of the License, or (at your
	13	* option) any later version.
	14	*/
	15
33a9f5bc	16	#include <linux/delay.h>
938d0a84 LR	17	#include <linux/types.h>
	18	#include <linux/module.h>
	19	#include <linux/io.h>
	20	#include <linux/watchdog.h>
	21	#include <linux/platform_device.h>
	22	#include <linux/of_address.h>
33a9f5bc	23	#include <linux/of_platform.h>
938d0a84 LR	24
938d0a84 LR	25	#define PM_RSTC 0x1c
33a9f5bc	26	#define PM_RSTS 0x20
938d0a84 LR	27	#define PM_WDOG 0x24
	28
	29	#define PM_PASSWORD 0x5a000000
	30
	31	#define PM_WDOG_TIME_SET 0x000fffff
	32	#define PM_RSTC_WRCFG_CLR 0xffffffcf
33a9f5bc	33	#define PM_RSTS_HADWRH_SET 0x00000040
938d0a84 LR	34	#define PM_RSTC_WRCFG_SET 0x00000030
	35	#define PM_RSTC_WRCFG_FULL_RESET 0x00000020
	36	#define PM_RSTC_RESET 0x00000102
7b24cc35	37	#define PM_RSTS_PARTITION_CLR 0xfffffaaa
898e6861	38
938d0a84 LR	39	#define SECS_TO_WDOG_TICKS(x) ((x) << 16)
	40	#define WDOG_TICKS_TO_SECS(x) ((x) >> 16)
	41
	42	struct bcm2835_wdt {
	43	void __iomem *base;
	44	spinlock_t lock;
	45	};
	46
	47	static unsigned int heartbeat;
	48	static bool nowayout = WATCHDOG_NOWAYOUT;
	49
054ae194 RV	50	static bool bcm2835_wdt_is_running(struct bcm2835_wdt *wdt)
	51	{
	52	uint32_t cur;
	53
	54	cur = readl(wdt->base + PM_RSTC);
	55
	56	return !!(cur & PM_RSTC_WRCFG_FULL_RESET);
	57	}
	58
938d0a84 LR	59	static int bcm2835_wdt_start(struct watchdog_device *wdog)
	60	{
	61	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
	62	uint32_t cur;
	63	unsigned long flags;
	64
	65	spin_lock_irqsave(&wdt->lock, flags);
	66
	67	writel_relaxed(PM_PASSWORD \| (SECS_TO_WDOG_TICKS(wdog->timeout) &
	68	PM_WDOG_TIME_SET), wdt->base + PM_WDOG);
	69	cur = readl_relaxed(wdt->base + PM_RSTC);
	70	writel_relaxed(PM_PASSWORD \| (cur & PM_RSTC_WRCFG_CLR) \|
	71	PM_RSTC_WRCFG_FULL_RESET, wdt->base + PM_RSTC);
	72
	73	spin_unlock_irqrestore(&wdt->lock, flags);
	74
	75	return 0;
	76	}
	77
	78	static int bcm2835_wdt_stop(struct watchdog_device *wdog)
	79	{
	80	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
	81
	82	writel_relaxed(PM_PASSWORD \| PM_RSTC_RESET, wdt->base + PM_RSTC);
938d0a84 LR	83	return 0;
	84	}
	85
938d0a84 LR	86	static unsigned int bcm2835_wdt_get_timeleft(struct watchdog_device *wdog)
	87	{
	88	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
	89
	90	uint32_t ret = readl_relaxed(wdt->base + PM_WDOG);
	91	return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
	92	}
	93
7b24cc35 NT	94	/*
	95	* The Raspberry Pi firmware uses the RSTS register to know which partiton
	96	* to boot from. The partiton value is spread into bits 0, 2, 4, 6, 8, 10.
	97	* Partiton 63 is a special partition used by the firmware to indicate halt.
	98	*/
	99
	100	static void __bcm2835_restart(struct bcm2835_wdt *wdt, u8 partition)
71e9b2f0	101	{
7b24cc35 NT	102	u32 val, rsts;
	103
	104	rsts = (partition & BIT(0)) \| ((partition & BIT(1)) << 1) \|
	105	((partition & BIT(2)) << 2) \| ((partition & BIT(3)) << 3) \|
	106	((partition & BIT(4)) << 4) \| ((partition & BIT(5)) << 5);
	107
	108	val = readl_relaxed(wdt->base + PM_RSTS);
	109	val &= PM_RSTS_PARTITION_CLR;
	110	val \|= PM_PASSWORD \| rsts;
	111	writel_relaxed(val, wdt->base + PM_RSTS);
71e9b2f0 GR	112
	113	/* use a timeout of 10 ticks (~150us) */
	114	writel_relaxed(10 \| PM_PASSWORD, wdt->base + PM_WDOG);
	115	val = readl_relaxed(wdt->base + PM_RSTC);
	116	val &= PM_RSTC_WRCFG_CLR;
	117	val \|= PM_PASSWORD \| PM_RSTC_WRCFG_FULL_RESET;
	118	writel_relaxed(val, wdt->base + PM_RSTC);
	119
	120	/* No sleeping, possibly atomic. */
	121	mdelay(1);
	122	}
	123
	124	static int bcm2835_restart(struct watchdog_device *wdog,
	125	unsigned long action, void *data)
	126	{
	127	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
	128
7b24cc35 NT	129	unsigned long long val;
	130	u8 partition = 0;
	131
	132	if (data && !kstrtoull(data, 0, &val) && val <= 63)
	133	partition = val;
	134
	135	__bcm2835_restart(wdt, partition);
71e9b2f0 GR	136
	137	return 0;
	138	}
	139
aea4b477	140	static const struct watchdog_ops bcm2835_wdt_ops = {
938d0a84 LR	141	.owner = THIS_MODULE,
	142	.start = bcm2835_wdt_start,
	143	.stop = bcm2835_wdt_stop,
938d0a84	144	.get_timeleft = bcm2835_wdt_get_timeleft,
71e9b2f0	145	.restart = bcm2835_restart,
938d0a84 LR	146	};
938d0a84 LR	147
aea4b477	148	static const struct watchdog_info bcm2835_wdt_info = {
938d0a84 LR	149	.options = WDIOF_SETTIMEOUT \| WDIOF_MAGICCLOSE \|
	150	WDIOF_KEEPALIVEPING,
	151	.identity = "Broadcom BCM2835 Watchdog timer",
	152	};
	153
	154	static struct watchdog_device bcm2835_wdt_wdd = {
	155	.info = &bcm2835_wdt_info,
	156	.ops = &bcm2835_wdt_ops,
	157	.min_timeout = 1,
	158	.max_timeout = WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
	159	.timeout = WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
	160	};
	161
33a9f5bc EA	162	/*
	163	* We can't really power off, but if we do the normal reset scheme, and
	164	* indicate to bootcode.bin not to reboot, then most of the chip will be
	165	* powered off.
	166	*/
	167	static void bcm2835_power_off(void)
	168	{
	169	struct device_node *np =
	170	of_find_compatible_node(NULL, NULL, "brcm,bcm2835-pm-wdt");
	171	struct platform_device *pdev = of_find_device_by_node(np);
	172	struct bcm2835_wdt *wdt = platform_get_drvdata(pdev);
33a9f5bc	173
7b24cc35 NT	174	/* Partition 63 tells the firmware that this is a halt */
7b24cc35 NT	175	__bcm2835_restart(wdt, 63);
33a9f5bc EA	176	}
33a9f5bc EA	177
938d0a84 LR	178	static int bcm2835_wdt_probe(struct platform_device *pdev)
938d0a84 LR	179	{
5f5aa6f1	180	struct resource *res;
938d0a84	181	struct device *dev = &pdev->dev;
938d0a84 LR	182	struct bcm2835_wdt *wdt;
	183	int err;
	184
	185	wdt = devm_kzalloc(dev, sizeof(struct bcm2835_wdt), GFP_KERNEL);
8deea830	186	if (!wdt)
938d0a84	187	return -ENOMEM;
938d0a84 LR	188	platform_set_drvdata(pdev, wdt);
	189
	190	spin_lock_init(&wdt->lock);
	191
5f5aa6f1 GR	192	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	193	wdt->base = devm_ioremap_resource(dev, res);
	194	if (IS_ERR(wdt->base))
	195	return PTR_ERR(wdt->base);
938d0a84 LR	196
	197	watchdog_set_drvdata(&bcm2835_wdt_wdd, wdt);
	198	watchdog_init_timeout(&bcm2835_wdt_wdd, heartbeat, dev);
	199	watchdog_set_nowayout(&bcm2835_wdt_wdd, nowayout);
5f5aa6f1	200	bcm2835_wdt_wdd.parent = dev;
054ae194 RV	201	if (bcm2835_wdt_is_running(wdt)) {
	202	/*
	203	* The currently active timeout value (set by the
	204	* bootloader) may be different from the module
	205	* heartbeat parameter or the value in device
	206	* tree. But we just need to set WDOG_HW_RUNNING,
	207	* because then the framework will "immediately" ping
	208	* the device, updating the timeout.
	209	*/
	210	set_bit(WDOG_HW_RUNNING, &bcm2835_wdt_wdd.status);
	211	}
71e9b2f0 GR	212
	213	watchdog_set_restart_priority(&bcm2835_wdt_wdd, 128);
	214
5f5aa6f1 GR	215	watchdog_stop_on_reboot(&bcm2835_wdt_wdd);
5f5aa6f1 GR	216	err = devm_watchdog_register_device(dev, &bcm2835_wdt_wdd);
938d0a84 LR	217	if (err) {
938d0a84 LR	218	dev_err(dev, "Failed to register watchdog device");
938d0a84 LR	219	return err;
	220	}
	221
33a9f5bc EA	222	if (pm_power_off == NULL)
	223	pm_power_off = bcm2835_power_off;
	224
938d0a84 LR	225	dev_info(dev, "Broadcom BCM2835 watchdog timer");
	226	return 0;
	227	}
	228
	229	static int bcm2835_wdt_remove(struct platform_device *pdev)
	230	{
33a9f5bc EA	231	if (pm_power_off == bcm2835_power_off)
33a9f5bc EA	232	pm_power_off = NULL;
938d0a84 LR	233
	234	return 0;
	235	}
	236
938d0a84 LR	237	static const struct of_device_id bcm2835_wdt_of_match[] = {
	238	{ .compatible = "brcm,bcm2835-pm-wdt", },
	239	{},
	240	};
	241	MODULE_DEVICE_TABLE(of, bcm2835_wdt_of_match);
	242
	243	static struct platform_driver bcm2835_wdt_driver = {
	244	.probe = bcm2835_wdt_probe,
	245	.remove = bcm2835_wdt_remove,
938d0a84 LR	246	.driver = {
938d0a84 LR	247	.name = "bcm2835-wdt",
938d0a84 LR	248	.of_match_table = bcm2835_wdt_of_match,
	249	},
	250	};
	251	module_platform_driver(bcm2835_wdt_driver);
	252
	253	module_param(heartbeat, uint, 0);
	254	MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");
	255
	256	module_param(nowayout, bool, 0);
	257	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
	258	__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	259
	260	MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
	261	MODULE_DESCRIPTION("Driver for Broadcom BCM2835 watchdog timer");
	262	MODULE_LICENSE("GPL");