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8ab0dc33 | 1 | /* cpwd.c - driver implementation for hardware watchdog |
1da177e4 LT |
2 | * timers found on Sun Microsystems CP1400 and CP1500 boards. |
3 | * | |
927d6961 | 4 | * This device supports both the generic Linux watchdog |
1da177e4 LT |
5 | * interface and Solaris-compatible ioctls as best it is |
6 | * able. | |
7 | * | |
8 | * NOTE: CP1400 systems appear to have a defective intr_mask | |
9 | * register on the PLD, preventing the disabling of | |
927d6961 | 10 | * timer interrupts. We use a timer to periodically |
1da177e4 LT |
11 | * reset 'stopped' watchdogs on affected platforms. |
12 | * | |
1da177e4 | 13 | * Copyright (c) 2000 Eric Brower (ebrower@usa.net) |
c5f8556c | 14 | * Copyright (C) 2008 David S. Miller <davem@davemloft.net> |
1da177e4 LT |
15 | */ |
16 | ||
17 | #include <linux/kernel.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/fs.h> | |
20 | #include <linux/errno.h> | |
21 | #include <linux/major.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/miscdevice.h> | |
1da177e4 LT |
24 | #include <linux/interrupt.h> |
25 | #include <linux/ioport.h> | |
26 | #include <linux/timer.h> | |
5a0e3ad6 | 27 | #include <linux/slab.h> |
613655fa | 28 | #include <linux/mutex.h> |
347e03df | 29 | #include <linux/io.h> |
c5f8556c DM |
30 | #include <linux/of.h> |
31 | #include <linux/of_device.h> | |
278aefc5 | 32 | #include <linux/uaccess.h> |
c5f8556c | 33 | |
1da177e4 | 34 | #include <asm/irq.h> |
1da177e4 LT |
35 | #include <asm/watchdog.h> |
36 | ||
c5f8556c DM |
37 | #define DRIVER_NAME "cpwd" |
38 | #define PFX DRIVER_NAME ": " | |
39 | ||
1da177e4 | 40 | #define WD_OBPNAME "watchdog" |
c5f8556c | 41 | #define WD_BADMODEL "SUNW,501-5336" |
1da177e4 LT |
42 | #define WD_BTIMEOUT (jiffies + (HZ * 1000)) |
43 | #define WD_BLIMIT 0xFFFF | |
44 | ||
1da177e4 | 45 | #define WD0_MINOR 212 |
927d6961 WVS |
46 | #define WD1_MINOR 213 |
47 | #define WD2_MINOR 214 | |
1da177e4 | 48 | |
c5f8556c DM |
49 | /* Internal driver definitions. */ |
50 | #define WD0_ID 0 | |
51 | #define WD1_ID 1 | |
52 | #define WD2_ID 2 | |
53 | #define WD_NUMDEVS 3 | |
1da177e4 | 54 | |
c5f8556c DM |
55 | #define WD_INTR_OFF 0 |
56 | #define WD_INTR_ON 1 | |
1da177e4 LT |
57 | |
58 | #define WD_STAT_INIT 0x01 /* Watchdog timer is initialized */ | |
59 | #define WD_STAT_BSTOP 0x02 /* Watchdog timer is brokenstopped */ | |
60 | #define WD_STAT_SVCD 0x04 /* Watchdog interrupt occurred */ | |
61 | ||
62 | /* Register value definitions | |
63 | */ | |
64 | #define WD0_INTR_MASK 0x01 /* Watchdog device interrupt masks */ | |
65 | #define WD1_INTR_MASK 0x02 | |
66 | #define WD2_INTR_MASK 0x04 | |
67 | ||
68 | #define WD_S_RUNNING 0x01 /* Watchdog device status running */ | |
69 | #define WD_S_EXPIRED 0x02 /* Watchdog device status expired */ | |
70 | ||
c5f8556c DM |
71 | struct cpwd { |
72 | void __iomem *regs; | |
73 | spinlock_t lock; | |
74 | ||
75 | unsigned int irq; | |
76 | ||
77 | unsigned long timeout; | |
78 | bool enabled; | |
79 | bool reboot; | |
80 | bool broken; | |
81 | bool initialized; | |
82 | ||
83 | struct { | |
84 | struct miscdevice misc; | |
85 | void __iomem *regs; | |
86 | u8 intr_mask; | |
87 | u8 runstatus; | |
88 | u16 timeout; | |
89 | } devs[WD_NUMDEVS]; | |
90 | }; | |
91 | ||
613655fa | 92 | static DEFINE_MUTEX(cpwd_mutex); |
c5f8556c DM |
93 | static struct cpwd *cpwd_device; |
94 | ||
927d6961 | 95 | /* Sun uses Altera PLD EPF8820ATC144-4 |
1da177e4 LT |
96 | * providing three hardware watchdogs: |
97 | * | |
927d6961 WVS |
98 | * 1) RIC - sends an interrupt when triggered |
99 | * 2) XIR - asserts XIR_B_RESET when triggered, resets CPU | |
100 | * 3) POR - asserts POR_B_RESET when triggered, resets CPU, backplane, board | |
1da177e4 LT |
101 | * |
102 | *** Timer register block definition (struct wd_timer_regblk) | |
103 | * | |
927d6961 | 104 | * dcntr and limit registers (halfword access): |
1da177e4 LT |
105 | * ------------------- |
106 | * | 15 | ...| 1 | 0 | | |
107 | * ------------------- | |
108 | * |- counter val -| | |
109 | * ------------------- | |
110 | * dcntr - Current 16-bit downcounter value. | |
111 | * When downcounter reaches '0' watchdog expires. | |
927d6961 WVS |
112 | * Reading this register resets downcounter with |
113 | * 'limit' value. | |
1da177e4 LT |
114 | * limit - 16-bit countdown value in 1/10th second increments. |
115 | * Writing this register begins countdown with input value. | |
116 | * Reading from this register does not affect counter. | |
117 | * NOTES: After watchdog reset, dcntr and limit contain '1' | |
118 | * | |
119 | * status register (byte access): | |
120 | * --------------------------- | |
121 | * | 7 | ... | 2 | 1 | 0 | | |
122 | * --------------+------------ | |
123 | * |- UNUSED -| EXP | RUN | | |
124 | * --------------------------- | |
125 | * status- Bit 0 - Watchdog is running | |
126 | * Bit 1 - Watchdog has expired | |
127 | * | |
128 | *** PLD register block definition (struct wd_pld_regblk) | |
129 | * | |
130 | * intr_mask register (byte access): | |
131 | * --------------------------------- | |
132 | * | 7 | ... | 3 | 2 | 1 | 0 | | |
133 | * +-------------+------------------ | |
134 | * |- UNUSED -| WD3 | WD2 | WD1 | | |
135 | * --------------------------------- | |
136 | * WD3 - 1 == Interrupt disabled for watchdog 3 | |
137 | * WD2 - 1 == Interrupt disabled for watchdog 2 | |
138 | * WD1 - 1 == Interrupt disabled for watchdog 1 | |
139 | * | |
140 | * pld_status register (byte access): | |
141 | * UNKNOWN, MAGICAL MYSTERY REGISTER | |
142 | * | |
143 | */ | |
144 | #define WD_TIMER_REGSZ 16 | |
145 | #define WD0_OFF 0 | |
146 | #define WD1_OFF (WD_TIMER_REGSZ * 1) | |
147 | #define WD2_OFF (WD_TIMER_REGSZ * 2) | |
148 | #define PLD_OFF (WD_TIMER_REGSZ * 3) | |
149 | ||
150 | #define WD_DCNTR 0x00 | |
151 | #define WD_LIMIT 0x04 | |
152 | #define WD_STATUS 0x08 | |
153 | ||
154 | #define PLD_IMASK (PLD_OFF + 0x00) | |
155 | #define PLD_STATUS (PLD_OFF + 0x04) | |
156 | ||
c5f8556c | 157 | static struct timer_list cpwd_timer; |
1da177e4 | 158 | |
a77dba7e WVS |
159 | static int wd0_timeout; |
160 | static int wd1_timeout; | |
161 | static int wd2_timeout; | |
1da177e4 | 162 | |
927d6961 | 163 | module_param(wd0_timeout, int, 0); |
1da177e4 | 164 | MODULE_PARM_DESC(wd0_timeout, "Default watchdog0 timeout in 1/10secs"); |
927d6961 | 165 | module_param(wd1_timeout, int, 0); |
1da177e4 | 166 | MODULE_PARM_DESC(wd1_timeout, "Default watchdog1 timeout in 1/10secs"); |
927d6961 | 167 | module_param(wd2_timeout, int, 0); |
1da177e4 LT |
168 | MODULE_PARM_DESC(wd2_timeout, "Default watchdog2 timeout in 1/10secs"); |
169 | ||
c5f8556c DM |
170 | MODULE_AUTHOR("Eric Brower <ebrower@usa.net>"); |
171 | MODULE_DESCRIPTION("Hardware watchdog driver for Sun Microsystems CP1400/1500"); | |
1da177e4 | 172 | MODULE_LICENSE("GPL"); |
c5f8556c DM |
173 | MODULE_SUPPORTED_DEVICE("watchdog"); |
174 | ||
175 | static void cpwd_writew(u16 val, void __iomem *addr) | |
176 | { | |
177 | writew(cpu_to_le16(val), addr); | |
178 | } | |
179 | static u16 cpwd_readw(void __iomem *addr) | |
180 | { | |
181 | u16 val = readw(addr); | |
182 | ||
183 | return le16_to_cpu(val); | |
184 | } | |
185 | ||
186 | static void cpwd_writeb(u8 val, void __iomem *addr) | |
187 | { | |
188 | writeb(val, addr); | |
189 | } | |
190 | ||
191 | static u8 cpwd_readb(void __iomem *addr) | |
192 | { | |
193 | return readb(addr); | |
194 | } | |
1da177e4 | 195 | |
c5f8556c DM |
196 | /* Enable or disable watchdog interrupts |
197 | * Because of the CP1400 defect this should only be | |
198 | * called during initialzation or by wd_[start|stop]timer() | |
199 | * | |
200 | * index - sub-device index, or -1 for 'all' | |
201 | * enable - non-zero to enable interrupts, zero to disable | |
1da177e4 | 202 | */ |
c5f8556c DM |
203 | static void cpwd_toggleintr(struct cpwd *p, int index, int enable) |
204 | { | |
205 | unsigned char curregs = cpwd_readb(p->regs + PLD_IMASK); | |
927d6961 WVS |
206 | unsigned char setregs = |
207 | (index == -1) ? | |
208 | (WD0_INTR_MASK | WD1_INTR_MASK | WD2_INTR_MASK) : | |
c5f8556c DM |
209 | (p->devs[index].intr_mask); |
210 | ||
211 | if (enable == WD_INTR_ON) | |
212 | curregs &= ~setregs; | |
213 | else | |
214 | curregs |= setregs; | |
215 | ||
216 | cpwd_writeb(curregs, p->regs + PLD_IMASK); | |
217 | } | |
218 | ||
219 | /* Restarts timer with maximum limit value and | |
220 | * does not unset 'brokenstop' value. | |
1da177e4 | 221 | */ |
c5f8556c | 222 | static void cpwd_resetbrokentimer(struct cpwd *p, int index) |
1da177e4 | 223 | { |
c5f8556c DM |
224 | cpwd_toggleintr(p, index, WD_INTR_ON); |
225 | cpwd_writew(WD_BLIMIT, p->devs[index].regs + WD_LIMIT); | |
1da177e4 LT |
226 | } |
227 | ||
c5f8556c DM |
228 | /* Timer method called to reset stopped watchdogs-- |
229 | * because of the PLD bug on CP1400, we cannot mask | |
230 | * interrupts within the PLD so me must continually | |
231 | * reset the timers ad infinitum. | |
232 | */ | |
233 | static void cpwd_brokentimer(unsigned long data) | |
234 | { | |
235 | struct cpwd *p = (struct cpwd *) data; | |
236 | int id, tripped = 0; | |
237 | ||
238 | /* kill a running timer instance, in case we | |
239 | * were called directly instead of by kernel timer | |
240 | */ | |
241 | if (timer_pending(&cpwd_timer)) | |
242 | del_timer(&cpwd_timer); | |
1da177e4 | 243 | |
c5f8556c DM |
244 | for (id = 0; id < WD_NUMDEVS; id++) { |
245 | if (p->devs[id].runstatus & WD_STAT_BSTOP) { | |
246 | ++tripped; | |
247 | cpwd_resetbrokentimer(p, id); | |
248 | } | |
249 | } | |
1da177e4 | 250 | |
c5f8556c DM |
251 | if (tripped) { |
252 | /* there is at least one timer brokenstopped-- reschedule */ | |
253 | cpwd_timer.expires = WD_BTIMEOUT; | |
254 | add_timer(&cpwd_timer); | |
255 | } | |
256 | } | |
257 | ||
258 | /* Reset countdown timer with 'limit' value and continue countdown. | |
259 | * This will not start a stopped timer. | |
1da177e4 | 260 | */ |
c5f8556c | 261 | static void cpwd_pingtimer(struct cpwd *p, int index) |
1da177e4 | 262 | { |
c5f8556c DM |
263 | if (cpwd_readb(p->devs[index].regs + WD_STATUS) & WD_S_RUNNING) |
264 | cpwd_readw(p->devs[index].regs + WD_DCNTR); | |
1da177e4 | 265 | } |
c5f8556c DM |
266 | |
267 | /* Stop a running watchdog timer-- the timer actually keeps | |
268 | * running, but the interrupt is masked so that no action is | |
269 | * taken upon expiration. | |
1da177e4 | 270 | */ |
c5f8556c | 271 | static void cpwd_stoptimer(struct cpwd *p, int index) |
1da177e4 | 272 | { |
c5f8556c DM |
273 | if (cpwd_readb(p->devs[index].regs + WD_STATUS) & WD_S_RUNNING) { |
274 | cpwd_toggleintr(p, index, WD_INTR_OFF); | |
1da177e4 | 275 | |
c5f8556c DM |
276 | if (p->broken) { |
277 | p->devs[index].runstatus |= WD_STAT_BSTOP; | |
278 | cpwd_brokentimer((unsigned long) p); | |
279 | } | |
280 | } | |
1da177e4 LT |
281 | } |
282 | ||
c5f8556c DM |
283 | /* Start a watchdog timer with the specified limit value |
284 | * If the watchdog is running, it will be restarted with | |
285 | * the provided limit value. | |
286 | * | |
287 | * This function will enable interrupts on the specified | |
288 | * watchdog. | |
1da177e4 | 289 | */ |
c5f8556c | 290 | static void cpwd_starttimer(struct cpwd *p, int index) |
1da177e4 | 291 | { |
c5f8556c DM |
292 | if (p->broken) |
293 | p->devs[index].runstatus &= ~WD_STAT_BSTOP; | |
294 | ||
295 | p->devs[index].runstatus &= ~WD_STAT_SVCD; | |
1da177e4 | 296 | |
c5f8556c DM |
297 | cpwd_writew(p->devs[index].timeout, p->devs[index].regs + WD_LIMIT); |
298 | cpwd_toggleintr(p, index, WD_INTR_ON); | |
1da177e4 LT |
299 | } |
300 | ||
c5f8556c | 301 | static int cpwd_getstatus(struct cpwd *p, int index) |
1da177e4 | 302 | { |
c5f8556c DM |
303 | unsigned char stat = cpwd_readb(p->devs[index].regs + WD_STATUS); |
304 | unsigned char intr = cpwd_readb(p->devs[index].regs + PLD_IMASK); | |
305 | unsigned char ret = WD_STOPPED; | |
306 | ||
307 | /* determine STOPPED */ | |
927d6961 | 308 | if (!stat) |
c5f8556c DM |
309 | return ret; |
310 | ||
311 | /* determine EXPIRED vs FREERUN vs RUNNING */ | |
312 | else if (WD_S_EXPIRED & stat) { | |
313 | ret = WD_EXPIRED; | |
927d6961 | 314 | } else if (WD_S_RUNNING & stat) { |
c5f8556c DM |
315 | if (intr & p->devs[index].intr_mask) { |
316 | ret = WD_FREERUN; | |
317 | } else { | |
318 | /* Fudge WD_EXPIRED status for defective CP1400-- | |
927d6961 WVS |
319 | * IF timer is running |
320 | * AND brokenstop is set | |
c5f8556c DM |
321 | * AND an interrupt has been serviced |
322 | * we are WD_EXPIRED. | |
323 | * | |
927d6961 WVS |
324 | * IF timer is running |
325 | * AND brokenstop is set | |
c5f8556c DM |
326 | * AND no interrupt has been serviced |
327 | * we are WD_FREERUN. | |
328 | */ | |
329 | if (p->broken && | |
330 | (p->devs[index].runstatus & WD_STAT_BSTOP)) { | |
331 | if (p->devs[index].runstatus & WD_STAT_SVCD) { | |
332 | ret = WD_EXPIRED; | |
333 | } else { | |
927d6961 WVS |
334 | /* we could as well pretend |
335 | * we are expired */ | |
c5f8556c DM |
336 | ret = WD_FREERUN; |
337 | } | |
338 | } else { | |
339 | ret = WD_RUNNING; | |
1da177e4 LT |
340 | } |
341 | } | |
342 | } | |
c5f8556c DM |
343 | |
344 | /* determine SERVICED */ | |
345 | if (p->devs[index].runstatus & WD_STAT_SVCD) | |
346 | ret |= WD_SERVICED; | |
347 | ||
927d6961 | 348 | return ret; |
c5f8556c DM |
349 | } |
350 | ||
351 | static irqreturn_t cpwd_interrupt(int irq, void *dev_id) | |
352 | { | |
353 | struct cpwd *p = dev_id; | |
354 | ||
355 | /* Only WD0 will interrupt-- others are NMI and we won't | |
356 | * see them here.... | |
357 | */ | |
358 | spin_lock_irq(&p->lock); | |
359 | ||
360 | cpwd_stoptimer(p, WD0_ID); | |
361 | p->devs[WD0_ID].runstatus |= WD_STAT_SVCD; | |
362 | ||
363 | spin_unlock_irq(&p->lock); | |
364 | ||
365 | return IRQ_HANDLED; | |
1da177e4 LT |
366 | } |
367 | ||
c5f8556c | 368 | static int cpwd_open(struct inode *inode, struct file *f) |
1da177e4 | 369 | { |
c5f8556c DM |
370 | struct cpwd *p = cpwd_device; |
371 | ||
613655fa | 372 | mutex_lock(&cpwd_mutex); |
927d6961 WVS |
373 | switch (iminor(inode)) { |
374 | case WD0_MINOR: | |
375 | case WD1_MINOR: | |
376 | case WD2_MINOR: | |
377 | break; | |
c5f8556c | 378 | |
927d6961 | 379 | default: |
613655fa | 380 | mutex_unlock(&cpwd_mutex); |
927d6961 | 381 | return -ENODEV; |
1da177e4 LT |
382 | } |
383 | ||
384 | /* Register IRQ on first open of device */ | |
c5f8556c | 385 | if (!p->initialized) { |
927d6961 | 386 | if (request_irq(p->irq, &cpwd_interrupt, |
c5f8556c | 387 | IRQF_SHARED, DRIVER_NAME, p)) { |
927d6961 | 388 | printk(KERN_ERR PFX "Cannot register IRQ %d\n", |
c5f8556c | 389 | p->irq); |
613655fa | 390 | mutex_unlock(&cpwd_mutex); |
c5f8556c | 391 | return -EBUSY; |
1da177e4 | 392 | } |
c5f8556c | 393 | p->initialized = true; |
1da177e4 LT |
394 | } |
395 | ||
613655fa | 396 | mutex_unlock(&cpwd_mutex); |
c5f8556c DM |
397 | |
398 | return nonseekable_open(inode, f); | |
1da177e4 LT |
399 | } |
400 | ||
c5f8556c | 401 | static int cpwd_release(struct inode *inode, struct file *file) |
1da177e4 LT |
402 | { |
403 | return 0; | |
404 | } | |
405 | ||
9626dd75 | 406 | static long cpwd_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
1da177e4 | 407 | { |
42747d71 | 408 | static const struct watchdog_info info = { |
c5f8556c DM |
409 | .options = WDIOF_SETTIMEOUT, |
410 | .firmware_version = 1, | |
411 | .identity = DRIVER_NAME, | |
1da177e4 | 412 | }; |
c5f8556c | 413 | void __user *argp = (void __user *)arg; |
9626dd75 | 414 | struct inode *inode = file->f_path.dentry->d_inode; |
c5f8556c DM |
415 | int index = iminor(inode) - WD0_MINOR; |
416 | struct cpwd *p = cpwd_device; | |
417 | int setopt = 0; | |
1da177e4 | 418 | |
c5f8556c DM |
419 | switch (cmd) { |
420 | /* Generic Linux IOCTLs */ | |
421 | case WDIOC_GETSUPPORT: | |
422 | if (copy_to_user(argp, &info, sizeof(struct watchdog_info))) | |
423 | return -EFAULT; | |
424 | break; | |
1da177e4 | 425 | |
c5f8556c DM |
426 | case WDIOC_GETSTATUS: |
427 | case WDIOC_GETBOOTSTATUS: | |
428 | if (put_user(0, (int __user *)argp)) | |
429 | return -EFAULT; | |
430 | break; | |
431 | ||
432 | case WDIOC_KEEPALIVE: | |
433 | cpwd_pingtimer(p, index); | |
434 | break; | |
435 | ||
436 | case WDIOC_SETOPTIONS: | |
437 | if (copy_from_user(&setopt, argp, sizeof(unsigned int))) | |
438 | return -EFAULT; | |
439 | ||
440 | if (setopt & WDIOS_DISABLECARD) { | |
441 | if (p->enabled) | |
442 | return -EINVAL; | |
443 | cpwd_stoptimer(p, index); | |
444 | } else if (setopt & WDIOS_ENABLECARD) { | |
445 | cpwd_starttimer(p, index); | |
446 | } else { | |
447 | return -EINVAL; | |
927d6961 | 448 | } |
c5f8556c DM |
449 | break; |
450 | ||
451 | /* Solaris-compatible IOCTLs */ | |
452 | case WIOCGSTAT: | |
453 | setopt = cpwd_getstatus(p, index); | |
454 | if (copy_to_user(argp, &setopt, sizeof(unsigned int))) | |
455 | return -EFAULT; | |
456 | break; | |
457 | ||
458 | case WIOCSTART: | |
459 | cpwd_starttimer(p, index); | |
460 | break; | |
461 | ||
462 | case WIOCSTOP: | |
463 | if (p->enabled) | |
927d6961 | 464 | return -EINVAL; |
c5f8556c DM |
465 | |
466 | cpwd_stoptimer(p, index); | |
467 | break; | |
468 | ||
469 | default: | |
470 | return -EINVAL; | |
1da177e4 | 471 | } |
c5f8556c DM |
472 | |
473 | return 0; | |
1da177e4 LT |
474 | } |
475 | ||
c5f8556c DM |
476 | static long cpwd_compat_ioctl(struct file *file, unsigned int cmd, |
477 | unsigned long arg) | |
b66621fe CH |
478 | { |
479 | int rval = -ENOIOCTLCMD; | |
480 | ||
481 | switch (cmd) { | |
482 | /* solaris ioctls are specific to this driver */ | |
483 | case WIOCSTART: | |
484 | case WIOCSTOP: | |
485 | case WIOCGSTAT: | |
613655fa | 486 | mutex_lock(&cpwd_mutex); |
9626dd75 | 487 | rval = cpwd_ioctl(file, cmd, arg); |
613655fa | 488 | mutex_unlock(&cpwd_mutex); |
b66621fe | 489 | break; |
c5f8556c | 490 | |
b66621fe CH |
491 | /* everything else is handled by the generic compat layer */ |
492 | default: | |
493 | break; | |
494 | } | |
495 | ||
496 | return rval; | |
497 | } | |
498 | ||
927d6961 | 499 | static ssize_t cpwd_write(struct file *file, const char __user *buf, |
c5f8556c | 500 | size_t count, loff_t *ppos) |
1da177e4 | 501 | { |
c5f8556c DM |
502 | struct inode *inode = file->f_path.dentry->d_inode; |
503 | struct cpwd *p = cpwd_device; | |
504 | int index = iminor(inode); | |
1da177e4 LT |
505 | |
506 | if (count) { | |
c5f8556c | 507 | cpwd_pingtimer(p, index); |
1da177e4 LT |
508 | return 1; |
509 | } | |
1da177e4 | 510 | |
c5f8556c | 511 | return 0; |
1da177e4 LT |
512 | } |
513 | ||
927d6961 | 514 | static ssize_t cpwd_read(struct file *file, char __user *buffer, |
c5f8556c | 515 | size_t count, loff_t *ppos) |
1da177e4 | 516 | { |
c5f8556c | 517 | return -EINVAL; |
1da177e4 LT |
518 | } |
519 | ||
c5f8556c | 520 | static const struct file_operations cpwd_fops = { |
9626dd75 WVS |
521 | .owner = THIS_MODULE, |
522 | .unlocked_ioctl = cpwd_ioctl, | |
523 | .compat_ioctl = cpwd_compat_ioctl, | |
524 | .open = cpwd_open, | |
525 | .write = cpwd_write, | |
526 | .read = cpwd_read, | |
527 | .release = cpwd_release, | |
6038f373 | 528 | .llseek = no_llseek, |
1da177e4 LT |
529 | }; |
530 | ||
2dc11581 | 531 | static int __devinit cpwd_probe(struct platform_device *op, |
c5f8556c | 532 | const struct of_device_id *match) |
1da177e4 | 533 | { |
c5f8556c DM |
534 | struct device_node *options; |
535 | const char *str_prop; | |
536 | const void *prop_val; | |
537 | int i, err = -EINVAL; | |
538 | struct cpwd *p; | |
1da177e4 | 539 | |
c5f8556c DM |
540 | if (cpwd_device) |
541 | return -EINVAL; | |
1da177e4 | 542 | |
c5f8556c DM |
543 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
544 | err = -ENOMEM; | |
545 | if (!p) { | |
546 | printk(KERN_ERR PFX "Unable to allocate struct cpwd.\n"); | |
547 | goto out; | |
1da177e4 | 548 | } |
1da177e4 | 549 | |
1636f8ac | 550 | p->irq = op->archdata.irqs[0]; |
1da177e4 | 551 | |
c5f8556c | 552 | spin_lock_init(&p->lock); |
1da177e4 | 553 | |
c5f8556c DM |
554 | p->regs = of_ioremap(&op->resource[0], 0, |
555 | 4 * WD_TIMER_REGSZ, DRIVER_NAME); | |
556 | if (!p->regs) { | |
557 | printk(KERN_ERR PFX "Unable to map registers.\n"); | |
558 | goto out_free; | |
1da177e4 | 559 | } |
1da177e4 | 560 | |
c5f8556c DM |
561 | options = of_find_node_by_path("/options"); |
562 | err = -ENODEV; | |
563 | if (!options) { | |
564 | printk(KERN_ERR PFX "Unable to find /options node.\n"); | |
565 | goto out_iounmap; | |
566 | } | |
1da177e4 | 567 | |
c5f8556c DM |
568 | prop_val = of_get_property(options, "watchdog-enable?", NULL); |
569 | p->enabled = (prop_val ? true : false); | |
1da177e4 | 570 | |
c5f8556c DM |
571 | prop_val = of_get_property(options, "watchdog-reboot?", NULL); |
572 | p->reboot = (prop_val ? true : false); | |
1da177e4 | 573 | |
c5f8556c DM |
574 | str_prop = of_get_property(options, "watchdog-timeout", NULL); |
575 | if (str_prop) | |
576 | p->timeout = simple_strtoul(str_prop, NULL, 10); | |
1da177e4 | 577 | |
c5f8556c DM |
578 | /* CP1400s seem to have broken PLD implementations-- the |
579 | * interrupt_mask register cannot be written, so no timer | |
580 | * interrupts can be masked within the PLD. | |
1da177e4 | 581 | */ |
61c7a080 | 582 | str_prop = of_get_property(op->dev.of_node, "model", NULL); |
c5f8556c DM |
583 | p->broken = (str_prop && !strcmp(str_prop, WD_BADMODEL)); |
584 | ||
585 | if (!p->enabled) | |
586 | cpwd_toggleintr(p, -1, WD_INTR_OFF); | |
587 | ||
588 | for (i = 0; i < WD_NUMDEVS; i++) { | |
589 | static const char *cpwd_names[] = { "RIC", "XIR", "POR" }; | |
590 | static int *parms[] = { &wd0_timeout, | |
591 | &wd1_timeout, | |
592 | &wd2_timeout }; | |
593 | struct miscdevice *mp = &p->devs[i].misc; | |
594 | ||
595 | mp->minor = WD0_MINOR + i; | |
596 | mp->name = cpwd_names[i]; | |
597 | mp->fops = &cpwd_fops; | |
598 | ||
599 | p->devs[i].regs = p->regs + (i * WD_TIMER_REGSZ); | |
600 | p->devs[i].intr_mask = (WD0_INTR_MASK << i); | |
601 | p->devs[i].runstatus &= ~WD_STAT_BSTOP; | |
602 | p->devs[i].runstatus |= WD_STAT_INIT; | |
603 | p->devs[i].timeout = p->timeout; | |
604 | if (*parms[i]) | |
605 | p->devs[i].timeout = *parms[i]; | |
606 | ||
607 | err = misc_register(&p->devs[i].misc); | |
608 | if (err) { | |
609 | printk(KERN_ERR "Could not register misc device for " | |
610 | "dev %d\n", i); | |
611 | goto out_unregister; | |
1da177e4 LT |
612 | } |
613 | } | |
614 | ||
c5f8556c DM |
615 | if (p->broken) { |
616 | init_timer(&cpwd_timer); | |
617 | cpwd_timer.function = cpwd_brokentimer; | |
618 | cpwd_timer.data = (unsigned long) p; | |
619 | cpwd_timer.expires = WD_BTIMEOUT; | |
620 | ||
621 | printk(KERN_INFO PFX "PLD defect workaround enabled for " | |
622 | "model " WD_BADMODEL ".\n"); | |
1da177e4 | 623 | } |
1da177e4 | 624 | |
c5f8556c DM |
625 | dev_set_drvdata(&op->dev, p); |
626 | cpwd_device = p; | |
627 | err = 0; | |
1da177e4 | 628 | |
c5f8556c DM |
629 | out: |
630 | return err; | |
1da177e4 | 631 | |
c5f8556c DM |
632 | out_unregister: |
633 | for (i--; i >= 0; i--) | |
634 | misc_deregister(&p->devs[i].misc); | |
1da177e4 | 635 | |
c5f8556c DM |
636 | out_iounmap: |
637 | of_iounmap(&op->resource[0], p->regs, 4 * WD_TIMER_REGSZ); | |
638 | ||
639 | out_free: | |
640 | kfree(p); | |
641 | goto out; | |
1da177e4 LT |
642 | } |
643 | ||
2dc11581 | 644 | static int __devexit cpwd_remove(struct platform_device *op) |
1da177e4 | 645 | { |
c5f8556c DM |
646 | struct cpwd *p = dev_get_drvdata(&op->dev); |
647 | int i; | |
648 | ||
bbd562d7 | 649 | for (i = 0; i < WD_NUMDEVS; i++) { |
c5f8556c DM |
650 | misc_deregister(&p->devs[i].misc); |
651 | ||
652 | if (!p->enabled) { | |
653 | cpwd_stoptimer(p, i); | |
654 | if (p->devs[i].runstatus & WD_STAT_BSTOP) | |
655 | cpwd_resetbrokentimer(p, i); | |
1da177e4 LT |
656 | } |
657 | } | |
658 | ||
c5f8556c DM |
659 | if (p->broken) |
660 | del_timer_sync(&cpwd_timer); | |
1da177e4 | 661 | |
c5f8556c DM |
662 | if (p->initialized) |
663 | free_irq(p->irq, p); | |
1da177e4 | 664 | |
c5f8556c DM |
665 | of_iounmap(&op->resource[0], p->regs, 4 * WD_TIMER_REGSZ); |
666 | kfree(p); | |
1da177e4 | 667 | |
c5f8556c | 668 | cpwd_device = NULL; |
1da177e4 | 669 | |
c5f8556c DM |
670 | return 0; |
671 | } | |
1da177e4 | 672 | |
fd098316 | 673 | static const struct of_device_id cpwd_match[] = { |
c5f8556c DM |
674 | { |
675 | .name = "watchdog", | |
676 | }, | |
677 | {}, | |
678 | }; | |
679 | MODULE_DEVICE_TABLE(of, cpwd_match); | |
1da177e4 | 680 | |
c5f8556c | 681 | static struct of_platform_driver cpwd_driver = { |
4018294b GL |
682 | .driver = { |
683 | .name = DRIVER_NAME, | |
684 | .owner = THIS_MODULE, | |
685 | .of_match_table = cpwd_match, | |
686 | }, | |
c5f8556c DM |
687 | .probe = cpwd_probe, |
688 | .remove = __devexit_p(cpwd_remove), | |
689 | }; | |
1da177e4 | 690 | |
c5f8556c DM |
691 | static int __init cpwd_init(void) |
692 | { | |
1ab1d63a | 693 | return of_register_platform_driver(&cpwd_driver); |
1da177e4 LT |
694 | } |
695 | ||
c5f8556c | 696 | static void __exit cpwd_exit(void) |
1da177e4 | 697 | { |
1ab1d63a | 698 | of_unregister_platform_driver(&cpwd_driver); |
1da177e4 LT |
699 | } |
700 | ||
c5f8556c DM |
701 | module_init(cpwd_init); |
702 | module_exit(cpwd_exit); |