]>
Commit | Line | Data |
---|---|---|
bb2fd8a8 WS |
1 | /* |
2 | * Watchdog driver for IMX2 and later processors | |
3 | * | |
4 | * Copyright (C) 2010 Wolfram Sang, Pengutronix e.K. <w.sang@pengutronix.de> | |
1a9c5efa | 5 | * Copyright (C) 2014 Freescale Semiconductor, Inc. |
bb2fd8a8 WS |
6 | * |
7 | * some parts adapted by similar drivers from Darius Augulis and Vladimir | |
8 | * Zapolskiy, additional improvements by Wim Van Sebroeck. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify it | |
11 | * under the terms of the GNU General Public License version 2 as published by | |
12 | * the Free Software Foundation. | |
13 | * | |
14 | * NOTE: MX1 has a slightly different Watchdog than MX2 and later: | |
15 | * | |
16 | * MX1: MX2+: | |
17 | * ---- ----- | |
18 | * Registers: 32-bit 16-bit | |
19 | * Stopable timer: Yes No | |
20 | * Need to enable clk: No Yes | |
21 | * Halt on suspend: Manual Can be automatic | |
22 | */ | |
23 | ||
24 | #include <linux/init.h> | |
25 | #include <linux/kernel.h> | |
26 | #include <linux/miscdevice.h> | |
27 | #include <linux/module.h> | |
28 | #include <linux/moduleparam.h> | |
29 | #include <linux/platform_device.h> | |
30 | #include <linux/watchdog.h> | |
31 | #include <linux/clk.h> | |
32 | #include <linux/fs.h> | |
33 | #include <linux/io.h> | |
34 | #include <linux/uaccess.h> | |
35 | #include <linux/timer.h> | |
36 | #include <linux/jiffies.h> | |
bb2fd8a8 WS |
37 | |
38 | #define DRIVER_NAME "imx2-wdt" | |
39 | ||
40 | #define IMX2_WDT_WCR 0x00 /* Control Register */ | |
41 | #define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */ | |
42 | #define IMX2_WDT_WCR_WRE (1 << 3) /* -> WDOG Reset Enable */ | |
43 | #define IMX2_WDT_WCR_WDE (1 << 2) /* -> Watchdog Enable */ | |
1a9c5efa | 44 | #define IMX2_WDT_WCR_WDZST (1 << 0) /* -> Watchdog timer Suspend */ |
bb2fd8a8 WS |
45 | |
46 | #define IMX2_WDT_WSR 0x02 /* Service Register */ | |
47 | #define IMX2_WDT_SEQ1 0x5555 /* -> service sequence 1 */ | |
48 | #define IMX2_WDT_SEQ2 0xAAAA /* -> service sequence 2 */ | |
49 | ||
474ef121 OS |
50 | #define IMX2_WDT_WRSR 0x04 /* Reset Status Register */ |
51 | #define IMX2_WDT_WRSR_TOUT (1 << 1) /* -> Reset due to Timeout */ | |
52 | ||
bb2fd8a8 WS |
53 | #define IMX2_WDT_MAX_TIME 128 |
54 | #define IMX2_WDT_DEFAULT_TIME 60 /* in seconds */ | |
55 | ||
56 | #define WDOG_SEC_TO_COUNT(s) ((s * 2 - 1) << 8) | |
57 | ||
58 | #define IMX2_WDT_STATUS_OPEN 0 | |
59 | #define IMX2_WDT_STATUS_STARTED 1 | |
60 | #define IMX2_WDT_EXPECT_CLOSE 2 | |
61 | ||
62 | static struct { | |
63 | struct clk *clk; | |
64 | void __iomem *base; | |
65 | unsigned timeout; | |
66 | unsigned long status; | |
67 | struct timer_list timer; /* Pings the watchdog when closed */ | |
68 | } imx2_wdt; | |
69 | ||
70 | static struct miscdevice imx2_wdt_miscdev; | |
71 | ||
86a1e189 WVS |
72 | static bool nowayout = WATCHDOG_NOWAYOUT; |
73 | module_param(nowayout, bool, 0); | |
bb2fd8a8 WS |
74 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" |
75 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
76 | ||
77 | ||
78 | static unsigned timeout = IMX2_WDT_DEFAULT_TIME; | |
79 | module_param(timeout, uint, 0); | |
80 | MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds (default=" | |
81 | __MODULE_STRING(IMX2_WDT_DEFAULT_TIME) ")"); | |
82 | ||
83 | static const struct watchdog_info imx2_wdt_info = { | |
84 | .identity = "imx2+ watchdog", | |
85 | .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE, | |
86 | }; | |
87 | ||
88 | static inline void imx2_wdt_setup(void) | |
89 | { | |
90 | u16 val = __raw_readw(imx2_wdt.base + IMX2_WDT_WCR); | |
91 | ||
1a9c5efa AH |
92 | /* Suspend timer in low power mode, write once-only */ |
93 | val |= IMX2_WDT_WCR_WDZST; | |
bb2fd8a8 WS |
94 | /* Strip the old watchdog Time-Out value */ |
95 | val &= ~IMX2_WDT_WCR_WT; | |
96 | /* Generate reset if WDOG times out */ | |
97 | val &= ~IMX2_WDT_WCR_WRE; | |
98 | /* Keep Watchdog Disabled */ | |
99 | val &= ~IMX2_WDT_WCR_WDE; | |
100 | /* Set the watchdog's Time-Out value */ | |
101 | val |= WDOG_SEC_TO_COUNT(imx2_wdt.timeout); | |
102 | ||
103 | __raw_writew(val, imx2_wdt.base + IMX2_WDT_WCR); | |
104 | ||
105 | /* enable the watchdog */ | |
106 | val |= IMX2_WDT_WCR_WDE; | |
107 | __raw_writew(val, imx2_wdt.base + IMX2_WDT_WCR); | |
108 | } | |
109 | ||
110 | static inline void imx2_wdt_ping(void) | |
111 | { | |
112 | __raw_writew(IMX2_WDT_SEQ1, imx2_wdt.base + IMX2_WDT_WSR); | |
113 | __raw_writew(IMX2_WDT_SEQ2, imx2_wdt.base + IMX2_WDT_WSR); | |
114 | } | |
115 | ||
116 | static void imx2_wdt_timer_ping(unsigned long arg) | |
117 | { | |
118 | /* ping it every imx2_wdt.timeout / 2 seconds to prevent reboot */ | |
119 | imx2_wdt_ping(); | |
120 | mod_timer(&imx2_wdt.timer, jiffies + imx2_wdt.timeout * HZ / 2); | |
121 | } | |
122 | ||
123 | static void imx2_wdt_start(void) | |
124 | { | |
125 | if (!test_and_set_bit(IMX2_WDT_STATUS_STARTED, &imx2_wdt.status)) { | |
126 | /* at our first start we enable clock and do initialisations */ | |
4e7b6c9a | 127 | clk_prepare_enable(imx2_wdt.clk); |
bb2fd8a8 WS |
128 | |
129 | imx2_wdt_setup(); | |
130 | } else /* delete the timer that pings the watchdog after close */ | |
131 | del_timer_sync(&imx2_wdt.timer); | |
132 | ||
133 | /* Watchdog is enabled - time to reload the timeout value */ | |
134 | imx2_wdt_ping(); | |
135 | } | |
136 | ||
137 | static void imx2_wdt_stop(void) | |
138 | { | |
139 | /* we don't need a clk_disable, it cannot be disabled once started. | |
140 | * We use a timer to ping the watchdog while /dev/watchdog is closed */ | |
141 | imx2_wdt_timer_ping(0); | |
142 | } | |
143 | ||
144 | static void imx2_wdt_set_timeout(int new_timeout) | |
145 | { | |
146 | u16 val = __raw_readw(imx2_wdt.base + IMX2_WDT_WCR); | |
147 | ||
148 | /* set the new timeout value in the WSR */ | |
149 | val &= ~IMX2_WDT_WCR_WT; | |
150 | val |= WDOG_SEC_TO_COUNT(new_timeout); | |
151 | __raw_writew(val, imx2_wdt.base + IMX2_WDT_WCR); | |
152 | } | |
153 | ||
154 | static int imx2_wdt_open(struct inode *inode, struct file *file) | |
155 | { | |
156 | if (test_and_set_bit(IMX2_WDT_STATUS_OPEN, &imx2_wdt.status)) | |
157 | return -EBUSY; | |
158 | ||
159 | imx2_wdt_start(); | |
160 | return nonseekable_open(inode, file); | |
161 | } | |
162 | ||
163 | static int imx2_wdt_close(struct inode *inode, struct file *file) | |
164 | { | |
165 | if (test_bit(IMX2_WDT_EXPECT_CLOSE, &imx2_wdt.status) && !nowayout) | |
166 | imx2_wdt_stop(); | |
167 | else { | |
168 | dev_crit(imx2_wdt_miscdev.parent, | |
169 | "Unexpected close: Expect reboot!\n"); | |
170 | imx2_wdt_ping(); | |
171 | } | |
172 | ||
173 | clear_bit(IMX2_WDT_EXPECT_CLOSE, &imx2_wdt.status); | |
174 | clear_bit(IMX2_WDT_STATUS_OPEN, &imx2_wdt.status); | |
175 | return 0; | |
176 | } | |
177 | ||
178 | static long imx2_wdt_ioctl(struct file *file, unsigned int cmd, | |
179 | unsigned long arg) | |
180 | { | |
181 | void __user *argp = (void __user *)arg; | |
182 | int __user *p = argp; | |
183 | int new_value; | |
474ef121 | 184 | u16 val; |
bb2fd8a8 WS |
185 | |
186 | switch (cmd) { | |
187 | case WDIOC_GETSUPPORT: | |
188 | return copy_to_user(argp, &imx2_wdt_info, | |
189 | sizeof(struct watchdog_info)) ? -EFAULT : 0; | |
190 | ||
191 | case WDIOC_GETSTATUS: | |
bb2fd8a8 WS |
192 | return put_user(0, p); |
193 | ||
474ef121 OS |
194 | case WDIOC_GETBOOTSTATUS: |
195 | val = __raw_readw(imx2_wdt.base + IMX2_WDT_WRSR); | |
196 | new_value = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0; | |
197 | return put_user(new_value, p); | |
198 | ||
bb2fd8a8 WS |
199 | case WDIOC_KEEPALIVE: |
200 | imx2_wdt_ping(); | |
201 | return 0; | |
202 | ||
203 | case WDIOC_SETTIMEOUT: | |
204 | if (get_user(new_value, p)) | |
205 | return -EFAULT; | |
206 | if ((new_value < 1) || (new_value > IMX2_WDT_MAX_TIME)) | |
207 | return -EINVAL; | |
208 | imx2_wdt_set_timeout(new_value); | |
209 | imx2_wdt.timeout = new_value; | |
210 | imx2_wdt_ping(); | |
211 | ||
212 | /* Fallthrough to return current value */ | |
213 | case WDIOC_GETTIMEOUT: | |
214 | return put_user(imx2_wdt.timeout, p); | |
215 | ||
216 | default: | |
217 | return -ENOTTY; | |
218 | } | |
219 | } | |
220 | ||
221 | static ssize_t imx2_wdt_write(struct file *file, const char __user *data, | |
222 | size_t len, loff_t *ppos) | |
223 | { | |
224 | size_t i; | |
225 | char c; | |
226 | ||
227 | if (len == 0) /* Can we see this even ? */ | |
228 | return 0; | |
229 | ||
230 | clear_bit(IMX2_WDT_EXPECT_CLOSE, &imx2_wdt.status); | |
231 | /* scan to see whether or not we got the magic character */ | |
232 | for (i = 0; i != len; i++) { | |
233 | if (get_user(c, data + i)) | |
234 | return -EFAULT; | |
235 | if (c == 'V') | |
236 | set_bit(IMX2_WDT_EXPECT_CLOSE, &imx2_wdt.status); | |
237 | } | |
238 | ||
239 | imx2_wdt_ping(); | |
240 | return len; | |
241 | } | |
242 | ||
243 | static const struct file_operations imx2_wdt_fops = { | |
244 | .owner = THIS_MODULE, | |
245 | .llseek = no_llseek, | |
246 | .unlocked_ioctl = imx2_wdt_ioctl, | |
247 | .open = imx2_wdt_open, | |
248 | .release = imx2_wdt_close, | |
249 | .write = imx2_wdt_write, | |
250 | }; | |
251 | ||
252 | static struct miscdevice imx2_wdt_miscdev = { | |
253 | .minor = WATCHDOG_MINOR, | |
254 | .name = "watchdog", | |
255 | .fops = &imx2_wdt_fops, | |
256 | }; | |
257 | ||
258 | static int __init imx2_wdt_probe(struct platform_device *pdev) | |
259 | { | |
260 | int ret; | |
bb2fd8a8 WS |
261 | struct resource *res; |
262 | ||
263 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
4c271bb6 TR |
264 | imx2_wdt.base = devm_ioremap_resource(&pdev->dev, res); |
265 | if (IS_ERR(imx2_wdt.base)) | |
266 | return PTR_ERR(imx2_wdt.base); | |
bb2fd8a8 | 267 | |
bdf49574 | 268 | imx2_wdt.clk = devm_clk_get(&pdev->dev, NULL); |
bb2fd8a8 WS |
269 | if (IS_ERR(imx2_wdt.clk)) { |
270 | dev_err(&pdev->dev, "can't get Watchdog clock\n"); | |
271 | return PTR_ERR(imx2_wdt.clk); | |
272 | } | |
273 | ||
274 | imx2_wdt.timeout = clamp_t(unsigned, timeout, 1, IMX2_WDT_MAX_TIME); | |
275 | if (imx2_wdt.timeout != timeout) | |
276 | dev_warn(&pdev->dev, "Initial timeout out of range! " | |
277 | "Clamped from %u to %u\n", timeout, imx2_wdt.timeout); | |
278 | ||
279 | setup_timer(&imx2_wdt.timer, imx2_wdt_timer_ping, 0); | |
280 | ||
281 | imx2_wdt_miscdev.parent = &pdev->dev; | |
282 | ret = misc_register(&imx2_wdt_miscdev); | |
283 | if (ret) | |
284 | goto fail; | |
285 | ||
286 | dev_info(&pdev->dev, | |
287 | "IMX2+ Watchdog Timer enabled. timeout=%ds (nowayout=%d)\n", | |
288 | imx2_wdt.timeout, nowayout); | |
289 | return 0; | |
290 | ||
291 | fail: | |
292 | imx2_wdt_miscdev.parent = NULL; | |
bb2fd8a8 WS |
293 | return ret; |
294 | } | |
295 | ||
296 | static int __exit imx2_wdt_remove(struct platform_device *pdev) | |
297 | { | |
298 | misc_deregister(&imx2_wdt_miscdev); | |
299 | ||
300 | if (test_bit(IMX2_WDT_STATUS_STARTED, &imx2_wdt.status)) { | |
301 | del_timer_sync(&imx2_wdt.timer); | |
302 | ||
303 | dev_crit(imx2_wdt_miscdev.parent, | |
304 | "Device removed: Expect reboot!\n"); | |
bdf49574 | 305 | } |
bb2fd8a8 WS |
306 | |
307 | imx2_wdt_miscdev.parent = NULL; | |
308 | return 0; | |
309 | } | |
310 | ||
311 | static void imx2_wdt_shutdown(struct platform_device *pdev) | |
312 | { | |
313 | if (test_bit(IMX2_WDT_STATUS_STARTED, &imx2_wdt.status)) { | |
314 | /* we are running, we need to delete the timer but will give | |
315 | * max timeout before reboot will take place */ | |
316 | del_timer_sync(&imx2_wdt.timer); | |
317 | imx2_wdt_set_timeout(IMX2_WDT_MAX_TIME); | |
318 | imx2_wdt_ping(); | |
319 | ||
320 | dev_crit(imx2_wdt_miscdev.parent, | |
321 | "Device shutdown: Expect reboot!\n"); | |
322 | } | |
323 | } | |
324 | ||
f5a427ee SG |
325 | static const struct of_device_id imx2_wdt_dt_ids[] = { |
326 | { .compatible = "fsl,imx21-wdt", }, | |
327 | { /* sentinel */ } | |
328 | }; | |
813296a1 | 329 | MODULE_DEVICE_TABLE(of, imx2_wdt_dt_ids); |
f5a427ee | 330 | |
bb2fd8a8 | 331 | static struct platform_driver imx2_wdt_driver = { |
bb2fd8a8 WS |
332 | .remove = __exit_p(imx2_wdt_remove), |
333 | .shutdown = imx2_wdt_shutdown, | |
334 | .driver = { | |
335 | .name = DRIVER_NAME, | |
336 | .owner = THIS_MODULE, | |
f5a427ee | 337 | .of_match_table = imx2_wdt_dt_ids, |
bb2fd8a8 WS |
338 | }, |
339 | }; | |
340 | ||
1cb9204c | 341 | module_platform_driver_probe(imx2_wdt_driver, imx2_wdt_probe); |
bb2fd8a8 WS |
342 | |
343 | MODULE_AUTHOR("Wolfram Sang"); | |
344 | MODULE_DESCRIPTION("Watchdog driver for IMX2 and later"); | |
345 | MODULE_LICENSE("GPL v2"); | |
bb2fd8a8 | 346 | MODULE_ALIAS("platform:" DRIVER_NAME); |