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c942fddf 1// SPDX-License-Identifier: GPL-2.0-or-later
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2/*
3 * Watchdog Timer Driver
4 * for ITE IT87xx Environment Control - Low Pin Count Input / Output
5 *
6 * (c) Copyright 2007 Oliver Schuster <olivers137@aol.com>
7 *
8 * Based on softdog.c by Alan Cox,
9 * 83977f_wdt.c by Jose Goncalves,
10 * it87.c by Chris Gauthron, Jean Delvare
11 *
12 * Data-sheets: Publicly available at the ITE website
13 * http://www.ite.com.tw/
14 *
15 * Support of the watchdog timers, which are available on
cddda07c
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16 * IT8607, IT8620, IT8622, IT8625, IT8628, IT8655, IT8665, IT8686,
17 * IT8702, IT8712, IT8716, IT8718, IT8720, IT8721, IT8726, IT8728,
18 * and IT8783.
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19 */
20
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21#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22
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23#include <linux/init.h>
24#include <linux/io.h>
25#include <linux/kernel.h>
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26#include <linux/module.h>
27#include <linux/moduleparam.h>
28#include <linux/types.h>
e1fee94f 29#include <linux/watchdog.h>
e1fee94f 30
e1fee94f 31#define WATCHDOG_NAME "IT87 WDT"
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32
33/* Defaults for Module Parameter */
5f3b2756 34#define DEFAULT_TIMEOUT 60
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35#define DEFAULT_TESTMODE 0
36#define DEFAULT_NOWAYOUT WATCHDOG_NOWAYOUT
37
38/* IO Ports */
39#define REG 0x2e
40#define VAL 0x2f
41
42/* Logical device Numbers LDN */
43#define GPIO 0x07
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44
45/* Configuration Registers and Functions */
46#define LDNREG 0x07
47#define CHIPID 0x20
5f3b2756 48#define CHIPREV 0x22
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49
50/* Chip Id numbers */
51#define NO_DEV_ID 0xffff
cddda07c 52#define IT8607_ID 0x8607
06716128 53#define IT8620_ID 0x8620
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54#define IT8622_ID 0x8622
55#define IT8625_ID 0x8625
56#define IT8628_ID 0x8628
57#define IT8655_ID 0x8655
58#define IT8665_ID 0x8665
59#define IT8686_ID 0x8686
dfb0b8ea 60#define IT8702_ID 0x8702
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61#define IT8705_ID 0x8705
62#define IT8712_ID 0x8712
63#define IT8716_ID 0x8716
64#define IT8718_ID 0x8718
ee3e9658 65#define IT8720_ID 0x8720
4bc30272 66#define IT8721_ID 0x8721
e1fee94f 67#define IT8726_ID 0x8726 /* the data sheet suggest wrongly 0x8716 */
198ca015 68#define IT8728_ID 0x8728
f83918fb 69#define IT8783_ID 0x8783
6ae58eec 70#define IT8786_ID 0x8786
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71
72/* GPIO Configuration Registers LDN=0x07 */
5f3b2756 73#define WDTCTRL 0x71
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74#define WDTCFG 0x72
75#define WDTVALLSB 0x73
76#define WDTVALMSB 0x74
77
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78/* GPIO Bits WDTCFG */
79#define WDT_TOV1 0x80
80#define WDT_KRST 0x40
81#define WDT_TOVE 0x20
4bc30272 82#define WDT_PWROK 0x10 /* not in it8721 */
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83#define WDT_INT_MASK 0x0f
84
893dc8b5 85static unsigned int max_units, chip_type;
e1fee94f 86
1d7b8039 87static unsigned int timeout = DEFAULT_TIMEOUT;
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88static int testmode = DEFAULT_TESTMODE;
89static bool nowayout = DEFAULT_NOWAYOUT;
90
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91module_param(timeout, int, 0);
92MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds, default="
93 __MODULE_STRING(DEFAULT_TIMEOUT));
94module_param(testmode, int, 0);
95MODULE_PARM_DESC(testmode, "Watchdog test mode (1 = no reboot), default="
96 __MODULE_STRING(DEFAULT_TESTMODE));
86a1e189 97module_param(nowayout, bool, 0);
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98MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started, default="
99 __MODULE_STRING(WATCHDOG_NOWAYOUT));
100
101/* Superio Chip */
102
a134b825 103static inline int superio_enter(void)
e1fee94f 104{
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105 /*
106 * Try to reserve REG and REG + 1 for exclusive access.
107 */
108 if (!request_muxed_region(REG, 2, WATCHDOG_NAME))
109 return -EBUSY;
110
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111 outb(0x87, REG);
112 outb(0x01, REG);
113 outb(0x55, REG);
114 outb(0x55, REG);
a134b825 115 return 0;
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116}
117
118static inline void superio_exit(void)
119{
120 outb(0x02, REG);
121 outb(0x02, VAL);
a134b825 122 release_region(REG, 2);
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123}
124
125static inline void superio_select(int ldn)
126{
127 outb(LDNREG, REG);
128 outb(ldn, VAL);
129}
130
131static inline int superio_inb(int reg)
132{
133 outb(reg, REG);
134 return inb(VAL);
135}
136
137static inline void superio_outb(int val, int reg)
138{
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139 outb(reg, REG);
140 outb(val, VAL);
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141}
142
143static inline int superio_inw(int reg)
144{
145 int val;
146 outb(reg++, REG);
147 val = inb(VAL) << 8;
148 outb(reg, REG);
149 val |= inb(VAL);
150 return val;
151}
152
153static inline void superio_outw(int val, int reg)
154{
143a2e54
WVS
155 outb(reg++, REG);
156 outb(val >> 8, VAL);
157 outb(reg, REG);
158 outb(val, VAL);
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159}
160
dfb0b8ea 161/* Internal function, should be called after superio_select(GPIO) */
893dc8b5 162static void _wdt_update_timeout(unsigned int t)
dfb0b8ea 163{
4bc30272 164 unsigned char cfg = WDT_KRST;
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165
166 if (testmode)
167 cfg = 0;
168
893dc8b5 169 if (t <= max_units)
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170 cfg |= WDT_TOV1;
171 else
893dc8b5 172 t /= 60;
dfb0b8ea 173
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174 if (chip_type != IT8721_ID)
175 cfg |= WDT_PWROK;
176
dfb0b8ea 177 superio_outb(cfg, WDTCFG);
893dc8b5 178 superio_outb(t, WDTVALLSB);
dfb0b8ea 179 if (max_units > 255)
893dc8b5 180 superio_outb(t >> 8, WDTVALMSB);
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181}
182
893dc8b5 183static int wdt_update_timeout(unsigned int t)
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184{
185 int ret;
186
187 ret = superio_enter();
188 if (ret)
189 return ret;
190
191 superio_select(GPIO);
893dc8b5 192 _wdt_update_timeout(t);
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193 superio_exit();
194
195 return 0;
196}
197
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198static int wdt_round_time(int t)
199{
200 t += 59;
201 t -= t % 60;
202 return t;
203}
204
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205/* watchdog timer handling */
206
1d7b8039 207static int wdt_start(struct watchdog_device *wdd)
e1fee94f 208{
893dc8b5 209 return wdt_update_timeout(wdd->timeout);
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210}
211
1d7b8039 212static int wdt_stop(struct watchdog_device *wdd)
e1fee94f 213{
893dc8b5 214 return wdt_update_timeout(0);
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215}
216
217/**
218 * wdt_set_timeout - set a new timeout value with watchdog ioctl
219 * @t: timeout value in seconds
220 *
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221 * The hardware device has a 8 or 16 bit watchdog timer (depends on
222 * chip version) that can be configured to count seconds or minutes.
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223 *
224 * Used within WDIOC_SETTIMEOUT watchdog device ioctl.
225 */
226
1d7b8039 227static int wdt_set_timeout(struct watchdog_device *wdd, unsigned int t)
e1fee94f 228{
1d7b8039 229 int ret = 0;
e1fee94f 230
dfb0b8ea 231 if (t > max_units)
1d7b8039 232 t = wdt_round_time(t);
e1fee94f 233
1d7b8039 234 wdd->timeout = t;
e1fee94f 235
1d7b8039 236 if (watchdog_hw_running(wdd))
893dc8b5 237 ret = wdt_update_timeout(t);
e1fee94f 238
1d7b8039 239 return ret;
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240}
241
42747d71 242static const struct watchdog_info ident = {
e1fee94f 243 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
1d7b8039 244 .firmware_version = 1,
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245 .identity = WATCHDOG_NAME,
246};
247
2211a8dc 248static const struct watchdog_ops wdt_ops = {
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249 .owner = THIS_MODULE,
250 .start = wdt_start,
251 .stop = wdt_stop,
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252 .set_timeout = wdt_set_timeout,
253};
e1fee94f 254
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255static struct watchdog_device wdt_dev = {
256 .info = &ident,
257 .ops = &wdt_ops,
258 .min_timeout = 1,
259};
e1fee94f 260
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261static int __init it87_wdt_init(void)
262{
e1fee94f 263 u8 chip_rev;
893dc8b5 264 int rc;
dfb0b8ea 265
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266 rc = superio_enter();
267 if (rc)
268 return rc;
269
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270 chip_type = superio_inw(CHIPID);
271 chip_rev = superio_inb(CHIPREV) & 0x0f;
272 superio_exit();
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273
274 switch (chip_type) {
dfb0b8ea
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275 case IT8702_ID:
276 max_units = 255;
277 break;
278 case IT8712_ID:
279 max_units = (chip_rev < 8) ? 255 : 65535;
280 break;
e1fee94f 281 case IT8716_ID:
e1fee94f 282 case IT8726_ID:
dfb0b8ea 283 max_units = 65535;
e1fee94f 284 break;
cddda07c 285 case IT8607_ID:
06716128 286 case IT8620_ID:
cddda07c
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287 case IT8622_ID:
288 case IT8625_ID:
289 case IT8628_ID:
290 case IT8655_ID:
291 case IT8665_ID:
292 case IT8686_ID:
ee3e9658
OZ
293 case IT8718_ID:
294 case IT8720_ID:
4bc30272 295 case IT8721_ID:
198ca015 296 case IT8728_ID:
f83918fb 297 case IT8783_ID:
6ae58eec 298 case IT8786_ID:
dfb0b8ea 299 max_units = 65535;
ee3e9658 300 break;
e1fee94f 301 case IT8705_ID:
27c766aa 302 pr_err("Unsupported Chip found, Chip %04x Revision %02x\n",
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303 chip_type, chip_rev);
304 return -ENODEV;
305 case NO_DEV_ID:
27c766aa 306 pr_err("no device\n");
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307 return -ENODEV;
308 default:
27c766aa 309 pr_err("Unknown Chip found, Chip %04x Revision %04x\n",
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310 chip_type, chip_rev);
311 return -ENODEV;
312 }
313
a134b825
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314 rc = superio_enter();
315 if (rc)
316 return rc;
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317
318 superio_select(GPIO);
319 superio_outb(WDT_TOV1, WDTCFG);
320 superio_outb(0x00, WDTCTRL);
893dc8b5 321 superio_exit();
e1fee94f 322
dfb0b8ea 323 if (timeout < 1 || timeout > max_units * 60) {
e1fee94f 324 timeout = DEFAULT_TIMEOUT;
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325 pr_warn("Timeout value out of range, use default %d sec\n",
326 DEFAULT_TIMEOUT);
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327 }
328
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329 if (timeout > max_units)
330 timeout = wdt_round_time(timeout);
331
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332 wdt_dev.timeout = timeout;
333 wdt_dev.max_timeout = max_units * 60;
334
1123c514 335 watchdog_stop_on_reboot(&wdt_dev);
1d7b8039
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336 rc = watchdog_register_device(&wdt_dev);
337 if (rc) {
338 pr_err("Cannot register watchdog device (err=%d)\n", rc);
1123c514 339 return rc;
1d7b8039
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340 }
341
893dc8b5
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342 pr_info("Chip IT%04x revision %d initialized. timeout=%d sec (nowayout=%d testmode=%d)\n",
343 chip_type, chip_rev, timeout, nowayout, testmode);
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344
345 return 0;
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346}
347
348static void __exit it87_wdt_exit(void)
349{
1d7b8039 350 watchdog_unregister_device(&wdt_dev);
e1fee94f
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351}
352
353module_init(it87_wdt_init);
354module_exit(it87_wdt_exit);
355
356MODULE_AUTHOR("Oliver Schuster");
357MODULE_DESCRIPTION("Hardware Watchdog Device Driver for IT87xx EC-LPC I/O");
358MODULE_LICENSE("GPL");