]>
Commit | Line | Data |
---|---|---|
e14538e0 JJ |
1 | /* |
2 | * MOXA ART SoCs watchdog driver. | |
3 | * | |
4 | * Copyright (C) 2013 Jonas Jensen | |
5 | * | |
6 | * Jonas Jensen <jonas.jensen@gmail.com> | |
7 | * | |
8 | * This file is licensed under the terms of the GNU General Public | |
9 | * License version 2. This program is licensed "as is" without any | |
10 | * warranty of any kind, whether express or implied. | |
11 | */ | |
12 | ||
13 | #include <linux/clk.h> | |
14 | #include <linux/io.h> | |
15 | #include <linux/module.h> | |
ac316725 | 16 | #include <linux/mod_devicetable.h> |
e14538e0 JJ |
17 | #include <linux/err.h> |
18 | #include <linux/kernel.h> | |
19 | #include <linux/platform_device.h> | |
20 | #include <linux/watchdog.h> | |
21 | #include <linux/moduleparam.h> | |
22 | ||
23 | #define REG_COUNT 0x4 | |
24 | #define REG_MODE 0x8 | |
25 | #define REG_ENABLE 0xC | |
26 | ||
27 | struct moxart_wdt_dev { | |
28 | struct watchdog_device dev; | |
29 | void __iomem *base; | |
30 | unsigned int clock_frequency; | |
31 | }; | |
32 | ||
33 | static int heartbeat; | |
34 | ||
4d8b229d GR |
35 | static int moxart_wdt_restart(struct watchdog_device *wdt_dev, |
36 | unsigned long action, void *data) | |
8773926d | 37 | { |
46c17f0f DR |
38 | struct moxart_wdt_dev *moxart_wdt = watchdog_get_drvdata(wdt_dev); |
39 | ||
ad0e0e68 GR |
40 | writel(1, moxart_wdt->base + REG_COUNT); |
41 | writel(0x5ab9, moxart_wdt->base + REG_MODE); | |
42 | writel(0x03, moxart_wdt->base + REG_ENABLE); | |
43 | ||
46c17f0f | 44 | return 0; |
8773926d JJ |
45 | } |
46 | ||
e14538e0 JJ |
47 | static int moxart_wdt_stop(struct watchdog_device *wdt_dev) |
48 | { | |
49 | struct moxart_wdt_dev *moxart_wdt = watchdog_get_drvdata(wdt_dev); | |
50 | ||
51 | writel(0, moxart_wdt->base + REG_ENABLE); | |
52 | ||
53 | return 0; | |
54 | } | |
55 | ||
56 | static int moxart_wdt_start(struct watchdog_device *wdt_dev) | |
57 | { | |
58 | struct moxart_wdt_dev *moxart_wdt = watchdog_get_drvdata(wdt_dev); | |
59 | ||
60 | writel(moxart_wdt->clock_frequency * wdt_dev->timeout, | |
61 | moxart_wdt->base + REG_COUNT); | |
62 | writel(0x5ab9, moxart_wdt->base + REG_MODE); | |
63 | writel(0x03, moxart_wdt->base + REG_ENABLE); | |
64 | ||
65 | return 0; | |
66 | } | |
67 | ||
68 | static int moxart_wdt_set_timeout(struct watchdog_device *wdt_dev, | |
69 | unsigned int timeout) | |
70 | { | |
71 | wdt_dev->timeout = timeout; | |
72 | ||
73 | return 0; | |
74 | } | |
75 | ||
76 | static const struct watchdog_info moxart_wdt_info = { | |
77 | .identity = "moxart-wdt", | |
78 | .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | | |
79 | WDIOF_MAGICCLOSE, | |
80 | }; | |
81 | ||
82 | static const struct watchdog_ops moxart_wdt_ops = { | |
83 | .owner = THIS_MODULE, | |
84 | .start = moxart_wdt_start, | |
85 | .stop = moxart_wdt_stop, | |
86 | .set_timeout = moxart_wdt_set_timeout, | |
46c17f0f | 87 | .restart = moxart_wdt_restart, |
e14538e0 JJ |
88 | }; |
89 | ||
90 | static int moxart_wdt_probe(struct platform_device *pdev) | |
91 | { | |
92 | struct moxart_wdt_dev *moxart_wdt; | |
93 | struct device *dev = &pdev->dev; | |
e14538e0 JJ |
94 | struct clk *clk; |
95 | int err; | |
96 | unsigned int max_timeout; | |
97 | bool nowayout = WATCHDOG_NOWAYOUT; | |
98 | ||
99 | moxart_wdt = devm_kzalloc(dev, sizeof(*moxart_wdt), GFP_KERNEL); | |
100 | if (!moxart_wdt) | |
101 | return -ENOMEM; | |
102 | ||
103 | platform_set_drvdata(pdev, moxart_wdt); | |
104 | ||
0f0a6a28 | 105 | moxart_wdt->base = devm_platform_ioremap_resource(pdev, 0); |
e14538e0 JJ |
106 | if (IS_ERR(moxart_wdt->base)) |
107 | return PTR_ERR(moxart_wdt->base); | |
108 | ||
615e40ad | 109 | clk = devm_clk_get(dev, NULL); |
e14538e0 JJ |
110 | if (IS_ERR(clk)) { |
111 | pr_err("%s: of_clk_get failed\n", __func__); | |
112 | return PTR_ERR(clk); | |
113 | } | |
114 | ||
115 | moxart_wdt->clock_frequency = clk_get_rate(clk); | |
116 | if (moxart_wdt->clock_frequency == 0) { | |
117 | pr_err("%s: incorrect clock frequency\n", __func__); | |
118 | return -EINVAL; | |
119 | } | |
120 | ||
121 | max_timeout = UINT_MAX / moxart_wdt->clock_frequency; | |
122 | ||
123 | moxart_wdt->dev.info = &moxart_wdt_info; | |
124 | moxart_wdt->dev.ops = &moxart_wdt_ops; | |
125 | moxart_wdt->dev.timeout = max_timeout; | |
126 | moxart_wdt->dev.min_timeout = 1; | |
127 | moxart_wdt->dev.max_timeout = max_timeout; | |
128 | moxart_wdt->dev.parent = dev; | |
129 | ||
130 | watchdog_init_timeout(&moxart_wdt->dev, heartbeat, dev); | |
131 | watchdog_set_nowayout(&moxart_wdt->dev, nowayout); | |
46c17f0f | 132 | watchdog_set_restart_priority(&moxart_wdt->dev, 128); |
e14538e0 JJ |
133 | |
134 | watchdog_set_drvdata(&moxart_wdt->dev, moxart_wdt); | |
135 | ||
615e40ad GR |
136 | watchdog_stop_on_unregister(&moxart_wdt->dev); |
137 | err = devm_watchdog_register_device(dev, &moxart_wdt->dev); | |
e14538e0 JJ |
138 | if (err) |
139 | return err; | |
140 | ||
141 | dev_dbg(dev, "Watchdog enabled (heartbeat=%d sec, nowayout=%d)\n", | |
142 | moxart_wdt->dev.timeout, nowayout); | |
143 | ||
144 | return 0; | |
145 | } | |
146 | ||
e14538e0 JJ |
147 | static const struct of_device_id moxart_watchdog_match[] = { |
148 | { .compatible = "moxa,moxart-watchdog" }, | |
149 | { }, | |
150 | }; | |
c73318f4 | 151 | MODULE_DEVICE_TABLE(of, moxart_watchdog_match); |
e14538e0 JJ |
152 | |
153 | static struct platform_driver moxart_wdt_driver = { | |
154 | .probe = moxart_wdt_probe, | |
e14538e0 JJ |
155 | .driver = { |
156 | .name = "moxart-watchdog", | |
e14538e0 JJ |
157 | .of_match_table = moxart_watchdog_match, |
158 | }, | |
159 | }; | |
160 | module_platform_driver(moxart_wdt_driver); | |
161 | ||
162 | module_param(heartbeat, int, 0); | |
163 | MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds"); | |
164 | ||
165 | MODULE_DESCRIPTION("MOXART watchdog driver"); | |
166 | MODULE_LICENSE("GPL"); | |
167 | MODULE_AUTHOR("Jonas Jensen <jonas.jensen@gmail.com>"); |