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3be10211 JC |
1 | /* |
2 | * mv64x60_wdt.c - MV64X60 (Marvell Discovery) watchdog userspace interface | |
3 | * | |
4 | * Author: James Chapman <jchapman@katalix.com> | |
5 | * | |
6 | * Platform-specific setup code should configure the dog to generate | |
7 | * interrupt or reset as required. This code only enables/disables | |
8 | * and services the watchdog. | |
9 | * | |
10 | * Derived from mpc8xx_wdt.c, with the following copyright. | |
a86b8498 | 11 | * |
3be10211 JC |
12 | * 2002 (c) Florian Schirmer <jolt@tuxbox.org> This file is licensed under |
13 | * the terms of the GNU General Public License version 2. This program | |
14 | * is licensed "as is" without any warranty of any kind, whether express | |
15 | * or implied. | |
16 | */ | |
17 | ||
27c766aa JP |
18 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
19 | ||
3be10211 JC |
20 | #include <linux/fs.h> |
21 | #include <linux/init.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/miscdevice.h> | |
24 | #include <linux/module.h> | |
25 | #include <linux/watchdog.h> | |
d052d1be | 26 | #include <linux/platform_device.h> |
7e07a159 | 27 | #include <linux/mv643xx.h> |
a86b8498 AC |
28 | #include <linux/uaccess.h> |
29 | #include <linux/io.h> | |
3be10211 | 30 | |
8a5cfa64 DF |
31 | #define MV64x60_WDT_WDC_OFFSET 0 |
32 | ||
f1869994 DF |
33 | /* |
34 | * The watchdog configuration register contains a pair of 2-bit fields, | |
35 | * 1. a reload field, bits 27-26, which triggers a reload of | |
36 | * the countdown register, and | |
37 | * 2. an enable field, bits 25-24, which toggles between | |
38 | * enabling and disabling the watchdog timer. | |
39 | * Bit 31 is a read-only field which indicates whether the | |
40 | * watchdog timer is currently enabled. | |
41 | * | |
42 | * The low 24 bits contain the timer reload value. | |
43 | */ | |
44 | #define MV64x60_WDC_ENABLE_SHIFT 24 | |
45 | #define MV64x60_WDC_SERVICE_SHIFT 26 | |
46 | #define MV64x60_WDC_ENABLED_SHIFT 31 | |
47 | ||
48 | #define MV64x60_WDC_ENABLED_TRUE 1 | |
49 | #define MV64x60_WDC_ENABLED_FALSE 0 | |
3be10211 JC |
50 | |
51 | /* Flags bits */ | |
52 | #define MV64x60_WDOG_FLAG_OPENED 0 | |
3be10211 JC |
53 | |
54 | static unsigned long wdt_flags; | |
55 | static int wdt_status; | |
8a5cfa64 | 56 | static void __iomem *mv64x60_wdt_regs; |
3be10211 | 57 | static int mv64x60_wdt_timeout; |
f1869994 | 58 | static int mv64x60_wdt_count; |
94796f90 | 59 | static unsigned int bus_clk; |
bf2fc92c | 60 | static char expect_close; |
f1869994 | 61 | static DEFINE_SPINLOCK(mv64x60_wdt_spinlock); |
3be10211 | 62 | |
86a1e189 WVS |
63 | static bool nowayout = WATCHDOG_NOWAYOUT; |
64 | module_param(nowayout, bool, 0); | |
a86b8498 AC |
65 | MODULE_PARM_DESC(nowayout, |
66 | "Watchdog cannot be stopped once started (default=" | |
67 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
d37a5c3d | 68 | |
f1869994 | 69 | static int mv64x60_wdt_toggle_wdc(int enabled_predicate, int field_shift) |
3be10211 | 70 | { |
f1869994 DF |
71 | u32 data; |
72 | u32 enabled; | |
73 | int ret = 0; | |
74 | ||
75 | spin_lock(&mv64x60_wdt_spinlock); | |
76 | data = readl(mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET); | |
77 | enabled = (data >> MV64x60_WDC_ENABLED_SHIFT) & 1; | |
78 | ||
79 | /* only toggle the requested field if enabled state matches predicate */ | |
80 | if ((enabled ^ enabled_predicate) == 0) { | |
81 | /* We write a 1, then a 2 -- to the appropriate field */ | |
82 | data = (1 << field_shift) | mv64x60_wdt_count; | |
83 | writel(data, mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET); | |
84 | ||
85 | data = (2 << field_shift) | mv64x60_wdt_count; | |
86 | writel(data, mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET); | |
87 | ret = 1; | |
88 | } | |
89 | spin_unlock(&mv64x60_wdt_spinlock); | |
90 | ||
91 | return ret; | |
3be10211 JC |
92 | } |
93 | ||
94 | static void mv64x60_wdt_service(void) | |
95 | { | |
f1869994 DF |
96 | mv64x60_wdt_toggle_wdc(MV64x60_WDC_ENABLED_TRUE, |
97 | MV64x60_WDC_SERVICE_SHIFT); | |
3be10211 JC |
98 | } |
99 | ||
f1869994 | 100 | static void mv64x60_wdt_handler_enable(void) |
3be10211 | 101 | { |
f1869994 DF |
102 | if (mv64x60_wdt_toggle_wdc(MV64x60_WDC_ENABLED_FALSE, |
103 | MV64x60_WDC_ENABLE_SHIFT)) { | |
104 | mv64x60_wdt_service(); | |
27c766aa | 105 | pr_notice("watchdog activated\n"); |
3be10211 JC |
106 | } |
107 | } | |
108 | ||
f1869994 | 109 | static void mv64x60_wdt_handler_disable(void) |
3be10211 | 110 | { |
f1869994 DF |
111 | if (mv64x60_wdt_toggle_wdc(MV64x60_WDC_ENABLED_TRUE, |
112 | MV64x60_WDC_ENABLE_SHIFT)) | |
27c766aa | 113 | pr_notice("watchdog deactivated\n"); |
3be10211 JC |
114 | } |
115 | ||
f1869994 | 116 | static void mv64x60_wdt_set_timeout(unsigned int timeout) |
94796f90 DF |
117 | { |
118 | /* maximum bus cycle count is 0xFFFFFFFF */ | |
119 | if (timeout > 0xFFFFFFFF / bus_clk) | |
120 | timeout = 0xFFFFFFFF / bus_clk; | |
121 | ||
f1869994 | 122 | mv64x60_wdt_count = timeout * bus_clk >> 8; |
94796f90 | 123 | mv64x60_wdt_timeout = timeout; |
94796f90 DF |
124 | } |
125 | ||
3be10211 JC |
126 | static int mv64x60_wdt_open(struct inode *inode, struct file *file) |
127 | { | |
128 | if (test_and_set_bit(MV64x60_WDOG_FLAG_OPENED, &wdt_flags)) | |
129 | return -EBUSY; | |
130 | ||
d37a5c3d DF |
131 | if (nowayout) |
132 | __module_get(THIS_MODULE); | |
133 | ||
3be10211 JC |
134 | mv64x60_wdt_handler_enable(); |
135 | ||
861e5137 | 136 | return nonseekable_open(inode, file); |
3be10211 JC |
137 | } |
138 | ||
139 | static int mv64x60_wdt_release(struct inode *inode, struct file *file) | |
140 | { | |
bf2fc92c | 141 | if (expect_close == 42) |
d37a5c3d | 142 | mv64x60_wdt_handler_disable(); |
bf2fc92c | 143 | else { |
27c766aa | 144 | pr_crit("unexpected close, not stopping timer!\n"); |
bf2fc92c DF |
145 | mv64x60_wdt_service(); |
146 | } | |
147 | expect_close = 0; | |
3be10211 JC |
148 | |
149 | clear_bit(MV64x60_WDOG_FLAG_OPENED, &wdt_flags); | |
150 | ||
151 | return 0; | |
152 | } | |
153 | ||
b2846dfa | 154 | static ssize_t mv64x60_wdt_write(struct file *file, const char __user *data, |
a86b8498 | 155 | size_t len, loff_t *ppos) |
3be10211 | 156 | { |
bf2fc92c DF |
157 | if (len) { |
158 | if (!nowayout) { | |
159 | size_t i; | |
160 | ||
161 | expect_close = 0; | |
162 | ||
163 | for (i = 0; i != len; i++) { | |
164 | char c; | |
a86b8498 | 165 | if (get_user(c, data + i)) |
bf2fc92c DF |
166 | return -EFAULT; |
167 | if (c == 'V') | |
168 | expect_close = 42; | |
169 | } | |
170 | } | |
3be10211 | 171 | mv64x60_wdt_service(); |
bf2fc92c | 172 | } |
3be10211 JC |
173 | |
174 | return len; | |
175 | } | |
176 | ||
a86b8498 AC |
177 | static long mv64x60_wdt_ioctl(struct file *file, |
178 | unsigned int cmd, unsigned long arg) | |
3be10211 | 179 | { |
94796f90 | 180 | int timeout; |
85d57238 | 181 | int options; |
b2846dfa | 182 | void __user *argp = (void __user *)arg; |
42747d71 | 183 | static const struct watchdog_info info = { |
94796f90 | 184 | .options = WDIOF_SETTIMEOUT | |
bf2fc92c | 185 | WDIOF_MAGICCLOSE | |
94796f90 | 186 | WDIOF_KEEPALIVEPING, |
3be10211 JC |
187 | .firmware_version = 0, |
188 | .identity = "MV64x60 watchdog", | |
189 | }; | |
190 | ||
191 | switch (cmd) { | |
192 | case WDIOC_GETSUPPORT: | |
b2846dfa | 193 | if (copy_to_user(argp, &info, sizeof(info))) |
3be10211 JC |
194 | return -EFAULT; |
195 | break; | |
196 | ||
197 | case WDIOC_GETSTATUS: | |
198 | case WDIOC_GETBOOTSTATUS: | |
b2846dfa | 199 | if (put_user(wdt_status, (int __user *)argp)) |
3be10211 JC |
200 | return -EFAULT; |
201 | wdt_status &= ~WDIOF_KEEPALIVEPING; | |
202 | break; | |
203 | ||
204 | case WDIOC_GETTEMP: | |
205 | return -EOPNOTSUPP; | |
206 | ||
207 | case WDIOC_SETOPTIONS: | |
85d57238 DF |
208 | if (get_user(options, (int __user *)argp)) |
209 | return -EFAULT; | |
210 | ||
211 | if (options & WDIOS_DISABLECARD) | |
212 | mv64x60_wdt_handler_disable(); | |
213 | ||
214 | if (options & WDIOS_ENABLECARD) | |
215 | mv64x60_wdt_handler_enable(); | |
216 | break; | |
3be10211 JC |
217 | |
218 | case WDIOC_KEEPALIVE: | |
219 | mv64x60_wdt_service(); | |
220 | wdt_status |= WDIOF_KEEPALIVEPING; | |
221 | break; | |
222 | ||
223 | case WDIOC_SETTIMEOUT: | |
94796f90 DF |
224 | if (get_user(timeout, (int __user *)argp)) |
225 | return -EFAULT; | |
226 | mv64x60_wdt_set_timeout(timeout); | |
227 | /* Fall through */ | |
3be10211 JC |
228 | |
229 | case WDIOC_GETTIMEOUT: | |
264f0991 | 230 | if (put_user(mv64x60_wdt_timeout, (int __user *)argp)) |
3be10211 JC |
231 | return -EFAULT; |
232 | break; | |
233 | ||
234 | default: | |
795b89d2 | 235 | return -ENOTTY; |
3be10211 JC |
236 | } |
237 | ||
238 | return 0; | |
239 | } | |
240 | ||
62322d25 | 241 | static const struct file_operations mv64x60_wdt_fops = { |
3be10211 JC |
242 | .owner = THIS_MODULE, |
243 | .llseek = no_llseek, | |
244 | .write = mv64x60_wdt_write, | |
a86b8498 | 245 | .unlocked_ioctl = mv64x60_wdt_ioctl, |
3be10211 JC |
246 | .open = mv64x60_wdt_open, |
247 | .release = mv64x60_wdt_release, | |
248 | }; | |
249 | ||
250 | static struct miscdevice mv64x60_wdt_miscdev = { | |
251 | .minor = WATCHDOG_MINOR, | |
252 | .name = "watchdog", | |
253 | .fops = &mv64x60_wdt_fops, | |
254 | }; | |
255 | ||
3ae5eaec | 256 | static int __devinit mv64x60_wdt_probe(struct platform_device *dev) |
3be10211 | 257 | { |
3ae5eaec | 258 | struct mv64x60_wdt_pdata *pdata = dev->dev.platform_data; |
8a5cfa64 | 259 | struct resource *r; |
94796f90 | 260 | int timeout = 10; |
3be10211 | 261 | |
94796f90 | 262 | bus_clk = 133; /* in MHz */ |
3be10211 | 263 | if (pdata) { |
94796f90 | 264 | timeout = pdata->timeout; |
3be10211 JC |
265 | bus_clk = pdata->bus_clk; |
266 | } | |
267 | ||
94796f90 DF |
268 | /* Since bus_clk is truncated MHz, actual frequency could be |
269 | * up to 1MHz higher. Round up, since it's better to time out | |
270 | * too late than too soon. | |
271 | */ | |
272 | bus_clk++; | |
273 | bus_clk *= 1000000; /* convert to Hz */ | |
274 | ||
8a5cfa64 DF |
275 | r = platform_get_resource(dev, IORESOURCE_MEM, 0); |
276 | if (!r) | |
277 | return -ENODEV; | |
278 | ||
b782a563 | 279 | mv64x60_wdt_regs = ioremap(r->start, resource_size(r)); |
8a5cfa64 DF |
280 | if (mv64x60_wdt_regs == NULL) |
281 | return -ENOMEM; | |
3be10211 | 282 | |
94796f90 | 283 | mv64x60_wdt_set_timeout(timeout); |
3be10211 | 284 | |
2422df5e DF |
285 | mv64x60_wdt_handler_disable(); /* in case timer was already running */ |
286 | ||
3be10211 JC |
287 | return misc_register(&mv64x60_wdt_miscdev); |
288 | } | |
289 | ||
3ae5eaec | 290 | static int __devexit mv64x60_wdt_remove(struct platform_device *dev) |
3be10211 JC |
291 | { |
292 | misc_deregister(&mv64x60_wdt_miscdev); | |
293 | ||
3be10211 JC |
294 | mv64x60_wdt_handler_disable(); |
295 | ||
8a5cfa64 DF |
296 | iounmap(mv64x60_wdt_regs); |
297 | ||
3be10211 JC |
298 | return 0; |
299 | } | |
300 | ||
3ae5eaec | 301 | static struct platform_driver mv64x60_wdt_driver = { |
3be10211 JC |
302 | .probe = mv64x60_wdt_probe, |
303 | .remove = __devexit_p(mv64x60_wdt_remove), | |
3ae5eaec RK |
304 | .driver = { |
305 | .owner = THIS_MODULE, | |
306 | .name = MV64x60_WDT_NAME, | |
307 | }, | |
3be10211 JC |
308 | }; |
309 | ||
3be10211 JC |
310 | static int __init mv64x60_wdt_init(void) |
311 | { | |
27c766aa | 312 | pr_info("MV64x60 watchdog driver\n"); |
3be10211 | 313 | |
422db8d2 | 314 | return platform_driver_register(&mv64x60_wdt_driver); |
3be10211 JC |
315 | } |
316 | ||
317 | static void __exit mv64x60_wdt_exit(void) | |
318 | { | |
3ae5eaec | 319 | platform_driver_unregister(&mv64x60_wdt_driver); |
3be10211 JC |
320 | } |
321 | ||
322 | module_init(mv64x60_wdt_init); | |
323 | module_exit(mv64x60_wdt_exit); | |
324 | ||
325 | MODULE_AUTHOR("James Chapman <jchapman@katalix.com>"); | |
326 | MODULE_DESCRIPTION("MV64x60 watchdog driver"); | |
327 | MODULE_LICENSE("GPL"); | |
328 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); | |
f37d193c | 329 | MODULE_ALIAS("platform:" MV64x60_WDT_NAME); |