[mirror_ubuntu-artful-kernel.git] / drivers / watchdog / orion_wdt.c

/*
 * drivers/watchdog/orion_wdt.c
 *
 * Watchdog driver for Orion/Kirkwood processors
 *
 * Author: Sylver Bruneau <sylver.bruneau@googlemail.com>
 *
 * This file is licensed under  the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/watchdog.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/of.h>
#include <linux/of_device.h>

/* RSTOUT mask register physical address for Orion5x, Kirkwood and Dove */
#define ORION_RSTOUT_MASK_OFFSET	0x20108

/* Internal registers can be configured at any 1 MiB aligned address */
#define INTERNAL_REGS_MASK		~(SZ_1M - 1)

/*
 * Watchdog timer block registers.
 */
#define TIMER_CTRL		0x0000
#define TIMER_A370_STATUS	0x04

#define WDT_MAX_CYCLE_COUNT	0xffffffff

#define WDT_A370_RATIO_MASK(v)	((v) << 16)
#define WDT_A370_RATIO_SHIFT	5
#define WDT_A370_RATIO		(1 << WDT_A370_RATIO_SHIFT)

#define WDT_AXP_FIXED_ENABLE_BIT BIT(10)
#define WDT_A370_EXPIRED	BIT(31)

static bool nowayout = WATCHDOG_NOWAYOUT;
static int heartbeat = -1;		/* module parameter (seconds) */

struct orion_watchdog;

struct orion_watchdog_data {
	int wdt_counter_offset;
	int wdt_enable_bit;
	int rstout_enable_bit;
	int (*clock_init)(struct platform_device *,
			  struct orion_watchdog *);
	int (*start)(struct watchdog_device *);
};

struct orion_watchdog {
	struct watchdog_device wdt;
	void __iomem *reg;
	void __iomem *rstout;
	unsigned long clk_rate;
	struct clk *clk;
	const struct orion_watchdog_data *data;
};

static int orion_wdt_clock_init(struct platform_device *pdev,
				struct orion_watchdog *dev)
{
	int ret;

	dev->clk = clk_get(&pdev->dev, NULL);
	if (IS_ERR(dev->clk))
		return PTR_ERR(dev->clk);
	ret = clk_prepare_enable(dev->clk);
	if (ret) {
		clk_put(dev->clk);
		return ret;
	}

	dev->clk_rate = clk_get_rate(dev->clk);
	return 0;
}

static int armada370_wdt_clock_init(struct platform_device *pdev,
				    struct orion_watchdog *dev)
{
	int ret;

	dev->clk = clk_get(&pdev->dev, NULL);
	if (IS_ERR(dev->clk))
		return PTR_ERR(dev->clk);
	ret = clk_prepare_enable(dev->clk);
	if (ret) {
		clk_put(dev->clk);
		return ret;
	}

	/* Setup watchdog input clock */
	atomic_io_modify(dev->reg + TIMER_CTRL,
			WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT),
			WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT));

	dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO;
	return 0;
}

static int armadaxp_wdt_clock_init(struct platform_device *pdev,
				   struct orion_watchdog *dev)
{
	int ret;

	dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed");
	if (IS_ERR(dev->clk))
		return PTR_ERR(dev->clk);
	ret = clk_prepare_enable(dev->clk);
	if (ret) {
		clk_put(dev->clk);
		return ret;
	}

	/* Enable the fixed watchdog clock input */
	atomic_io_modify(dev->reg + TIMER_CTRL,
			 WDT_AXP_FIXED_ENABLE_BIT,
			 WDT_AXP_FIXED_ENABLE_BIT);

	dev->clk_rate = clk_get_rate(dev->clk);
	return 0;
}

static int orion_wdt_ping(struct watchdog_device *wdt_dev)
{
	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
	/* Reload watchdog duration */
	writel(dev->clk_rate * wdt_dev->timeout,
	       dev->reg + dev->data->wdt_counter_offset);
	return 0;
}

static int armada370_start(struct watchdog_device *wdt_dev)
{
	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);

	/* Set watchdog duration */
	writel(dev->clk_rate * wdt_dev->timeout,
	       dev->reg + dev->data->wdt_counter_offset);

	/* Clear the watchdog expiration bit */
	atomic_io_modify(dev->reg + TIMER_A370_STATUS, WDT_A370_EXPIRED, 0);

	/* Enable watchdog timer */
	atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit,
						dev->data->wdt_enable_bit);

	atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit,
				      dev->data->rstout_enable_bit);
	return 0;
}

static int orion_start(struct watchdog_device *wdt_dev)
{
	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);

	/* Set watchdog duration */
	writel(dev->clk_rate * wdt_dev->timeout,
	       dev->reg + dev->data->wdt_counter_offset);

	/* Enable watchdog timer */
	atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit,
						dev->data->wdt_enable_bit);

	/* Enable reset on watchdog */
	atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit,
				      dev->data->rstout_enable_bit);

	return 0;
}

static int orion_wdt_start(struct watchdog_device *wdt_dev)
{
	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);

	/* There are some per-SoC quirks to handle */
	return dev->data->start(wdt_dev);
}

static int orion_wdt_stop(struct watchdog_device *wdt_dev)
{
	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);

	/* Disable reset on watchdog */
	atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit, 0);

	/* Disable watchdog timer */
	atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0);

	return 0;
}

static int orion_wdt_enabled(struct orion_watchdog *dev)
{
	bool enabled, running;

	enabled = readl(dev->rstout) & dev->data->rstout_enable_bit;
	running = readl(dev->reg + TIMER_CTRL) & dev->data->wdt_enable_bit;

	return enabled && running;
}

static unsigned int orion_wdt_get_timeleft(struct watchdog_device *wdt_dev)
{
	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
	return readl(dev->reg + dev->data->wdt_counter_offset) / dev->clk_rate;
}

static int orion_wdt_set_timeout(struct watchdog_device *wdt_dev,
				 unsigned int timeout)
{
	wdt_dev->timeout = timeout;
	return 0;
}

static const struct watchdog_info orion_wdt_info = {
	.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
	.identity = "Orion Watchdog",
};

static const struct watchdog_ops orion_wdt_ops = {
	.owner = THIS_MODULE,
	.start = orion_wdt_start,
	.stop = orion_wdt_stop,
	.ping = orion_wdt_ping,
	.set_timeout = orion_wdt_set_timeout,
	.get_timeleft = orion_wdt_get_timeleft,
};

static irqreturn_t orion_wdt_irq(int irq, void *devid)
{
	panic("Watchdog Timeout");
	return IRQ_HANDLED;
}

/*
 * The original devicetree binding for this driver specified only
 * one memory resource, so in order to keep DT backwards compatibility
 * we try to fallback to a hardcoded register address, if the resource
 * is missing from the devicetree.
 */
static void __iomem *orion_wdt_ioremap_rstout(struct platform_device *pdev,
					      phys_addr_t internal_regs)
{
	struct resource *res;
	phys_addr_t rstout;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
	if (res)
		return devm_ioremap(&pdev->dev, res->start,
				    resource_size(res));

	/* This workaround works only for "orion-wdt", DT-enabled */
	if (!of_device_is_compatible(pdev->dev.of_node, "marvell,orion-wdt"))
		return NULL;

	rstout = internal_regs + ORION_RSTOUT_MASK_OFFSET;

	WARN(1, FW_BUG "falling back to harcoded RSTOUT reg %pa\n", &rstout);
	return devm_ioremap(&pdev->dev, rstout, 0x4);
}

static const struct orion_watchdog_data orion_data = {
	.rstout_enable_bit = BIT(1),
	.wdt_enable_bit = BIT(4),
	.wdt_counter_offset = 0x24,
	.clock_init = orion_wdt_clock_init,
	.start = orion_start,
};

static const struct orion_watchdog_data armada370_data = {
	.rstout_enable_bit = BIT(8),
	.wdt_enable_bit = BIT(8),
	.wdt_counter_offset = 0x34,
	.clock_init = armada370_wdt_clock_init,
	.start = armada370_start,
};

static const struct orion_watchdog_data armadaxp_data = {
	.rstout_enable_bit = BIT(8),
	.wdt_enable_bit = BIT(8),
	.wdt_counter_offset = 0x34,
	.clock_init = armadaxp_wdt_clock_init,
	.start = armada370_start,
};

static const struct of_device_id orion_wdt_of_match_table[] = {
	{
		.compatible = "marvell,orion-wdt",
		.data = &orion_data,
	},
	{
		.compatible = "marvell,armada-370-wdt",
		.data = &armada370_data,
	},
	{
		.compatible = "marvell,armada-xp-wdt",
		.data = &armadaxp_data,
	},
	{},
};
MODULE_DEVICE_TABLE(of, orion_wdt_of_match_table);

static int orion_wdt_probe(struct platform_device *pdev)
{
	struct orion_watchdog *dev;
	const struct of_device_id *match;
	unsigned int wdt_max_duration;	/* (seconds) */
	struct resource *res;
	int ret, irq;

	dev = devm_kzalloc(&pdev->dev, sizeof(struct orion_watchdog),
			   GFP_KERNEL);
	if (!dev)
		return -ENOMEM;

	match = of_match_device(orion_wdt_of_match_table, &pdev->dev);
	if (!match)
		/* Default legacy match */
		match = &orion_wdt_of_match_table[0];

	dev->wdt.info = &orion_wdt_info;
	dev->wdt.ops = &orion_wdt_ops;
	dev->wdt.min_timeout = 1;
	dev->data = match->data;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res)
		return -ENODEV;

	dev->reg = devm_ioremap(&pdev->dev, res->start,
			       resource_size(res));
	if (!dev->reg)
		return -ENOMEM;

	dev->rstout = orion_wdt_ioremap_rstout(pdev, res->start &
						     INTERNAL_REGS_MASK);
	if (!dev->rstout)
		return -ENODEV;

	ret = dev->data->clock_init(pdev, dev);
	if (ret) {
		dev_err(&pdev->dev, "cannot initialize clock\n");
		return ret;
	}

	wdt_max_duration = WDT_MAX_CYCLE_COUNT / dev->clk_rate;

	dev->wdt.timeout = wdt_max_duration;
	dev->wdt.max_timeout = wdt_max_duration;
	watchdog_init_timeout(&dev->wdt, heartbeat, &pdev->dev);

	platform_set_drvdata(pdev, &dev->wdt);
	watchdog_set_drvdata(&dev->wdt, dev);

	/*
	 * Let's make sure the watchdog is fully stopped, unless it's
	 * explicitly enabled. This may be the case if the module was
	 * removed and re-insterted, or if the bootloader explicitly
	 * set a running watchdog before booting the kernel.
	 */
	if (!orion_wdt_enabled(dev))
		orion_wdt_stop(&dev->wdt);

	/* Request the IRQ only after the watchdog is disabled */
	irq = platform_get_irq(pdev, 0);
	if (irq > 0) {
		/*
		 * Not all supported platforms specify an interrupt for the
		 * watchdog, so let's make it optional.
		 */
		ret = devm_request_irq(&pdev->dev, irq, orion_wdt_irq, 0,
				       pdev->name, dev);
		if (ret < 0) {
			dev_err(&pdev->dev, "failed to request IRQ\n");
			goto disable_clk;
		}
	}

	watchdog_set_nowayout(&dev->wdt, nowayout);
	ret = watchdog_register_device(&dev->wdt);
	if (ret)
		goto disable_clk;

	pr_info("Initial timeout %d sec%s\n",
		dev->wdt.timeout, nowayout ? ", nowayout" : "");
	return 0;

disable_clk:
	clk_disable_unprepare(dev->clk);
	clk_put(dev->clk);
	return ret;
}

static int orion_wdt_remove(struct platform_device *pdev)
{
	struct watchdog_device *wdt_dev = platform_get_drvdata(pdev);
	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);

	watchdog_unregister_device(wdt_dev);
	clk_disable_unprepare(dev->clk);
	clk_put(dev->clk);
	return 0;
}

static void orion_wdt_shutdown(struct platform_device *pdev)
{
	struct watchdog_device *wdt_dev = platform_get_drvdata(pdev);
	orion_wdt_stop(wdt_dev);
}

static struct platform_driver orion_wdt_driver = {
	.probe		= orion_wdt_probe,
	.remove		= orion_wdt_remove,
	.shutdown	= orion_wdt_shutdown,
	.driver		= {
		.owner	= THIS_MODULE,
		.name	= "orion_wdt",
		.of_match_table = orion_wdt_of_match_table,
	},
};

module_platform_driver(orion_wdt_driver);

MODULE_AUTHOR("Sylver Bruneau <sylver.bruneau@googlemail.com>");
MODULE_DESCRIPTION("Orion Processor Watchdog");

module_param(heartbeat, int, 0);
MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");

module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
				__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:orion_wdt");
Commit	Line	Data
22ac9232	1	/*
3b937a7d	2	* drivers/watchdog/orion_wdt.c
22ac9232	3	*
3b937a7d	4	* Watchdog driver for Orion/Kirkwood processors
22ac9232 SB	5	*
	6	* Author: Sylver Bruneau <sylver.bruneau@googlemail.com>
	7	*
	8	* This file is licensed under the terms of the GNU General Public
	9	* License version 2. This program is licensed "as is" without any
	10	* warranty of any kind, whether express or implied.
	11	*/
	12
27c766aa JP	13	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27c766aa JP	14
22ac9232 SB	15	#include <linux/module.h>
	16	#include <linux/moduleparam.h>
	17	#include <linux/types.h>
	18	#include <linux/kernel.h>
9e058d4f	19	#include <linux/platform_device.h>
22ac9232	20	#include <linux/watchdog.h>
e97662e1	21	#include <linux/interrupt.h>
22ac9232	22	#include <linux/io.h>
4f04be62	23	#include <linux/clk.h>
0dd6e484	24	#include <linux/err.h>
1e7bad0f	25	#include <linux/of.h>
fc723856	26	#include <linux/of_device.h>
22ac9232	27
868eb616 EG	28	/* RSTOUT mask register physical address for Orion5x, Kirkwood and Dove */
	29	#define ORION_RSTOUT_MASK_OFFSET 0x20108
	30
	31	/* Internal registers can be configured at any 1 MiB aligned address */
	32	#define INTERNAL_REGS_MASK ~(SZ_1M - 1)
22ac9232 SB	33
	34	/*
	35	* Watchdog timer block registers.
	36	*/
a855a7ce	37	#define TIMER_CTRL 0x0000
463f96e0	38	#define TIMER_A370_STATUS 0x04
22ac9232	39
9e058d4f	40	#define WDT_MAX_CYCLE_COUNT 0xffffffff
22ac9232	41
463f96e0 EG	42	#define WDT_A370_RATIO_MASK(v) ((v) << 16)
	43	#define WDT_A370_RATIO_SHIFT 5
	44	#define WDT_A370_RATIO (1 << WDT_A370_RATIO_SHIFT)
	45
	46	#define WDT_AXP_FIXED_ENABLE_BIT BIT(10)
	47	#define WDT_A370_EXPIRED BIT(31)
fa142ff5	48
86a1e189	49	static bool nowayout = WATCHDOG_NOWAYOUT;
9e058d4f	50	static int heartbeat = -1; /* module parameter (seconds) */
22ac9232	51
1924227b EG	52	struct orion_watchdog;
1924227b EG	53
fc723856 EG	54	struct orion_watchdog_data {
	55	int wdt_counter_offset;
	56	int wdt_enable_bit;
	57	int rstout_enable_bit;
1924227b EG	58	int (clock_init)(struct platform_device ,
1924227b EG	59	struct orion_watchdog *);
490d8e3c	60	int (start)(struct watchdog_device );
fc723856 EG	61	};
fc723856 EG	62
b89a9c40 EG	63	struct orion_watchdog {
	64	struct watchdog_device wdt;
	65	void __iomem *reg;
	66	void __iomem *rstout;
	67	unsigned long clk_rate;
	68	struct clk *clk;
fc723856	69	const struct orion_watchdog_data *data;
b89a9c40	70	};
22ac9232	71
1924227b EG	72	static int orion_wdt_clock_init(struct platform_device *pdev,
1924227b EG	73	struct orion_watchdog *dev)
df6707b2	74	{
1924227b	75	int ret;
df6707b2	76
463f96e0	77	dev->clk = clk_get(&pdev->dev, NULL);
1924227b EG	78	if (IS_ERR(dev->clk))
	79	return PTR_ERR(dev->clk);
	80	ret = clk_prepare_enable(dev->clk);
463f96e0 EG	81	if (ret) {
463f96e0 EG	82	clk_put(dev->clk);
1924227b	83	return ret;
463f96e0	84	}
df6707b2	85
463f96e0	86	dev->clk_rate = clk_get_rate(dev->clk);
0dd6e484	87	return 0;
df6707b2 TR	88	}
df6707b2 TR	89
463f96e0 EG	90	static int armada370_wdt_clock_init(struct platform_device *pdev,
463f96e0 EG	91	struct orion_watchdog *dev)
22ac9232	92	{
463f96e0	93	int ret;
22ac9232	94
463f96e0 EG	95	dev->clk = clk_get(&pdev->dev, NULL);
	96	if (IS_ERR(dev->clk))
	97	return PTR_ERR(dev->clk);
	98	ret = clk_prepare_enable(dev->clk);
	99	if (ret) {
	100	clk_put(dev->clk);
	101	return ret;
	102	}
	103
	104	/* Setup watchdog input clock */
	105	atomic_io_modify(dev->reg + TIMER_CTRL,
	106	WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT),
	107	WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT));
	108
	109	dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO;
	110	return 0;
	111	}
	112
	113	static int armadaxp_wdt_clock_init(struct platform_device *pdev,
	114	struct orion_watchdog *dev)
	115	{
	116	int ret;
	117
	118	dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed");
	119	if (IS_ERR(dev->clk))
	120	return PTR_ERR(dev->clk);
	121	ret = clk_prepare_enable(dev->clk);
	122	if (ret) {
	123	clk_put(dev->clk);
	124	return ret;
	125	}
	126
	127	/* Enable the fixed watchdog clock input */
	128	atomic_io_modify(dev->reg + TIMER_CTRL,
	129	WDT_AXP_FIXED_ENABLE_BIT,
	130	WDT_AXP_FIXED_ENABLE_BIT);
1924227b EG	131
	132	dev->clk_rate = clk_get_rate(dev->clk);
	133	return 0;
	134	}
	135
0dd6e484	136	static int orion_wdt_ping(struct watchdog_device *wdt_dev)
df6707b2	137	{
b89a9c40	138	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
df6707b2	139	/* Reload watchdog duration */
fc723856 EG	140	writel(dev->clk_rate * wdt_dev->timeout,
fc723856 EG	141	dev->reg + dev->data->wdt_counter_offset);
0dd6e484	142	return 0;
df6707b2 TR	143	}
df6707b2 TR	144
463f96e0 EG	145	static int armada370_start(struct watchdog_device *wdt_dev)
	146	{
	147	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
6d0f0dfd	148
22ac9232	149	/* Set watchdog duration */
463f96e0 EG	150	writel(dev->clk_rate * wdt_dev->timeout,
463f96e0 EG	151	dev->reg + dev->data->wdt_counter_offset);
22ac9232	152
463f96e0 EG	153	/* Clear the watchdog expiration bit */
463f96e0 EG	154	atomic_io_modify(dev->reg + TIMER_A370_STATUS, WDT_A370_EXPIRED, 0);
22ac9232 SB	155
22ac9232 SB	156	/* Enable watchdog timer */
463f96e0 EG	157	atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit,
	158	dev->data->wdt_enable_bit);
	159
	160	atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit,
	161	dev->data->rstout_enable_bit);
	162	return 0;
	163	}
	164
490d8e3c	165	static int orion_start(struct watchdog_device *wdt_dev)
22ac9232	166	{
b89a9c40 EG	167	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
b89a9c40 EG	168
22ac9232	169	/* Set watchdog duration */
fc723856 EG	170	writel(dev->clk_rate * wdt_dev->timeout,
fc723856 EG	171	dev->reg + dev->data->wdt_counter_offset);
22ac9232	172
22ac9232	173	/* Enable watchdog timer */
fc723856 EG	174	atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit,
fc723856 EG	175	dev->data->wdt_enable_bit);
22ac9232 SB	176
22ac9232 SB	177	/* Enable reset on watchdog */
fc723856 EG	178	atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit,
fc723856 EG	179	dev->data->rstout_enable_bit);
6d0f0dfd	180
0dd6e484	181	return 0;
22ac9232 SB	182	}
22ac9232 SB	183
490d8e3c	184	static int orion_wdt_start(struct watchdog_device *wdt_dev)
22ac9232	185	{
490d8e3c	186	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
22ac9232	187
490d8e3c EG	188	/* There are some per-SoC quirks to handle */
	189	return dev->data->start(wdt_dev);
	190	}
	191
0dd6e484	192	static int orion_wdt_stop(struct watchdog_device *wdt_dev)
22ac9232	193	{
b89a9c40	194	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
6d0f0dfd	195
22ac9232	196	/* Disable reset on watchdog */
fc723856	197	atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit, 0);
22ac9232 SB	198
22ac9232 SB	199	/* Disable watchdog timer */
fc723856	200	atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0);
6d0f0dfd	201
0dd6e484	202	return 0;
6d0f0dfd WVS	203	}
6d0f0dfd WVS	204
b89a9c40	205	static int orion_wdt_enabled(struct orion_watchdog *dev)
6d0f0dfd	206	{
d9d0c53d EG	207	bool enabled, running;
d9d0c53d EG	208
fc723856 EG	209	enabled = readl(dev->rstout) & dev->data->rstout_enable_bit;
fc723856 EG	210	running = readl(dev->reg + TIMER_CTRL) & dev->data->wdt_enable_bit;
0dd6e484	211
d9d0c53d EG	212	return enabled && running;
d9d0c53d EG	213	}
22ac9232	214
0dd6e484	215	static unsigned int orion_wdt_get_timeleft(struct watchdog_device *wdt_dev)
6d0f0dfd	216	{
b89a9c40	217	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
fc723856	218	return readl(dev->reg + dev->data->wdt_counter_offset) / dev->clk_rate;
22ac9232 SB	219	}
22ac9232 SB	220
0dd6e484 AL	221	static int orion_wdt_set_timeout(struct watchdog_device *wdt_dev,
0dd6e484 AL	222	unsigned int timeout)
22ac9232	223	{
0dd6e484	224	wdt_dev->timeout = timeout;
df6707b2 TR	225	return 0;
	226	}
	227
0dd6e484 AL	228	static const struct watchdog_info orion_wdt_info = {
	229	.options = WDIOF_SETTIMEOUT \| WDIOF_KEEPALIVEPING \| WDIOF_MAGICCLOSE,
	230	.identity = "Orion Watchdog",
22ac9232 SB	231	};
22ac9232 SB	232
0dd6e484 AL	233	static const struct watchdog_ops orion_wdt_ops = {
	234	.owner = THIS_MODULE,
	235	.start = orion_wdt_start,
	236	.stop = orion_wdt_stop,
	237	.ping = orion_wdt_ping,
	238	.set_timeout = orion_wdt_set_timeout,
	239	.get_timeleft = orion_wdt_get_timeleft,
22ac9232 SB	240	};
22ac9232 SB	241
e97662e1 EG	242	static irqreturn_t orion_wdt_irq(int irq, void *devid)
	243	{
	244	panic("Watchdog Timeout");
	245	return IRQ_HANDLED;
	246	}
	247
868eb616 EG	248	/*
	249	* The original devicetree binding for this driver specified only
	250	* one memory resource, so in order to keep DT backwards compatibility
	251	* we try to fallback to a hardcoded register address, if the resource
	252	* is missing from the devicetree.
	253	*/
	254	static void __iomem orion_wdt_ioremap_rstout(struct platform_device pdev,
	255	phys_addr_t internal_regs)
	256	{
	257	struct resource *res;
	258	phys_addr_t rstout;
	259
	260	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
	261	if (res)
	262	return devm_ioremap(&pdev->dev, res->start,
	263	resource_size(res));
	264
	265	/* This workaround works only for "orion-wdt", DT-enabled */
	266	if (!of_device_is_compatible(pdev->dev.of_node, "marvell,orion-wdt"))
	267	return NULL;
	268
	269	rstout = internal_regs + ORION_RSTOUT_MASK_OFFSET;
	270
edd9d3cf	271	WARN(1, FW_BUG "falling back to harcoded RSTOUT reg %pa\n", &rstout);
868eb616 EG	272	return devm_ioremap(&pdev->dev, rstout, 0x4);
	273	}
	274
fc723856 EG	275	static const struct orion_watchdog_data orion_data = {
	276	.rstout_enable_bit = BIT(1),
	277	.wdt_enable_bit = BIT(4),
	278	.wdt_counter_offset = 0x24,
1924227b	279	.clock_init = orion_wdt_clock_init,
490d8e3c	280	.start = orion_start,
fc723856 EG	281	};
fc723856 EG	282
463f96e0 EG	283	static const struct orion_watchdog_data armada370_data = {
	284	.rstout_enable_bit = BIT(8),
	285	.wdt_enable_bit = BIT(8),
	286	.wdt_counter_offset = 0x34,
	287	.clock_init = armada370_wdt_clock_init,
	288	.start = armada370_start,
22ac9232 SB	289	};
22ac9232 SB	290
463f96e0 EG	291	static const struct orion_watchdog_data armadaxp_data = {
	292	.rstout_enable_bit = BIT(8),
	293	.wdt_enable_bit = BIT(8),
	294	.wdt_counter_offset = 0x34,
	295	.clock_init = armadaxp_wdt_clock_init,
	296	.start = armada370_start,
	297	};
	298
fc723856 EG	299	static const struct of_device_id orion_wdt_of_match_table[] = {
	300	{
	301	.compatible = "marvell,orion-wdt",
	302	.data = &orion_data,
	303	},
463f96e0 EG	304	{
	305	.compatible = "marvell,armada-370-wdt",
	306	.data = &armada370_data,
	307	},
	308	{
	309	.compatible = "marvell,armada-xp-wdt",
	310	.data = &armadaxp_data,
	311	},
fc723856 EG	312	{},
	313	};
	314	MODULE_DEVICE_TABLE(of, orion_wdt_of_match_table);
	315
2d991a16	316	static int orion_wdt_probe(struct platform_device *pdev)
22ac9232	317	{
b89a9c40	318	struct orion_watchdog *dev;
fc723856	319	const struct of_device_id *match;
b89a9c40	320	unsigned int wdt_max_duration; /* (seconds) */
a855a7ce	321	struct resource *res;
e97662e1	322	int ret, irq;
22ac9232	323
b89a9c40 EG	324	dev = devm_kzalloc(&pdev->dev, sizeof(struct orion_watchdog),
	325	GFP_KERNEL);
	326	if (!dev)
	327	return -ENOMEM;
	328
fc723856 EG	329	match = of_match_device(orion_wdt_of_match_table, &pdev->dev);
	330	if (!match)
	331	/* Default legacy match */
	332	match = &orion_wdt_of_match_table[0];
	333
b89a9c40 EG	334	dev->wdt.info = &orion_wdt_info;
	335	dev->wdt.ops = &orion_wdt_ops;
	336	dev->wdt.min_timeout = 1;
fc723856	337	dev->data = match->data;
9e058d4f	338
a855a7ce	339	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
8c4c419c JG	340	if (!res)
8c4c419c JG	341	return -ENODEV;
9e058d4f	342
b89a9c40 EG	343	dev->reg = devm_ioremap(&pdev->dev, res->start,
b89a9c40 EG	344	resource_size(res));
1924227b EG	345	if (!dev->reg)
1924227b EG	346	return -ENOMEM;
0dd6e484	347
b89a9c40 EG	348	dev->rstout = orion_wdt_ioremap_rstout(pdev, res->start &
b89a9c40 EG	349	INTERNAL_REGS_MASK);
1924227b EG	350	if (!dev->rstout)
1924227b EG	351	return -ENODEV;
0dd6e484	352
1924227b	353	ret = dev->data->clock_init(pdev, dev);
0dd6e484	354	if (ret) {
1924227b	355	dev_err(&pdev->dev, "cannot initialize clock\n");
9e058d4f	356	return ret;
0dd6e484	357	}
9e058d4f	358
b89a9c40 EG	359	wdt_max_duration = WDT_MAX_CYCLE_COUNT / dev->clk_rate;
	360
	361	dev->wdt.timeout = wdt_max_duration;
	362	dev->wdt.max_timeout = wdt_max_duration;
	363	watchdog_init_timeout(&dev->wdt, heartbeat, &pdev->dev);
0dd6e484	364
b89a9c40 EG	365	platform_set_drvdata(pdev, &dev->wdt);
b89a9c40 EG	366	watchdog_set_drvdata(&dev->wdt, dev);
0dd6e484	367
d9d0c53d EG	368	/*
	369	* Let's make sure the watchdog is fully stopped, unless it's
	370	* explicitly enabled. This may be the case if the module was
	371	* removed and re-insterted, or if the bootloader explicitly
	372	* set a running watchdog before booting the kernel.
	373	*/
b89a9c40 EG	374	if (!orion_wdt_enabled(dev))
b89a9c40 EG	375	orion_wdt_stop(&dev->wdt);
d9d0c53d	376
e97662e1 EG	377	/* Request the IRQ only after the watchdog is disabled */
	378	irq = platform_get_irq(pdev, 0);
	379	if (irq > 0) {
	380	/*
	381	* Not all supported platforms specify an interrupt for the
	382	* watchdog, so let's make it optional.
	383	*/
	384	ret = devm_request_irq(&pdev->dev, irq, orion_wdt_irq, 0,
b89a9c40	385	pdev->name, dev);
e97662e1 EG	386	if (ret < 0) {
	387	dev_err(&pdev->dev, "failed to request IRQ\n");
	388	goto disable_clk;
	389	}
	390	}
	391
b89a9c40 EG	392	watchdog_set_nowayout(&dev->wdt, nowayout);
b89a9c40 EG	393	ret = watchdog_register_device(&dev->wdt);
bb02c662 EG	394	if (ret)
bb02c662 EG	395	goto disable_clk;
9e058d4f	396
27c766aa	397	pr_info("Initial timeout %d sec%s\n",
b89a9c40	398	dev->wdt.timeout, nowayout ? ", nowayout" : "");
9e058d4f	399	return 0;
bb02c662 EG	400
bb02c662 EG	401	disable_clk:
b89a9c40	402	clk_disable_unprepare(dev->clk);
463f96e0	403	clk_put(dev->clk);
bb02c662	404	return ret;
9e058d4f TR	405	}
9e058d4f TR	406
4b12b896	407	static int orion_wdt_remove(struct platform_device *pdev)
9e058d4f	408	{
b89a9c40 EG	409	struct watchdog_device *wdt_dev = platform_get_drvdata(pdev);
	410	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
	411
	412	watchdog_unregister_device(wdt_dev);
	413	clk_disable_unprepare(dev->clk);
463f96e0	414	clk_put(dev->clk);
0dd6e484	415	return 0;
22ac9232 SB	416	}
22ac9232 SB	417
3b937a7d	418	static void orion_wdt_shutdown(struct platform_device *pdev)
df6707b2	419	{
b89a9c40 EG	420	struct watchdog_device *wdt_dev = platform_get_drvdata(pdev);
b89a9c40 EG	421	orion_wdt_stop(wdt_dev);
df6707b2 TR	422	}
df6707b2 TR	423
3b937a7d NP	424	static struct platform_driver orion_wdt_driver = {
3b937a7d NP	425	.probe = orion_wdt_probe,
82268714	426	.remove = orion_wdt_remove,
3b937a7d	427	.shutdown = orion_wdt_shutdown,
9e058d4f TR	428	.driver = {
9e058d4f TR	429	.owner = THIS_MODULE,
3b937a7d	430	.name = "orion_wdt",
85eee819	431	.of_match_table = orion_wdt_of_match_table,
9e058d4f TR	432	},
	433	};
	434
b8ec6118	435	module_platform_driver(orion_wdt_driver);
22ac9232 SB	436
22ac9232 SB	437	MODULE_AUTHOR("Sylver Bruneau <sylver.bruneau@googlemail.com>");
3b937a7d	438	MODULE_DESCRIPTION("Orion Processor Watchdog");
22ac9232 SB	439
22ac9232 SB	440	module_param(heartbeat, int, 0);
df6707b2	441	MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");
22ac9232	442
86a1e189	443	module_param(nowayout, bool, 0);
df6707b2 TR	444	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
df6707b2 TR	445	__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
22ac9232 SB	446
22ac9232 SB	447	MODULE_LICENSE("GPL");
f3ea733e	448	MODULE_ALIAS("platform:orion_wdt");