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Commit | Line | Data |
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22ac9232 | 1 | /* |
3b937a7d | 2 | * drivers/watchdog/orion_wdt.c |
22ac9232 | 3 | * |
3b937a7d | 4 | * Watchdog driver for Orion/Kirkwood processors |
22ac9232 SB |
5 | * |
6 | * Author: Sylver Bruneau <sylver.bruneau@googlemail.com> | |
7 | * | |
8 | * This file is licensed under the terms of the GNU General Public | |
9 | * License version 2. This program is licensed "as is" without any | |
10 | * warranty of any kind, whether express or implied. | |
11 | */ | |
12 | ||
27c766aa JP |
13 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
14 | ||
22ac9232 SB |
15 | #include <linux/module.h> |
16 | #include <linux/moduleparam.h> | |
17 | #include <linux/types.h> | |
18 | #include <linux/kernel.h> | |
9e058d4f | 19 | #include <linux/platform_device.h> |
22ac9232 SB |
20 | #include <linux/watchdog.h> |
21 | #include <linux/init.h> | |
e97662e1 | 22 | #include <linux/interrupt.h> |
22ac9232 | 23 | #include <linux/io.h> |
4f04be62 | 24 | #include <linux/clk.h> |
0dd6e484 | 25 | #include <linux/err.h> |
1e7bad0f | 26 | #include <linux/of.h> |
fc723856 | 27 | #include <linux/of_device.h> |
22ac9232 | 28 | |
868eb616 EG |
29 | /* RSTOUT mask register physical address for Orion5x, Kirkwood and Dove */ |
30 | #define ORION_RSTOUT_MASK_OFFSET 0x20108 | |
31 | ||
32 | /* Internal registers can be configured at any 1 MiB aligned address */ | |
33 | #define INTERNAL_REGS_MASK ~(SZ_1M - 1) | |
34 | ||
22ac9232 SB |
35 | /* |
36 | * Watchdog timer block registers. | |
37 | */ | |
a855a7ce | 38 | #define TIMER_CTRL 0x0000 |
22ac9232 | 39 | |
9e058d4f | 40 | #define WDT_MAX_CYCLE_COUNT 0xffffffff |
22ac9232 | 41 | |
86a1e189 | 42 | static bool nowayout = WATCHDOG_NOWAYOUT; |
9e058d4f | 43 | static int heartbeat = -1; /* module parameter (seconds) */ |
b89a9c40 | 44 | |
fc723856 EG |
45 | struct orion_watchdog_data { |
46 | int wdt_counter_offset; | |
47 | int wdt_enable_bit; | |
48 | int rstout_enable_bit; | |
49 | }; | |
50 | ||
b89a9c40 EG |
51 | struct orion_watchdog { |
52 | struct watchdog_device wdt; | |
53 | void __iomem *reg; | |
54 | void __iomem *rstout; | |
55 | unsigned long clk_rate; | |
56 | struct clk *clk; | |
fc723856 | 57 | const struct orion_watchdog_data *data; |
b89a9c40 | 58 | }; |
22ac9232 | 59 | |
0dd6e484 | 60 | static int orion_wdt_ping(struct watchdog_device *wdt_dev) |
df6707b2 | 61 | { |
b89a9c40 | 62 | struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); |
df6707b2 | 63 | /* Reload watchdog duration */ |
fc723856 EG |
64 | writel(dev->clk_rate * wdt_dev->timeout, |
65 | dev->reg + dev->data->wdt_counter_offset); | |
0dd6e484 | 66 | return 0; |
df6707b2 TR |
67 | } |
68 | ||
0dd6e484 | 69 | static int orion_wdt_start(struct watchdog_device *wdt_dev) |
22ac9232 | 70 | { |
b89a9c40 EG |
71 | struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); |
72 | ||
22ac9232 | 73 | /* Set watchdog duration */ |
fc723856 EG |
74 | writel(dev->clk_rate * wdt_dev->timeout, |
75 | dev->reg + dev->data->wdt_counter_offset); | |
22ac9232 | 76 | |
22ac9232 | 77 | /* Enable watchdog timer */ |
fc723856 EG |
78 | atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, |
79 | dev->data->wdt_enable_bit); | |
22ac9232 SB |
80 | |
81 | /* Enable reset on watchdog */ | |
fc723856 EG |
82 | atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit, |
83 | dev->data->rstout_enable_bit); | |
b89a9c40 | 84 | |
0dd6e484 | 85 | return 0; |
22ac9232 SB |
86 | } |
87 | ||
0dd6e484 | 88 | static int orion_wdt_stop(struct watchdog_device *wdt_dev) |
22ac9232 | 89 | { |
b89a9c40 EG |
90 | struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); |
91 | ||
22ac9232 | 92 | /* Disable reset on watchdog */ |
fc723856 | 93 | atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit, 0); |
22ac9232 SB |
94 | |
95 | /* Disable watchdog timer */ | |
fc723856 | 96 | atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0); |
b89a9c40 | 97 | |
0dd6e484 | 98 | return 0; |
6d0f0dfd WVS |
99 | } |
100 | ||
b89a9c40 | 101 | static int orion_wdt_enabled(struct orion_watchdog *dev) |
d9d0c53d EG |
102 | { |
103 | bool enabled, running; | |
104 | ||
fc723856 EG |
105 | enabled = readl(dev->rstout) & dev->data->rstout_enable_bit; |
106 | running = readl(dev->reg + TIMER_CTRL) & dev->data->wdt_enable_bit; | |
d9d0c53d EG |
107 | |
108 | return enabled && running; | |
109 | } | |
110 | ||
0dd6e484 | 111 | static unsigned int orion_wdt_get_timeleft(struct watchdog_device *wdt_dev) |
6d0f0dfd | 112 | { |
b89a9c40 | 113 | struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); |
fc723856 | 114 | return readl(dev->reg + dev->data->wdt_counter_offset) / dev->clk_rate; |
22ac9232 SB |
115 | } |
116 | ||
0dd6e484 AL |
117 | static int orion_wdt_set_timeout(struct watchdog_device *wdt_dev, |
118 | unsigned int timeout) | |
22ac9232 | 119 | { |
0dd6e484 | 120 | wdt_dev->timeout = timeout; |
df6707b2 TR |
121 | return 0; |
122 | } | |
123 | ||
0dd6e484 AL |
124 | static const struct watchdog_info orion_wdt_info = { |
125 | .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, | |
126 | .identity = "Orion Watchdog", | |
22ac9232 SB |
127 | }; |
128 | ||
0dd6e484 AL |
129 | static const struct watchdog_ops orion_wdt_ops = { |
130 | .owner = THIS_MODULE, | |
131 | .start = orion_wdt_start, | |
132 | .stop = orion_wdt_stop, | |
133 | .ping = orion_wdt_ping, | |
134 | .set_timeout = orion_wdt_set_timeout, | |
135 | .get_timeleft = orion_wdt_get_timeleft, | |
22ac9232 SB |
136 | }; |
137 | ||
e97662e1 EG |
138 | static irqreturn_t orion_wdt_irq(int irq, void *devid) |
139 | { | |
140 | panic("Watchdog Timeout"); | |
141 | return IRQ_HANDLED; | |
142 | } | |
143 | ||
868eb616 EG |
144 | /* |
145 | * The original devicetree binding for this driver specified only | |
146 | * one memory resource, so in order to keep DT backwards compatibility | |
147 | * we try to fallback to a hardcoded register address, if the resource | |
148 | * is missing from the devicetree. | |
149 | */ | |
150 | static void __iomem *orion_wdt_ioremap_rstout(struct platform_device *pdev, | |
151 | phys_addr_t internal_regs) | |
152 | { | |
153 | struct resource *res; | |
154 | phys_addr_t rstout; | |
155 | ||
156 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | |
157 | if (res) | |
158 | return devm_ioremap(&pdev->dev, res->start, | |
159 | resource_size(res)); | |
160 | ||
161 | /* This workaround works only for "orion-wdt", DT-enabled */ | |
162 | if (!of_device_is_compatible(pdev->dev.of_node, "marvell,orion-wdt")) | |
163 | return NULL; | |
164 | ||
165 | rstout = internal_regs + ORION_RSTOUT_MASK_OFFSET; | |
166 | ||
167 | WARN(1, FW_BUG "falling back to harcoded RSTOUT reg 0x%x\n", rstout); | |
168 | return devm_ioremap(&pdev->dev, rstout, 0x4); | |
169 | } | |
170 | ||
fc723856 EG |
171 | static const struct orion_watchdog_data orion_data = { |
172 | .rstout_enable_bit = BIT(1), | |
173 | .wdt_enable_bit = BIT(4), | |
174 | .wdt_counter_offset = 0x24, | |
175 | }; | |
176 | ||
177 | static const struct of_device_id orion_wdt_of_match_table[] = { | |
178 | { | |
179 | .compatible = "marvell,orion-wdt", | |
180 | .data = &orion_data, | |
181 | }, | |
182 | {}, | |
183 | }; | |
184 | MODULE_DEVICE_TABLE(of, orion_wdt_of_match_table); | |
185 | ||
2d991a16 | 186 | static int orion_wdt_probe(struct platform_device *pdev) |
22ac9232 | 187 | { |
b89a9c40 | 188 | struct orion_watchdog *dev; |
fc723856 | 189 | const struct of_device_id *match; |
b89a9c40 | 190 | unsigned int wdt_max_duration; /* (seconds) */ |
a855a7ce | 191 | struct resource *res; |
e97662e1 | 192 | int ret, irq; |
22ac9232 | 193 | |
b89a9c40 EG |
194 | dev = devm_kzalloc(&pdev->dev, sizeof(struct orion_watchdog), |
195 | GFP_KERNEL); | |
196 | if (!dev) | |
197 | return -ENOMEM; | |
198 | ||
fc723856 EG |
199 | match = of_match_device(orion_wdt_of_match_table, &pdev->dev); |
200 | if (!match) | |
201 | /* Default legacy match */ | |
202 | match = &orion_wdt_of_match_table[0]; | |
203 | ||
b89a9c40 EG |
204 | dev->wdt.info = &orion_wdt_info; |
205 | dev->wdt.ops = &orion_wdt_ops; | |
206 | dev->wdt.min_timeout = 1; | |
fc723856 | 207 | dev->data = match->data; |
b89a9c40 EG |
208 | |
209 | dev->clk = devm_clk_get(&pdev->dev, NULL); | |
210 | if (IS_ERR(dev->clk)) { | |
0dd6e484 | 211 | dev_err(&pdev->dev, "Orion Watchdog missing clock\n"); |
b89a9c40 | 212 | return PTR_ERR(dev->clk); |
9e058d4f | 213 | } |
b89a9c40 | 214 | ret = clk_prepare_enable(dev->clk); |
bb02c662 EG |
215 | if (ret) |
216 | return ret; | |
b89a9c40 | 217 | dev->clk_rate = clk_get_rate(dev->clk); |
9e058d4f | 218 | |
a855a7ce | 219 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
bb02c662 EG |
220 | if (!res) { |
221 | ret = -ENODEV; | |
222 | goto disable_clk; | |
223 | } | |
224 | ||
b89a9c40 EG |
225 | dev->reg = devm_ioremap(&pdev->dev, res->start, |
226 | resource_size(res)); | |
227 | if (!dev->reg) { | |
bb02c662 EG |
228 | ret = -ENOMEM; |
229 | goto disable_clk; | |
230 | } | |
9e058d4f | 231 | |
b89a9c40 EG |
232 | dev->rstout = orion_wdt_ioremap_rstout(pdev, res->start & |
233 | INTERNAL_REGS_MASK); | |
234 | if (!dev->rstout) { | |
868eb616 EG |
235 | ret = -ENODEV; |
236 | goto disable_clk; | |
237 | } | |
238 | ||
b89a9c40 EG |
239 | wdt_max_duration = WDT_MAX_CYCLE_COUNT / dev->clk_rate; |
240 | ||
241 | dev->wdt.timeout = wdt_max_duration; | |
242 | dev->wdt.max_timeout = wdt_max_duration; | |
243 | watchdog_init_timeout(&dev->wdt, heartbeat, &pdev->dev); | |
0dd6e484 | 244 | |
b89a9c40 EG |
245 | platform_set_drvdata(pdev, &dev->wdt); |
246 | watchdog_set_drvdata(&dev->wdt, dev); | |
0dd6e484 | 247 | |
d9d0c53d EG |
248 | /* |
249 | * Let's make sure the watchdog is fully stopped, unless it's | |
250 | * explicitly enabled. This may be the case if the module was | |
251 | * removed and re-insterted, or if the bootloader explicitly | |
252 | * set a running watchdog before booting the kernel. | |
253 | */ | |
b89a9c40 EG |
254 | if (!orion_wdt_enabled(dev)) |
255 | orion_wdt_stop(&dev->wdt); | |
d9d0c53d | 256 | |
e97662e1 EG |
257 | /* Request the IRQ only after the watchdog is disabled */ |
258 | irq = platform_get_irq(pdev, 0); | |
259 | if (irq > 0) { | |
260 | /* | |
261 | * Not all supported platforms specify an interrupt for the | |
262 | * watchdog, so let's make it optional. | |
263 | */ | |
264 | ret = devm_request_irq(&pdev->dev, irq, orion_wdt_irq, 0, | |
b89a9c40 | 265 | pdev->name, dev); |
e97662e1 EG |
266 | if (ret < 0) { |
267 | dev_err(&pdev->dev, "failed to request IRQ\n"); | |
268 | goto disable_clk; | |
269 | } | |
270 | } | |
271 | ||
b89a9c40 EG |
272 | watchdog_set_nowayout(&dev->wdt, nowayout); |
273 | ret = watchdog_register_device(&dev->wdt); | |
bb02c662 EG |
274 | if (ret) |
275 | goto disable_clk; | |
9e058d4f | 276 | |
27c766aa | 277 | pr_info("Initial timeout %d sec%s\n", |
b89a9c40 | 278 | dev->wdt.timeout, nowayout ? ", nowayout" : ""); |
9e058d4f | 279 | return 0; |
bb02c662 EG |
280 | |
281 | disable_clk: | |
b89a9c40 | 282 | clk_disable_unprepare(dev->clk); |
bb02c662 | 283 | return ret; |
9e058d4f TR |
284 | } |
285 | ||
4b12b896 | 286 | static int orion_wdt_remove(struct platform_device *pdev) |
9e058d4f | 287 | { |
b89a9c40 EG |
288 | struct watchdog_device *wdt_dev = platform_get_drvdata(pdev); |
289 | struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); | |
290 | ||
291 | watchdog_unregister_device(wdt_dev); | |
292 | clk_disable_unprepare(dev->clk); | |
0dd6e484 | 293 | return 0; |
22ac9232 SB |
294 | } |
295 | ||
3b937a7d | 296 | static void orion_wdt_shutdown(struct platform_device *pdev) |
df6707b2 | 297 | { |
b89a9c40 EG |
298 | struct watchdog_device *wdt_dev = platform_get_drvdata(pdev); |
299 | orion_wdt_stop(wdt_dev); | |
df6707b2 TR |
300 | } |
301 | ||
3b937a7d NP |
302 | static struct platform_driver orion_wdt_driver = { |
303 | .probe = orion_wdt_probe, | |
82268714 | 304 | .remove = orion_wdt_remove, |
3b937a7d | 305 | .shutdown = orion_wdt_shutdown, |
9e058d4f TR |
306 | .driver = { |
307 | .owner = THIS_MODULE, | |
3b937a7d | 308 | .name = "orion_wdt", |
85eee819 | 309 | .of_match_table = orion_wdt_of_match_table, |
9e058d4f TR |
310 | }, |
311 | }; | |
312 | ||
b8ec6118 | 313 | module_platform_driver(orion_wdt_driver); |
22ac9232 SB |
314 | |
315 | MODULE_AUTHOR("Sylver Bruneau <sylver.bruneau@googlemail.com>"); | |
3b937a7d | 316 | MODULE_DESCRIPTION("Orion Processor Watchdog"); |
22ac9232 SB |
317 | |
318 | module_param(heartbeat, int, 0); | |
df6707b2 | 319 | MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds"); |
22ac9232 | 320 | |
86a1e189 | 321 | module_param(nowayout, bool, 0); |
df6707b2 TR |
322 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" |
323 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
22ac9232 SB |
324 | |
325 | MODULE_LICENSE("GPL"); | |
f3ea733e | 326 | MODULE_ALIAS("platform:orion_wdt"); |