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03ec5856 FF |
1 | /* |
2 | * IDT Interprise 79RC32434 watchdog driver | |
3 | * | |
4 | * Copyright (C) 2006, Ondrej Zajicek <santiago@crfreenet.org> | |
5 | * Copyright (C) 2008, Florian Fainelli <florian@openwrt.org> | |
6 | * | |
7 | * based on | |
8 | * SoftDog 0.05: A Software Watchdog Device | |
9 | * | |
29fa0586 AC |
10 | * (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>, |
11 | * All Rights Reserved. | |
03ec5856 FF |
12 | * |
13 | * This program is free software; you can redistribute it and/or | |
14 | * modify it under the terms of the GNU General Public License | |
15 | * as published by the Free Software Foundation; either version | |
16 | * 2 of the License, or (at your option) any later version. | |
17 | * | |
18 | */ | |
19 | ||
9b655e07 PS |
20 | #include <linux/module.h> /* For module specific items */ |
21 | #include <linux/moduleparam.h> /* For new moduleparam's */ | |
22 | #include <linux/types.h> /* For standard types (like size_t) */ | |
23 | #include <linux/errno.h> /* For the -ENODEV/... values */ | |
24 | #include <linux/kernel.h> /* For printk/panic/... */ | |
25 | #include <linux/fs.h> /* For file operations */ | |
26 | #include <linux/miscdevice.h> /* For MODULE_ALIAS_MISCDEV | |
27 | (WATCHDOG_MINOR) */ | |
28 | #include <linux/watchdog.h> /* For the watchdog specific items */ | |
29 | #include <linux/init.h> /* For __init/__exit/... */ | |
30 | #include <linux/platform_device.h> /* For platform_driver framework */ | |
31 | #include <linux/uaccess.h> /* For copy_to_user/put_user/... */ | |
32 | ||
33 | #include <asm/mach-rc32434/integ.h> /* For the Watchdog registers */ | |
34 | ||
35 | #define PFX KBUILD_MODNAME ": " | |
03ec5856 | 36 | |
08eb2e0c | 37 | #define VERSION "0.5" |
03ec5856 FF |
38 | |
39 | static struct { | |
03ec5856 FF |
40 | unsigned long inuse; |
41 | } rc32434_wdt_device; | |
42 | ||
43 | static struct integ __iomem *wdt_reg; | |
03ec5856 FF |
44 | |
45 | static int expect_close; | |
0af98d37 PS |
46 | |
47 | /* Board internal clock speed in Hz, | |
48 | * the watchdog timer ticks at. */ | |
49 | extern unsigned int idt_cpu_freq; | |
50 | ||
51 | /* translate wtcompare value to seconds and vice versa */ | |
52 | #define WTCOMP2SEC(x) (x / idt_cpu_freq) | |
53 | #define SEC2WTCOMP(x) (x * idt_cpu_freq) | |
54 | ||
55 | /* Use a default timeout of 20s. This should be | |
56 | * safe for CPU clock speeds up to 400MHz, as | |
57 | * ((2 ^ 32) - 1) / (400MHz / 2) = 21s. */ | |
58 | #define WATCHDOG_TIMEOUT 20 | |
59 | ||
60 | static int timeout = WATCHDOG_TIMEOUT; | |
08eb2e0c PS |
61 | module_param(timeout, int, 0); |
62 | MODULE_PARM_DESC(timeout, "Watchdog timeout value, in seconds (default=" | |
63 | WATCHDOG_TIMEOUT ")"); | |
03ec5856 FF |
64 | |
65 | static int nowayout = WATCHDOG_NOWAYOUT; | |
66 | module_param(nowayout, int, 0); | |
67 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" | |
68 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
69 | ||
0af98d37 PS |
70 | /* apply or and nand masks to data read from addr and write back */ |
71 | #define SET_BITS(addr, or, nand) \ | |
72 | writel((readl(&addr) | or) & ~nand, &addr) | |
03ec5856 | 73 | |
08eb2e0c PS |
74 | static int rc32434_wdt_set(int new_timeout) |
75 | { | |
76 | int max_to = WTCOMP2SEC((u32)-1); | |
77 | ||
78 | if (new_timeout < 0 || new_timeout > max_to) { | |
79 | printk(KERN_ERR PFX "timeout value must be between 0 and %d", | |
80 | max_to); | |
81 | return -EINVAL; | |
82 | } | |
83 | timeout = new_timeout; | |
84 | writel(SEC2WTCOMP(timeout), &wdt_reg->wtcompare); | |
85 | ||
86 | return 0; | |
87 | } | |
88 | ||
03ec5856 FF |
89 | static void rc32434_wdt_start(void) |
90 | { | |
0af98d37 | 91 | u32 or, nand; |
03ec5856 | 92 | |
0af98d37 PS |
93 | /* zero the counter before enabling */ |
94 | writel(0, &wdt_reg->wtcount); | |
03ec5856 | 95 | |
0af98d37 PS |
96 | /* don't generate a non-maskable interrupt, |
97 | * do a warm reset instead */ | |
98 | nand = 1 << RC32434_ERR_WNE; | |
99 | or = 1 << RC32434_ERR_WRE; | |
03ec5856 | 100 | |
0af98d37 PS |
101 | /* reset the ERRCS timeout bit in case it's set */ |
102 | nand |= 1 << RC32434_ERR_WTO; | |
03ec5856 | 103 | |
0af98d37 | 104 | SET_BITS(wdt_reg->errcs, or, nand); |
03ec5856 | 105 | |
08eb2e0c PS |
106 | /* set the timeout (either default or based on module param) */ |
107 | rc32434_wdt_set(timeout); | |
108 | ||
0af98d37 PS |
109 | /* reset WTC timeout bit and enable WDT */ |
110 | nand = 1 << RC32434_WTC_TO; | |
111 | or = 1 << RC32434_WTC_EN; | |
03ec5856 | 112 | |
0af98d37 | 113 | SET_BITS(wdt_reg->wtc, or, nand); |
9b655e07 PS |
114 | |
115 | printk(KERN_INFO PFX "Started watchdog timer.\n"); | |
0af98d37 | 116 | } |
03ec5856 | 117 | |
0af98d37 PS |
118 | static void rc32434_wdt_stop(void) |
119 | { | |
120 | /* Disable WDT */ | |
121 | SET_BITS(wdt_reg->wtc, 0, 1 << RC32434_WTC_EN); | |
9b655e07 PS |
122 | |
123 | printk(KERN_INFO PFX "Stopped watchdog timer.\n"); | |
03ec5856 FF |
124 | } |
125 | ||
0af98d37 | 126 | static void rc32434_wdt_ping(void) |
03ec5856 | 127 | { |
03ec5856 | 128 | writel(0, &wdt_reg->wtcount); |
03ec5856 FF |
129 | } |
130 | ||
131 | static int rc32434_wdt_open(struct inode *inode, struct file *file) | |
132 | { | |
133 | if (test_and_set_bit(0, &rc32434_wdt_device.inuse)) | |
134 | return -EBUSY; | |
135 | ||
136 | if (nowayout) | |
137 | __module_get(THIS_MODULE); | |
138 | ||
0af98d37 PS |
139 | rc32434_wdt_start(); |
140 | rc32434_wdt_ping(); | |
141 | ||
03ec5856 FF |
142 | return nonseekable_open(inode, file); |
143 | } | |
144 | ||
145 | static int rc32434_wdt_release(struct inode *inode, struct file *file) | |
146 | { | |
0af98d37 | 147 | if (expect_close == 42) { |
03ec5856 | 148 | rc32434_wdt_stop(); |
03ec5856 | 149 | module_put(THIS_MODULE); |
0af98d37 | 150 | } else { |
9b655e07 PS |
151 | printk(KERN_CRIT PFX |
152 | "device closed unexpectedly. WDT will not stop!\n"); | |
0af98d37 PS |
153 | rc32434_wdt_ping(); |
154 | } | |
03ec5856 FF |
155 | clear_bit(0, &rc32434_wdt_device.inuse); |
156 | return 0; | |
157 | } | |
158 | ||
159 | static ssize_t rc32434_wdt_write(struct file *file, const char *data, | |
160 | size_t len, loff_t *ppos) | |
161 | { | |
162 | if (len) { | |
163 | if (!nowayout) { | |
164 | size_t i; | |
165 | ||
166 | /* In case it was set long ago */ | |
167 | expect_close = 0; | |
168 | ||
169 | for (i = 0; i != len; i++) { | |
170 | char c; | |
171 | if (get_user(c, data + i)) | |
172 | return -EFAULT; | |
173 | if (c == 'V') | |
0af98d37 | 174 | expect_close = 42; |
03ec5856 FF |
175 | } |
176 | } | |
0af98d37 | 177 | rc32434_wdt_ping(); |
03ec5856 FF |
178 | return len; |
179 | } | |
180 | return 0; | |
181 | } | |
182 | ||
7275fc8c WVS |
183 | static long rc32434_wdt_ioctl(struct file *file, unsigned int cmd, |
184 | unsigned long arg) | |
03ec5856 FF |
185 | { |
186 | void __user *argp = (void __user *)arg; | |
187 | int new_timeout; | |
188 | unsigned int value; | |
189 | static struct watchdog_info ident = { | |
190 | .options = WDIOF_SETTIMEOUT | | |
191 | WDIOF_KEEPALIVEPING | | |
192 | WDIOF_MAGICCLOSE, | |
193 | .identity = "RC32434_WDT Watchdog", | |
194 | }; | |
195 | switch (cmd) { | |
9b655e07 PS |
196 | case WDIOC_GETSUPPORT: |
197 | if (copy_to_user(argp, &ident, sizeof(ident))) | |
198 | return -EFAULT; | |
03ec5856 FF |
199 | break; |
200 | case WDIOC_GETSTATUS: | |
201 | case WDIOC_GETBOOTSTATUS: | |
0af98d37 | 202 | value = 0; |
03ec5856 FF |
203 | if (copy_to_user(argp, &value, sizeof(int))) |
204 | return -EFAULT; | |
205 | break; | |
03ec5856 FF |
206 | case WDIOC_SETOPTIONS: |
207 | if (copy_from_user(&value, argp, sizeof(int))) | |
208 | return -EFAULT; | |
209 | switch (value) { | |
210 | case WDIOS_ENABLECARD: | |
211 | rc32434_wdt_start(); | |
212 | break; | |
213 | case WDIOS_DISABLECARD: | |
214 | rc32434_wdt_stop(); | |
0af98d37 | 215 | break; |
03ec5856 FF |
216 | default: |
217 | return -EINVAL; | |
218 | } | |
219 | break; | |
9b655e07 PS |
220 | case WDIOC_KEEPALIVE: |
221 | rc32434_wdt_ping(); | |
222 | break; | |
03ec5856 FF |
223 | case WDIOC_SETTIMEOUT: |
224 | if (copy_from_user(&new_timeout, argp, sizeof(int))) | |
225 | return -EFAULT; | |
0af98d37 | 226 | if (rc32434_wdt_set(new_timeout)) |
03ec5856 | 227 | return -EINVAL; |
0af98d37 | 228 | /* Fall through */ |
03ec5856 FF |
229 | case WDIOC_GETTIMEOUT: |
230 | return copy_to_user(argp, &timeout, sizeof(int)); | |
231 | default: | |
232 | return -ENOTTY; | |
233 | } | |
234 | ||
235 | return 0; | |
236 | } | |
237 | ||
238 | static struct file_operations rc32434_wdt_fops = { | |
239 | .owner = THIS_MODULE, | |
240 | .llseek = no_llseek, | |
241 | .write = rc32434_wdt_write, | |
7275fc8c | 242 | .unlocked_ioctl = rc32434_wdt_ioctl, |
03ec5856 FF |
243 | .open = rc32434_wdt_open, |
244 | .release = rc32434_wdt_release, | |
245 | }; | |
246 | ||
247 | static struct miscdevice rc32434_wdt_miscdev = { | |
248 | .minor = WATCHDOG_MINOR, | |
249 | .name = "watchdog", | |
250 | .fops = &rc32434_wdt_fops, | |
251 | }; | |
252 | ||
9b655e07 PS |
253 | static char banner[] __devinitdata = KERN_INFO PFX |
254 | "Watchdog Timer version " VERSION ", timer margin: %d sec\n"; | |
03ec5856 | 255 | |
d9a8798c | 256 | static int __devinit rc32434_wdt_probe(struct platform_device *pdev) |
03ec5856 FF |
257 | { |
258 | int ret; | |
259 | struct resource *r; | |
260 | ||
0af98d37 | 261 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rb532_wdt_res"); |
03ec5856 | 262 | if (!r) { |
9b655e07 | 263 | printk(KERN_ERR PFX "failed to retrieve resources\n"); |
03ec5856 FF |
264 | return -ENODEV; |
265 | } | |
266 | ||
267 | wdt_reg = ioremap_nocache(r->start, r->end - r->start); | |
268 | if (!wdt_reg) { | |
9b655e07 | 269 | printk(KERN_ERR PFX "failed to remap I/O resources\n"); |
03ec5856 FF |
270 | return -ENXIO; |
271 | } | |
272 | ||
08eb2e0c PS |
273 | /* Check that the heartbeat value is within it's range; |
274 | * if not reset to the default */ | |
275 | if (rc32434_wdt_set(timeout)) { | |
276 | rc32434_wdt_set(WATCHDOG_TIMEOUT); | |
277 | printk(KERN_INFO PFX | |
278 | "timeout value must be between 0 and %d\n", | |
279 | WTCOMP2SEC((u32)-1)); | |
280 | } | |
281 | ||
03ec5856 | 282 | ret = misc_register(&rc32434_wdt_miscdev); |
03ec5856 | 283 | if (ret < 0) { |
9b655e07 | 284 | printk(KERN_ERR PFX "failed to register watchdog device\n"); |
03ec5856 FF |
285 | goto unmap; |
286 | } | |
287 | ||
03ec5856 FF |
288 | printk(banner, timeout); |
289 | ||
290 | return 0; | |
291 | ||
292 | unmap: | |
293 | iounmap(wdt_reg); | |
294 | return ret; | |
295 | } | |
296 | ||
d9a8798c | 297 | static int __devexit rc32434_wdt_remove(struct platform_device *pdev) |
03ec5856 | 298 | { |
03ec5856 | 299 | misc_deregister(&rc32434_wdt_miscdev); |
03ec5856 | 300 | iounmap(wdt_reg); |
03ec5856 FF |
301 | return 0; |
302 | } | |
303 | ||
0aaae661 WVS |
304 | static void rc32434_wdt_shutdown(struct platform_device *pdev) |
305 | { | |
306 | rc32434_wdt_stop(); | |
307 | } | |
308 | ||
9b655e07 | 309 | static struct platform_driver rc32434_wdt_driver = { |
0aaae661 WVS |
310 | .probe = rc32434_wdt_probe, |
311 | .remove = __devexit_p(rc32434_wdt_remove), | |
312 | .shutdown = rc32434_wdt_shutdown, | |
313 | .driver = { | |
314 | .name = "rc32434_wdt", | |
03ec5856 FF |
315 | } |
316 | }; | |
317 | ||
318 | static int __init rc32434_wdt_init(void) | |
319 | { | |
9b655e07 | 320 | return platform_driver_register(&rc32434_wdt_driver); |
03ec5856 FF |
321 | } |
322 | ||
323 | static void __exit rc32434_wdt_exit(void) | |
324 | { | |
9b655e07 | 325 | platform_driver_unregister(&rc32434_wdt_driver); |
03ec5856 FF |
326 | } |
327 | ||
328 | module_init(rc32434_wdt_init); | |
329 | module_exit(rc32434_wdt_exit); | |
330 | ||
331 | MODULE_AUTHOR("Ondrej Zajicek <santiago@crfreenet.org>," | |
332 | "Florian Fainelli <florian@openwrt.org>"); | |
333 | MODULE_DESCRIPTION("Driver for the IDT RC32434 SoC watchdog"); | |
334 | MODULE_LICENSE("GPL"); | |
335 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); |