[mirror_ubuntu-hirsute-kernel.git] / drivers / watchdog / rti_wdt.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Watchdog driver for the K3 RTI module
 *
 * (c) Copyright 2019-2020 Texas Instruments Inc.
 * All rights reserved.
 */

#include <linux/clk.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/types.h>
#include <linux/watchdog.h>

#define DEFAULT_HEARTBEAT 60

/* Max heartbeat is calculated at 32kHz source clock */
#define MAX_HEARTBEAT	1000

/* Timer register set definition */
#define RTIDWDCTRL	0x90
#define RTIDWDPRLD	0x94
#define RTIWDSTATUS	0x98
#define RTIWDKEY	0x9c
#define RTIDWDCNTR	0xa0
#define RTIWWDRXCTRL	0xa4
#define RTIWWDSIZECTRL	0xa8

#define RTIWWDRX_NMI	0xa

#define RTIWWDSIZE_50P		0x50
#define RTIWWDSIZE_25P		0x500
#define RTIWWDSIZE_12P5		0x5000
#define RTIWWDSIZE_6P25		0x50000
#define RTIWWDSIZE_3P125	0x500000

#define WDENABLE_KEY	0xa98559da

#define WDKEY_SEQ0		0xe51a
#define WDKEY_SEQ1		0xa35c

#define WDT_PRELOAD_SHIFT	13

#define WDT_PRELOAD_MAX		0xfff

#define DWDST			BIT(1)

static int heartbeat = DEFAULT_HEARTBEAT;

/*
 * struct to hold data for each WDT device
 * @base - base io address of WD device
 * @freq - source clock frequency of WDT
 * @wdd  - hold watchdog device as is in WDT core
 */
struct rti_wdt_device {
	void __iomem		*base;
	unsigned long		freq;
	struct watchdog_device	wdd;
};

static int rti_wdt_start(struct watchdog_device *wdd)
{
	u32 timer_margin;
	struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);

	/* set timeout period */
	timer_margin = (u64)wdd->timeout * wdt->freq;
	timer_margin >>= WDT_PRELOAD_SHIFT;
	if (timer_margin > WDT_PRELOAD_MAX)
		timer_margin = WDT_PRELOAD_MAX;
	writel_relaxed(timer_margin, wdt->base + RTIDWDPRLD);

	/*
	 * RTI only supports a windowed mode, where the watchdog can only
	 * be petted during the open window; not too early or not too late.
	 * The HW configuration options only allow for the open window size
	 * to be 50% or less than that; we obviouly want to configure the open
	 * window as large as possible so we select the 50% option.
	 */
	wdd->min_hw_heartbeat_ms = 500 * wdd->timeout;

	/* Generate NMI when wdt expires */
	writel_relaxed(RTIWWDRX_NMI, wdt->base + RTIWWDRXCTRL);

	/* Open window size 50%; this is the largest window size available */
	writel_relaxed(RTIWWDSIZE_50P, wdt->base + RTIWWDSIZECTRL);

	readl_relaxed(wdt->base + RTIWWDSIZECTRL);

	/* enable watchdog */
	writel_relaxed(WDENABLE_KEY, wdt->base + RTIDWDCTRL);
	return 0;
}

static int rti_wdt_ping(struct watchdog_device *wdd)
{
	struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);

	/* put watchdog in service state */
	writel_relaxed(WDKEY_SEQ0, wdt->base + RTIWDKEY);
	/* put watchdog in active state */
	writel_relaxed(WDKEY_SEQ1, wdt->base + RTIWDKEY);

	return 0;
}

static int rti_wdt_setup_hw_hb(struct watchdog_device *wdd, u32 wsize)
{
	/*
	 * RTI only supports a windowed mode, where the watchdog can only
	 * be petted during the open window; not too early or not too late.
	 * The HW configuration options only allow for the open window size
	 * to be 50% or less than that.
	 */
	switch (wsize) {
	case RTIWWDSIZE_50P:
		/* 50% open window => 50% min heartbeat */
		wdd->min_hw_heartbeat_ms = 500 * heartbeat;
		break;

	case RTIWWDSIZE_25P:
		/* 25% open window => 75% min heartbeat */
		wdd->min_hw_heartbeat_ms = 750 * heartbeat;
		break;

	case RTIWWDSIZE_12P5:
		/* 12.5% open window => 87.5% min heartbeat */
		wdd->min_hw_heartbeat_ms = 875 * heartbeat;
		break;

	case RTIWWDSIZE_6P25:
		/* 6.5% open window => 93.5% min heartbeat */
		wdd->min_hw_heartbeat_ms = 935 * heartbeat;
		break;

	case RTIWWDSIZE_3P125:
		/* 3.125% open window => 96.9% min heartbeat */
		wdd->min_hw_heartbeat_ms = 969 * heartbeat;
		break;

	default:
		return -EINVAL;
	}

	return 0;
}

static unsigned int rti_wdt_get_timeleft_ms(struct watchdog_device *wdd)
{
	u64 timer_counter;
	u32 val;
	struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);

	/* if timeout has occurred then return 0 */
	val = readl_relaxed(wdt->base + RTIWDSTATUS);
	if (val & DWDST)
		return 0;

	timer_counter = readl_relaxed(wdt->base + RTIDWDCNTR);

	timer_counter *= 1000;

	do_div(timer_counter, wdt->freq);

	return timer_counter;
}

static unsigned int rti_wdt_get_timeleft(struct watchdog_device *wdd)
{
	return rti_wdt_get_timeleft_ms(wdd) / 1000;
}

static const struct watchdog_info rti_wdt_info = {
	.options = WDIOF_KEEPALIVEPING,
	.identity = "K3 RTI Watchdog",
};

static const struct watchdog_ops rti_wdt_ops = {
	.owner		= THIS_MODULE,
	.start		= rti_wdt_start,
	.ping		= rti_wdt_ping,
	.get_timeleft	= rti_wdt_get_timeleft,
};

static int rti_wdt_probe(struct platform_device *pdev)
{
	int ret = 0;
	struct device *dev = &pdev->dev;
	struct resource *wdt_mem;
	struct watchdog_device *wdd;
	struct rti_wdt_device *wdt;
	struct clk *clk;
	u32 last_ping = 0;

	wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
	if (!wdt)
		return -ENOMEM;

	clk = clk_get(dev, NULL);
	if (IS_ERR(clk))
		return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n");

	wdt->freq = clk_get_rate(clk);

	clk_put(clk);

	if (!wdt->freq) {
		dev_err(dev, "Failed to get fck rate.\n");
		return -EINVAL;
	}

	/*
	 * If watchdog is running at 32k clock, it is not accurate.
	 * Adjust frequency down in this case so that we don't pet
	 * the watchdog too often.
	 */
	if (wdt->freq < 32768)
		wdt->freq = wdt->freq * 9 / 10;

	pm_runtime_enable(dev);
	ret = pm_runtime_get_sync(dev);
	if (ret)
		return dev_err_probe(dev, ret, "runtime pm failed\n");

	platform_set_drvdata(pdev, wdt);

	wdd = &wdt->wdd;
	wdd->info = &rti_wdt_info;
	wdd->ops = &rti_wdt_ops;
	wdd->min_timeout = 1;
	wdd->max_hw_heartbeat_ms = (WDT_PRELOAD_MAX << WDT_PRELOAD_SHIFT) /
		wdt->freq * 1000;
	wdd->parent = dev;

	watchdog_set_drvdata(wdd, wdt);
	watchdog_set_nowayout(wdd, 1);
	watchdog_set_restart_priority(wdd, 128);

	wdt_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	wdt->base = devm_ioremap_resource(dev, wdt_mem);
	if (IS_ERR(wdt->base)) {
		ret = PTR_ERR(wdt->base);
		goto err_iomap;
	}

	if (readl(wdt->base + RTIDWDCTRL) == WDENABLE_KEY) {
		u32 time_left_ms;
		u64 heartbeat_ms;
		u32 wsize;

		set_bit(WDOG_HW_RUNNING, &wdd->status);
		time_left_ms = rti_wdt_get_timeleft_ms(wdd);
		heartbeat_ms = readl(wdt->base + RTIDWDPRLD);
		heartbeat_ms <<= WDT_PRELOAD_SHIFT;
		heartbeat_ms *= 1000;
		do_div(heartbeat_ms, wdt->freq);
		if (heartbeat_ms != heartbeat * 1000)
			dev_warn(dev, "watchdog already running, ignoring heartbeat config!\n");

		heartbeat = heartbeat_ms;
		heartbeat /= 1000;

		wsize = readl(wdt->base + RTIWWDSIZECTRL);
		ret = rti_wdt_setup_hw_hb(wdd, wsize);
		if (ret) {
			dev_err(dev, "bad window size.\n");
			goto err_iomap;
		}

		last_ping = heartbeat_ms - time_left_ms;
		if (time_left_ms > heartbeat_ms) {
			dev_warn(dev, "time_left > heartbeat? Assuming last ping just before now.\n");
			last_ping = 0;
		}
	}

	watchdog_init_timeout(wdd, heartbeat, dev);

	ret = watchdog_register_device(wdd);
	if (ret) {
		dev_err(dev, "cannot register watchdog device\n");
		goto err_iomap;
	}

	if (last_ping)
		watchdog_set_last_hw_keepalive(wdd, last_ping);

	return 0;

err_iomap:
	pm_runtime_put_sync(&pdev->dev);
	pm_runtime_disable(&pdev->dev);

	return ret;
}

static int rti_wdt_remove(struct platform_device *pdev)
{
	struct rti_wdt_device *wdt = platform_get_drvdata(pdev);

	watchdog_unregister_device(&wdt->wdd);
	pm_runtime_put(&pdev->dev);
	pm_runtime_disable(&pdev->dev);

	return 0;
}

static const struct of_device_id rti_wdt_of_match[] = {
	{ .compatible = "ti,j7-rti-wdt", },
	{},
};
MODULE_DEVICE_TABLE(of, rti_wdt_of_match);

static struct platform_driver rti_wdt_driver = {
	.driver = {
		.name = "rti-wdt",
		.of_match_table = rti_wdt_of_match,
	},
	.probe = rti_wdt_probe,
	.remove = rti_wdt_remove,
};

module_platform_driver(rti_wdt_driver);

MODULE_AUTHOR("Tero Kristo <t-kristo@ti.com>");
MODULE_DESCRIPTION("K3 RTI Watchdog Driver");

module_param(heartbeat, int, 0);
MODULE_PARM_DESC(heartbeat,
		 "Watchdog heartbeat period in seconds from 1 to "
		 __MODULE_STRING(MAX_HEARTBEAT) ", default "
		 __MODULE_STRING(DEFAULT_HEARTBEAT));

MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:rti-wdt");
Commit	Line	Data
2d63908b TK	1	// SPDX-License-Identifier: GPL-2.0
	2	/*
	3	* Watchdog driver for the K3 RTI module
	4	*
	5	* (c) Copyright 2019-2020 Texas Instruments Inc.
	6	* All rights reserved.
	7	*/
	8
	9	#include <linux/clk.h>
	10	#include <linux/device.h>
	11	#include <linux/err.h>
	12	#include <linux/io.h>
	13	#include <linux/kernel.h>
	14	#include <linux/mod_devicetable.h>
	15	#include <linux/module.h>
	16	#include <linux/moduleparam.h>
	17	#include <linux/platform_device.h>
	18	#include <linux/pm_runtime.h>
	19	#include <linux/types.h>
	20	#include <linux/watchdog.h>
	21
	22	#define DEFAULT_HEARTBEAT 60
	23
	24	/* Max heartbeat is calculated at 32kHz source clock */
	25	#define MAX_HEARTBEAT 1000
	26
	27	/* Timer register set definition */
	28	#define RTIDWDCTRL 0x90
	29	#define RTIDWDPRLD 0x94
	30	#define RTIWDSTATUS 0x98
	31	#define RTIWDKEY 0x9c
	32	#define RTIDWDCNTR 0xa0
	33	#define RTIWWDRXCTRL 0xa4
	34	#define RTIWWDSIZECTRL 0xa8
	35
	36	#define RTIWWDRX_NMI 0xa
	37
5527483f TK	38	#define RTIWWDSIZE_50P 0x50
	39	#define RTIWWDSIZE_25P 0x500
	40	#define RTIWWDSIZE_12P5 0x5000
	41	#define RTIWWDSIZE_6P25 0x50000
	42	#define RTIWWDSIZE_3P125 0x500000
2d63908b TK	43
	44	#define WDENABLE_KEY 0xa98559da
	45
	46	#define WDKEY_SEQ0 0xe51a
	47	#define WDKEY_SEQ1 0xa35c
	48
	49	#define WDT_PRELOAD_SHIFT 13
	50
	51	#define WDT_PRELOAD_MAX 0xfff
	52
	53	#define DWDST BIT(1)
	54
5527483f	55	static int heartbeat = DEFAULT_HEARTBEAT;
2d63908b TK	56
	57	/*
	58	* struct to hold data for each WDT device
	59	* @base - base io address of WD device
	60	* @freq - source clock frequency of WDT
	61	* @wdd - hold watchdog device as is in WDT core
	62	*/
	63	struct rti_wdt_device {
	64	void __iomem *base;
	65	unsigned long freq;
	66	struct watchdog_device wdd;
	67	};
	68
	69	static int rti_wdt_start(struct watchdog_device *wdd)
	70	{
	71	u32 timer_margin;
	72	struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
	73
	74	/* set timeout period */
	75	timer_margin = (u64)wdd->timeout * wdt->freq;
	76	timer_margin >>= WDT_PRELOAD_SHIFT;
	77	if (timer_margin > WDT_PRELOAD_MAX)
	78	timer_margin = WDT_PRELOAD_MAX;
	79	writel_relaxed(timer_margin, wdt->base + RTIDWDPRLD);
	80
	81	/*
	82	* RTI only supports a windowed mode, where the watchdog can only
	83	* be petted during the open window; not too early or not too late.
	84	* The HW configuration options only allow for the open window size
	85	* to be 50% or less than that; we obviouly want to configure the open
5527483f	86	* window as large as possible so we select the 50% option.
2d63908b	87	*/
5527483f	88	wdd->min_hw_heartbeat_ms = 500 * wdd->timeout;
2d63908b TK	89
	90	/* Generate NMI when wdt expires */
	91	writel_relaxed(RTIWWDRX_NMI, wdt->base + RTIWWDRXCTRL);
	92
	93	/* Open window size 50%; this is the largest window size available */
	94	writel_relaxed(RTIWWDSIZE_50P, wdt->base + RTIWWDSIZECTRL);
	95
	96	readl_relaxed(wdt->base + RTIWWDSIZECTRL);
	97
	98	/* enable watchdog */
	99	writel_relaxed(WDENABLE_KEY, wdt->base + RTIDWDCTRL);
	100	return 0;
	101	}
	102
	103	static int rti_wdt_ping(struct watchdog_device *wdd)
	104	{
	105	struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
	106
	107	/* put watchdog in service state */
	108	writel_relaxed(WDKEY_SEQ0, wdt->base + RTIWDKEY);
	109	/* put watchdog in active state */
	110	writel_relaxed(WDKEY_SEQ1, wdt->base + RTIWDKEY);
	111
	112	return 0;
	113	}
	114
5527483f TK	115	static int rti_wdt_setup_hw_hb(struct watchdog_device *wdd, u32 wsize)
	116	{
	117	/*
	118	* RTI only supports a windowed mode, where the watchdog can only
	119	* be petted during the open window; not too early or not too late.
	120	* The HW configuration options only allow for the open window size
	121	* to be 50% or less than that.
	122	*/
	123	switch (wsize) {
	124	case RTIWWDSIZE_50P:
	125	/* 50% open window => 50% min heartbeat */
	126	wdd->min_hw_heartbeat_ms = 500 * heartbeat;
	127	break;
	128
	129	case RTIWWDSIZE_25P:
	130	/* 25% open window => 75% min heartbeat */
	131	wdd->min_hw_heartbeat_ms = 750 * heartbeat;
	132	break;
	133
	134	case RTIWWDSIZE_12P5:
	135	/* 12.5% open window => 87.5% min heartbeat */
	136	wdd->min_hw_heartbeat_ms = 875 * heartbeat;
	137	break;
	138
	139	case RTIWWDSIZE_6P25:
	140	/* 6.5% open window => 93.5% min heartbeat */
	141	wdd->min_hw_heartbeat_ms = 935 * heartbeat;
	142	break;
	143
	144	case RTIWWDSIZE_3P125:
	145	/* 3.125% open window => 96.9% min heartbeat */
	146	wdd->min_hw_heartbeat_ms = 969 * heartbeat;
	147	break;
	148
	149	default:
	150	return -EINVAL;
	151	}
	152
	153	return 0;
	154	}
	155
	156	static unsigned int rti_wdt_get_timeleft_ms(struct watchdog_device *wdd)
2d63908b TK	157	{
	158	u64 timer_counter;
	159	u32 val;
	160	struct rti_wdt_device *wdt = watchdog_get_drvdata(wdd);
	161
	162	/* if timeout has occurred then return 0 */
	163	val = readl_relaxed(wdt->base + RTIWDSTATUS);
	164	if (val & DWDST)
	165	return 0;
	166
	167	timer_counter = readl_relaxed(wdt->base + RTIDWDCNTR);
	168
5527483f TK	169	timer_counter *= 1000;
5527483f TK	170
2d63908b TK	171	do_div(timer_counter, wdt->freq);
	172
	173	return timer_counter;
	174	}
	175
5527483f TK	176	static unsigned int rti_wdt_get_timeleft(struct watchdog_device *wdd)
	177	{
	178	return rti_wdt_get_timeleft_ms(wdd) / 1000;
	179	}
	180
2d63908b TK	181	static const struct watchdog_info rti_wdt_info = {
	182	.options = WDIOF_KEEPALIVEPING,
	183	.identity = "K3 RTI Watchdog",
	184	};
	185
	186	static const struct watchdog_ops rti_wdt_ops = {
	187	.owner = THIS_MODULE,
	188	.start = rti_wdt_start,
	189	.ping = rti_wdt_ping,
	190	.get_timeleft = rti_wdt_get_timeleft,
	191	};
	192
	193	static int rti_wdt_probe(struct platform_device *pdev)
	194	{
	195	int ret = 0;
	196	struct device *dev = &pdev->dev;
	197	struct resource *wdt_mem;
	198	struct watchdog_device *wdd;
	199	struct rti_wdt_device *wdt;
	200	struct clk *clk;
5527483f	201	u32 last_ping = 0;
2d63908b TK	202
	203	wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
	204	if (!wdt)
	205	return -ENOMEM;
	206
	207	clk = clk_get(dev, NULL);
d342951b KK	208	if (IS_ERR(clk))
d342951b KK	209	return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n");
2d63908b TK	210
	211	wdt->freq = clk_get_rate(clk);
	212
	213	clk_put(clk);
	214
	215	if (!wdt->freq) {
	216	dev_err(dev, "Failed to get fck rate.\n");
	217	return -EINVAL;
	218	}
	219
5527483f TK	220	/*
	221	* If watchdog is running at 32k clock, it is not accurate.
	222	* Adjust frequency down in this case so that we don't pet
	223	* the watchdog too often.
	224	*/
	225	if (wdt->freq < 32768)
	226	wdt->freq = wdt->freq * 9 / 10;
	227
2d63908b TK	228	pm_runtime_enable(dev);
2d63908b TK	229	ret = pm_runtime_get_sync(dev);
d342951b KK	230	if (ret)
d342951b KK	231	return dev_err_probe(dev, ret, "runtime pm failed\n");
2d63908b TK	232
	233	platform_set_drvdata(pdev, wdt);
	234
	235	wdd = &wdt->wdd;
	236	wdd->info = &rti_wdt_info;
	237	wdd->ops = &rti_wdt_ops;
	238	wdd->min_timeout = 1;
	239	wdd->max_hw_heartbeat_ms = (WDT_PRELOAD_MAX << WDT_PRELOAD_SHIFT) /
	240	wdt->freq * 1000;
2d63908b TK	241	wdd->parent = dev;
2d63908b TK	242
2d63908b TK	243	watchdog_set_drvdata(wdd, wdt);
	244	watchdog_set_nowayout(wdd, 1);
	245	watchdog_set_restart_priority(wdd, 128);
	246
	247	wdt_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	248	wdt->base = devm_ioremap_resource(dev, wdt_mem);
	249	if (IS_ERR(wdt->base)) {
	250	ret = PTR_ERR(wdt->base);
	251	goto err_iomap;
	252	}
	253
5527483f TK	254	if (readl(wdt->base + RTIDWDCTRL) == WDENABLE_KEY) {
	255	u32 time_left_ms;
	256	u64 heartbeat_ms;
	257	u32 wsize;
	258
	259	set_bit(WDOG_HW_RUNNING, &wdd->status);
	260	time_left_ms = rti_wdt_get_timeleft_ms(wdd);
	261	heartbeat_ms = readl(wdt->base + RTIDWDPRLD);
	262	heartbeat_ms <<= WDT_PRELOAD_SHIFT;
	263	heartbeat_ms *= 1000;
	264	do_div(heartbeat_ms, wdt->freq);
	265	if (heartbeat_ms != heartbeat * 1000)
	266	dev_warn(dev, "watchdog already running, ignoring heartbeat config!\n");
	267
	268	heartbeat = heartbeat_ms;
	269	heartbeat /= 1000;
	270
	271	wsize = readl(wdt->base + RTIWWDSIZECTRL);
	272	ret = rti_wdt_setup_hw_hb(wdd, wsize);
	273	if (ret) {
	274	dev_err(dev, "bad window size.\n");
	275	goto err_iomap;
	276	}
	277
	278	last_ping = heartbeat_ms - time_left_ms;
	279	if (time_left_ms > heartbeat_ms) {
	280	dev_warn(dev, "time_left > heartbeat? Assuming last ping just before now.\n");
	281	last_ping = 0;
	282	}
	283	}
	284
	285	watchdog_init_timeout(wdd, heartbeat, dev);
	286
2d63908b TK	287	ret = watchdog_register_device(wdd);
	288	if (ret) {
	289	dev_err(dev, "cannot register watchdog device\n");
	290	goto err_iomap;
	291	}
	292
5527483f TK	293	if (last_ping)
	294	watchdog_set_last_hw_keepalive(wdd, last_ping);
	295
2d63908b TK	296	return 0;
	297
	298	err_iomap:
	299	pm_runtime_put_sync(&pdev->dev);
d5b29c2c	300	pm_runtime_disable(&pdev->dev);
2d63908b TK	301
	302	return ret;
	303	}
	304
	305	static int rti_wdt_remove(struct platform_device *pdev)
	306	{
	307	struct rti_wdt_device *wdt = platform_get_drvdata(pdev);
	308
	309	watchdog_unregister_device(&wdt->wdd);
	310	pm_runtime_put(&pdev->dev);
d5b29c2c	311	pm_runtime_disable(&pdev->dev);
2d63908b TK	312
	313	return 0;
	314	}
	315
	316	static const struct of_device_id rti_wdt_of_match[] = {
	317	{ .compatible = "ti,j7-rti-wdt", },
	318	{},
	319	};
	320	MODULE_DEVICE_TABLE(of, rti_wdt_of_match);
	321
	322	static struct platform_driver rti_wdt_driver = {
	323	.driver = {
	324	.name = "rti-wdt",
	325	.of_match_table = rti_wdt_of_match,
	326	},
	327	.probe = rti_wdt_probe,
	328	.remove = rti_wdt_remove,
	329	};
	330
	331	module_platform_driver(rti_wdt_driver);
	332
	333	MODULE_AUTHOR("Tero Kristo <t-kristo@ti.com>");
	334	MODULE_DESCRIPTION("K3 RTI Watchdog Driver");
	335
	336	module_param(heartbeat, int, 0);
	337	MODULE_PARM_DESC(heartbeat,
	338	"Watchdog heartbeat period in seconds from 1 to "
	339	__MODULE_STRING(MAX_HEARTBEAT) ", default "
	340	__MODULE_STRING(DEFAULT_HEARTBEAT));
	341
	342	MODULE_LICENSE("GPL");
	343	MODULE_ALIAS("platform:rti-wdt");