[mirror_ubuntu-bionic-kernel.git] / drivers / watchdog / sama5d4_wdt.c

/*
 * Driver for Atmel SAMA5D4 Watchdog Timer
 *
 * Copyright (C) 2015 Atmel Corporation
 *
 * Licensed under GPLv2.
 */

#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_irq.h>
#include <linux/platform_device.h>
#include <linux/reboot.h>
#include <linux/watchdog.h>

#include "at91sam9_wdt.h"

/* minimum and maximum watchdog timeout, in seconds */
#define MIN_WDT_TIMEOUT		1
#define MAX_WDT_TIMEOUT		16
#define WDT_DEFAULT_TIMEOUT	MAX_WDT_TIMEOUT

#define WDT_SEC2TICKS(s)	((s) ? (((s) << 8) - 1) : 0)

struct sama5d4_wdt {
	struct watchdog_device	wdd;
	void __iomem		*reg_base;
	u32			mr;
	unsigned long		last_ping;
};

static int wdt_timeout = WDT_DEFAULT_TIMEOUT;
static bool nowayout = WATCHDOG_NOWAYOUT;

module_param(wdt_timeout, int, 0);
MODULE_PARM_DESC(wdt_timeout,
	"Watchdog timeout in seconds. (default = "
	__MODULE_STRING(WDT_DEFAULT_TIMEOUT) ")");

module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout,
	"Watchdog cannot be stopped once started (default="
	__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

#define wdt_enabled (!(wdt->mr & AT91_WDT_WDDIS))

#define wdt_read(wdt, field) \
	readl_relaxed((wdt)->reg_base + (field))

/* 4 slow clock periods is 4/32768 = 122.07µs*/
#define WDT_DELAY	usecs_to_jiffies(123)

static void wdt_write(struct sama5d4_wdt *wdt, u32 field, u32 val)
{
	/*
	 * WDT_CR and WDT_MR must not be modified within three slow clock
	 * periods following a restart of the watchdog performed by a write
	 * access in WDT_CR.
	 */
	while (time_before(jiffies, wdt->last_ping + WDT_DELAY))
		usleep_range(30, 125);
	writel_relaxed(val, wdt->reg_base + field);
	wdt->last_ping = jiffies;
}

static void wdt_write_nosleep(struct sama5d4_wdt *wdt, u32 field, u32 val)
{
	if (time_before(jiffies, wdt->last_ping + WDT_DELAY))
		udelay(123);
	writel_relaxed(val, wdt->reg_base + field);
	wdt->last_ping = jiffies;
}

static int sama5d4_wdt_start(struct watchdog_device *wdd)
{
	struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);

	wdt->mr &= ~AT91_WDT_WDDIS;
	wdt_write(wdt, AT91_WDT_MR, wdt->mr);

	return 0;
}

static int sama5d4_wdt_stop(struct watchdog_device *wdd)
{
	struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);

	wdt->mr |= AT91_WDT_WDDIS;
	wdt_write(wdt, AT91_WDT_MR, wdt->mr);

	return 0;
}

static int sama5d4_wdt_ping(struct watchdog_device *wdd)
{
	struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);

	wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);

	return 0;
}

static int sama5d4_wdt_set_timeout(struct watchdog_device *wdd,
				 unsigned int timeout)
{
	struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
	u32 value = WDT_SEC2TICKS(timeout);

	wdt->mr &= ~AT91_WDT_WDV;
	wdt->mr |= AT91_WDT_SET_WDV(value);

	/*
	 * WDDIS has to be 0 when updating WDD/WDV. The datasheet states: When
	 * setting the WDDIS bit, and while it is set, the fields WDV and WDD
	 * must not be modified.
	 * If the watchdog is enabled, then the timeout can be updated. Else,
	 * wait that the user enables it.
	 */
	if (wdt_enabled)
		wdt_write(wdt, AT91_WDT_MR, wdt->mr & ~AT91_WDT_WDDIS);

	wdd->timeout = timeout;

	return 0;
}

static const struct watchdog_info sama5d4_wdt_info = {
	.options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
	.identity = "Atmel SAMA5D4 Watchdog",
};

static const struct watchdog_ops sama5d4_wdt_ops = {
	.owner = THIS_MODULE,
	.start = sama5d4_wdt_start,
	.stop = sama5d4_wdt_stop,
	.ping = sama5d4_wdt_ping,
	.set_timeout = sama5d4_wdt_set_timeout,
};

static irqreturn_t sama5d4_wdt_irq_handler(int irq, void *dev_id)
{
	struct sama5d4_wdt *wdt = platform_get_drvdata(dev_id);

	if (wdt_read(wdt, AT91_WDT_SR)) {
		pr_crit("Atmel Watchdog Software Reset\n");
		emergency_restart();
		pr_crit("Reboot didn't succeed\n");
	}

	return IRQ_HANDLED;
}

static int of_sama5d4_wdt_init(struct device_node *np, struct sama5d4_wdt *wdt)
{
	const char *tmp;

	wdt->mr = AT91_WDT_WDDIS;

	if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) &&
	    !strcmp(tmp, "software"))
		wdt->mr |= AT91_WDT_WDFIEN;
	else
		wdt->mr |= AT91_WDT_WDRSTEN;

	if (of_property_read_bool(np, "atmel,idle-halt"))
		wdt->mr |= AT91_WDT_WDIDLEHLT;

	if (of_property_read_bool(np, "atmel,dbg-halt"))
		wdt->mr |= AT91_WDT_WDDBGHLT;

	return 0;
}

static int sama5d4_wdt_init(struct sama5d4_wdt *wdt)
{
	u32 reg;
	/*
	 * When booting and resuming, the bootloader may have changed the
	 * watchdog configuration.
	 * If the watchdog is already running, we can safely update it.
	 * Else, we have to disable it properly.
	 */
	if (wdt_enabled) {
		wdt_write_nosleep(wdt, AT91_WDT_MR, wdt->mr);
	} else {
		reg = wdt_read(wdt, AT91_WDT_MR);
		if (!(reg & AT91_WDT_WDDIS))
			wdt_write_nosleep(wdt, AT91_WDT_MR,
					  reg | AT91_WDT_WDDIS);
	}
	return 0;
}

static int sama5d4_wdt_probe(struct platform_device *pdev)
{
	struct watchdog_device *wdd;
	struct sama5d4_wdt *wdt;
	struct resource *res;
	void __iomem *regs;
	u32 irq = 0;
	u32 timeout;
	int ret;

	wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
	if (!wdt)
		return -ENOMEM;

	wdd = &wdt->wdd;
	wdd->timeout = wdt_timeout;
	wdd->info = &sama5d4_wdt_info;
	wdd->ops = &sama5d4_wdt_ops;
	wdd->min_timeout = MIN_WDT_TIMEOUT;
	wdd->max_timeout = MAX_WDT_TIMEOUT;
	wdt->last_ping = jiffies;

	watchdog_set_drvdata(wdd, wdt);

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	regs = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(regs))
		return PTR_ERR(regs);

	wdt->reg_base = regs;

	irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
	if (!irq)
		dev_warn(&pdev->dev, "failed to get IRQ from DT\n");

	ret = of_sama5d4_wdt_init(pdev->dev.of_node, wdt);
	if (ret)
		return ret;

	if ((wdt->mr & AT91_WDT_WDFIEN) && irq) {
		ret = devm_request_irq(&pdev->dev, irq, sama5d4_wdt_irq_handler,
				       IRQF_SHARED | IRQF_IRQPOLL |
				       IRQF_NO_SUSPEND, pdev->name, pdev);
		if (ret) {
			dev_err(&pdev->dev,
				"cannot register interrupt handler\n");
			return ret;
		}
	}

	watchdog_init_timeout(wdd, wdt_timeout, &pdev->dev);

	timeout = WDT_SEC2TICKS(wdd->timeout);

	wdt->mr |= AT91_WDT_SET_WDD(WDT_SEC2TICKS(MAX_WDT_TIMEOUT));
	wdt->mr |= AT91_WDT_SET_WDV(timeout);

	ret = sama5d4_wdt_init(wdt);
	if (ret)
		return ret;

	watchdog_set_nowayout(wdd, nowayout);

	ret = watchdog_register_device(wdd);
	if (ret) {
		dev_err(&pdev->dev, "failed to register watchdog device\n");
		return ret;
	}

	platform_set_drvdata(pdev, wdt);

	dev_info(&pdev->dev, "initialized (timeout = %d sec, nowayout = %d)\n",
		 wdt_timeout, nowayout);

	return 0;
}

static int sama5d4_wdt_remove(struct platform_device *pdev)
{
	struct sama5d4_wdt *wdt = platform_get_drvdata(pdev);

	sama5d4_wdt_stop(&wdt->wdd);

	watchdog_unregister_device(&wdt->wdd);

	return 0;
}

static const struct of_device_id sama5d4_wdt_of_match[] = {
	{ .compatible = "atmel,sama5d4-wdt", },
	{ }
};
MODULE_DEVICE_TABLE(of, sama5d4_wdt_of_match);

#ifdef CONFIG_PM_SLEEP
static int sama5d4_wdt_resume(struct device *dev)
{
	struct sama5d4_wdt *wdt = dev_get_drvdata(dev);

	/*
	 * FIXME: writing MR also pings the watchdog which may not be desired.
	 * This should only be done when the registers are lost on suspend but
	 * there is no way to get this information right now.
	 */
	sama5d4_wdt_init(wdt);

	return 0;
}
#endif

static SIMPLE_DEV_PM_OPS(sama5d4_wdt_pm_ops, NULL,
			 sama5d4_wdt_resume);

static struct platform_driver sama5d4_wdt_driver = {
	.probe		= sama5d4_wdt_probe,
	.remove		= sama5d4_wdt_remove,
	.driver		= {
		.name	= "sama5d4_wdt",
		.pm	= &sama5d4_wdt_pm_ops,
		.of_match_table = sama5d4_wdt_of_match,
	}
};
module_platform_driver(sama5d4_wdt_driver);

MODULE_AUTHOR("Atmel Corporation");
MODULE_DESCRIPTION("Atmel SAMA5D4 Watchdog Timer driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
76534860 WY	1	/*
	2	* Driver for Atmel SAMA5D4 Watchdog Timer
	3	*
	4	* Copyright (C) 2015 Atmel Corporation
	5	*
	6	* Licensed under GPLv2.
	7	*/
	8
ddd6d240	9	#include <linux/delay.h>
76534860 WY	10	#include <linux/interrupt.h>
	11	#include <linux/io.h>
	12	#include <linux/kernel.h>
	13	#include <linux/module.h>
	14	#include <linux/of.h>
	15	#include <linux/of_irq.h>
	16	#include <linux/platform_device.h>
	17	#include <linux/reboot.h>
	18	#include <linux/watchdog.h>
	19
	20	#include "at91sam9_wdt.h"
	21
	22	/* minimum and maximum watchdog timeout, in seconds */
	23	#define MIN_WDT_TIMEOUT 1
	24	#define MAX_WDT_TIMEOUT 16
	25	#define WDT_DEFAULT_TIMEOUT MAX_WDT_TIMEOUT
	26
	27	#define WDT_SEC2TICKS(s) ((s) ? (((s) << 8) - 1) : 0)
	28
	29	struct sama5d4_wdt {
	30	struct watchdog_device wdd;
	31	void __iomem *reg_base;
722ce635	32	u32 mr;
ddd6d240	33	unsigned long last_ping;
76534860 WY	34	};
	35
	36	static int wdt_timeout = WDT_DEFAULT_TIMEOUT;
	37	static bool nowayout = WATCHDOG_NOWAYOUT;
	38
	39	module_param(wdt_timeout, int, 0);
	40	MODULE_PARM_DESC(wdt_timeout,
	41	"Watchdog timeout in seconds. (default = "
	42	__MODULE_STRING(WDT_DEFAULT_TIMEOUT) ")");
	43
	44	module_param(nowayout, bool, 0);
	45	MODULE_PARM_DESC(nowayout,
	46	"Watchdog cannot be stopped once started (default="
	47	__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	48
015b5286 AB	49	#define wdt_enabled (!(wdt->mr & AT91_WDT_WDDIS))
015b5286 AB	50
76534860 WY	51	#define wdt_read(wdt, field) \
	52	readl_relaxed((wdt)->reg_base + (field))
	53
ddd6d240 AB	54	/* 4 slow clock periods is 4/32768 = 122.07µs*/
	55	#define WDT_DELAY usecs_to_jiffies(123)
	56
	57	static void wdt_write(struct sama5d4_wdt *wdt, u32 field, u32 val)
	58	{
	59	/*
	60	* WDT_CR and WDT_MR must not be modified within three slow clock
	61	* periods following a restart of the watchdog performed by a write
	62	* access in WDT_CR.
	63	*/
	64	while (time_before(jiffies, wdt->last_ping + WDT_DELAY))
	65	usleep_range(30, 125);
	66	writel_relaxed(val, wdt->reg_base + field);
	67	wdt->last_ping = jiffies;
	68	}
	69
	70	static void wdt_write_nosleep(struct sama5d4_wdt *wdt, u32 field, u32 val)
	71	{
	72	if (time_before(jiffies, wdt->last_ping + WDT_DELAY))
	73	udelay(123);
	74	writel_relaxed(val, wdt->reg_base + field);
	75	wdt->last_ping = jiffies;
	76	}
76534860 WY	77
	78	static int sama5d4_wdt_start(struct watchdog_device *wdd)
	79	{
	80	struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
76534860	81
722ce635 AB	82	wdt->mr &= ~AT91_WDT_WDDIS;
722ce635 AB	83	wdt_write(wdt, AT91_WDT_MR, wdt->mr);
76534860 WY	84
	85	return 0;
	86	}
	87
	88	static int sama5d4_wdt_stop(struct watchdog_device *wdd)
	89	{
	90	struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
76534860	91
722ce635 AB	92	wdt->mr \|= AT91_WDT_WDDIS;
722ce635 AB	93	wdt_write(wdt, AT91_WDT_MR, wdt->mr);
76534860 WY	94
	95	return 0;
	96	}
	97
	98	static int sama5d4_wdt_ping(struct watchdog_device *wdd)
	99	{
	100	struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
	101
	102	wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY \| AT91_WDT_WDRSTT);
	103
	104	return 0;
	105	}
	106
	107	static int sama5d4_wdt_set_timeout(struct watchdog_device *wdd,
	108	unsigned int timeout)
	109	{
	110	struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
	111	u32 value = WDT_SEC2TICKS(timeout);
76534860	112
722ce635	113	wdt->mr &= ~AT91_WDT_WDV;
722ce635	114	wdt->mr \|= AT91_WDT_SET_WDV(value);
015b5286 AB	115
	116	/*
	117	* WDDIS has to be 0 when updating WDD/WDV. The datasheet states: When
	118	* setting the WDDIS bit, and while it is set, the fields WDV and WDD
	119	* must not be modified.
	120	* If the watchdog is enabled, then the timeout can be updated. Else,
	121	* wait that the user enables it.
	122	*/
	123	if (wdt_enabled)
	124	wdt_write(wdt, AT91_WDT_MR, wdt->mr & ~AT91_WDT_WDDIS);
76534860 WY	125
	126	wdd->timeout = timeout;
	127
	128	return 0;
	129	}
	130
	131	static const struct watchdog_info sama5d4_wdt_info = {
	132	.options = WDIOF_SETTIMEOUT \| WDIOF_MAGICCLOSE \| WDIOF_KEEPALIVEPING,
	133	.identity = "Atmel SAMA5D4 Watchdog",
	134	};
	135
b893e344	136	static const struct watchdog_ops sama5d4_wdt_ops = {
76534860 WY	137	.owner = THIS_MODULE,
	138	.start = sama5d4_wdt_start,
	139	.stop = sama5d4_wdt_stop,
	140	.ping = sama5d4_wdt_ping,
	141	.set_timeout = sama5d4_wdt_set_timeout,
	142	};
	143
	144	static irqreturn_t sama5d4_wdt_irq_handler(int irq, void *dev_id)
	145	{
	146	struct sama5d4_wdt *wdt = platform_get_drvdata(dev_id);
	147
	148	if (wdt_read(wdt, AT91_WDT_SR)) {
	149	pr_crit("Atmel Watchdog Software Reset\n");
	150	emergency_restart();
	151	pr_crit("Reboot didn't succeed\n");
	152	}
	153
	154	return IRQ_HANDLED;
	155	}
	156
	157	static int of_sama5d4_wdt_init(struct device_node np, struct sama5d4_wdt wdt)
	158	{
	159	const char *tmp;
	160
722ce635	161	wdt->mr = AT91_WDT_WDDIS;
76534860 WY	162
	163	if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) &&
	164	!strcmp(tmp, "software"))
722ce635	165	wdt->mr \|= AT91_WDT_WDFIEN;
76534860	166	else
722ce635	167	wdt->mr \|= AT91_WDT_WDRSTEN;
76534860 WY	168
76534860 WY	169	if (of_property_read_bool(np, "atmel,idle-halt"))
722ce635	170	wdt->mr \|= AT91_WDT_WDIDLEHLT;
76534860 WY	171
76534860 WY	172	if (of_property_read_bool(np, "atmel,dbg-halt"))
722ce635	173	wdt->mr \|= AT91_WDT_WDDBGHLT;
76534860 WY	174
	175	return 0;
	176	}
	177
	178	static int sama5d4_wdt_init(struct sama5d4_wdt *wdt)
	179	{
76534860	180	u32 reg;
76534860	181	/*
015b5286 AB	182	* When booting and resuming, the bootloader may have changed the
	183	* watchdog configuration.
	184	* If the watchdog is already running, we can safely update it.
	185	* Else, we have to disable it properly.
76534860	186	*/
015b5286	187	if (wdt_enabled) {
ddd6d240	188	wdt_write_nosleep(wdt, AT91_WDT_MR, wdt->mr);
015b5286 AB	189	} else {
	190	reg = wdt_read(wdt, AT91_WDT_MR);
	191	if (!(reg & AT91_WDT_WDDIS))
ddd6d240 AB	192	wdt_write_nosleep(wdt, AT91_WDT_MR,
ddd6d240 AB	193	reg \| AT91_WDT_WDDIS);
015b5286	194	}
76534860 WY	195	return 0;
	196	}
	197
	198	static int sama5d4_wdt_probe(struct platform_device *pdev)
	199	{
	200	struct watchdog_device *wdd;
	201	struct sama5d4_wdt *wdt;
	202	struct resource *res;
	203	void __iomem *regs;
	204	u32 irq = 0;
015b5286	205	u32 timeout;
76534860 WY	206	int ret;
	207
	208	wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
	209	if (!wdt)
	210	return -ENOMEM;
	211
	212	wdd = &wdt->wdd;
	213	wdd->timeout = wdt_timeout;
	214	wdd->info = &sama5d4_wdt_info;
	215	wdd->ops = &sama5d4_wdt_ops;
	216	wdd->min_timeout = MIN_WDT_TIMEOUT;
	217	wdd->max_timeout = MAX_WDT_TIMEOUT;
ddd6d240	218	wdt->last_ping = jiffies;
76534860 WY	219
	220	watchdog_set_drvdata(wdd, wdt);
	221
	222	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	223	regs = devm_ioremap_resource(&pdev->dev, res);
	224	if (IS_ERR(regs))
	225	return PTR_ERR(regs);
	226
	227	wdt->reg_base = regs;
	228
39bd56df AB	229	irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
	230	if (!irq)
	231	dev_warn(&pdev->dev, "failed to get IRQ from DT\n");
76534860	232
39bd56df AB	233	ret = of_sama5d4_wdt_init(pdev->dev.of_node, wdt);
	234	if (ret)
	235	return ret;
76534860	236
722ce635	237	if ((wdt->mr & AT91_WDT_WDFIEN) && irq) {
76534860 WY	238	ret = devm_request_irq(&pdev->dev, irq, sama5d4_wdt_irq_handler,
	239	IRQF_SHARED \| IRQF_IRQPOLL \|
	240	IRQF_NO_SUSPEND, pdev->name, pdev);
	241	if (ret) {
	242	dev_err(&pdev->dev,
	243	"cannot register interrupt handler\n");
	244	return ret;
	245	}
	246	}
	247
a3b0a334	248	watchdog_init_timeout(wdd, wdt_timeout, &pdev->dev);
76534860	249
015b5286 AB	250	timeout = WDT_SEC2TICKS(wdd->timeout);
015b5286 AB	251
b68b4680	252	wdt->mr \|= AT91_WDT_SET_WDD(WDT_SEC2TICKS(MAX_WDT_TIMEOUT));
015b5286 AB	253	wdt->mr \|= AT91_WDT_SET_WDV(timeout);
015b5286 AB	254
76534860 WY	255	ret = sama5d4_wdt_init(wdt);
	256	if (ret)
	257	return ret;
	258
	259	watchdog_set_nowayout(wdd, nowayout);
	260
	261	ret = watchdog_register_device(wdd);
	262	if (ret) {
	263	dev_err(&pdev->dev, "failed to register watchdog device\n");
	264	return ret;
	265	}
	266
	267	platform_set_drvdata(pdev, wdt);
	268
	269	dev_info(&pdev->dev, "initialized (timeout = %d sec, nowayout = %d)\n",
	270	wdt_timeout, nowayout);
	271
	272	return 0;
	273	}
	274
	275	static int sama5d4_wdt_remove(struct platform_device *pdev)
	276	{
	277	struct sama5d4_wdt *wdt = platform_get_drvdata(pdev);
	278
	279	sama5d4_wdt_stop(&wdt->wdd);
	280
	281	watchdog_unregister_device(&wdt->wdd);
	282
	283	return 0;
	284	}
	285
	286	static const struct of_device_id sama5d4_wdt_of_match[] = {
	287	{ .compatible = "atmel,sama5d4-wdt", },
	288	{ }
	289	};
	290	MODULE_DEVICE_TABLE(of, sama5d4_wdt_of_match);
	291
f2013532 AB	292	#ifdef CONFIG_PM_SLEEP
	293	static int sama5d4_wdt_resume(struct device *dev)
	294	{
	295	struct sama5d4_wdt *wdt = dev_get_drvdata(dev);
	296
5dca80f6 AB	297	/*
	298	* FIXME: writing MR also pings the watchdog which may not be desired.
	299	* This should only be done when the registers are lost on suspend but
	300	* there is no way to get this information right now.
	301	*/
015b5286	302	sama5d4_wdt_init(wdt);
f2013532 AB	303
	304	return 0;
	305	}
	306	#endif
	307
	308	static SIMPLE_DEV_PM_OPS(sama5d4_wdt_pm_ops, NULL,
	309	sama5d4_wdt_resume);
	310
76534860 WY	311	static struct platform_driver sama5d4_wdt_driver = {
	312	.probe = sama5d4_wdt_probe,
	313	.remove = sama5d4_wdt_remove,
	314	.driver = {
	315	.name = "sama5d4_wdt",
f2013532	316	.pm = &sama5d4_wdt_pm_ops,
76534860 WY	317	.of_match_table = sama5d4_wdt_of_match,
	318	}
	319	};
	320	module_platform_driver(sama5d4_wdt_driver);
	321
	322	MODULE_AUTHOR("Atmel Corporation");
	323	MODULE_DESCRIPTION("Atmel SAMA5D4 Watchdog Timer driver");
	324	MODULE_LICENSE("GPL v2");