[mirror_ubuntu-hirsute-kernel.git] / drivers / watchdog / sp805_wdt.c

/*
 * drivers/char/watchdog/sp805-wdt.c
 *
 * Watchdog driver for ARM SP805 watchdog module
 *
 * Copyright (C) 2010 ST Microelectronics
 * Viresh Kumar <vireshk@kernel.org>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2 or later. This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/acpi.h>
#include <linux/device.h>
#include <linux/resource.h>
#include <linux/amba/bus.h>
#include <linux/bitops.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/kernel.h>
#include <linux/math64.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/of.h>
#include <linux/pm.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/types.h>
#include <linux/watchdog.h>

/* default timeout in seconds */
#define DEFAULT_TIMEOUT		60

#define MODULE_NAME		"sp805-wdt"

/* watchdog register offsets and masks */
#define WDTLOAD			0x000
	#define LOAD_MIN	0x00000001
	#define LOAD_MAX	0xFFFFFFFF
#define WDTVALUE		0x004
#define WDTCONTROL		0x008
	/* control register masks */
	#define	INT_ENABLE	(1 << 0)
	#define	RESET_ENABLE	(1 << 1)
	#define	ENABLE_MASK	(INT_ENABLE | RESET_ENABLE)
#define WDTINTCLR		0x00C
#define WDTRIS			0x010
#define WDTMIS			0x014
	#define INT_MASK	(1 << 0)
#define WDTLOCK			0xC00
	#define	UNLOCK		0x1ACCE551
	#define	LOCK		0x00000001

/**
 * struct sp805_wdt: sp805 wdt device structure
 * @wdd: instance of struct watchdog_device
 * @lock: spin lock protecting dev structure and io access
 * @base: base address of wdt
 * @clk: clock structure of wdt
 * @adev: amba device structure of wdt
 * @status: current status of wdt
 * @load_val: load value to be set for current timeout
 */
struct sp805_wdt {
	struct watchdog_device		wdd;
	spinlock_t			lock;
	void __iomem			*base;
	struct clk			*clk;
	u64				rate;
	struct amba_device		*adev;
	unsigned int			load_val;
};

static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout,
		"Set to 1 to keep watchdog running after device release");

/* returns true if wdt is running; otherwise returns false */
static bool wdt_is_running(struct watchdog_device *wdd)
{
	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
	u32 wdtcontrol = readl_relaxed(wdt->base + WDTCONTROL);

	return (wdtcontrol & ENABLE_MASK) == ENABLE_MASK;
}

/* This routine finds load value that will reset system in required timout */
static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
{
	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
	u64 load, rate;

	rate = wdt->rate;

	/*
	 * sp805 runs counter with given value twice, after the end of first
	 * counter it gives an interrupt and then starts counter again. If
	 * interrupt already occurred then it resets the system. This is why
	 * load is half of what should be required.
	 */
	load = div_u64(rate, 2) * timeout - 1;

	load = (load > LOAD_MAX) ? LOAD_MAX : load;
	load = (load < LOAD_MIN) ? LOAD_MIN : load;

	spin_lock(&wdt->lock);
	wdt->load_val = load;
	/* roundup timeout to closest positive integer value */
	wdd->timeout = div_u64((load + 1) * 2 + (rate / 2), rate);
	spin_unlock(&wdt->lock);

	return 0;
}

/* returns number of seconds left for reset to occur */
static unsigned int wdt_timeleft(struct watchdog_device *wdd)
{
	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
	u64 load;

	spin_lock(&wdt->lock);
	load = readl_relaxed(wdt->base + WDTVALUE);

	/*If the interrupt is inactive then time left is WDTValue + WDTLoad. */
	if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK))
		load += wdt->load_val + 1;
	spin_unlock(&wdt->lock);

	return div_u64(load, wdt->rate);
}

static int
wdt_restart(struct watchdog_device *wdd, unsigned long mode, void *cmd)
{
	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);

	writel_relaxed(0, wdt->base + WDTCONTROL);
	writel_relaxed(0, wdt->base + WDTLOAD);
	writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base + WDTCONTROL);

	return 0;
}

static int wdt_config(struct watchdog_device *wdd, bool ping)
{
	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
	int ret;

	if (!ping) {

		ret = clk_prepare_enable(wdt->clk);
		if (ret) {
			dev_err(&wdt->adev->dev, "clock enable fail");
			return ret;
		}
	}

	spin_lock(&wdt->lock);

	writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
	writel_relaxed(wdt->load_val, wdt->base + WDTLOAD);
	writel_relaxed(INT_MASK, wdt->base + WDTINTCLR);

	if (!ping)
		writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base +
				WDTCONTROL);

	writel_relaxed(LOCK, wdt->base + WDTLOCK);

	/* Flush posted writes. */
	readl_relaxed(wdt->base + WDTLOCK);
	spin_unlock(&wdt->lock);

	return 0;
}

static int wdt_ping(struct watchdog_device *wdd)
{
	return wdt_config(wdd, true);
}

/* enables watchdog timers reset */
static int wdt_enable(struct watchdog_device *wdd)
{
	return wdt_config(wdd, false);
}

/* disables watchdog timers reset */
static int wdt_disable(struct watchdog_device *wdd)
{
	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);

	spin_lock(&wdt->lock);

	writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
	writel_relaxed(0, wdt->base + WDTCONTROL);
	writel_relaxed(LOCK, wdt->base + WDTLOCK);

	/* Flush posted writes. */
	readl_relaxed(wdt->base + WDTLOCK);
	spin_unlock(&wdt->lock);

	clk_disable_unprepare(wdt->clk);

	return 0;
}

static const struct watchdog_info wdt_info = {
	.options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
	.identity = MODULE_NAME,
};

static const struct watchdog_ops wdt_ops = {
	.owner		= THIS_MODULE,
	.start		= wdt_enable,
	.stop		= wdt_disable,
	.ping		= wdt_ping,
	.set_timeout	= wdt_setload,
	.get_timeleft	= wdt_timeleft,
	.restart	= wdt_restart,
};

static int
sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
{
	struct sp805_wdt *wdt;
	int ret = 0;

	wdt = devm_kzalloc(&adev->dev, sizeof(*wdt), GFP_KERNEL);
	if (!wdt) {
		ret = -ENOMEM;
		goto err;
	}

	wdt->base = devm_ioremap_resource(&adev->dev, &adev->res);
	if (IS_ERR(wdt->base))
		return PTR_ERR(wdt->base);

	if (adev->dev.of_node) {
		wdt->clk = devm_clk_get(&adev->dev, NULL);
		if (IS_ERR(wdt->clk)) {
			dev_err(&adev->dev, "Clock not found\n");
			return PTR_ERR(wdt->clk);
		}
		wdt->rate = clk_get_rate(wdt->clk);
	} else if (has_acpi_companion(&adev->dev)) {
		/*
		 * When Driver probe with ACPI device, clock devices
		 * are not available, so watchdog rate get from
		 * clock-frequency property given in _DSD object.
		 */
		device_property_read_u64(&adev->dev, "clock-frequency",
					 &wdt->rate);
		if (!wdt->rate) {
			dev_err(&adev->dev, "no clock-frequency property\n");
			return -ENODEV;
		}
	}

	wdt->adev = adev;
	wdt->wdd.info = &wdt_info;
	wdt->wdd.ops = &wdt_ops;
	wdt->wdd.parent = &adev->dev;

	spin_lock_init(&wdt->lock);
	watchdog_set_nowayout(&wdt->wdd, nowayout);
	watchdog_set_drvdata(&wdt->wdd, wdt);
	watchdog_set_restart_priority(&wdt->wdd, 128);

	/*
	 * If 'timeout-sec' devicetree property is specified, use that.
	 * Otherwise, use DEFAULT_TIMEOUT
	 */
	wdt->wdd.timeout = DEFAULT_TIMEOUT;
	watchdog_init_timeout(&wdt->wdd, 0, &adev->dev);
	wdt_setload(&wdt->wdd, wdt->wdd.timeout);

	/*
	 * If HW is already running, enable/reset the wdt and set the running
	 * bit to tell the wdt subsystem
	 */
	if (wdt_is_running(&wdt->wdd)) {
		wdt_enable(&wdt->wdd);
		set_bit(WDOG_HW_RUNNING, &wdt->wdd.status);
	}

	ret = watchdog_register_device(&wdt->wdd);
	if (ret)
		goto err;
	amba_set_drvdata(adev, wdt);

	dev_info(&adev->dev, "registration successful\n");
	return 0;

err:
	dev_err(&adev->dev, "Probe Failed!!!\n");
	return ret;
}

static int sp805_wdt_remove(struct amba_device *adev)
{
	struct sp805_wdt *wdt = amba_get_drvdata(adev);

	watchdog_unregister_device(&wdt->wdd);
	watchdog_set_drvdata(&wdt->wdd, NULL);

	return 0;
}

static int __maybe_unused sp805_wdt_suspend(struct device *dev)
{
	struct sp805_wdt *wdt = dev_get_drvdata(dev);

	if (watchdog_active(&wdt->wdd))
		return wdt_disable(&wdt->wdd);

	return 0;
}

static int __maybe_unused sp805_wdt_resume(struct device *dev)
{
	struct sp805_wdt *wdt = dev_get_drvdata(dev);

	if (watchdog_active(&wdt->wdd))
		return wdt_enable(&wdt->wdd);

	return 0;
}

static SIMPLE_DEV_PM_OPS(sp805_wdt_dev_pm_ops, sp805_wdt_suspend,
		sp805_wdt_resume);

static const struct amba_id sp805_wdt_ids[] = {
	{
		.id	= 0x00141805,
		.mask	= 0x00ffffff,
	},
	{ 0, 0 },
};

MODULE_DEVICE_TABLE(amba, sp805_wdt_ids);

static struct amba_driver sp805_wdt_driver = {
	.drv = {
		.name	= MODULE_NAME,
		.pm	= &sp805_wdt_dev_pm_ops,
	},
	.id_table	= sp805_wdt_ids,
	.probe		= sp805_wdt_probe,
	.remove = sp805_wdt_remove,
};

module_amba_driver(sp805_wdt_driver);

MODULE_AUTHOR("Viresh Kumar <vireshk@kernel.org>");
MODULE_DESCRIPTION("ARM SP805 Watchdog Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
4a370278 VK	1	/*
	2	* drivers/char/watchdog/sp805-wdt.c
	3	*
	4	* Watchdog driver for ARM SP805 watchdog module
	5	*
	6	* Copyright (C) 2010 ST Microelectronics
da89947b	7	* Viresh Kumar <vireshk@kernel.org>
4a370278 VK	8	*
	9	* This file is licensed under the terms of the GNU General Public
	10	* License version 2 or later. This program is licensed "as is" without any
	11	* warranty of any kind, whether express or implied.
	12	*/
	13
dc0e4a3b	14	#include <linux/acpi.h>
4a370278 VK	15	#include <linux/device.h>
	16	#include <linux/resource.h>
	17	#include <linux/amba/bus.h>
	18	#include <linux/bitops.h>
	19	#include <linux/clk.h>
4a370278 VK	20	#include <linux/io.h>
	21	#include <linux/ioport.h>
	22	#include <linux/kernel.h>
	23	#include <linux/math64.h>
4a370278 VK	24	#include <linux/module.h>
4a370278 VK	25	#include <linux/moduleparam.h>
dc0e4a3b	26	#include <linux/of.h>
16ac4abe	27	#include <linux/pm.h>
4a370278 VK	28	#include <linux/slab.h>
	29	#include <linux/spinlock.h>
	30	#include <linux/types.h>
4a370278 VK	31	#include <linux/watchdog.h>
	32
	33	/* default timeout in seconds */
	34	#define DEFAULT_TIMEOUT 60
	35
	36	#define MODULE_NAME "sp805-wdt"
	37
	38	/* watchdog register offsets and masks */
	39	#define WDTLOAD 0x000
	40	#define LOAD_MIN 0x00000001
	41	#define LOAD_MAX 0xFFFFFFFF
	42	#define WDTVALUE 0x004
	43	#define WDTCONTROL 0x008
	44	/* control register masks */
	45	#define INT_ENABLE (1 << 0)
	46	#define RESET_ENABLE (1 << 1)
fa5072ed	47	#define ENABLE_MASK (INT_ENABLE \| RESET_ENABLE)
4a370278 VK	48	#define WDTINTCLR 0x00C
	49	#define WDTRIS 0x010
	50	#define WDTMIS 0x014
	51	#define INT_MASK (1 << 0)
	52	#define WDTLOCK 0xC00
	53	#define UNLOCK 0x1ACCE551
	54	#define LOCK 0x00000001
	55
	56	/**
	57	* struct sp805_wdt: sp805 wdt device structure
4a516539	58	* @wdd: instance of struct watchdog_device
bfae14b6 VK	59	* @lock: spin lock protecting dev structure and io access
	60	* @base: base address of wdt
	61	* @clk: clock structure of wdt
	62	* @adev: amba device structure of wdt
	63	* @status: current status of wdt
	64	* @load_val: load value to be set for current timeout
4a370278 VK	65	*/
4a370278 VK	66	struct sp805_wdt {
4a516539	67	struct watchdog_device wdd;
4a370278 VK	68	spinlock_t lock;
	69	void __iomem *base;
	70	struct clk *clk;
dc0e4a3b	71	u64 rate;
4a370278	72	struct amba_device *adev;
4a370278	73	unsigned int load_val;
4a370278 VK	74	};
4a370278 VK	75
86a1e189	76	static bool nowayout = WATCHDOG_NOWAYOUT;
4a516539 VK	77	module_param(nowayout, bool, 0);
	78	MODULE_PARM_DESC(nowayout,
	79	"Set to 1 to keep watchdog running after device release");
4a370278	80
fa5072ed RJ	81	/* returns true if wdt is running; otherwise returns false */
	82	static bool wdt_is_running(struct watchdog_device *wdd)
	83	{
	84	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
	85	u32 wdtcontrol = readl_relaxed(wdt->base + WDTCONTROL);
	86
	87	return (wdtcontrol & ENABLE_MASK) == ENABLE_MASK;
	88	}
	89
4a370278	90	/* This routine finds load value that will reset system in required timout */
4a516539	91	static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
4a370278	92	{
4a516539	93	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
4a370278 VK	94	u64 load, rate;
4a370278 VK	95
dc0e4a3b	96	rate = wdt->rate;
4a370278 VK	97
	98	/*
	99	* sp805 runs counter with given value twice, after the end of first
	100	* counter it gives an interrupt and then starts counter again. If
25985edc	101	* interrupt already occurred then it resets the system. This is why
4a370278 VK	102	* load is half of what should be required.
	103	*/
	104	load = div_u64(rate, 2) * timeout - 1;
	105
	106	load = (load > LOAD_MAX) ? LOAD_MAX : load;
	107	load = (load < LOAD_MIN) ? LOAD_MIN : load;
	108
	109	spin_lock(&wdt->lock);
	110	wdt->load_val = load;
	111	/* roundup timeout to closest positive integer value */
938626d9	112	wdd->timeout = div_u64((load + 1) * 2 + (rate / 2), rate);
4a370278	113	spin_unlock(&wdt->lock);
4a516539 VK	114
4a516539 VK	115	return 0;
4a370278 VK	116	}
	117
	118	/* returns number of seconds left for reset to occur */
4a516539	119	static unsigned int wdt_timeleft(struct watchdog_device *wdd)
4a370278	120	{
4a516539	121	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
dc0e4a3b	122	u64 load;
4a370278 VK	123
4a370278 VK	124	spin_lock(&wdt->lock);
d2e8919b	125	load = readl_relaxed(wdt->base + WDTVALUE);
4a370278 VK	126
4a370278 VK	127	/If the interrupt is inactive then time left is WDTValue + WDTLoad. /
d2e8919b	128	if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK))
4a370278 VK	129	load += wdt->load_val + 1;
	130	spin_unlock(&wdt->lock);
	131
dc0e4a3b	132	return div_u64(load, wdt->rate);
4a370278 VK	133	}
4a370278 VK	134
6c5c0d48 JK	135	static int
	136	wdt_restart(struct watchdog_device wdd, unsigned long mode, void cmd)
	137	{
	138	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
	139
	140	writel_relaxed(0, wdt->base + WDTCONTROL);
	141	writel_relaxed(0, wdt->base + WDTLOAD);
	142	writel_relaxed(INT_ENABLE \| RESET_ENABLE, wdt->base + WDTCONTROL);
	143
	144	return 0;
	145	}
	146
4a516539	147	static int wdt_config(struct watchdog_device *wdd, bool ping)
4a370278	148	{
4a516539 VK	149	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
	150	int ret;
	151
	152	if (!ping) {
d9df0ef1	153
63fbbc16	154	ret = clk_prepare_enable(wdt->clk);
4a516539 VK	155	if (ret) {
	156	dev_err(&wdt->adev->dev, "clock enable fail");
	157	return ret;
	158	}
	159	}
	160
4a370278 VK	161	spin_lock(&wdt->lock);
4a370278 VK	162
d2e8919b VK	163	writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
d2e8919b VK	164	writel_relaxed(wdt->load_val, wdt->base + WDTLOAD);
55e07177	165	writel_relaxed(INT_MASK, wdt->base + WDTINTCLR);
4a370278	166
55e07177	167	if (!ping)
4a516539 VK	168	writel_relaxed(INT_ENABLE \| RESET_ENABLE, wdt->base +
4a516539 VK	169	WDTCONTROL);
4a370278	170
d2e8919b	171	writel_relaxed(LOCK, wdt->base + WDTLOCK);
4a370278	172
081d83a3	173	/* Flush posted writes. */
d2e8919b	174	readl_relaxed(wdt->base + WDTLOCK);
4a370278	175	spin_unlock(&wdt->lock);
4a516539 VK	176
4a516539 VK	177	return 0;
4a370278 VK	178	}
4a370278 VK	179
4a516539	180	static int wdt_ping(struct watchdog_device *wdd)
4a370278	181	{
4a516539	182	return wdt_config(wdd, true);
4a370278 VK	183	}
4a370278 VK	184
4a516539 VK	185	/* enables watchdog timers reset */
4a516539 VK	186	static int wdt_enable(struct watchdog_device *wdd)
4a370278	187	{
4a516539	188	return wdt_config(wdd, false);
4a370278 VK	189	}
4a370278 VK	190
4a516539 VK	191	/* disables watchdog timers reset */
4a516539 VK	192	static int wdt_disable(struct watchdog_device *wdd)
4a370278	193	{
4a516539	194	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
4a370278	195
4a516539	196	spin_lock(&wdt->lock);
4a370278	197
4a516539 VK	198	writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
	199	writel_relaxed(0, wdt->base + WDTCONTROL);
	200	writel_relaxed(LOCK, wdt->base + WDTLOCK);
4a370278	201
4a516539 VK	202	/* Flush posted writes. */
	203	readl_relaxed(wdt->base + WDTLOCK);
	204	spin_unlock(&wdt->lock);
4a370278	205
63fbbc16	206	clk_disable_unprepare(wdt->clk);
4a370278 VK	207
	208	return 0;
	209	}
	210
4a516539 VK	211	static const struct watchdog_info wdt_info = {
	212	.options = WDIOF_MAGICCLOSE \| WDIOF_SETTIMEOUT \| WDIOF_KEEPALIVEPING,
	213	.identity = MODULE_NAME,
4a370278 VK	214	};
4a370278 VK	215
4a516539 VK	216	static const struct watchdog_ops wdt_ops = {
	217	.owner = THIS_MODULE,
	218	.start = wdt_enable,
	219	.stop = wdt_disable,
	220	.ping = wdt_ping,
	221	.set_timeout = wdt_setload,
	222	.get_timeleft = wdt_timeleft,
6c5c0d48	223	.restart = wdt_restart,
4a370278 VK	224	};
4a370278 VK	225
2d991a16	226	static int
aa25afad	227	sp805_wdt_probe(struct amba_device adev, const struct amba_id id)
4a370278	228	{
4a516539	229	struct sp805_wdt *wdt;
4a370278 VK	230	int ret = 0;
4a370278 VK	231
fb35a5ad	232	wdt = devm_kzalloc(&adev->dev, sizeof(*wdt), GFP_KERNEL);
4a370278	233	if (!wdt) {
4a370278	234	ret = -ENOMEM;
fb35a5ad VK	235	goto err;
	236	}
	237
9d11e4f8 JH	238	wdt->base = devm_ioremap_resource(&adev->dev, &adev->res);
	239	if (IS_ERR(wdt->base))
	240	return PTR_ERR(wdt->base);
4a370278	241
dc0e4a3b SM	242	if (adev->dev.of_node) {
	243	wdt->clk = devm_clk_get(&adev->dev, NULL);
	244	if (IS_ERR(wdt->clk)) {
	245	dev_err(&adev->dev, "Clock not found\n");
	246	return PTR_ERR(wdt->clk);
	247	}
	248	wdt->rate = clk_get_rate(wdt->clk);
	249	} else if (has_acpi_companion(&adev->dev)) {
	250	/*
	251	* When Driver probe with ACPI device, clock devices
	252	* are not available, so watchdog rate get from
	253	* clock-frequency property given in _DSD object.
	254	*/
	255	device_property_read_u64(&adev->dev, "clock-frequency",
	256	&wdt->rate);
	257	if (!wdt->rate) {
	258	dev_err(&adev->dev, "no clock-frequency property\n");
	259	return -ENODEV;
	260	}
4a370278 VK	261	}
	262
	263	wdt->adev = adev;
4a516539 VK	264	wdt->wdd.info = &wdt_info;
4a516539 VK	265	wdt->wdd.ops = &wdt_ops;
6551881c	266	wdt->wdd.parent = &adev->dev;
4a516539	267
4a370278	268	spin_lock_init(&wdt->lock);
4a516539 VK	269	watchdog_set_nowayout(&wdt->wdd, nowayout);
4a516539 VK	270	watchdog_set_drvdata(&wdt->wdd, wdt);
6c5c0d48	271	watchdog_set_restart_priority(&wdt->wdd, 128);
b8008858 RJ	272
	273	/*
	274	* If 'timeout-sec' devicetree property is specified, use that.
	275	* Otherwise, use DEFAULT_TIMEOUT
	276	*/
	277	wdt->wdd.timeout = DEFAULT_TIMEOUT;
	278	watchdog_init_timeout(&wdt->wdd, 0, &adev->dev);
	279	wdt_setload(&wdt->wdd, wdt->wdd.timeout);
4a370278	280
fa5072ed RJ	281	/*
	282	* If HW is already running, enable/reset the wdt and set the running
	283	* bit to tell the wdt subsystem
	284	*/
	285	if (wdt_is_running(&wdt->wdd)) {
	286	wdt_enable(&wdt->wdd);
	287	set_bit(WDOG_HW_RUNNING, &wdt->wdd.status);
	288	}
	289
4a516539	290	ret = watchdog_register_device(&wdt->wdd);
199801cd	291	if (ret)
07bf971a	292	goto err;
4a516539	293	amba_set_drvdata(adev, wdt);
4a370278 VK	294
	295	dev_info(&adev->dev, "registration successful\n");
	296	return 0;
	297
4a370278 VK	298	err:
	299	dev_err(&adev->dev, "Probe Failed!!!\n");
	300	return ret;
	301	}
	302
4b12b896	303	static int sp805_wdt_remove(struct amba_device *adev)
4a370278	304	{
4a516539 VK	305	struct sp805_wdt *wdt = amba_get_drvdata(adev);
	306
	307	watchdog_unregister_device(&wdt->wdd);
4a516539	308	watchdog_set_drvdata(&wdt->wdd, NULL);
4a370278 VK	309
	310	return 0;
	311	}
	312
60d6dd53	313	static int __maybe_unused sp805_wdt_suspend(struct device *dev)
16ac4abe	314	{
4a516539 VK	315	struct sp805_wdt *wdt = dev_get_drvdata(dev);
	316
	317	if (watchdog_active(&wdt->wdd))
	318	return wdt_disable(&wdt->wdd);
16ac4abe VK	319
	320	return 0;
	321	}
	322
60d6dd53	323	static int __maybe_unused sp805_wdt_resume(struct device *dev)
16ac4abe	324	{
4a516539	325	struct sp805_wdt *wdt = dev_get_drvdata(dev);
16ac4abe	326
4a516539 VK	327	if (watchdog_active(&wdt->wdd))
4a516539 VK	328	return wdt_enable(&wdt->wdd);
16ac4abe	329
4a516539	330	return 0;
16ac4abe	331	}
16ac4abe VK	332
	333	static SIMPLE_DEV_PM_OPS(sp805_wdt_dev_pm_ops, sp805_wdt_suspend,
	334	sp805_wdt_resume);
	335
05ce42ff	336	static const struct amba_id sp805_wdt_ids[] = {
4a370278 VK	337	{
	338	.id = 0x00141805,
	339	.mask = 0x00ffffff,
	340	},
	341	{ 0, 0 },
	342	};
	343
17885b05 DM	344	MODULE_DEVICE_TABLE(amba, sp805_wdt_ids);
17885b05 DM	345
4a370278 VK	346	static struct amba_driver sp805_wdt_driver = {
	347	.drv = {
	348	.name = MODULE_NAME,
16ac4abe	349	.pm = &sp805_wdt_dev_pm_ops,
4a370278 VK	350	},
	351	.id_table = sp805_wdt_ids,
	352	.probe = sp805_wdt_probe,
82268714	353	.remove = sp805_wdt_remove,
4a370278 VK	354	};
4a370278 VK	355
9e5ed094	356	module_amba_driver(sp805_wdt_driver);
4a370278	357
da89947b	358	MODULE_AUTHOR("Viresh Kumar <vireshk@kernel.org>");
4a370278 VK	359	MODULE_DESCRIPTION("ARM SP805 Watchdog Driver");
4a370278 VK	360	MODULE_LICENSE("GPL");