[mirror_ubuntu-bionic-kernel.git] / drivers / watchdog / sunxi_wdt.c

/*
 *      sunxi Watchdog Driver
 *
 *      Copyright (c) 2013 Carlo Caione
 *                    2012 Henrik Nordstrom
 *
 *      This program is free software; you can redistribute it and/or
 *      modify it under the terms of the GNU General Public License
 *      as published by the Free Software Foundation; either version
 *      2 of the License, or (at your option) any later version.
 *
 *      Based on xen_wdt.c
 *      (c) Copyright 2010 Novell, Inc.
 */

#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/notifier.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/reboot.h>
#include <linux/types.h>
#include <linux/watchdog.h>

#define WDT_MAX_TIMEOUT         16
#define WDT_MIN_TIMEOUT         1
#define WDT_TIMEOUT_MASK        0x0F

#define WDT_CTRL_RELOAD         ((1 << 0) | (0x0a57 << 1))

#define WDT_MODE_EN             (1 << 0)

#define DRV_NAME		"sunxi-wdt"
#define DRV_VERSION		"1.0"

static bool nowayout = WATCHDOG_NOWAYOUT;
static unsigned int timeout = WDT_MAX_TIMEOUT;

/*
 * This structure stores the register offsets for different variants
 * of Allwinner's watchdog hardware.
 */
struct sunxi_wdt_reg {
	u8 wdt_ctrl;
	u8 wdt_cfg;
	u8 wdt_mode;
	u8 wdt_timeout_shift;
	u8 wdt_reset_mask;
	u8 wdt_reset_val;
};

struct sunxi_wdt_dev {
	struct watchdog_device wdt_dev;
	void __iomem *wdt_base;
	const struct sunxi_wdt_reg *wdt_regs;
	struct notifier_block restart_handler;
};

/*
 * wdt_timeout_map maps the watchdog timer interval value in seconds to
 * the value of the register WDT_MODE at bits .wdt_timeout_shift ~ +3
 *
 * [timeout seconds] = register value
 *
 */

static const int wdt_timeout_map[] = {
	[1] = 0x1,  /* 1s  */
	[2] = 0x2,  /* 2s  */
	[3] = 0x3,  /* 3s  */
	[4] = 0x4,  /* 4s  */
	[5] = 0x5,  /* 5s  */
	[6] = 0x6,  /* 6s  */
	[8] = 0x7,  /* 8s  */
	[10] = 0x8, /* 10s */
	[12] = 0x9, /* 12s */
	[14] = 0xA, /* 14s */
	[16] = 0xB, /* 16s */
};


static int sunxi_restart_handle(struct notifier_block *this, unsigned long mode,
				void *cmd)
{
	struct sunxi_wdt_dev *sunxi_wdt = container_of(this,
						       struct sunxi_wdt_dev,
						       restart_handler);
	void __iomem *wdt_base = sunxi_wdt->wdt_base;
	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
	u32 val;

	/* Set system reset function */
	val = readl(wdt_base + regs->wdt_cfg);
	val &= ~(regs->wdt_reset_mask);
	val |= regs->wdt_reset_val;
	writel(val, wdt_base + regs->wdt_cfg);

	/* Set lowest timeout and enable watchdog */
	val = readl(wdt_base + regs->wdt_mode);
	val &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
	val |= WDT_MODE_EN;
	writel(val, wdt_base + regs->wdt_mode);

	/*
	 * Restart the watchdog. The default (and lowest) interval
	 * value for the watchdog is 0.5s.
	 */
	writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);

	while (1) {
		mdelay(5);
		val = readl(wdt_base + regs->wdt_mode);
		val |= WDT_MODE_EN;
		writel(val, wdt_base + regs->wdt_mode);
	}
	return NOTIFY_DONE;
}

static int sunxi_wdt_ping(struct watchdog_device *wdt_dev)
{
	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
	void __iomem *wdt_base = sunxi_wdt->wdt_base;
	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;

	writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);

	return 0;
}

static int sunxi_wdt_set_timeout(struct watchdog_device *wdt_dev,
		unsigned int timeout)
{
	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
	void __iomem *wdt_base = sunxi_wdt->wdt_base;
	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
	u32 reg;

	if (wdt_timeout_map[timeout] == 0)
		timeout++;

	sunxi_wdt->wdt_dev.timeout = timeout;

	reg = readl(wdt_base + regs->wdt_mode);
	reg &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
	reg |= wdt_timeout_map[timeout] << regs->wdt_timeout_shift;
	writel(reg, wdt_base + regs->wdt_mode);

	sunxi_wdt_ping(wdt_dev);

	return 0;
}

static int sunxi_wdt_stop(struct watchdog_device *wdt_dev)
{
	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
	void __iomem *wdt_base = sunxi_wdt->wdt_base;
	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;

	writel(0, wdt_base + regs->wdt_mode);

	return 0;
}

static int sunxi_wdt_start(struct watchdog_device *wdt_dev)
{
	u32 reg;
	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
	void __iomem *wdt_base = sunxi_wdt->wdt_base;
	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
	int ret;

	ret = sunxi_wdt_set_timeout(&sunxi_wdt->wdt_dev,
			sunxi_wdt->wdt_dev.timeout);
	if (ret < 0)
		return ret;

	/* Set system reset function */
	reg = readl(wdt_base + regs->wdt_cfg);
	reg &= ~(regs->wdt_reset_mask);
	reg |= ~(regs->wdt_reset_val);
	writel(reg, wdt_base + regs->wdt_cfg);

	/* Enable watchdog */
	reg = readl(wdt_base + regs->wdt_mode);
	reg |= WDT_MODE_EN;
	writel(reg, wdt_base + regs->wdt_mode);

	return 0;
}

static const struct watchdog_info sunxi_wdt_info = {
	.identity	= DRV_NAME,
	.options	= WDIOF_SETTIMEOUT |
			  WDIOF_KEEPALIVEPING |
			  WDIOF_MAGICCLOSE,
};

static const struct watchdog_ops sunxi_wdt_ops = {
	.owner		= THIS_MODULE,
	.start		= sunxi_wdt_start,
	.stop		= sunxi_wdt_stop,
	.ping		= sunxi_wdt_ping,
	.set_timeout	= sunxi_wdt_set_timeout,
};

static const struct sunxi_wdt_reg sun4i_wdt_reg = {
	.wdt_ctrl = 0x00,
	.wdt_cfg = 0x04,
	.wdt_mode = 0x04,
	.wdt_timeout_shift = 3,
	.wdt_reset_mask = 0x02,
	.wdt_reset_val = 0x02,
};

static const struct sunxi_wdt_reg sun6i_wdt_reg = {
	.wdt_ctrl = 0x10,
	.wdt_cfg = 0x14,
	.wdt_mode = 0x18,
	.wdt_timeout_shift = 4,
	.wdt_reset_mask = 0x03,
	.wdt_reset_val = 0x01,
};

static const struct of_device_id sunxi_wdt_dt_ids[] = {
	{ .compatible = "allwinner,sun4i-a10-wdt", .data = &sun4i_wdt_reg },
	{ .compatible = "allwinner,sun6i-a31-wdt", .data = &sun6i_wdt_reg },
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, sunxi_wdt_dt_ids);

static int sunxi_wdt_probe(struct platform_device *pdev)
{
	struct sunxi_wdt_dev *sunxi_wdt;
	const struct of_device_id *device;
	struct resource *res;
	int err;

	sunxi_wdt = devm_kzalloc(&pdev->dev, sizeof(*sunxi_wdt), GFP_KERNEL);
	if (!sunxi_wdt)
		return -EINVAL;

	platform_set_drvdata(pdev, sunxi_wdt);

	device = of_match_device(sunxi_wdt_dt_ids, &pdev->dev);
	if (!device)
		return -ENODEV;

	sunxi_wdt->wdt_regs = device->data;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	sunxi_wdt->wdt_base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(sunxi_wdt->wdt_base))
		return PTR_ERR(sunxi_wdt->wdt_base);

	sunxi_wdt->wdt_dev.info = &sunxi_wdt_info;
	sunxi_wdt->wdt_dev.ops = &sunxi_wdt_ops;
	sunxi_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
	sunxi_wdt->wdt_dev.max_timeout = WDT_MAX_TIMEOUT;
	sunxi_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
	sunxi_wdt->wdt_dev.parent = &pdev->dev;

	watchdog_init_timeout(&sunxi_wdt->wdt_dev, timeout, &pdev->dev);
	watchdog_set_nowayout(&sunxi_wdt->wdt_dev, nowayout);

	watchdog_set_drvdata(&sunxi_wdt->wdt_dev, sunxi_wdt);

	sunxi_wdt_stop(&sunxi_wdt->wdt_dev);

	err = watchdog_register_device(&sunxi_wdt->wdt_dev);
	if (unlikely(err))
		return err;

	sunxi_wdt->restart_handler.notifier_call = sunxi_restart_handle;
	sunxi_wdt->restart_handler.priority = 128;
	err = register_restart_handler(&sunxi_wdt->restart_handler);
	if (err)
		dev_err(&pdev->dev,
			"cannot register restart handler (err=%d)\n", err);

	dev_info(&pdev->dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)",
			sunxi_wdt->wdt_dev.timeout, nowayout);

	return 0;
}

static int sunxi_wdt_remove(struct platform_device *pdev)
{
	struct sunxi_wdt_dev *sunxi_wdt = platform_get_drvdata(pdev);

	unregister_restart_handler(&sunxi_wdt->restart_handler);

	watchdog_unregister_device(&sunxi_wdt->wdt_dev);
	watchdog_set_drvdata(&sunxi_wdt->wdt_dev, NULL);

	return 0;
}

static void sunxi_wdt_shutdown(struct platform_device *pdev)
{
	struct sunxi_wdt_dev *sunxi_wdt = platform_get_drvdata(pdev);

	sunxi_wdt_stop(&sunxi_wdt->wdt_dev);
}

static struct platform_driver sunxi_wdt_driver = {
	.probe		= sunxi_wdt_probe,
	.remove		= sunxi_wdt_remove,
	.shutdown	= sunxi_wdt_shutdown,
	.driver		= {
		.name		= DRV_NAME,
		.of_match_table	= sunxi_wdt_dt_ids,
	},
};

module_platform_driver(sunxi_wdt_driver);

module_param(timeout, uint, 0);
MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");

module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
		"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Carlo Caione <carlo.caione@gmail.com>");
MODULE_AUTHOR("Henrik Nordstrom <henrik@henriknordstrom.net>");
MODULE_DESCRIPTION("sunxi WatchDog Timer Driver");
MODULE_VERSION(DRV_VERSION);
Commit	Line	Data
d00680ed CC	1	/*
	2	* sunxi Watchdog Driver
	3	*
	4	* Copyright (c) 2013 Carlo Caione
	5	* 2012 Henrik Nordstrom
	6	*
	7	* This program is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU General Public License
	9	* as published by the Free Software Foundation; either version
	10	* 2 of the License, or (at your option) any later version.
	11	*
	12	* Based on xen_wdt.c
	13	* (c) Copyright 2010 Novell, Inc.
	14	*/
	15
	16	#include <linux/clk.h>
440e96bc	17	#include <linux/delay.h>
d00680ed CC	18	#include <linux/err.h>
	19	#include <linux/init.h>
	20	#include <linux/io.h>
	21	#include <linux/kernel.h>
	22	#include <linux/module.h>
	23	#include <linux/moduleparam.h>
d20a1d90	24	#include <linux/notifier.h>
d00680ed	25	#include <linux/of.h>
f2147de3	26	#include <linux/of_device.h>
d00680ed	27	#include <linux/platform_device.h>
440e96bc	28	#include <linux/reboot.h>
d00680ed CC	29	#include <linux/types.h>
	30	#include <linux/watchdog.h>
	31
	32	#define WDT_MAX_TIMEOUT 16
	33	#define WDT_MIN_TIMEOUT 1
f2147de3	34	#define WDT_TIMEOUT_MASK 0x0F
d00680ed	35
d00680ed CC	36	#define WDT_CTRL_RELOAD ((1 << 0) \| (0x0a57 << 1))
d00680ed CC	37
d00680ed	38	#define WDT_MODE_EN (1 << 0)
d00680ed CC	39
	40	#define DRV_NAME "sunxi-wdt"
	41	#define DRV_VERSION "1.0"
	42
	43	static bool nowayout = WATCHDOG_NOWAYOUT;
	44	static unsigned int timeout = WDT_MAX_TIMEOUT;
	45
f2147de3 CYT	46	/*
	47	* This structure stores the register offsets for different variants
	48	* of Allwinner's watchdog hardware.
	49	*/
	50	struct sunxi_wdt_reg {
	51	u8 wdt_ctrl;
	52	u8 wdt_cfg;
	53	u8 wdt_mode;
	54	u8 wdt_timeout_shift;
	55	u8 wdt_reset_mask;
	56	u8 wdt_reset_val;
	57	};
	58
d00680ed CC	59	struct sunxi_wdt_dev {
	60	struct watchdog_device wdt_dev;
	61	void __iomem *wdt_base;
f2147de3	62	const struct sunxi_wdt_reg *wdt_regs;
d20a1d90	63	struct notifier_block restart_handler;
d00680ed CC	64	};
	65
	66	/*
	67	* wdt_timeout_map maps the watchdog timer interval value in seconds to
f2147de3	68	* the value of the register WDT_MODE at bits .wdt_timeout_shift ~ +3
d00680ed CC	69	*
	70	* [timeout seconds] = register value
	71	*
	72	*/
	73
	74	static const int wdt_timeout_map[] = {
51ee34ab EL	75	[1] = 0x1, /* 1s */
	76	[2] = 0x2, /* 2s */
	77	[3] = 0x3, /* 3s */
	78	[4] = 0x4, /* 4s */
	79	[5] = 0x5, /* 5s */
	80	[6] = 0x6, /* 6s */
	81	[8] = 0x7, /* 8s */
	82	[10] = 0x8, /* 10s */
	83	[12] = 0x9, /* 12s */
	84	[14] = 0xA, /* 14s */
	85	[16] = 0xB, /* 16s */
d00680ed CC	86	};
d00680ed CC	87
440e96bc	88
d20a1d90 GR	89	static int sunxi_restart_handle(struct notifier_block *this, unsigned long mode,
d20a1d90 GR	90	void *cmd)
440e96bc	91	{
d20a1d90 GR	92	struct sunxi_wdt_dev *sunxi_wdt = container_of(this,
	93	struct sunxi_wdt_dev,
	94	restart_handler);
	95	void __iomem *wdt_base = sunxi_wdt->wdt_base;
f2147de3 CYT	96	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
	97	u32 val;
	98
	99	/* Set system reset function */
	100	val = readl(wdt_base + regs->wdt_cfg);
	101	val &= ~(regs->wdt_reset_mask);
	102	val \|= regs->wdt_reset_val;
	103	writel(val, wdt_base + regs->wdt_cfg);
d20a1d90	104
f2147de3 CYT	105	/* Set lowest timeout and enable watchdog */
	106	val = readl(wdt_base + regs->wdt_mode);
	107	val &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
	108	val \|= WDT_MODE_EN;
	109	writel(val, wdt_base + regs->wdt_mode);
440e96bc MR	110
	111	/*
	112	* Restart the watchdog. The default (and lowest) interval
	113	* value for the watchdog is 0.5s.
	114	*/
f2147de3	115	writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);
440e96bc MR	116
	117	while (1) {
	118	mdelay(5);
f2147de3 CYT	119	val = readl(wdt_base + regs->wdt_mode);
	120	val \|= WDT_MODE_EN;
	121	writel(val, wdt_base + regs->wdt_mode);
440e96bc	122	}
d20a1d90	123	return NOTIFY_DONE;
440e96bc MR	124	}
440e96bc MR	125
d00680ed CC	126	static int sunxi_wdt_ping(struct watchdog_device *wdt_dev)
	127	{
	128	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
	129	void __iomem *wdt_base = sunxi_wdt->wdt_base;
f2147de3	130	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
d00680ed	131
f2147de3	132	writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);
d00680ed CC	133
	134	return 0;
	135	}
	136
	137	static int sunxi_wdt_set_timeout(struct watchdog_device *wdt_dev,
	138	unsigned int timeout)
	139	{
	140	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
	141	void __iomem *wdt_base = sunxi_wdt->wdt_base;
f2147de3	142	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
d00680ed CC	143	u32 reg;
	144
	145	if (wdt_timeout_map[timeout] == 0)
	146	timeout++;
	147
	148	sunxi_wdt->wdt_dev.timeout = timeout;
	149
f2147de3 CYT	150	reg = readl(wdt_base + regs->wdt_mode);
	151	reg &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
	152	reg \|= wdt_timeout_map[timeout] << regs->wdt_timeout_shift;
	153	writel(reg, wdt_base + regs->wdt_mode);
d00680ed CC	154
	155	sunxi_wdt_ping(wdt_dev);
	156
	157	return 0;
	158	}
	159
	160	static int sunxi_wdt_stop(struct watchdog_device *wdt_dev)
	161	{
	162	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
	163	void __iomem *wdt_base = sunxi_wdt->wdt_base;
f2147de3	164	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
d00680ed	165
f2147de3	166	writel(0, wdt_base + regs->wdt_mode);
d00680ed CC	167
	168	return 0;
	169	}
	170
	171	static int sunxi_wdt_start(struct watchdog_device *wdt_dev)
	172	{
	173	u32 reg;
	174	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
	175	void __iomem *wdt_base = sunxi_wdt->wdt_base;
f2147de3	176	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
d00680ed CC	177	int ret;
	178
	179	ret = sunxi_wdt_set_timeout(&sunxi_wdt->wdt_dev,
	180	sunxi_wdt->wdt_dev.timeout);
	181	if (ret < 0)
	182	return ret;
	183
f2147de3 CYT	184	/* Set system reset function */
	185	reg = readl(wdt_base + regs->wdt_cfg);
	186	reg &= ~(regs->wdt_reset_mask);
	187	reg \|= ~(regs->wdt_reset_val);
	188	writel(reg, wdt_base + regs->wdt_cfg);
	189
	190	/* Enable watchdog */
	191	reg = readl(wdt_base + regs->wdt_mode);
	192	reg \|= WDT_MODE_EN;
	193	writel(reg, wdt_base + regs->wdt_mode);
d00680ed CC	194
	195	return 0;
	196	}
	197
	198	static const struct watchdog_info sunxi_wdt_info = {
	199	.identity = DRV_NAME,
	200	.options = WDIOF_SETTIMEOUT \|
	201	WDIOF_KEEPALIVEPING \|
	202	WDIOF_MAGICCLOSE,
	203	};
	204
	205	static const struct watchdog_ops sunxi_wdt_ops = {
	206	.owner = THIS_MODULE,
	207	.start = sunxi_wdt_start,
	208	.stop = sunxi_wdt_stop,
	209	.ping = sunxi_wdt_ping,
	210	.set_timeout = sunxi_wdt_set_timeout,
	211	};
	212
f2147de3 CYT	213	static const struct sunxi_wdt_reg sun4i_wdt_reg = {
	214	.wdt_ctrl = 0x00,
	215	.wdt_cfg = 0x04,
	216	.wdt_mode = 0x04,
	217	.wdt_timeout_shift = 3,
	218	.wdt_reset_mask = 0x02,
	219	.wdt_reset_val = 0x02,
	220	};
	221
c5ec618f CYT	222	static const struct sunxi_wdt_reg sun6i_wdt_reg = {
	223	.wdt_ctrl = 0x10,
	224	.wdt_cfg = 0x14,
	225	.wdt_mode = 0x18,
	226	.wdt_timeout_shift = 4,
	227	.wdt_reset_mask = 0x03,
	228	.wdt_reset_val = 0x01,
	229	};
	230
f2147de3 CYT	231	static const struct of_device_id sunxi_wdt_dt_ids[] = {
f2147de3 CYT	232	{ .compatible = "allwinner,sun4i-a10-wdt", .data = &sun4i_wdt_reg },
c5ec618f	233	{ .compatible = "allwinner,sun6i-a31-wdt", .data = &sun6i_wdt_reg },
f2147de3 CYT	234	{ /* sentinel */ }
	235	};
	236	MODULE_DEVICE_TABLE(of, sunxi_wdt_dt_ids);
	237
1d5898b4	238	static int sunxi_wdt_probe(struct platform_device *pdev)
d00680ed CC	239	{
d00680ed CC	240	struct sunxi_wdt_dev *sunxi_wdt;
f2147de3	241	const struct of_device_id *device;
d00680ed CC	242	struct resource *res;
	243	int err;
	244
	245	sunxi_wdt = devm_kzalloc(&pdev->dev, sizeof(*sunxi_wdt), GFP_KERNEL);
	246	if (!sunxi_wdt)
	247	return -EINVAL;
	248
	249	platform_set_drvdata(pdev, sunxi_wdt);
	250
f2147de3 CYT	251	device = of_match_device(sunxi_wdt_dt_ids, &pdev->dev);
	252	if (!device)
	253	return -ENODEV;
	254
	255	sunxi_wdt->wdt_regs = device->data;
	256
d00680ed CC	257	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	258	sunxi_wdt->wdt_base = devm_ioremap_resource(&pdev->dev, res);
	259	if (IS_ERR(sunxi_wdt->wdt_base))
	260	return PTR_ERR(sunxi_wdt->wdt_base);
	261
	262	sunxi_wdt->wdt_dev.info = &sunxi_wdt_info;
	263	sunxi_wdt->wdt_dev.ops = &sunxi_wdt_ops;
	264	sunxi_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
	265	sunxi_wdt->wdt_dev.max_timeout = WDT_MAX_TIMEOUT;
	266	sunxi_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
	267	sunxi_wdt->wdt_dev.parent = &pdev->dev;
	268
	269	watchdog_init_timeout(&sunxi_wdt->wdt_dev, timeout, &pdev->dev);
	270	watchdog_set_nowayout(&sunxi_wdt->wdt_dev, nowayout);
	271
	272	watchdog_set_drvdata(&sunxi_wdt->wdt_dev, sunxi_wdt);
	273
	274	sunxi_wdt_stop(&sunxi_wdt->wdt_dev);
	275
	276	err = watchdog_register_device(&sunxi_wdt->wdt_dev);
	277	if (unlikely(err))
	278	return err;
	279
d20a1d90 GR	280	sunxi_wdt->restart_handler.notifier_call = sunxi_restart_handle;
	281	sunxi_wdt->restart_handler.priority = 128;
	282	err = register_restart_handler(&sunxi_wdt->restart_handler);
	283	if (err)
	284	dev_err(&pdev->dev,
	285	"cannot register restart handler (err=%d)\n", err);
440e96bc	286
d00680ed CC	287	dev_info(&pdev->dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)",
	288	sunxi_wdt->wdt_dev.timeout, nowayout);
	289
	290	return 0;
	291	}
	292
1d5898b4	293	static int sunxi_wdt_remove(struct platform_device *pdev)
d00680ed CC	294	{
	295	struct sunxi_wdt_dev *sunxi_wdt = platform_get_drvdata(pdev);
	296
d20a1d90	297	unregister_restart_handler(&sunxi_wdt->restart_handler);
440e96bc	298
d00680ed CC	299	watchdog_unregister_device(&sunxi_wdt->wdt_dev);
	300	watchdog_set_drvdata(&sunxi_wdt->wdt_dev, NULL);
	301
	302	return 0;
	303	}
	304
	305	static void sunxi_wdt_shutdown(struct platform_device *pdev)
	306	{
	307	struct sunxi_wdt_dev *sunxi_wdt = platform_get_drvdata(pdev);
	308
	309	sunxi_wdt_stop(&sunxi_wdt->wdt_dev);
	310	}
	311
d00680ed CC	312	static struct platform_driver sunxi_wdt_driver = {
	313	.probe = sunxi_wdt_probe,
	314	.remove = sunxi_wdt_remove,
	315	.shutdown = sunxi_wdt_shutdown,
	316	.driver = {
d00680ed	317	.name = DRV_NAME,
85eee819	318	.of_match_table = sunxi_wdt_dt_ids,
d00680ed CC	319	},
	320	};
	321
	322	module_platform_driver(sunxi_wdt_driver);
	323
	324	module_param(timeout, uint, 0);
	325	MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");
	326
	327	module_param(nowayout, bool, 0);
	328	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
	329	"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	330
	331	MODULE_LICENSE("GPL");
	332	MODULE_AUTHOR("Carlo Caione <carlo.caione@gmail.com>");
	333	MODULE_AUTHOR("Henrik Nordstrom <henrik@henriknordstrom.net>");
	334	MODULE_DESCRIPTION("sunxi WatchDog Timer Driver");
	335	MODULE_VERSION(DRV_VERSION);