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dca536c4 MR |
1 | /* |
2 | * Copyright (C) 2015 Mans Rullgard <mans@mansr.com> | |
3 | * SMP86xx/SMP87xx Watchdog driver | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License as published by the | |
7 | * Free Software Foundation; either version 2 of the License, or (at your | |
8 | * option) any later version. | |
9 | */ | |
10 | ||
11 | #include <linux/bitops.h> | |
12 | #include <linux/clk.h> | |
13 | #include <linux/delay.h> | |
14 | #include <linux/io.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/moduleparam.h> | |
dca536c4 | 18 | #include <linux/platform_device.h> |
dca536c4 MR |
19 | #include <linux/watchdog.h> |
20 | ||
21 | #define DEFAULT_TIMEOUT 30 | |
22 | ||
23 | static bool nowayout = WATCHDOG_NOWAYOUT; | |
24 | module_param(nowayout, bool, 0); | |
25 | MODULE_PARM_DESC(nowayout, | |
26 | "Watchdog cannot be stopped once started (default=" | |
27 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); | |
28 | ||
29 | static unsigned int timeout; | |
30 | module_param(timeout, int, 0); | |
31 | MODULE_PARM_DESC(timeout, "Watchdog timeout"); | |
32 | ||
33 | /* | |
34 | * Counter counts down from programmed value. Reset asserts when | |
35 | * the counter reaches 1. | |
36 | */ | |
37 | #define WD_COUNTER 0 | |
38 | ||
39 | #define WD_CONFIG 4 | |
40 | #define WD_CONFIG_XTAL_IN BIT(0) | |
41 | #define WD_CONFIG_DISABLE BIT(31) | |
42 | ||
43 | struct tangox_wdt_device { | |
44 | struct watchdog_device wdt; | |
45 | void __iomem *base; | |
46 | unsigned long clk_rate; | |
47 | struct clk *clk; | |
dca536c4 MR |
48 | }; |
49 | ||
50 | static int tangox_wdt_set_timeout(struct watchdog_device *wdt, | |
51 | unsigned int new_timeout) | |
52 | { | |
53 | wdt->timeout = new_timeout; | |
54 | ||
55 | return 0; | |
56 | } | |
57 | ||
58 | static int tangox_wdt_start(struct watchdog_device *wdt) | |
59 | { | |
60 | struct tangox_wdt_device *dev = watchdog_get_drvdata(wdt); | |
61 | u32 ticks; | |
62 | ||
63 | ticks = 1 + wdt->timeout * dev->clk_rate; | |
64 | writel(ticks, dev->base + WD_COUNTER); | |
65 | ||
66 | return 0; | |
67 | } | |
68 | ||
69 | static int tangox_wdt_stop(struct watchdog_device *wdt) | |
70 | { | |
71 | struct tangox_wdt_device *dev = watchdog_get_drvdata(wdt); | |
72 | ||
73 | writel(0, dev->base + WD_COUNTER); | |
74 | ||
75 | return 0; | |
76 | } | |
77 | ||
78 | static unsigned int tangox_wdt_get_timeleft(struct watchdog_device *wdt) | |
79 | { | |
80 | struct tangox_wdt_device *dev = watchdog_get_drvdata(wdt); | |
81 | u32 count; | |
82 | ||
83 | count = readl(dev->base + WD_COUNTER); | |
84 | ||
85 | if (!count) | |
86 | return 0; | |
87 | ||
88 | return (count - 1) / dev->clk_rate; | |
89 | } | |
90 | ||
91 | static const struct watchdog_info tangox_wdt_info = { | |
92 | .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, | |
93 | .identity = "tangox watchdog", | |
94 | }; | |
95 | ||
0397c5db GR |
96 | static int tangox_wdt_restart(struct watchdog_device *wdt, |
97 | unsigned long action, void *data) | |
98 | { | |
99 | struct tangox_wdt_device *dev = watchdog_get_drvdata(wdt); | |
100 | ||
101 | writel(1, dev->base + WD_COUNTER); | |
102 | ||
103 | return 0; | |
104 | } | |
105 | ||
dca536c4 MR |
106 | static const struct watchdog_ops tangox_wdt_ops = { |
107 | .start = tangox_wdt_start, | |
108 | .stop = tangox_wdt_stop, | |
109 | .set_timeout = tangox_wdt_set_timeout, | |
110 | .get_timeleft = tangox_wdt_get_timeleft, | |
0397c5db | 111 | .restart = tangox_wdt_restart, |
dca536c4 MR |
112 | }; |
113 | ||
dca536c4 MR |
114 | static int tangox_wdt_probe(struct platform_device *pdev) |
115 | { | |
116 | struct tangox_wdt_device *dev; | |
117 | struct resource *res; | |
118 | u32 config; | |
119 | int err; | |
120 | ||
121 | dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); | |
122 | if (!dev) | |
123 | return -ENOMEM; | |
124 | ||
125 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
126 | dev->base = devm_ioremap_resource(&pdev->dev, res); | |
127 | if (IS_ERR(dev->base)) | |
128 | return PTR_ERR(dev->base); | |
129 | ||
130 | dev->clk = devm_clk_get(&pdev->dev, NULL); | |
131 | if (IS_ERR(dev->clk)) | |
132 | return PTR_ERR(dev->clk); | |
133 | ||
134 | err = clk_prepare_enable(dev->clk); | |
135 | if (err) | |
136 | return err; | |
137 | ||
138 | dev->clk_rate = clk_get_rate(dev->clk); | |
84b84bcf WS |
139 | if (!dev->clk_rate) { |
140 | err = -EINVAL; | |
141 | goto err; | |
142 | } | |
dca536c4 MR |
143 | |
144 | dev->wdt.parent = &pdev->dev; | |
145 | dev->wdt.info = &tangox_wdt_info; | |
146 | dev->wdt.ops = &tangox_wdt_ops; | |
147 | dev->wdt.timeout = DEFAULT_TIMEOUT; | |
148 | dev->wdt.min_timeout = 1; | |
c7ef68c3 | 149 | dev->wdt.max_hw_heartbeat_ms = (U32_MAX - 1) / dev->clk_rate; |
dca536c4 MR |
150 | |
151 | watchdog_init_timeout(&dev->wdt, timeout, &pdev->dev); | |
152 | watchdog_set_nowayout(&dev->wdt, nowayout); | |
153 | watchdog_set_drvdata(&dev->wdt, dev); | |
154 | ||
155 | /* | |
156 | * Deactivate counter if disable bit is set to avoid | |
157 | * accidental reset. | |
158 | */ | |
159 | config = readl(dev->base + WD_CONFIG); | |
160 | if (config & WD_CONFIG_DISABLE) | |
161 | writel(0, dev->base + WD_COUNTER); | |
162 | ||
163 | writel(WD_CONFIG_XTAL_IN, dev->base + WD_CONFIG); | |
164 | ||
165 | /* | |
166 | * Mark as active and restart with configured timeout if | |
167 | * already running. | |
168 | */ | |
169 | if (readl(dev->base + WD_COUNTER)) { | |
a3e376d2 | 170 | set_bit(WDOG_HW_RUNNING, &dev->wdt.status); |
dca536c4 MR |
171 | tangox_wdt_start(&dev->wdt); |
172 | } | |
173 | ||
0397c5db GR |
174 | watchdog_set_restart_priority(&dev->wdt, 128); |
175 | ||
dca536c4 | 176 | err = watchdog_register_device(&dev->wdt); |
84b84bcf WS |
177 | if (err) |
178 | goto err; | |
dca536c4 MR |
179 | |
180 | platform_set_drvdata(pdev, dev); | |
181 | ||
3d29f808 | 182 | dev_info(&pdev->dev, "SMP86xx/SMP87xx watchdog registered\n"); |
dca536c4 MR |
183 | |
184 | return 0; | |
84b84bcf WS |
185 | |
186 | err: | |
187 | clk_disable_unprepare(dev->clk); | |
188 | return err; | |
dca536c4 MR |
189 | } |
190 | ||
191 | static int tangox_wdt_remove(struct platform_device *pdev) | |
192 | { | |
193 | struct tangox_wdt_device *dev = platform_get_drvdata(pdev); | |
194 | ||
195 | tangox_wdt_stop(&dev->wdt); | |
196 | clk_disable_unprepare(dev->clk); | |
197 | ||
dca536c4 MR |
198 | watchdog_unregister_device(&dev->wdt); |
199 | ||
200 | return 0; | |
201 | } | |
202 | ||
203 | static const struct of_device_id tangox_wdt_dt_ids[] = { | |
204 | { .compatible = "sigma,smp8642-wdt" }, | |
205 | { .compatible = "sigma,smp8759-wdt" }, | |
206 | { } | |
207 | }; | |
208 | MODULE_DEVICE_TABLE(of, tangox_wdt_dt_ids); | |
209 | ||
210 | static struct platform_driver tangox_wdt_driver = { | |
211 | .probe = tangox_wdt_probe, | |
212 | .remove = tangox_wdt_remove, | |
213 | .driver = { | |
214 | .name = "tangox-wdt", | |
215 | .of_match_table = tangox_wdt_dt_ids, | |
216 | }, | |
217 | }; | |
218 | ||
219 | module_platform_driver(tangox_wdt_driver); | |
220 | ||
221 | MODULE_AUTHOR("Mans Rullgard <mans@mansr.com>"); | |
222 | MODULE_DESCRIPTION("SMP86xx/SMP87xx Watchdog driver"); | |
223 | MODULE_LICENSE("GPL"); |