[mirror_ubuntu-hirsute-kernel.git] / drivers / watchdog / tangox_wdt.c

// SPDX-License-Identifier: GPL-2.0+
/*
 *  Copyright (C) 2015 Mans Rullgard <mans@mansr.com>
 *  SMP86xx/SMP87xx Watchdog driver
 */

#include <linux/bitops.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
#include <linux/watchdog.h>

#define DEFAULT_TIMEOUT 30

static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout,
		 "Watchdog cannot be stopped once started (default="
		 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

static unsigned int timeout;
module_param(timeout, int, 0);
MODULE_PARM_DESC(timeout, "Watchdog timeout");

/*
 * Counter counts down from programmed value.  Reset asserts when
 * the counter reaches 1.
 */
#define WD_COUNTER		0

#define WD_CONFIG		4
#define WD_CONFIG_XTAL_IN	BIT(0)
#define WD_CONFIG_DISABLE	BIT(31)

struct tangox_wdt_device {
	struct watchdog_device wdt;
	void __iomem *base;
	unsigned long clk_rate;
	struct clk *clk;
};

static int tangox_wdt_set_timeout(struct watchdog_device *wdt,
				  unsigned int new_timeout)
{
	wdt->timeout = new_timeout;

	return 0;
}

static int tangox_wdt_start(struct watchdog_device *wdt)
{
	struct tangox_wdt_device *dev = watchdog_get_drvdata(wdt);
	u32 ticks;

	ticks = 1 + wdt->timeout * dev->clk_rate;
	writel(ticks, dev->base + WD_COUNTER);

	return 0;
}

static int tangox_wdt_stop(struct watchdog_device *wdt)
{
	struct tangox_wdt_device *dev = watchdog_get_drvdata(wdt);

	writel(0, dev->base + WD_COUNTER);

	return 0;
}

static unsigned int tangox_wdt_get_timeleft(struct watchdog_device *wdt)
{
	struct tangox_wdt_device *dev = watchdog_get_drvdata(wdt);
	u32 count;

	count = readl(dev->base + WD_COUNTER);

	if (!count)
		return 0;

	return (count - 1) / dev->clk_rate;
}

static const struct watchdog_info tangox_wdt_info = {
	.options  = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
	.identity = "tangox watchdog",
};

static int tangox_wdt_restart(struct watchdog_device *wdt,
			      unsigned long action, void *data)
{
	struct tangox_wdt_device *dev = watchdog_get_drvdata(wdt);

	writel(1, dev->base + WD_COUNTER);

	return 0;
}

static const struct watchdog_ops tangox_wdt_ops = {
	.start		= tangox_wdt_start,
	.stop		= tangox_wdt_stop,
	.set_timeout	= tangox_wdt_set_timeout,
	.get_timeleft	= tangox_wdt_get_timeleft,
	.restart	= tangox_wdt_restart,
};

static int tangox_wdt_probe(struct platform_device *pdev)
{
	struct tangox_wdt_device *dev;
	struct resource *res;
	u32 config;
	int err;

	dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
	if (!dev)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	dev->base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(dev->base))
		return PTR_ERR(dev->base);

	dev->clk = devm_clk_get(&pdev->dev, NULL);
	if (IS_ERR(dev->clk))
		return PTR_ERR(dev->clk);

	err = clk_prepare_enable(dev->clk);
	if (err)
		return err;

	dev->clk_rate = clk_get_rate(dev->clk);
	if (!dev->clk_rate) {
		err = -EINVAL;
		goto err;
	}

	dev->wdt.parent = &pdev->dev;
	dev->wdt.info = &tangox_wdt_info;
	dev->wdt.ops = &tangox_wdt_ops;
	dev->wdt.timeout = DEFAULT_TIMEOUT;
	dev->wdt.min_timeout = 1;
	dev->wdt.max_hw_heartbeat_ms = (U32_MAX - 1) / dev->clk_rate;

	watchdog_init_timeout(&dev->wdt, timeout, &pdev->dev);
	watchdog_set_nowayout(&dev->wdt, nowayout);
	watchdog_set_drvdata(&dev->wdt, dev);

	/*
	 * Deactivate counter if disable bit is set to avoid
	 * accidental reset.
	 */
	config = readl(dev->base + WD_CONFIG);
	if (config & WD_CONFIG_DISABLE)
		writel(0, dev->base + WD_COUNTER);

	writel(WD_CONFIG_XTAL_IN, dev->base + WD_CONFIG);

	/*
	 * Mark as active and restart with configured timeout if
	 * already running.
	 */
	if (readl(dev->base + WD_COUNTER)) {
		set_bit(WDOG_HW_RUNNING, &dev->wdt.status);
		tangox_wdt_start(&dev->wdt);
	}

	watchdog_set_restart_priority(&dev->wdt, 128);

	err = watchdog_register_device(&dev->wdt);
	if (err)
		goto err;

	platform_set_drvdata(pdev, dev);

	dev_info(&pdev->dev, "SMP86xx/SMP87xx watchdog registered\n");

	return 0;

 err:
	clk_disable_unprepare(dev->clk);
	return err;
}

static int tangox_wdt_remove(struct platform_device *pdev)
{
	struct tangox_wdt_device *dev = platform_get_drvdata(pdev);

	tangox_wdt_stop(&dev->wdt);
	clk_disable_unprepare(dev->clk);

	watchdog_unregister_device(&dev->wdt);

	return 0;
}

static const struct of_device_id tangox_wdt_dt_ids[] = {
	{ .compatible = "sigma,smp8642-wdt" },
	{ .compatible = "sigma,smp8759-wdt" },
	{ }
};
MODULE_DEVICE_TABLE(of, tangox_wdt_dt_ids);

static struct platform_driver tangox_wdt_driver = {
	.probe	= tangox_wdt_probe,
	.remove	= tangox_wdt_remove,
	.driver	= {
		.name		= "tangox-wdt",
		.of_match_table	= tangox_wdt_dt_ids,
	},
};

module_platform_driver(tangox_wdt_driver);

MODULE_AUTHOR("Mans Rullgard <mans@mansr.com>");
MODULE_DESCRIPTION("SMP86xx/SMP87xx Watchdog driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
2e62c498	1	// SPDX-License-Identifier: GPL-2.0+
dca536c4 MR	2	/*
	3	* Copyright (C) 2015 Mans Rullgard <mans@mansr.com>
	4	* SMP86xx/SMP87xx Watchdog driver
dca536c4 MR	5	*/
	6
	7	#include <linux/bitops.h>
	8	#include <linux/clk.h>
	9	#include <linux/delay.h>
	10	#include <linux/io.h>
	11	#include <linux/kernel.h>
	12	#include <linux/module.h>
	13	#include <linux/moduleparam.h>
ac316725	14	#include <linux/mod_devicetable.h>
dca536c4	15	#include <linux/platform_device.h>
dca536c4 MR	16	#include <linux/watchdog.h>
	17
	18	#define DEFAULT_TIMEOUT 30
	19
	20	static bool nowayout = WATCHDOG_NOWAYOUT;
	21	module_param(nowayout, bool, 0);
	22	MODULE_PARM_DESC(nowayout,
	23	"Watchdog cannot be stopped once started (default="
	24	__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	25
	26	static unsigned int timeout;
	27	module_param(timeout, int, 0);
	28	MODULE_PARM_DESC(timeout, "Watchdog timeout");
	29
	30	/*
	31	* Counter counts down from programmed value. Reset asserts when
	32	* the counter reaches 1.
	33	*/
	34	#define WD_COUNTER 0
	35
	36	#define WD_CONFIG 4
	37	#define WD_CONFIG_XTAL_IN BIT(0)
	38	#define WD_CONFIG_DISABLE BIT(31)
	39
	40	struct tangox_wdt_device {
	41	struct watchdog_device wdt;
	42	void __iomem *base;
	43	unsigned long clk_rate;
	44	struct clk *clk;
dca536c4 MR	45	};
	46
	47	static int tangox_wdt_set_timeout(struct watchdog_device *wdt,
	48	unsigned int new_timeout)
	49	{
	50	wdt->timeout = new_timeout;
	51
	52	return 0;
	53	}
	54
	55	static int tangox_wdt_start(struct watchdog_device *wdt)
	56	{
	57	struct tangox_wdt_device *dev = watchdog_get_drvdata(wdt);
	58	u32 ticks;
	59
	60	ticks = 1 + wdt->timeout * dev->clk_rate;
	61	writel(ticks, dev->base + WD_COUNTER);
	62
	63	return 0;
	64	}
	65
	66	static int tangox_wdt_stop(struct watchdog_device *wdt)
	67	{
	68	struct tangox_wdt_device *dev = watchdog_get_drvdata(wdt);
	69
	70	writel(0, dev->base + WD_COUNTER);
	71
	72	return 0;
	73	}
	74
	75	static unsigned int tangox_wdt_get_timeleft(struct watchdog_device *wdt)
	76	{
	77	struct tangox_wdt_device *dev = watchdog_get_drvdata(wdt);
	78	u32 count;
	79
	80	count = readl(dev->base + WD_COUNTER);
	81
	82	if (!count)
	83	return 0;
	84
	85	return (count - 1) / dev->clk_rate;
	86	}
	87
	88	static const struct watchdog_info tangox_wdt_info = {
	89	.options = WDIOF_SETTIMEOUT \| WDIOF_KEEPALIVEPING \| WDIOF_MAGICCLOSE,
	90	.identity = "tangox watchdog",
	91	};
	92
0397c5db GR	93	static int tangox_wdt_restart(struct watchdog_device *wdt,
	94	unsigned long action, void *data)
	95	{
	96	struct tangox_wdt_device *dev = watchdog_get_drvdata(wdt);
	97
	98	writel(1, dev->base + WD_COUNTER);
	99
	100	return 0;
	101	}
	102
dca536c4 MR	103	static const struct watchdog_ops tangox_wdt_ops = {
	104	.start = tangox_wdt_start,
	105	.stop = tangox_wdt_stop,
	106	.set_timeout = tangox_wdt_set_timeout,
	107	.get_timeleft = tangox_wdt_get_timeleft,
0397c5db	108	.restart = tangox_wdt_restart,
dca536c4 MR	109	};
dca536c4 MR	110
dca536c4 MR	111	static int tangox_wdt_probe(struct platform_device *pdev)
	112	{
	113	struct tangox_wdt_device *dev;
	114	struct resource *res;
	115	u32 config;
	116	int err;
	117
	118	dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
	119	if (!dev)
	120	return -ENOMEM;
	121
	122	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	123	dev->base = devm_ioremap_resource(&pdev->dev, res);
	124	if (IS_ERR(dev->base))
	125	return PTR_ERR(dev->base);
	126
	127	dev->clk = devm_clk_get(&pdev->dev, NULL);
	128	if (IS_ERR(dev->clk))
	129	return PTR_ERR(dev->clk);
	130
	131	err = clk_prepare_enable(dev->clk);
	132	if (err)
	133	return err;
	134
	135	dev->clk_rate = clk_get_rate(dev->clk);
84b84bcf WS	136	if (!dev->clk_rate) {
	137	err = -EINVAL;
	138	goto err;
	139	}
dca536c4 MR	140
	141	dev->wdt.parent = &pdev->dev;
	142	dev->wdt.info = &tangox_wdt_info;
	143	dev->wdt.ops = &tangox_wdt_ops;
	144	dev->wdt.timeout = DEFAULT_TIMEOUT;
	145	dev->wdt.min_timeout = 1;
c7ef68c3	146	dev->wdt.max_hw_heartbeat_ms = (U32_MAX - 1) / dev->clk_rate;
dca536c4 MR	147
	148	watchdog_init_timeout(&dev->wdt, timeout, &pdev->dev);
	149	watchdog_set_nowayout(&dev->wdt, nowayout);
	150	watchdog_set_drvdata(&dev->wdt, dev);
	151
	152	/*
	153	* Deactivate counter if disable bit is set to avoid
	154	* accidental reset.
	155	*/
	156	config = readl(dev->base + WD_CONFIG);
	157	if (config & WD_CONFIG_DISABLE)
	158	writel(0, dev->base + WD_COUNTER);
	159
	160	writel(WD_CONFIG_XTAL_IN, dev->base + WD_CONFIG);
	161
	162	/*
	163	* Mark as active and restart with configured timeout if
	164	* already running.
	165	*/
	166	if (readl(dev->base + WD_COUNTER)) {
a3e376d2	167	set_bit(WDOG_HW_RUNNING, &dev->wdt.status);
dca536c4 MR	168	tangox_wdt_start(&dev->wdt);
	169	}
	170
0397c5db GR	171	watchdog_set_restart_priority(&dev->wdt, 128);
0397c5db GR	172
dca536c4	173	err = watchdog_register_device(&dev->wdt);
84b84bcf WS	174	if (err)
84b84bcf WS	175	goto err;
dca536c4 MR	176
	177	platform_set_drvdata(pdev, dev);
	178
3d29f808	179	dev_info(&pdev->dev, "SMP86xx/SMP87xx watchdog registered\n");
dca536c4 MR	180
dca536c4 MR	181	return 0;
84b84bcf WS	182
	183	err:
	184	clk_disable_unprepare(dev->clk);
	185	return err;
dca536c4 MR	186	}
	187
	188	static int tangox_wdt_remove(struct platform_device *pdev)
	189	{
	190	struct tangox_wdt_device *dev = platform_get_drvdata(pdev);
	191
	192	tangox_wdt_stop(&dev->wdt);
	193	clk_disable_unprepare(dev->clk);
	194
dca536c4 MR	195	watchdog_unregister_device(&dev->wdt);
	196
	197	return 0;
	198	}
	199
	200	static const struct of_device_id tangox_wdt_dt_ids[] = {
	201	{ .compatible = "sigma,smp8642-wdt" },
	202	{ .compatible = "sigma,smp8759-wdt" },
	203	{ }
	204	};
	205	MODULE_DEVICE_TABLE(of, tangox_wdt_dt_ids);
	206
	207	static struct platform_driver tangox_wdt_driver = {
	208	.probe = tangox_wdt_probe,
	209	.remove = tangox_wdt_remove,
	210	.driver = {
	211	.name = "tangox-wdt",
	212	.of_match_table = tangox_wdt_dt_ids,
	213	},
	214	};
	215
	216	module_platform_driver(tangox_wdt_driver);
	217
	218	MODULE_AUTHOR("Mans Rullgard <mans@mansr.com>");
	219	MODULE_DESCRIPTION("SMP86xx/SMP87xx Watchdog driver");
	220	MODULE_LICENSE("GPL");